cpu/mcf5445x/dspi.c

   1 /*
   2  *
   3  * (C) Copyright 2000-2003
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   7  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <spi.h>
  30
  31 #if defined(CONFIG_CF_DSPI)
  32 #include <asm/immap.h>
  33 void dspi_init(void)
  34 {
  35         volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
  36         volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  37
  38         gpio->par_dspi = GPIO_PAR_DSPI_PCS5_PCS5 | GPIO_PAR_DSPI_PCS2_PCS2 |
  39             GPIO_PAR_DSPI_PCS1_PCS1 | GPIO_PAR_DSPI_PCS0_PCS0 |
  40             GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
  41             GPIO_PAR_DSPI_SCK_SCK;
  42
  43         dspi->dmcr = DSPI_DMCR_MSTR | DSPI_DMCR_CSIS7 | DSPI_DMCR_CSIS6 |
  44             DSPI_DMCR_CSIS5 | DSPI_DMCR_CSIS4 | DSPI_DMCR_CSIS3 |
  45             DSPI_DMCR_CSIS2 | DSPI_DMCR_CSIS1 | DSPI_DMCR_CSIS0 |
  46             DSPI_DMCR_CRXF | DSPI_DMCR_CTXF;
  47
  48         dspi->dctar0 = DSPI_DCTAR_TRSZ(7) | DSPI_DCTAR_CPOL | DSPI_DCTAR_CPHA |
  49             DSPI_DCTAR_PCSSCK_1CLK | DSPI_DCTAR_PASC(0) |
  50             DSPI_DCTAR_PDT(0) | DSPI_DCTAR_CSSCK(0) |
  51             DSPI_DCTAR_ASC(0) | DSPI_DCTAR_PBR(0) |
  52             DSPI_DCTAR_DT(1) | DSPI_DCTAR_BR(1);
  53 }
  54
  55 void dspi_tx(int chipsel, u8 attrib, u16 data)
  56 {
  57         volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  58
  59         while ((dspi->dsr & 0x0000F000) >= 4) ;
  60
  61         dspi->dtfr = (attrib << 24) | ((1 << chipsel) << 16) | data;
  62 }
  63
  64 u16 dspi_rx(void)
  65 {
  66         volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  67
  68         while ((dspi->dsr & 0x000000F0) == 0) ;
  69
  70         return (dspi->drfr & 0xFFFF);
  71 }
  72
  73 #endif                          /* CONFIG_HARD_SPI */