3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 DECLARE_GLOBAL_DATA_PTR
;
40 /* read co-processor 15, register #1 (control register) */
41 static unsigned long read_p15_c1 (void)
46 "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
52 printf ("p15/c1 is = %08lx\n", value
);
57 /* write to co-processor 15, register #1 (control register) */
58 static void write_p15_c1 (unsigned long value
)
61 printf ("write %08lx to p15/c1\n", value
);
64 "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
72 static void cp_delay (void)
76 /* copro seems to need some delay between reading and writing */
77 for (i
= 0; i
< 100; i
++);
80 /* See also ARM Ref. Man. */
81 #define C1_MMU (1<<0) /* mmu off/on */
82 #define C1_ALIGN (1<<1) /* alignment faults off/on */
83 #define C1_DC (1<<2) /* dcache off/on */
84 #define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
85 #define C1_SYS_PROT (1<<8) /* system protection */
86 #define C1_ROM_PROT (1<<9) /* ROM protection */
87 #define C1_IC (1<<12) /* icache off/on */
88 #define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
89 #define RESERVED_1 (0xf << 3) /* must be 111b for R/W */
94 * setup up stacks if necessary
97 IRQ_STACK_START
= _armboot_start
- CFG_MALLOC_LEN
- CFG_GBL_DATA_SIZE
- 4;
98 FIQ_STACK_START
= IRQ_STACK_START
- CONFIG_STACKSIZE_IRQ
;
103 int cleanup_before_linux (void)
106 * this function is called just before we call linux
107 * it prepares the processor for linux
109 * we turn off caches etc ...
114 disable_interrupts ();
116 /* turn off I/D-cache */
117 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i
));
118 i
&= ~(C1_DC
| C1_IC
);
119 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i
));
121 /* flush I/D-cache */
123 asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i
));
127 int do_reset (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
129 disable_interrupts ();
135 void icache_enable (void)
139 reg
= read_p15_c1 ();
141 write_p15_c1 (reg
| C1_IC
);
144 void icache_disable (void)
148 reg
= read_p15_c1 ();
150 write_p15_c1 (reg
& ~C1_IC
);
153 int icache_status (void)
155 return (read_p15_c1 () & C1_IC
) != 0;
159 /* It makes no sense to use the dcache if the MMU is not enabled */
160 void dcache_enable (void)
164 reg
= read_p15_c1 ();
166 write_p15_c1 (reg
| C1_DC
);
169 void dcache_disable (void)
173 reg
= read_p15_c1 ();
179 int dcache_status (void)
181 return (read_p15_c1 () & C1_DC
) != 0;