board/integratorcp/integratorcp.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * (C) Copyright 2003
  10  * Texas Instruments, <www.ti.com>
  11  * Kshitij Gupta <Kshitij@ti.com>
  12  *
  13  * (C) Copyright 2004
  14  * ARM Ltd.
  15  * Philippe Robin, <philippe.robin@arm.com>
  16  *
  17  * See file CREDITS for list of people who contributed to this
  18  * project.
  19  *
  20  * This program is free software; you can redistribute it and/or
  21  * modify it under the terms of the GNU General Public License as
  22  * published by the Free Software Foundation; either version 2 of
  23  * the License, or (at your option) any later version.
  24  *
  25  * This program is distributed in the hope that it will be useful,
  26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  * GNU General Public License for more details.
  29  *
  30  * You should have received a copy of the GNU General Public License
  31  * along with this program; if not, write to the Free Software
  32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33  * MA 02111-1307 USA
  34  */
  35
  36 #include <common.h>
  37
  38 DECLARE_GLOBAL_DATA_PTR;
  39
  40 void flash__init (void);
  41 void ether__init (void);
  42 void peripheral_power_enable (void);
  43
  44 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  45 void show_boot_progress(int progress)
  46 {
  47         printf("Boot reached stage %d\n", progress);
  48 }
  49 #endif
  50
  51 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  52
  53 /*
  54  * Miscellaneous platform dependent initialisations
  55  */
  56
  57 int board_init (void)
  58 {
  59         /* arch number of Integrator Board */
  60         gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
  61
  62         /* adress of boot parameters */
  63         gd->bd->bi_boot_params = 0x00000100;
  64
  65         gd->flags = 0;
  66
  67 #ifdef CONFIG_CM_REMAP
  68 extern void cm_remap(void);
  69         cm_remap();     /* remaps writeable memory to 0x00000000 */
  70 #endif
  71
  72         icache_enable ();
  73
  74         flash__init ();
  75         ether__init ();
  76         return 0;
  77 }
  78
  79
  80 int misc_init_r (void)
  81 {
  82         setenv("verify", "n");
  83         return (0);
  84 }
  85
  86 /******************************
  87  Routine:
  88  Description:
  89 ******************************/
  90 void flash__init (void)
  91 {
  92 }
  93 /*************************************************************
  94  Routine:ether__init
  95  Description: take the Ethernet controller out of reset and wait
  96               for the EEPROM load to complete.
  97 *************************************************************/
  98 void ether__init (void)
  99 {
 100 }
 101
 102 /******************************
 103  Routine:
 104  Description:
 105 ******************************/
 106 int dram_init (void)
 107 {
 108         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 109         gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 110
 111 #ifdef CONFIG_CM_SPD_DETECT
 112     {
 113 extern void dram_query(void);
 114         unsigned long cm_reg_sdram;
 115         unsigned long sdram_shift;
 116
 117         dram_query();   /* Assembler accesses to CM registers */
 118                         /* Queries the SPD values             */
 119
 120         /* Obtain the SDRAM size from the CM SDRAM register */
 121
 122         cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
 123         /*   Register         SDRAM size
 124          *
 125          *   0xXXXXXXbbb000bb    16 MB
 126          *   0xXXXXXXbbb001bb    32 MB
 127          *   0xXXXXXXbbb010bb    64 MB
 128          *   0xXXXXXXbbb011bb   128 MB
 129          *   0xXXXXXXbbb100bb   256 MB
 130          *
 131          */
 132         sdram_shift              = ((cm_reg_sdram & 0x0000001C)/4)%4;
 133         gd->bd->bi_dram[0].size  = 0x01000000 << sdram_shift;
 134
 135     }
 136 #endif /* CM_SPD_DETECT */
 137
 138         return 0;
 139 }
 140
 141 /* The Integrator/CP timer1 is clocked at 1MHz
 142  * can be divided by 16 or 256
 143  * and can be set up as a 32-bit timer
 144  */
 145 /* U-Boot expects a 32 bit timer, running at CFG_HZ */
 146 /* Keep total timer count to avoid losing decrements < div_timer */
 147 static unsigned long long total_count = 0;
 148 static unsigned long long lastdec;       /* Timer reading at last call     */
 149 static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
 150 static unsigned long long div_timer = 1; /* Divisor to convert timer reading
 151                                           * change to U-Boot ticks
 152                                           */
 153 /* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
 154 static ulong timestamp;         /* U-Boot ticks since startup         */
 155
 156 #define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
 157 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
 158
 159 /* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
 160  *  - unless otherwise stated
 161  */
 162
 163 /* starts up a counter
 164  * - the Integrator/CP timer can be set up to issue an interrupt */
 165 int interrupt_init (void)
 166 {
 167         /* Load timer with initial value */
 168         *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
 169         /* Set timer to be
 170          *      enabled           1
 171          *      periodic          1
 172          *      no interrupts     0
 173          *      X                 0
 174          *      divider 1        00 == less rounding error
 175          *      32 bit            1
 176          *      wrapping          0
 177          */
 178         *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
 179         /* init the timestamp */
 180         total_count = 0ULL;
 181         reset_timer_masked();
 182
 183         div_timer  = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
 184         div_timer /= div_clock;
 185
 186         return (0);
 187 }
 188
 189 /*
 190  * timer without interrupts
 191  */
 192 void reset_timer (void)
 193 {
 194         reset_timer_masked ();
 195 }
 196
 197 ulong get_timer (ulong base_ticks)
 198 {
 199         return get_timer_masked () - base_ticks;
 200 }
 201
 202 void set_timer (ulong ticks)
 203 {
 204         timestamp   = ticks;
 205         total_count = (unsigned long long)ticks * div_timer;
 206 }
 207
 208 /* delay usec useconds */
 209 void udelay (unsigned long usec)
 210 {
 211         ulong tmo, tmp;
 212
 213         /* Convert to U-Boot ticks */
 214         tmo  = usec * CFG_HZ;
 215         tmo /= (1000000L);
 216
 217         tmp  = get_timer_masked();      /* get current timestamp */
 218         tmo += tmp;                     /* form target timestamp */
 219
 220         while (get_timer_masked () < tmo) {/* loop till event */
 221                 /*NOP*/;
 222         }
 223 }
 224
 225 void reset_timer_masked (void)
 226 {
 227         /* capure current decrementer value    */
 228         lastdec   = (unsigned long long)READ_TIMER;
 229         /* start "advancing" time stamp from 0 */
 230         timestamp = 0L;
 231 }
 232
 233 /* converts the timer reading to U-Boot ticks          */
 234 /* the timestamp is the number of ticks since reset    */
 235 ulong get_timer_masked (void)
 236 {
 237         /* get current count */
 238         unsigned long long now = (unsigned long long)READ_TIMER;
 239
 240         if(now > lastdec) {
 241                 /* Must have wrapped */
 242                 total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
 243         } else {
 244                 total_count += lastdec - now;
 245         }
 246         lastdec   = now;
 247         timestamp = (ulong)(total_count/div_timer);
 248
 249         return timestamp;
 250 }
 251
 252 /* waits specified delay value and resets timestamp */
 253 void udelay_masked (unsigned long usec)
 254 {
 255         udelay(usec);
 256 }
 257
 258 /*
 259  * This function is derived from PowerPC code (read timebase as long long).
 260  * On ARM it just returns the timer value.
 261  */
 262 unsigned long long get_ticks(void)
 263 {
 264         return (unsigned long long)get_timer(0);
 265 }
 266
 267 /*
 268  * Return the timebase clock frequency
 269  * i.e. how often the timer decrements
 270  */
 271 ulong get_tbclk (void)
 272 {
 273         return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);
 274 }