board/dave/B2/B2.c

   1 /*
   2  * (C) Copyright 2004
   3  * DAVE Srl
   4  * http://www.dave-tech.it
   5  * http://www.wawnet.biz
   6  * mailto:info@wawnet.biz
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <asm/hardware.h>
  29
  30 DECLARE_GLOBAL_DATA_PTR;
  31
  32 /*
  33  * Miscelaneous platform dependent initialization
  34  */
  35
  36 int board_init (void)
  37 {
  38         u32 temp;
  39
  40         /* Configuration Port Control Register*/
  41         /* Port A */
  42         PCONA = 0x3ff;
  43
  44         /* Port B */
  45         PCONB = 0xff;
  46         PDATB = 0xFFFF;
  47
  48         /* Port C */
  49         /*
  50         PCONC = 0xff55ff15;
  51         PDATC = 0x0;
  52         PUPC = 0xffff;
  53         */
  54
  55         /* Port D */
  56         /*
  57         PCOND = 0xaaaa;
  58         PUPD = 0xff;
  59         */
  60
  61         /* Port E */
  62         PCONE = 0x0001aaa9;
  63         PDATE = 0x0;
  64         PUPE = 0xff;
  65
  66         /* Port F */
  67         PCONF = 0x124955;
  68         PDATF  = 0xff; /* B2-eth_reset tied high level */
  69         /*
  70         PUPF = 0x1e3;
  71         */
  72
  73         /* Port G */
  74         PUPG = 0x1;
  75         PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/
  76
  77         INTMSK = 0x03fffeff;
  78         INTCON = 0x05;
  79
  80     /*
  81         Configure chip ethernet interrupt as High level
  82         Port G EINT 0-7 EINT0 -> CHIP ETHERNET
  83     */
  84         temp = EXTINT;
  85         temp &= ~0x7;
  86     temp |= 0x1; /*LEVEL_HIGH*/
  87         EXTINT = temp;
  88
  89     /*
  90         Reset SMSC LAN91C96 chip
  91     */
  92     temp= PCONF;
  93     temp |= 0x00000040;
  94     PCONF = temp;
  95
  96         /* Reset high */
  97     temp = PDATF;
  98     temp |= (1 << 3);
  99     PDATF = temp;
 100
 101     /* Short delay */
 102     for (temp=0;temp<10;temp++)
 103     {
 104                 /* NOP */
 105     }
 106
 107     /* Reset low */
 108     temp = PDATF;
 109     temp &= ~(1 << 3);
 110     PDATF = temp;
 111
 112         /* arch number MACH_TYPE_MBA44B0 */
 113         gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;
 114
 115         /* location of boot parameters */
 116         gd->bd->bi_boot_params = 0x0c000100;
 117
 118         return 0;
 119 }
 120
 121 int dram_init (void)
 122 {
 123         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 124         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 125
 126         return (0);
 127 }