include/configs/smdk2443.h

   1 /*
   2  * (C) Copyright 2007 OpenMoko, Inc.
   3  * Author: Harald Welte <laforge@openmoko.org>
   4  *
   5  * Configuation settings for the SAMSUNG SMDK2443 board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 #if 0
  30 /* If we want to start u-boot from usb bootloader in NOR flash */
  31 #define CONFIG_SKIP_RELOCATE_UBOOT      1
  32 #define CONFIG_SKIP_LOWLEVEL_INIT       1
  33 #else
  34 /* If we want to start u-boot directly from within NAND flash */
  35 #define CONFIG_LL_INIT_NAND_ONLY
  36 #define CONFIG_S3C2410_NAND_BOOT        1
  37 #define CONFIG_S3C2410_NAND_SKIP_BAD    1
  38 #endif
  39
  40 #define CFG_UBOOT_SIZE          0x40000 /* size of u-boot, for NAND loading */
  41
  42 /*
  43  * High Level Configuration Options
  44  * (easy to change)
  45  */
  46 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  47 #define CONFIG_S3C2440          1       /* in a SAMSUNG S3C2440 SoC     */
  48 #define CONFIG_SMDK2443         1       /* on a SAMSUNG SMDK2440 Board  */
  49
  50 /* input clock of PLL */
  51 #define CONFIG_SYS_CLK_FREQ     16934400/* SMDK2440 has 16.9344MHz input clock */
  52
  53
  54 #define USE_920T_MMU            1
  55 #define CONFIG_USE_IRQ          1
  56
  57 /*
  58  * Size of malloc() pool
  59  */
  60 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 2048*1024)
  61 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  62
  63 /*
  64  * Hardware drivers
  65  */
  66 #define CONFIG_DRIVER_CS8900    1       /* we have a CS8900 on-board */
  67 #define CS8900_BASE             0x19000300
  68 #define CS8900_BUS16            1 /* the Linux driver does accesses as shorts */
  69
  70 /*
  71  * select serial console configuration
  72  */
  73 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK2440 */
  74 #define CONFIG_HWFLOW           1
  75
  76 /************************************************************
  77  * RTC
  78  ************************************************************/
  79 #define CONFIG_RTC_S3C24X0      1
  80
  81 /* allow to overwrite serial and ethaddr */
  82 #define CONFIG_ENV_OVERWRITE
  83
  84 #define CONFIG_BAUDRATE         115200
  85
  86 /***********************************************************
  87  * Command definition
  88  ***********************************************************/
  89 #include <config_cmd_default.h>
  90
  91                         /*CFG_CMD_BSP    | */
  92 #define CONFIG_CMD_CACHE
  93 #define CONFIG_CMD_DATE
  94                         /*CFG_CMD_DHCP   | */
  95 #define CONFIG_CMD_DIAG
  96 #define CONFIG_CMD_ELF
  97 #define CONFIG_CMD_EXT2
  98 #define CONFIG_CMD_FAT
  99                         /*CFG_CMD_HWFLOW | */
 100                         /* CFG_CMD_IDE   | */
 101                         /* CFG_CMD_IRQ   | */
 102 #define CONFIG_CMD_JFFS2
 103 #define CONFIG_CMD_MMC
 104 #define CONFIG_CMD_NAND
 105 #define CONFIG_CMD_PING
 106 #define CONFIG_CMD_PORTIO
 107 #define CONFIG_CMD_REGINFO
 108 #define CONFIG_CMD_SAVES
 109 #define CONFIG_CMD_LICENSE
 110 #define CONFIG_CMD_USB
 111
 112 #define CONFIG_BOOTDELAY        3
 113 #define CONFIG_BOOTARGS         "root=/dev/mtdblock4 rootfstype=jffs2 console=ttySAC2,115200 loglevel=8"
 114 #define CONFIG_ETHADDR          00:0c:20:02:0a:5b
 115 #define CONFIG_NETMASK          255.255.255.0
 116 #define CONFIG_IPADDR           192.168.1.100
 117 #define CONFIG_SERVERIP         192.168.1.21
 118 #define CONFIG_BOOTCOMMAND      "nand read.e 0x32000000 0x100000 0x200000; bootm"
 119
 120 #define CONFIG_DOS_PARTITION    1
 121
 122 #if defined(CONFIG_CMD_KGDB)
 123 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 124 /* what's this ? it's not used anywhere */
 125 #define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
 126 #endif
 127
 128 /*
 129  * Miscellaneous configurable options
 130  */
 131 #define CFG_LONGHELP                            /* undef to save memory         */
 132 #define CFG_PROMPT              "SMDK2443 # "   /* Monitor Command Prompt       */
 133 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 134 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 135 #define CFG_MAXARGS             32              /* max number of command args   */
 136 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 137
 138 #define CFG_MEMTEST_START       0x30000000      /* memtest works on     */
 139 #define CFG_MEMTEST_END         0x33F00000      /* 63 MB in DRAM        */
 140
 141 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 142
 143 #define CFG_LOAD_ADDR           0x32000000      /* default load address */
 144
 145 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 146 /* it to wrap 100 times (total 1562500) to get 1 sec. */
 147 #define CFG_HZ                  1562500
 148
 149 /* valid baudrates */
 150 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 151
 152 /*-----------------------------------------------------------------------
 153  * Stack sizes
 154  *
 155  * The stack sizes are set up in start.S using the settings below
 156  */
 157 #define CONFIG_STACKSIZE        (512*1024)      /* regular stack */
 158 #ifdef CONFIG_USE_IRQ
 159 #define CONFIG_STACKSIZE_IRQ    (8*1024)        /* IRQ stack */
 160 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 161 #endif
 162
 163 /* IDE/ATA config */
 164
 165 #if 0
 166 #define CFG_IDE_MAXBUS          1
 167 #define CFG_IDE_MAXDEVICE       2
 168 #define CFG_IDE_PREINIT         0
 169
 170 #define CFG_ATA_BASE_ADDR
 171 #endif
 172
 173 #define CONFIG_USB_OHCI_NEW     1
 174 #define CFG_USB_OHCI_CPU_INIT   1
 175 #define CFG_USB_OHCI_REGS_BASE  0x49000000 /* S3C24X0_USB_HOST_BASE */
 176 #define CFG_USB_OHCI_SLOT_NAME  "s3c2443"
 177 #define CFG_USB_OHCI_MAX_ROOT_PORTS     2
 178
 179 #define CONFIG_USB_DEVICE       1
 180 #define CONFIG_USB_TTY          1
 181 #define CFG_CONSOLE_IS_IN_ENV   1
 182 #define CONFIG_USBD_VENDORID            0x1457     /* Linux/NetChip */
 183 #define CONFIG_USBD_PRODUCTID_GSERIAL   0x5120    /* gserial */
 184 #define CONFIG_USBD_PRODUCTID_CDCACM    0x5119    /* CDC ACM */
 185 #define CONFIG_USBD_MANUFACTURER        "FiWin"
 186 #define CONFIG_USBD_PRODUCT_NAME        "S3C2443 Bootloader " U_BOOT_VERSION
 187 #define CONFIG_EXTRA_ENV_SETTINGS       "usbtty=cdc_acm\0"
 188 #define CONFIG_USBD_DFU                 1
 189 #define CONFIG_USBD_DFU_XFER_SIZE       4096
 190 #define CONFIG_USBD_DFU_INTERFACE       2
 191
 192 /*-----------------------------------------------------------------------
 193  * Physical Memory Map
 194  */
 195 #define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 196 #define PHYS_SDRAM_1            0x30000000 /* SDRAM Bank #1 */
 197 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 198
 199 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 200
 201 #define CFG_FLASH_BASE          PHYS_FLASH_1
 202
 203 /*-----------------------------------------------------------------------
 204  * FLASH and environment organization
 205  */
 206
 207 #define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 208 #if 0
 209 #define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 210 #endif
 211
 212 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks */
 213 #ifdef CONFIG_AMD_LV800
 214 #define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 215 #define CFG_MAX_FLASH_SECT      (19)    /* max number of sectors on one chip */
 216 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
 217 #endif
 218 #ifdef CONFIG_AMD_LV400
 219 #define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 220 #define CFG_MAX_FLASH_SECT      (11)    /* max number of sectors on one chip */
 221 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x070000) /* addr of environment */
 222 #endif
 223
 224 /* timeout values are in ticks */
 225 #define CFG_FLASH_ERASE_TOUT    (5*CFG_HZ) /* Timeout for Flash Erase */
 226 #define CFG_FLASH_WRITE_TOUT    (5*CFG_HZ) /* Timeout for Flash Write */
 227
 228 #define CFG_ENV_IS_IN_NAND      1
 229 #define CFG_ENV_SIZE            0x20000         /* 128k Total Size of Environment Sector */
 230 #define CFG_ENV_OFFSET_OOB      1
 231 #define CFG_PREBOOT_OVERRIDE    1
 232
 233 #define NAND_MAX_CHIPS          1
 234 #define CFG_NAND_BASE           0x4e000000
 235 #define CFG_MAX_NAND_DEVICE     1
 236
 237 #define CONFIG_MMC              1
 238 #define CFG_MMC_BASE            0xff000000
 239
 240 #define CONFIG_EXT2             1
 241
 242 /* FAT driver in u-boot is broken currently */
 243 #define CONFIG_FAT              1
 244 #define CONFIG_SUPPORT_VFAT
 245
 246 #if 1
 247 /* JFFS2 driver */
 248 #define CONFIG_JFFS2_CMDLINE    1
 249 #define CONFIG_JFFS2_NAND       1
 250 #define CONFIG_JFFS2_NAND_DEV   0
 251 //#define CONFIG_JFFS2_NAND_OFF         0x634000
 252 //#define CONFIG_JFFS2_NAND_SIZE        0x39cc000
 253 #endif
 254
 255 /* ATAG configuration */
 256 #define CONFIG_INITRD_TAG               1
 257 #define CONFIG_SETUP_MEMORY_TAGS        1
 258 #define CONFIG_CMDLINE_TAG              1
 259 #if 0
 260 #define CONFIG_SERIAL_TAG               1
 261 #define CONFIG_REVISION_TAG             1
 262 #endif
 263
 264
 265 #if 0
 266 #define CONFIG_VIDEO
 267 #define CONFIG_VIDEO_S3C2410
 268 #define CONFIG_CFB_CONSOLE
 269 #define CONFIG_VIDEO_LOGO
 270 #define CONFIG_VGA_AS_SINGLE_DEVICE
 271
 272 #define VIDEO_KBD_INIT_FCT      0
 273 #define VIDEO_TSTC_FCT          serial_tstc
 274 #define VIDEO_GETC_FCT          serial_getc
 275
 276 #define LCD_VIDEO_ADDR          0x33d00000
 277 #endif
 278
 279 #define CONFIG_S3C2410_NAND_BBT         1
 280 //#define CONFIG_S3C2410_NAND_HWECC     1
 281
 282 #define CFG_NAND_YAFFS_WRITE
 283 #define CFG_NAND_YAFFS1_NEW_OOB_LAYOUT
 284
 285 #define MTDIDS_DEFAULT          "nand0=smdk2443-nand"
 286 #define MTPARTS_DEFAULT         "smdk2443-nand:0x00100000(u-boot),0x00200000(kernel),0x00200000(update),0x00100000(splash),0x01400000(jffs2),-(temp)"
 287 #define CFG_NAND_DYNPART_MTD_KERNEL_NAME "smdk2443-nand"
 288 #define CONFIG_NAND_DYNPART
 289
 290 #endif  /* __CONFIG_H */