include/configs/netstar.h

   1 /*
   2  * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
   3  *
   4  * Configuation settings for the TI OMAP NetStar board.
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #include <configs/omap1510.h>
  29
  30 /*
  31  * High Level Configuration Options
  32  * (easy to change)
  33  */
  34 #define CONFIG_ARM925T  1               /* This is an arm925t CPU */
  35 #define CONFIG_OMAP     1               /* in a TI OMAP core */
  36 #define CONFIG_OMAP1510 1               /* which is in a 5910 */
  37
  38 /* Input clock of PLL */
  39 #define CONFIG_SYS_CLK_FREQ     150000000       /* 150MHz input clock */
  40 #define CONFIG_XTAL_FREQ        12000000
  41
  42 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  43
  44 #define CONFIG_MISC_INIT_R              /* There is nothing to really init */
  45 #define BOARD_LATE_INIT                 /* but we flash the LEDs here */
  46
  47 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  48 #define CONFIG_SETUP_MEMORY_TAGS        1
  49 #define CONFIG_INITRD_TAG               1
  50
  51 #define CONFIG_SILENT_CONSOLE           1       /* enable silent startup */
  52 #define CFG_CONSOLE_INFO_QUIET
  53
  54 /*
  55  * Physical Memory Map
  56  */
  57 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
  58 #define PHYS_SDRAM_1            0x10000000      /* SDRAM Bank #1 */
  59 #define PHYS_SDRAM_1_SIZE       (64 * 1024 * 1024)
  60 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
  61
  62 /*
  63  * FLASH organization
  64  */
  65 #define CFG_FLASH_BASE          PHYS_FLASH_1
  66 #define CFG_MAX_FLASH_BANKS     1
  67 #define PHYS_FLASH_1_SIZE       (1 * 1024 * 1024)
  68 #define CFG_MAX_FLASH_SECT      19
  69 #define CFG_FLASH_ERASE_TOUT    (5*CFG_HZ) /* in ticks */
  70 #define CFG_FLASH_WRITE_TOUT    (5*CFG_HZ)
  71
  72 #define CFG_MONITOR_BASE        PHYS_FLASH_1
  73 #define CFG_MONITOR_LEN         (256 * 1024)
  74
  75 /*
  76  * Environment settings
  77  */
  78 #define CFG_ENV_IS_IN_FLASH
  79 #define CFG_ENV_ADDR            0x4000
  80 #define CFG_ENV_SIZE            (8 * 1024)
  81 #define CFG_ENV_SECT_SIZE       (8 * 1024)
  82 #define CFG_ENV_ADDR_REDUND     0x6000
  83 #define CFG_ENV_SIZE_REDUND     CFG_ENV_SIZE
  84 #define CONFIG_ENV_OVERWRITE
  85
  86 /*
  87  * Size of malloc() pool
  88  */
  89 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  90 #define CFG_MALLOC_LEN          (4 * 1024 * 1024)
  91
  92 /*
  93  * The stack size is set up in start.S using the settings below
  94  */
  95 #define CONFIG_STACKSIZE        (1 * 1024 * 1024)       /* regular stack */
  96
  97 /*
  98  * Hardware drivers
  99  */
 100 #define CONFIG_DRIVER_SMC91111
 101 #define CONFIG_SMC91111_BASE    0x04000300
 102
 103 /*
 104  * NS16550 Configuration
 105  */
 106 #define CFG_NS16550
 107 #define CFG_NS16550_SERIAL
 108 #define CFG_NS16550_REG_SIZE    (-4)
 109 #define CFG_NS16550_CLK         (CONFIG_XTAL_FREQ)      /* can be 12M/32Khz or 48Mhz  */
 110 #define CFG_NS16550_COM1        OMAP1510_UART1_BASE     /* uart1 */
 111
 112 #define CONFIG_CONS_INDEX       1
 113 #define CONFIG_BAUDRATE         115200
 114 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 115
 116 /*#define CONFIG_SKIP_RELOCATE_UBOOT*/
 117 /*#define CONFIG_SKIP_LOWLEVEL_INIT */
 118
 119 /*
 120  * NAND flash
 121  */
 122 #define CFG_MAX_NAND_DEVICE     1
 123 #define NAND_MAX_CHIPS          1
 124 #define CFG_NAND_BASE   0x04000000 + (2 << 23)
 125 #define NAND_ALLOW_ERASE_ALL    1
 126
 127 /*
 128  * partitions (mtdparts command line support)
 129  */
 130 #define CONFIG_JFFS2_CMDLINE
 131 #define MTDIDS_DEFAULT          "nor0=omapflash.0,nand0=omapnand.0"
 132 #define MTDPARTS_DEFAULT        "mtdparts=" \
 133         "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
 134         "omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
 135
 136
 137 /*
 138  * Command line configuration.
 139  */
 140
 141 #define CONFIG_CMD_BDI
 142 #define CONFIG_CMD_BOOTD
 143 #define CONFIG_CMD_DHCP
 144 #define CONFIG_CMD_ENV
 145 #define CONFIG_CMD_FLASH
 146 #define CONFIG_CMD_IMI
 147 #define CONFIG_CMD_JFFS2
 148 #define CONFIG_CMD_LOADB
 149 #define CONFIG_CMD_MEMORY
 150 #define CONFIG_CMD_NAND
 151 #define CONFIG_CMD_NET
 152 #define CONFIG_CMD_PING
 153 #define CONFIG_CMD_RUN
 154
 155
 156 #define CONFIG_JFFS2_NAND       1       /* jffs2 on nand support */
 157
 158 /*
 159  * BOOTP options
 160  */
 161 #define CONFIG_BOOTP_SUBNETMASK
 162 #define CONFIG_BOOTP_GATEWAY
 163 #define CONFIG_BOOTP_HOSTNAME
 164 #define CONFIG_BOOTP_BOOTPATH
 165
 166 #define CONFIG_LOOPW
 167
 168 #define CONFIG_BOOTDELAY        3
 169 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* allow to break in always */
 170 #undef  CONFIG_BOOTARGS         /* the boot command will set bootargs*/
 171 #define CFG_AUTOLOAD            "n"             /* No autoload */
 172 #define CONFIG_BOOTCOMMAND      "run fboot"
 173 #define CONFIG_PREBOOT          "run setup"
 174 #define CONFIG_EXTRA_ENV_SETTINGS                                               \
 175         "autostart=yes\0"                                                       \
 176         "ospart=0\0"                                                            \
 177         "setup=setenv bootargs console=ttyS0,$baudrate "                        \
 178                 "$mtdparts\0"                                                   \
 179         "setpart="                                                              \
 180         "if test -n $swapos; then "                                             \
 181                 "setenv swapos; saveenv; "                                      \
 182         "else "                                                                 \
 183                 "if test $ospart -eq 0; then setenv ospart 1;"                  \
 184                         "else setenv ospart 0;          fi; "                   \
 185         "fi\0"                                                                  \
 186         "nfsargs=setenv bootargs $bootargs "                                    \
 187                 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off "      \
 188                 "nfsroot=$rootpath root=/dev/nfs\0"                             \
 189         "flashargs=run setpart;setenv bootargs $bootargs "                      \
 190                 "root=mtd:rootfs$ospart ro "                                    \
 191                 "rootfstype=jffs2\0"                                            \
 192         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0"             \
 193         "fboot=run flashargs;nboot kernel$ospart\0"                             \
 194         "nboot=bootp;run nfsargs;tftp\0"
 195
 196 #if 0   /* feel free to disable for development */
 197 #define CONFIG_AUTOBOOT_KEYED           /* Enable password protection   */
 198 #define CONFIG_AUTOBOOT_PROMPT          "\nNetStar PBX - boot in %d secs...\n"
 199 #define CONFIG_AUTOBOOT_DELAY_STR       "."     /* 1st "password"       */
 200 #endif
 201
 202 /*
 203  * Miscellaneous configurable options
 204  */
 205 #define CFG_LONGHELP                            /* undef to save memory         */
 206 #define CFG_PROMPT              "# "            /* Monitor Command Prompt       */
 207 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 208 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 209 #define CFG_MAXARGS             16              /* max number of command args   */
 210 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 211
 212 #define CFG_HUSH_PARSER
 213 #define CFG_PROMPT_HUSH_PS2     "> "
 214 #define CONFIG_AUTO_COMPLETE
 215
 216 #define CFG_MEMTEST_START       PHYS_SDRAM_1
 217 #define CFG_MEMTEST_END         PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
 218                                 (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE)
 219
 220 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 221
 222 #define CFG_LOAD_ADDR           PHYS_SDRAM_1 + 0x400000 /* default load address */
 223
 224 /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
 225  * This time is further subdivided by a local divisor.
 226  */
 227 #define CFG_TIMERBASE           OMAP1510_TIMER1_BASE
 228 #define CFG_PVT                 7               /* 2^(pvt+1), divide by 256 */
 229 #define CFG_HZ                  ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
 230
 231 #define OMAP5910_DPLL_DIV       1
 232 #define OMAP5910_DPLL_MUL       ((CONFIG_SYS_CLK_FREQ * \
 233                                  (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
 234
 235 #define OMAP5910_ARM_PER_DIV    2       /* CKL/4 */
 236 #define OMAP5910_LCD_DIV        2       /* CKL/4 */
 237 #define OMAP5910_ARM_DIV        0       /* CKL/1 */
 238 #define OMAP5910_DSP_DIV        0       /* CKL/1 */
 239 #define OMAP5910_TC_DIV         1       /* CKL/2 */
 240 #define OMAP5910_DSP_MMU_DIV    1       /* CKL/2 */
 241 #define OMAP5910_ARM_TIM_SEL    1       /* CKL used for MPU timers */
 242
 243 #define OMAP5910_ARM_EN_CLK     0x03d6  /* 0000 0011 1101 0110b  Clock Enable */
 244 #define OMAP5910_ARM_CKCTL      ((OMAP5910_ARM_PER_DIV)  |      \
 245                                  (OMAP5910_LCD_DIV << 2) |      \
 246                                  (OMAP5910_ARM_DIV << 4) |      \
 247                                  (OMAP5910_DSP_DIV << 6) |      \
 248                                  (OMAP5910_TC_DIV << 8) |       \
 249                                  (OMAP5910_DSP_MMU_DIV << 10) | \
 250                                  (OMAP5910_ARM_TIM_SEL << 12))
 251
 252 #endif  /* __CONFIG_H */