include/configs/assabet.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * 2004 (c) MontaVista Software, Inc.
   7  *
   8  * Configuation settings for the Intel Assabet board.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __CONFIG_H
  30 #define __CONFIG_H
  31
  32 /*
  33  * High Level Configuration Options
  34  * (easy to change)
  35  */
  36 #define CONFIG_SA1110           1       /* This is an SA1100 CPU        */
  37 #define CONFIG_ASSABET          1       /* on an Intel Assabet Board    */
  38
  39 #undef CONFIG_USE_IRQ
  40
  41 #define CONFIG_CMDLINE_TAG       1      /* enable passing of ATAGs      */
  42 #define CONFIG_SETUP_MEMORY_TAGS 1
  43 #define CONFIG_INITRD_TAG        1
  44
  45 /*
  46  * Size of malloc() pool
  47  */
  48 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 128*1024)
  49 #define CFG_GBL_DATA_SIZE       128     /* size rsrvd for initial data */
  50
  51 /*
  52  * Hardware drivers
  53  */
  54 #define CONFIG_DRIVER_LAN91C96  /* we have an SMC9194 on-board */
  55 #define CONFIG_LAN91C96_BASE    0x18000000
  56
  57 /*
  58  * select serial console configuration
  59  */
  60 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on Intel Assabet */
  61
  62 /* allow to overwrite serial and ethaddr */
  63 #define CONFIG_ENV_OVERWRITE
  64
  65 #define CONFIG_BAUDRATE         115200
  66
  67
  68 /*
  69  * Command line configuration.
  70  */
  71 #include <config_cmd_default.h>
  72
  73 #define CONFIG_CMD_DHCP
  74
  75
  76 /*
  77  * BOOTP options
  78  */
  79 #define CONFIG_BOOTP_SUBNETMASK
  80 #define CONFIG_BOOTP_GATEWAY
  81 #define CONFIG_BOOTP_HOSTNAME
  82 #define CONFIG_BOOTP_BOOTPATH
  83
  84
  85 #define CONFIG_BOOTDELAY        3
  86 #define CONFIG_BOOTARGS         "console=ttySA0,115200n8 root=/dev/nfs ip=bootp"
  87 #define CONFIG_BOOTCOMMAND      "bootp;tftp;bootm"
  88 #define CFG_AUTOLOAD            "n"     /* No autoload */
  89
  90 #if defined(CONFIG_CMD_KGDB)
  91 #define CONFIG_KGDB_BAUDRATE    115200  /* speed to run kgdb serial port */
  92 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
  93 #endif
  94
  95 /*
  96  * Miscellaneous configurable options
  97  */
  98 #define CFG_LONGHELP            /* undef to save memory         */
  99 #define CFG_PROMPT              "Intel Assabet # "      /* Monitor Command Prompt       */
 100 #define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
 101 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)   /* Print Buffer Size */
 102 #define CFG_MAXARGS             16      /* max number of command args   */
 103 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 104
 105 #define CFG_MEMTEST_START       0xc0400000      /* memtest works on     */
 106 #define CFG_MEMTEST_END         0xc0800000      /* 4 ... 8 MB in DRAM   */
 107
 108 #undef  CFG_CLKS_IN_HZ
 109
 110 #define CFG_LOAD_ADDR           0xc0000000      /* default load address */
 111
 112 #define CFG_HZ                  3686400 /* incrementer freq: 3.6864 MHz */
 113 #define CFG_CPUSPEED            0x0a    /* set core clock to 206MHz */
 114
 115                                                 /* valid baudrates */
 116 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 117
 118 /*-----------------------------------------------------------------------
 119  * Stack sizes
 120  *
 121  * The stack sizes are set up in start.S using the settings below
 122  */
 123 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 124 #ifdef CONFIG_USE_IRQ
 125 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 126 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 127 #endif
 128
 129 /*-----------------------------------------------------------------------
 130  * Physical Memory Map
 131  */
 132 #define CONFIG_NR_DRAM_BANKS    1       /* we have 1 bank of SDRAM */
 133 #define PHYS_SDRAM_1            0xc0000000      /* SDRAM Bank #1 */
 134 #define PHYS_SDRAM_1_SIZE       0x02000000      /* 32 MB */
 135
 136 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
 137 #define PHYS_FLASH_SIZE         0x02000000      /* 32 MB */
 138 #define PHYS_FLASH_BANK_SIZE    0x01000000      /* 16 MB Banks */
 139 #define PHYS_FLASH_SECT_SIZE    0x00040000      /* 256 KB sectors (x2) */
 140
 141 #define CFG_MONITOR_BASE        TEXT_BASE
 142 #define CFG_MONITOR_LEN         (256 * 1024)    /* Reserve 256 KB for Monitor */
 143
 144 #if CFG_MONITOR_BASE < CFG_FLASH_BASE
 145 #define CFG_RAMSTART
 146 #endif
 147
 148 /*-----------------------------------------------------------------------
 149  * FLASH and environment organization
 150  */
 151
 152 #define CFG_FLASH_BASE          PHYS_FLASH_1
 153 #define CFG_FLASH_SIZE          PHYS_FLASH_SIZE
 154 #define CFG_FLASH_CFI           1       /* flash is CFI conformant      */
 155 #define CFG_FLASH_CFI_DRIVER    1       /* use common cfi driver        */
 156 #define CFG_FLASH_USE_BUFFER_WRITE 1    /* use buffered writes (20x faster) */
 157 #define CFG_MAX_FLASH_BANKS     1       /* max # of memory banks        */
 158 #define CFG_FLASH_INCREMENT     0       /* there is only one bank       */
 159 #define CFG_MAX_FLASH_SECT      128     /* max # of sectors on one chip */
 160 #undef CFG_FLASH_PROTECTION
 161 #define CFG_FLASH_BANKS_LIST    { CFG_FLASH_BASE }
 162
 163 #define CFG_ENV_IS_IN_FLASH     1
 164
 165 #if defined(CFG_ENV_IS_IN_FLASH)
 166 #define CFG_ENV_IN_OWN_SECTOR   1
 167 #define CFG_ENV_ADDR            (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE)
 168 #define CFG_ENV_SIZE            PHYS_FLASH_SECT_SIZE
 169 #define CFG_ENV_SECT_SIZE       PHYS_FLASH_SECT_SIZE
 170 #endif
 171
 172 #endif /* __CONFIG_H */