include/configs/M5271EVB.h

   1 /*
   2  * Configuation settings for the Freescale M5271EVB
   3  *
   4  * Based on MC5272C3 and r5200 board configs
   5  * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
   6  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 /*
  28  * board/config.h - configuration options, board specific
  29  */
  30
  31 #ifndef _M5271EVB_H
  32 #define _M5271EVB_H
  33
  34 /*
  35  * High Level Configuration Options (easy to change)
  36  */
  37 #define CONFIG_MCF52x2          /* define processor family */
  38 #define CONFIG_M5271            /* define processor type */
  39 #define CONFIG_M5271EVB         /* define board type */
  40
  41 #define CONFIG_MCFTMR
  42
  43 #define CONFIG_MCFUART
  44 #define CFG_UART_PORT           (0)
  45 #define CONFIG_BAUDRATE         19200
  46 #define CFG_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 115200 }
  47
  48 #undef CONFIG_WATCHDOG          /* disable watchdog */
  49
  50 /* Configuration for environment
  51  * Environment is embedded in u-boot in the second sector of the flash
  52  */
  53 #ifndef CONFIG_MONITOR_IS_IN_RAM
  54 #define CFG_ENV_OFFSET          0x4000
  55 #else
  56 #define CFG_ENV_ADDR            0xffe04000
  57 #endif
  58 #define CFG_ENV_SECT_SIZE       0x2000
  59 #define CFG_ENV_IS_IN_FLASH     1
  60 #define CFG_USE_PPCENV                  /* Environment embedded in sect .ppcenv */
  61
  62 /*
  63  * BOOTP options
  64  */
  65 #define CONFIG_BOOTP_BOOTFILESIZE
  66 #define CONFIG_BOOTP_BOOTPATH
  67 #define CONFIG_BOOTP_GATEWAY
  68 #define CONFIG_BOOTP_HOSTNAME
  69
  70 /*
  71  * Command line configuration.
  72  */
  73 #include <config_cmd_default.h>
  74
  75 #define CONFIG_CMD_PING
  76 #define CONFIG_CMD_NET
  77 #define CONFIG_CMD_MII
  78 #define CONFIG_CMD_ELF
  79 #define CONFIG_CMD_FLASH
  80 #define CONFIG_CMD_I2C
  81 #define CONFIG_CMD_MEMORY
  82 #define CONFIG_CMD_MISC
  83
  84 #undef CONFIG_CMD_LOADS
  85 #undef CONFIG_CMD_LOADB
  86
  87 #define CONFIG_MCFFEC
  88 #ifdef CONFIG_MCFFEC
  89 #       define CONFIG_NET_MULTI         1
  90 #       define CONFIG_MII               1
  91 #       define CFG_DISCOVER_PHY
  92 #       define CFG_RX_ETH_BUFFER        8
  93 #       define CFG_FAULT_ECHO_LINK_DOWN
  94
  95 #       define CFG_FEC0_PINMUX          0
  96 #       define CFG_FEC0_MIIBASE         CFG_FEC0_IOBASE
  97 #       define MCFFEC_TOUT_LOOP         50000
  98 /* If CFG_DISCOVER_PHY is not defined - hardcoded */
  99 #       ifndef CFG_DISCOVER_PHY
 100 #               define FECDUPLEX        FULL
 101 #               define FECSPEED         _100BASET
 102 #       else
 103 #               ifndef CFG_FAULT_ECHO_LINK_DOWN
 104 #                       define CFG_FAULT_ECHO_LINK_DOWN
 105 #               endif
 106 #       endif                   /* CFG_DISCOVER_PHY */
 107 #endif
 108
 109 /* I2C */
 110 #define CONFIG_FSL_I2C
 111 #define CONFIG_HARD_I2C         /* I2C with hw support */
 112 #undef CONFIG_SOFT_I2C          /* I2C bit-banged */
 113 #define CFG_I2C_SPEED           80000
 114 #define CFG_I2C_SLAVE           0x7F
 115 #define CFG_I2C_OFFSET          0x00000300
 116 #define CFG_IMMR                CFG_MBAR
 117
 118 #define CONFIG_BOOTDELAY        1       /* autoboot after 5 seconds */
 119 #define CONFIG_BOOTFILE         "u-boot.bin"
 120 #ifdef CONFIG_MCFFEC
 121 #       define CONFIG_NET_RETRY_COUNT   5
 122 #       define CONFIG_ETHADDR   00:e0:0c:bc:e5:60
 123 #       define CONFIG_IPADDR    192.162.1.2
 124 #       define CONFIG_NETMASK   255.255.255.0
 125 #       define CONFIG_SERVERIP  192.162.1.1
 126 #       define CONFIG_GATEWAYIP 192.162.1.1
 127 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 128 #endif                          /* FEC_ENET */
 129
 130 #define CONFIG_HOSTNAME         M5235EVB
 131 #define CONFIG_EXTRA_ENV_SETTINGS               \
 132         "netdev=eth0\0"                         \
 133         "loadaddr=10000\0"                      \
 134         "u-boot=u-boot.bin\0"                   \
 135         "load=tftp ${loadaddr) ${u-boot}\0"     \
 136         "upd=run load; run prog\0"              \
 137         "prog=prot off ffe00000 ffe2ffff;"              \
 138         "era ffe00000 ffe2ffff;"                                \
 139         "cp.b ${loadaddr} 0 ${filesize};"       \
 140         "save\0"                                \
 141         ""
 142
 143 #define CFG_PROMPT              "=> "
 144 #define CFG_LONGHELP            /* undef to save memory */
 145
 146 #if defined(CONFIG_CMD_KGDB)
 147 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size      */
 148 #else
 149 #define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
 150 #endif
 151 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)   /* Print Buffer Size */
 152 #define CFG_MAXARGS             16      /* max number of command args   */
 153 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 154
 155 #define CFG_LOAD_ADDR           0x00100000
 156
 157 #define CFG_MEMTEST_START       0x400
 158 #define CFG_MEMTEST_END         0x380000
 159
 160 #define CFG_HZ                  1000000
 161 #define CFG_CLK                 100000000
 162
 163 /*
 164  * Low Level Configuration Settings
 165  * (address mappings, register initial values, etc.)
 166  * You should know what you are doing if you make changes here.
 167  */
 168
 169 #define CFG_MBAR                0x40000000      /* Register Base Addrs */
 170
 171 /*
 172  * Definitions for initial stack pointer and data area (in DPRAM)
 173  */
 174 #define CFG_INIT_RAM_ADDR       0x20000000
 175 #define CFG_INIT_RAM_END        0x1000  /* End of used area in internal SRAM    */
 176 #define CFG_GBL_DATA_SIZE       64      /* size in bytes reserved for initial data */
 177 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 178 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 179
 180 /*
 181  * Start addresses for the final memory configuration
 182  * (Set up by the startup code)
 183  * Please note that CFG_SDRAM_BASE _must_ start at 0
 184  */
 185 #define CFG_SDRAM_BASE          0x00000000
 186 #define CFG_SDRAM_SIZE          16      /* SDRAM size in MB */
 187 #define CFG_FLASH_BASE          0xffe00000
 188
 189 #ifdef  CONFIG_MONITOR_IS_IN_RAM
 190 #define CFG_MONITOR_BASE        0x20000
 191 #else
 192 #define CFG_MONITOR_BASE        (CFG_FLASH_BASE + 0x400)
 193 #endif
 194
 195 #define CFG_MONITOR_LEN         0x40000
 196 #define CFG_MALLOC_LEN          (256 << 10)
 197 #define CFG_BOOTPARAMS_LEN      (64*1024)
 198
 199 /*
 200  * For booting Linux, the board info and command line data
 201  * have to be in the first 8 MB of memory, since this is
 202  * the maximum mapped by the Linux kernel during initialization ??
 203  */
 204 #define CFG_BOOTMAPSZ           (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
 205
 206 /* FLASH organization */
 207 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 208 #define CFG_MAX_FLASH_SECT      11      /* max number of sectors on one chip    */
 209 #define CFG_FLASH_ERASE_TOUT    1000
 210
 211 #define CFG_FLASH_CFI           1
 212 #define CFG_FLASH_CFI_DRIVER    1
 213 #define CFG_FLASH_SIZE          0x200000
 214
 215 /* Cache Configuration */
 216 #define CFG_CACHELINE_SIZE      16
 217
 218 /* Port configuration */
 219 #define CFG_FECI2C              0xF0
 220
 221 #endif                          /* _M5271EVB_H */