3 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/processor.h>
28 #include <asm/immap.h>
30 DECLARE_GLOBAL_DATA_PTR
;
33 * Low Power Divider specifications
35 #define CLOCK_LPD_MIN (1 << 0) /* Divider (decoded) */
36 #define CLOCK_LPD_MAX (1 << 15) /* Divider (decoded) */
38 #define CLOCK_PLL_FVCO_MAX 540000000
39 #define CLOCK_PLL_FVCO_MIN 300000000
41 #define CLOCK_PLL_FSYS_MAX 266666666
42 #define CLOCK_PLL_FSYS_MIN 100000000
45 void clock_enter_limp(int lpdiv
)
47 volatile ccm_t
*ccm
= (volatile ccm_t
*)MMAP_CCM
;
50 /* Check bounds of divider */
51 if (lpdiv
< CLOCK_LPD_MIN
)
52 lpdiv
= CLOCK_LPD_MIN
;
53 if (lpdiv
> CLOCK_LPD_MAX
)
54 lpdiv
= CLOCK_LPD_MAX
;
56 /* Round divider down to nearest power of two */
57 for (i
= 0, j
= lpdiv
; j
!= 1; j
>>= 1, i
++) ;
59 /* Apply the divider to the system clock */
60 ccm
->cdr
= (ccm
->cdr
& 0xF0FF) | CCM_CDR_LPDIV(i
);
62 /* Enable Limp Mode */
63 ccm
->misccr
|= CCM_MISCCR_LIMP
;
67 * brief Exit Limp mode
68 * warning The PLL should be set and locked prior to exiting Limp mode
70 void clock_exit_limp(void)
72 volatile ccm_t
*ccm
= (volatile ccm_t
*)MMAP_CCM
;
73 volatile pll_t
*pll
= (volatile pll_t
*)MMAP_PLL
;
76 ccm
->misccr
&= ~CCM_MISCCR_LIMP
;
78 /* Wait for the PLL to lock */
79 while (!(pll
->psr
& PLL_PSR_LOCK
)) ;
83 * get_clocks() fills in gd->cpu_clock and gd->bus_clk
88 volatile ccm_t
*ccm
= (volatile ccm_t
*)MMAP_CCM
;
89 volatile pll_t
*pll
= (volatile pll_t
*)MMAP_PLL
;
90 int vco
, temp
, pcrvalue
, pfdr
;
93 bootmode
= (ccm
->ccr
& 0x000C) >> 2;
95 pcrvalue
= pll
->pcr
& 0xFF0F0FFF;
96 pfdr
= pcrvalue
>> 24;
102 vco
= pfdr
* CFG_INPUT_CLKSRC
;
106 if ((ccm
->ccr
& CCM_MISCCR_LIMP
) == CCM_MISCCR_LIMP
) {
109 gd
->inp_clk
= CFG_INPUT_CLKSRC
; /* Input clock */
111 temp
= (pll
->pcr
& PLL_PCR_OUTDIV1_MASK
) + 1;
112 gd
->cpu_clk
= vco
/ temp
; /* cpu clock */
114 temp
= ((pll
->pcr
& PLL_PCR_OUTDIV2_MASK
) >> 4) + 1;
115 gd
->flb_clk
= vco
/ temp
; /* flexbus clock */
116 gd
->bus_clk
= gd
->flb_clk
;