2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * modified for Promess PRO - by Andy Joseph, andy@promessdev.com
6 * modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
7 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
8 * Also changed the refresh for 100Mhz operation
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #if defined(CONFIG_STATUS_LED)
35 #include <status_led.h>
36 #endif /* CONFIG_STATUS_LED */
38 /* Kollmorgen DPR initialization data */
44 {0x500003F2, 2, "\x86\x00"}, /* HW parameter */
45 {0x500003F0, 2, "\x00\x00"},
46 {0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
50 * Initialize Kollmorgen DPR
52 static void kollmorgen_init(void)
57 for (i
= 0; i
< sizeof(init_seq
) / sizeof(struct init_elem
); ++i
) {
58 p
= (vu_char
*)init_seq
[i
].addr
;
59 for (j
= 0; j
< init_seq
[i
].len
; ++j
)
60 *(p
+ j
) = *(init_seq
[i
].data
+ j
);
63 printf("DPR: Kollmorgen DPR initialized\n");
68 * Early board initalization.
70 int board_early_init_r(void)
72 /* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
73 *(vu_long
*)MPC5XXX_ADDECR
&= ~(1 << 25);
74 *(vu_long
*)MPC5XXX_ADDECR
|= (1 << 16);
76 /* Initialize Kollmorgen DPR */
84 * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(),
85 * PHY goes into FX mode. To take it out of the FX mode and switch into
86 * desired TX operation, one needs to clear the FX_SEL bit of Mode Control
91 unsigned short mode_control
;
93 miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR
, 0x15, &mode_control
);
94 miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR
, 0x15,
95 mode_control
& 0xfffe);
101 * Helper function to initialize SDRAM controller.
103 static void sdram_start(int hi_addr
)
105 long hi_addr_bit
= hi_addr
? 0x01000000 : 0;
107 /* unlock mode register */
108 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= SDRAM_CONTROL
| 0x80000000 |
111 /* precharge all banks */
112 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= SDRAM_CONTROL
| 0x80000002 |
116 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= SDRAM_CONTROL
| 0x80000004 |
119 /* auto refresh, second time */
120 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= SDRAM_CONTROL
| 0x80000004 |
123 /* set mode register */
124 *(vu_long
*)MPC5XXX_SDRAM_MODE
= SDRAM_MODE
;
126 /* normal operation */
127 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= SDRAM_CONTROL
| hi_addr_bit
;
129 #endif /* !CFG_RAMBOOT */
133 * Initalize SDRAM - configure SDRAM controller, detect memory size.
135 long int initdram(int board_type
)
141 /* According to AN3221 (MPC5200B SDRAM Initialization and
142 * Configuration), the SDelay register must be written a value of
143 * 0x00000004 as the first step of the SDRAM contorller configuration.
145 *(vu_long
*)MPC5XXX_SDRAM_SDELAY
= 0x04;
147 /* configure SDRAM start/end for detection */
148 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0x0000001e; /* 2G at 0x0 */
149 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= 0x80000000; /* disabled */
151 /* setup config registers */
152 *(vu_long
*)MPC5XXX_SDRAM_CONFIG1
= SDRAM_CONFIG1
;
153 *(vu_long
*)MPC5XXX_SDRAM_CONFIG2
= SDRAM_CONFIG2
;
156 test1
= get_ram_size((long *)CFG_SDRAM_BASE
, 0x80000000);
158 test2
= get_ram_size((long *)CFG_SDRAM_BASE
, 0x80000000);
166 /* memory smaller than 1MB is impossible */
167 if (dramsize
< (1 << 20))
170 /* set SDRAM CS0 size according to the amount of RAM found */
172 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0x13 +
173 __builtin_ffs(dramsize
>> 20) - 1;
175 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0; /* disabled */
178 /* let SDRAM CS1 start right after CS0 and disable it */
179 *(vu_long
*) MPC5XXX_SDRAM_CS1CFG
= dramsize
;
181 #else /* !CFG_RAMBOOT */
182 /* retrieve size of memory connected to SDRAM CS0 */
183 dramsize
= *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
& 0xFF;
184 if (dramsize
>= 0x13)
185 dramsize
= (1 << (dramsize
- 0x13)) << 20;
188 #endif /* CFG_RAMBOOT */
190 /* return total ram size */
197 uchar rev
= *(vu_char
*)CPLD_REV_REGISTER
;
198 printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev
);
203 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
204 void ft_board_setup(void *blob
, bd_t
*bd
)
206 ft_cpu_setup(blob
, bd
);
208 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
211 #if defined(CONFIG_STATUS_LED)
212 void __led_init(led_id_t regaddr
, int state
)
214 *((vu_long
*) regaddr
) |= ENABLE_GPIO_OUT
;
216 if (state
== STATUS_LED_ON
)
217 *((vu_long
*) regaddr
) |= LED_ON
;
219 *((vu_long
*) regaddr
) &= ~LED_ON
;
222 void __led_set(led_id_t regaddr
, int state
)
224 if (state
== STATUS_LED_ON
)
225 *((vu_long
*) regaddr
) |= LED_ON
;
227 *((vu_long
*) regaddr
) &= ~LED_ON
;
230 void __led_toggle(led_id_t regaddr
)
232 *((vu_long
*) regaddr
) ^= LED_ON
;
234 #endif /* CONFIG_STATUS_LED */