add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / cpu / nios2 / epcs.c
blob414c38c2b1df370f8432777e28bb635a90e028ad
1 /*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
5 * See file CREDITS for list of people who contributed to this
6 * project.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
24 #include <common.h>
26 #if defined(CFG_NIOS_EPCSBASE)
27 #include <command.h>
28 #include <asm/io.h>
29 #include <nios2-io.h>
30 #include <nios2-epcs.h>
33 /*-----------------------------------------------------------------------*/
34 #define SHORT_HELP\
35 "epcs - read/write Cyclone EPCS configuration device.\n"
37 #define LONG_HELP\
38 "\n"\
39 "epcs erase start [end]\n"\
40 " - erase sector start or sectors start through end.\n"\
41 "epcs info\n"\
42 " - display EPCS device information.\n"\
43 "epcs protect on | off\n"\
44 " - turn device protection on or off.\n"\
45 "epcs read addr offset count\n"\
46 " - read count bytes from offset to addr.\n"\
47 "epcs write addr offset count\n"\
48 " - write count bytes to offset from addr.\n"\
49 "epcs verify addr offset count\n"\
50 " - verify count bytes at offset from addr.\n"
53 /*-----------------------------------------------------------------------*/
54 /* Operation codes for serial configuration devices
56 #define EPCS_WRITE_ENA 0x06 /* Write enable */
57 #define EPCS_WRITE_DIS 0x04 /* Write disable */
58 #define EPCS_READ_STAT 0x05 /* Read status */
59 #define EPCS_READ_BYTES 0x03 /* Read bytes */
60 #define EPCS_READ_ID 0xab /* Read silicon id */
61 #define EPCS_WRITE_STAT 0x01 /* Write status */
62 #define EPCS_WRITE_BYTES 0x02 /* Write bytes */
63 #define EPCS_ERASE_BULK 0xc7 /* Erase entire device */
64 #define EPCS_ERASE_SECT 0xd8 /* Erase sector */
66 /* Device status register bits
68 #define EPCS_STATUS_WIP (1<<0) /* Write in progress */
69 #define EPCS_STATUS_WEL (1<<1) /* Write enable latch */
71 /* Misc
73 #define EPCS_TIMEOUT 100 /* 100 msec timeout */
75 static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE;
77 /***********************************************************************
78 * Device access
79 ***********************************************************************/
80 static int epcs_cs (int assert)
82 ulong start;
83 unsigned tmp;
86 if (assert) {
87 tmp = readl (&epcs->control);
88 writel (&epcs->control, tmp | NIOS_SPI_SSO);
89 } else {
90 /* Let all bits shift out */
91 start = get_timer (0);
92 while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
93 if (get_timer (start) > EPCS_TIMEOUT)
94 return (-1);
95 tmp = readl (&epcs->control);
96 writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
98 return (0);
101 static int epcs_tx (unsigned char c)
103 ulong start;
105 start = get_timer (0);
106 while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
107 if (get_timer (start) > EPCS_TIMEOUT)
108 return (-1);
109 writel (&epcs->txdata, c);
110 return (0);
113 static int epcs_rx (void)
115 ulong start;
117 start = get_timer (0);
118 while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
119 if (get_timer (start) > EPCS_TIMEOUT)
120 return (-1);
121 return (readl (&epcs->rxdata));
124 static unsigned char bitrev[] = {
125 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
126 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
129 static unsigned char epcs_bitrev (unsigned char c)
131 unsigned char val;
133 val = bitrev[c>>4];
134 val |= bitrev[c & 0x0f]<<4;
135 return (val);
138 static void epcs_rcv (unsigned char *dst, int len)
140 while (len--) {
141 epcs_tx (0);
142 *dst++ = epcs_rx ();
146 static void epcs_rrcv (unsigned char *dst, int len)
148 while (len--) {
149 epcs_tx (0);
150 *dst++ = epcs_bitrev (epcs_rx ());
154 static void epcs_snd (unsigned char *src, int len)
156 while (len--) {
157 epcs_tx (*src++);
158 epcs_rx ();
162 static void epcs_rsnd (unsigned char *src, int len)
164 while (len--) {
165 epcs_tx (epcs_bitrev (*src++));
166 epcs_rx ();
170 static void epcs_wr_enable (void)
172 epcs_cs (1);
173 epcs_tx (EPCS_WRITE_ENA);
174 epcs_rx ();
175 epcs_cs (0);
178 static unsigned char epcs_status_rd (void)
180 unsigned char status;
182 epcs_cs (1);
183 epcs_tx (EPCS_READ_STAT);
184 epcs_rx ();
185 epcs_tx (0);
186 status = epcs_rx ();
187 epcs_cs (0);
188 return (status);
191 static void epcs_status_wr (unsigned char status)
193 epcs_wr_enable ();
194 epcs_cs (1);
195 epcs_tx (EPCS_WRITE_STAT);
196 epcs_rx ();
197 epcs_tx (status);
198 epcs_rx ();
199 epcs_cs (0);
200 return;
203 /***********************************************************************
204 * Device information
205 ***********************************************************************/
207 static struct epcs_devinfo_t devinfo[] = {
208 { "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
209 { "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
210 { 0, 0, 0, 0, 0, 0 }
213 int epcs_reset (void)
215 /* When booting from an epcs controller, the epcs bootrom
216 * code may leave the slave select in an asserted state.
217 * This causes two problems: (1) The initial epcs access
218 * will fail -- not a big deal, and (2) a software reset
219 * will cause the bootrom code to hang since it does not
220 * ensure the select is negated prior to first access -- a
221 * big deal. Here we just negate chip select and everything
222 * gets better :-)
224 epcs_cs (0); /* Negate chip select */
225 return (0);
228 epcs_devinfo_t *epcs_dev_find (void)
230 unsigned char buf[4];
231 unsigned char id;
232 int i;
233 struct epcs_devinfo_t *dev = NULL;
235 /* Read silicon id requires 3 "dummy bytes" before it's put
236 * on the wire.
238 buf[0] = EPCS_READ_ID;
239 buf[1] = 0;
240 buf[2] = 0;
241 buf[3] = 0;
243 epcs_cs (1);
244 epcs_snd (buf,4);
245 epcs_rcv (buf,1);
246 if (epcs_cs (0) == -1)
247 return (NULL);
248 id = buf[0];
250 /* Find the info struct */
251 i = 0;
252 while (devinfo[i].name) {
253 if (id == devinfo[i].id) {
254 dev = &devinfo[i];
255 break;
257 i++;
260 return (dev);
263 /***********************************************************************
264 * Misc Utilities
265 ***********************************************************************/
266 int epcs_cfgsz (void)
268 int sz = 0;
269 unsigned char buf[128];
270 unsigned char *p;
271 struct epcs_devinfo_t *dev = epcs_dev_find ();
273 if (!dev)
274 return (-1);
276 /* Read in the first 128 bytes of the device */
277 buf[0] = EPCS_READ_BYTES;
278 buf[1] = 0;
279 buf[2] = 0;
280 buf[3] = 0;
282 epcs_cs (1);
283 epcs_snd (buf,4);
284 epcs_rrcv (buf, sizeof(buf));
285 epcs_cs (0);
287 /* Search for the starting 0x6a which is followed by the
288 * 4-byte 'register' and 4-byte bit-count.
290 p = buf;
291 while (p < buf + sizeof(buf)-8) {
292 if ( *p == 0x6a ) {
293 /* Point to bit count and extract */
294 p += 5;
295 sz = *p++;
296 sz |= *p++ << 8;
297 sz |= *p++ << 16;
298 sz |= *p++ << 24;
299 /* Convert to byte count */
300 sz += 7;
301 sz >>= 3;
302 } else if (*p == 0xff) {
303 /* 0xff is ok ... just skip */
304 p++;
305 continue;
306 } else {
307 /* Not 0xff or 0x6a ... something's not
308 * right ... report 'unknown' (sz=0).
310 break;
313 return (sz);
316 int epcs_erase (unsigned start, unsigned end)
318 unsigned off, sectsz;
319 unsigned char buf[4];
320 struct epcs_devinfo_t *dev = epcs_dev_find ();
322 if (!dev || (start>end))
323 return (-1);
325 /* Erase the requested sectors. An address is required
326 * that lies within the requested sector -- we'll just
327 * use the first address in the sector.
329 printf ("epcs erasing sector %d ", start);
330 if (start != end)
331 printf ("to %d ", end);
332 sectsz = (1 << dev->sz_sect);
333 while (start <= end) {
334 off = start * sectsz;
335 start++;
337 buf[0] = EPCS_ERASE_SECT;
338 buf[1] = off >> 16;
339 buf[2] = off >> 8;
340 buf[3] = off;
342 epcs_wr_enable ();
343 epcs_cs (1);
344 epcs_snd (buf,4);
345 epcs_cs (0);
347 printf ("."); /* Some user feedback */
349 /* Wait for erase to complete */
350 while (epcs_status_rd() & EPCS_STATUS_WIP)
353 printf (" done.\n");
354 return (0);
357 int epcs_read (ulong addr, ulong off, ulong cnt)
359 unsigned char buf[4];
360 struct epcs_devinfo_t *dev = epcs_dev_find ();
362 if (!dev)
363 return (-1);
365 buf[0] = EPCS_READ_BYTES;
366 buf[1] = off >> 16;
367 buf[2] = off >> 8;
368 buf[3] = off;
370 epcs_cs (1);
371 epcs_snd (buf,4);
372 epcs_rrcv ((unsigned char *)addr, cnt);
373 epcs_cs (0);
375 return (0);
378 int epcs_write (ulong addr, ulong off, ulong cnt)
380 ulong wrcnt;
381 unsigned pgsz;
382 unsigned char buf[4];
383 struct epcs_devinfo_t *dev = epcs_dev_find ();
385 if (!dev)
386 return (-1);
388 pgsz = (1<<dev->sz_page);
389 while (cnt) {
390 if (off % pgsz)
391 wrcnt = pgsz - (off % pgsz);
392 else
393 wrcnt = pgsz;
394 wrcnt = (wrcnt > cnt) ? cnt : wrcnt;
396 buf[0] = EPCS_WRITE_BYTES;
397 buf[1] = off >> 16;
398 buf[2] = off >> 8;
399 buf[3] = off;
401 epcs_wr_enable ();
402 epcs_cs (1);
403 epcs_snd (buf,4);
404 epcs_rsnd ((unsigned char *)addr, wrcnt);
405 epcs_cs (0);
407 /* Wait for write to complete */
408 while (epcs_status_rd() & EPCS_STATUS_WIP)
411 cnt -= wrcnt;
412 off += wrcnt;
413 addr += wrcnt;
416 return (0);
419 int epcs_verify (ulong addr, ulong off, ulong cnt, ulong *err)
421 ulong rdcnt;
422 unsigned char buf[256];
423 unsigned char *start,*end;
424 int i;
426 start = end = (unsigned char *)addr;
427 while (cnt) {
428 rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt;
429 epcs_read ((ulong)buf, off, rdcnt);
430 for (i=0; i<rdcnt; i++) {
431 if (*end != buf[i]) {
432 *err = end - start;
433 return(-1);
435 end++;
437 cnt -= rdcnt;
438 off += rdcnt;
440 return (0);
443 static int epcs_sect_erased (int sect, unsigned *offset,
444 struct epcs_devinfo_t *dev)
446 unsigned char buf[128];
447 unsigned off, end;
448 unsigned sectsz;
449 int i;
451 sectsz = (1 << dev->sz_sect);
452 off = sectsz * sect;
453 end = off + sectsz;
455 while (off < end) {
456 epcs_read ((ulong)buf, off, sizeof(buf));
457 for (i=0; i < sizeof(buf); i++) {
458 if (buf[i] != 0xff) {
459 *offset = off + i;
460 return (0);
463 off += sizeof(buf);
465 return (1);
469 /***********************************************************************
470 * Commands
471 ***********************************************************************/
472 static
473 void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char *argv[])
475 int i;
476 unsigned char stat;
477 unsigned tmp;
478 int erased;
480 /* Basic device info */
481 printf ("%s: %d kbytes (%d sectors x %d kbytes,"
482 " %d bytes/page)\n",
483 dev->name, 1 << (dev->size-10),
484 dev->num_sects, 1 << (dev->sz_sect-10),
485 1 << dev->sz_page );
487 /* Status -- for now protection is all-or-nothing */
488 stat = epcs_status_rd();
489 printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
490 stat,
491 (stat & EPCS_STATUS_WIP) ? 1 : 0,
492 (stat & EPCS_STATUS_WEL) ? 1 : 0,
493 (stat & dev->prot_mask) ? "on" : "off" );
495 /* Configuration */
496 tmp = epcs_cfgsz ();
497 if (tmp) {
498 printf ("config: 0x%06x (%d) bytes\n", tmp, tmp );
499 } else {
500 printf ("config: unknown\n" );
503 /* Sector info */
504 for (i=0; i<dev->num_sects; i++) {
505 erased = epcs_sect_erased (i, &tmp, dev);
506 printf (" %d: %06x ",
507 i, i*(1<<dev->sz_sect) );
508 if (erased)
509 printf ("erased\n");
510 else
511 printf ("data @ 0x%06x\n", tmp);
514 return;
517 static
518 void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char *argv[])
520 unsigned start,end;
522 if ((argc < 3) || (argc > 4)) {
523 printf ("USAGE: epcs erase sect [end]\n");
524 return;
526 if ((epcs_status_rd() & dev->prot_mask) != 0) {
527 printf ( "epcs: device protected.\n");
528 return;
531 start = simple_strtoul (argv[2], NULL, 10);
532 if (argc > 3)
533 end = simple_strtoul (argv[3], NULL, 10);
534 else
535 end = start;
536 if ((start >= dev->num_sects) || (start > end)) {
537 printf ("epcs: invalid sector range: [%d:%d]\n",
538 start, end );
539 return;
542 epcs_erase (start, end);
544 return;
547 static
548 void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char *argv[])
550 unsigned char stat;
552 /* For now protection is all-or-nothing to keep things
553 * simple. The protection bits don't map in a linear
554 * fashion ... and we would rather protect the bottom
555 * of the device since it contains the config data and
556 * leave the top unprotected for app use. But unfortunately
557 * protection works from top-to-bottom so it does
558 * really help very much from a software app point-of-view.
560 if (argc < 3) {
561 printf ("USAGE: epcs protect on | off\n");
562 return;
564 if (!dev)
565 return;
567 /* Protection on/off is just a matter of setting/clearing
568 * all protection bits in the status register.
570 stat = epcs_status_rd ();
571 if (strcmp ("on", argv[2]) == 0) {
572 stat |= dev->prot_mask;
573 } else if (strcmp ("off", argv[2]) == 0 ) {
574 stat &= ~dev->prot_mask;
575 } else {
576 printf ("epcs: unknown protection: %s\n", argv[2]);
577 return;
579 epcs_status_wr (stat);
580 return;
583 static
584 void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char *argv[])
586 ulong addr,off,cnt;
587 ulong sz;
589 if (argc < 5) {
590 printf ("USAGE: epcs read addr offset count\n");
591 return;
594 sz = 1 << dev->size;
595 addr = simple_strtoul (argv[2], NULL, 16);
596 off = simple_strtoul (argv[3], NULL, 16);
597 cnt = simple_strtoul (argv[4], NULL, 16);
598 if (off > sz) {
599 printf ("offset is greater than device size"
600 "... aborting.\n");
601 return;
603 if ((off + cnt) > sz) {
604 printf ("request exceeds device size"
605 "... truncating.\n");
606 cnt = sz - off;
608 printf ("epcs: read %08lx <- %06lx (0x%lx bytes)\n",
609 addr, off, cnt);
610 epcs_read (addr, off, cnt);
612 return;
615 static
616 void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char *argv[])
618 ulong addr,off,cnt;
619 ulong sz;
620 ulong err;
622 if (argc < 5) {
623 printf ("USAGE: epcs write addr offset count\n");
624 return;
626 if ((epcs_status_rd() & dev->prot_mask) != 0) {
627 printf ( "epcs: device protected.\n");
628 return;
631 sz = 1 << dev->size;
632 addr = simple_strtoul (argv[2], NULL, 16);
633 off = simple_strtoul (argv[3], NULL, 16);
634 cnt = simple_strtoul (argv[4], NULL, 16);
635 if (off > sz) {
636 printf ("offset is greater than device size"
637 "... aborting.\n");
638 return;
640 if ((off + cnt) > sz) {
641 printf ("request exceeds device size"
642 "... truncating.\n");
643 cnt = sz - off;
645 printf ("epcs: write %08lx -> %06lx (0x%lx bytes)\n",
646 addr, off, cnt);
647 epcs_write (addr, off, cnt);
648 if (epcs_verify (addr, off, cnt, &err) != 0)
649 printf ("epcs: write error at offset %06lx\n", err);
651 return;
654 static
655 void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char *argv[])
657 ulong addr,off,cnt;
658 ulong sz;
659 ulong err;
661 if (argc < 5) {
662 printf ("USAGE: epcs verify addr offset count\n");
663 return;
666 sz = 1 << dev->size;
667 addr = simple_strtoul (argv[2], NULL, 16);
668 off = simple_strtoul (argv[3], NULL, 16);
669 cnt = simple_strtoul (argv[4], NULL, 16);
670 if (off > sz) {
671 printf ("offset is greater than device size"
672 "... aborting.\n");
673 return;
675 if ((off + cnt) > sz) {
676 printf ("request exceeds device size"
677 "... truncating.\n");
678 cnt = sz - off;
680 printf ("epcs: verify %08lx -> %06lx (0x%lx bytes)\n",
681 addr, off, cnt);
682 if (epcs_verify (addr, off, cnt, &err) != 0)
683 printf ("epcs: verify error at offset %06lx\n", err);
685 return;
688 /*-----------------------------------------------------------------------*/
689 int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
691 int len;
692 struct epcs_devinfo_t *dev = epcs_dev_find ();
694 if (!dev) {
695 printf ("epcs: device not found.\n");
696 return (-1);
699 if (argc < 2) {
700 do_epcs_info (dev, argc, argv);
701 return (0);
704 len = strlen (argv[1]);
705 if (strncmp ("info", argv[1], len) == 0) {
706 do_epcs_info (dev, argc, argv);
707 } else if (strncmp ("erase", argv[1], len) == 0) {
708 do_epcs_erase (dev, argc, argv);
709 } else if (strncmp ("protect", argv[1], len) == 0) {
710 do_epcs_protect (dev, argc, argv);
711 } else if (strncmp ("read", argv[1], len) == 0) {
712 do_epcs_read (dev, argc, argv);
713 } else if (strncmp ("write", argv[1], len) == 0) {
714 do_epcs_write (dev, argc, argv);
715 } else if (strncmp ("verify", argv[1], len) == 0) {
716 do_epcs_verify (dev, argc, argv);
717 } else {
718 printf ("epcs: unknown operation: %s\n", argv[1]);
721 return (0);
724 /*-----------------------------------------------------------------------*/
727 U_BOOT_CMD( epcs, 5, 0, do_epcs, SHORT_HELP, LONG_HELP );
729 #endif /* CONFIG_NIOS_EPCS */