cpu/at32ap/at32ap700x/gpio.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23
  24 #include <asm/arch/chip-features.h>
  25 #include <asm/arch/gpio.h>
  26
  27 /*
  28  * Lots of small functions here. We depend on --gc-sections getting
  29  * rid of the ones we don't need.
  30  */
  31 void gpio_enable_ebi(void)
  32 {
  33 #ifdef CFG_HSDRAMC
  34 #ifndef CFG_SDRAM_16BIT
  35         gpio_select_periph_A(GPIO_PIN_PE0, 0);
  36         gpio_select_periph_A(GPIO_PIN_PE1, 0);
  37         gpio_select_periph_A(GPIO_PIN_PE2, 0);
  38         gpio_select_periph_A(GPIO_PIN_PE3, 0);
  39         gpio_select_periph_A(GPIO_PIN_PE4, 0);
  40         gpio_select_periph_A(GPIO_PIN_PE5, 0);
  41         gpio_select_periph_A(GPIO_PIN_PE6, 0);
  42         gpio_select_periph_A(GPIO_PIN_PE7, 0);
  43         gpio_select_periph_A(GPIO_PIN_PE8, 0);
  44         gpio_select_periph_A(GPIO_PIN_PE9, 0);
  45         gpio_select_periph_A(GPIO_PIN_PE10, 0);
  46         gpio_select_periph_A(GPIO_PIN_PE11, 0);
  47         gpio_select_periph_A(GPIO_PIN_PE12, 0);
  48         gpio_select_periph_A(GPIO_PIN_PE13, 0);
  49         gpio_select_periph_A(GPIO_PIN_PE14, 0);
  50         gpio_select_periph_A(GPIO_PIN_PE15, 0);
  51 #endif
  52         gpio_select_periph_A(GPIO_PIN_PE26, 0);
  53 #endif
  54 }
  55
  56 #ifdef AT32AP700x_CHIP_HAS_USART
  57 void gpio_enable_usart0(void)
  58 {
  59         gpio_select_periph_B(GPIO_PIN_PA8, 0);
  60         gpio_select_periph_B(GPIO_PIN_PA9, 0);
  61 }
  62
  63 void gpio_enable_usart1(void)
  64 {
  65         gpio_select_periph_A(GPIO_PIN_PA17, 0);
  66         gpio_select_periph_A(GPIO_PIN_PA18, 0);
  67 }
  68
  69 void gpio_enable_usart2(void)
  70 {
  71         gpio_select_periph_B(GPIO_PIN_PB26, 0);
  72         gpio_select_periph_B(GPIO_PIN_PB27, 0);
  73 }
  74
  75 void gpio_enable_usart3(void)
  76 {
  77         gpio_select_periph_B(GPIO_PIN_PB17, 0);
  78         gpio_select_periph_B(GPIO_PIN_PB18, 0);
  79 }
  80 #endif
  81
  82 #ifdef AT32AP700x_CHIP_HAS_MACB
  83 void gpio_enable_macb0(void)
  84 {
  85         gpio_select_periph_A(GPIO_PIN_PC3,  0); /* TXD0 */
  86         gpio_select_periph_A(GPIO_PIN_PC4,  0); /* TXD1 */
  87         gpio_select_periph_A(GPIO_PIN_PC7,  0); /* TXEN */
  88         gpio_select_periph_A(GPIO_PIN_PC8,  0); /* TXCK */
  89         gpio_select_periph_A(GPIO_PIN_PC9,  0); /* RXD0 */
  90         gpio_select_periph_A(GPIO_PIN_PC10, 0); /* RXD1 */
  91         gpio_select_periph_A(GPIO_PIN_PC13, 0); /* RXER */
  92         gpio_select_periph_A(GPIO_PIN_PC15, 0); /* RXDV */
  93         gpio_select_periph_A(GPIO_PIN_PC16, 0); /* MDC  */
  94         gpio_select_periph_A(GPIO_PIN_PC17, 0); /* MDIO */
  95 #if !defined(CONFIG_RMII)
  96         gpio_select_periph_A(GPIO_PIN_PC0,  0); /* COL  */
  97         gpio_select_periph_A(GPIO_PIN_PC1,  0); /* CRS  */
  98         gpio_select_periph_A(GPIO_PIN_PC2,  0); /* TXER */
  99         gpio_select_periph_A(GPIO_PIN_PC5,  0); /* TXD2 */
 100         gpio_select_periph_A(GPIO_PIN_PC6,  0); /* TXD3 */
 101         gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */
 102         gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */
 103         gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */
 104         gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD  */
 105 #endif
 106 }
 107
 108 void gpio_enable_macb1(void)
 109 {
 110         gpio_select_periph_B(GPIO_PIN_PD13, 0); /* TXD0 */
 111         gpio_select_periph_B(GPIO_PIN_PD14, 0); /* TXD1 */
 112         gpio_select_periph_B(GPIO_PIN_PD11, 0); /* TXEN */
 113         gpio_select_periph_B(GPIO_PIN_PD12, 0); /* TXCK */
 114         gpio_select_periph_B(GPIO_PIN_PD10, 0); /* RXD0 */
 115         gpio_select_periph_B(GPIO_PIN_PD6,  0); /* RXD1 */
 116         gpio_select_periph_B(GPIO_PIN_PD5,  0); /* RXER */
 117         gpio_select_periph_B(GPIO_PIN_PD4,  0); /* RXDV */
 118         gpio_select_periph_B(GPIO_PIN_PD3,  0); /* MDC  */
 119         gpio_select_periph_B(GPIO_PIN_PD2,  0); /* MDIO */
 120 #if !defined(CONFIG_RMII)
 121         gpio_select_periph_B(GPIO_PIN_PC19, 0); /* COL  */
 122         gpio_select_periph_B(GPIO_PIN_PC23, 0); /* CRS  */
 123         gpio_select_periph_B(GPIO_PIN_PC26, 0); /* TXER */
 124         gpio_select_periph_B(GPIO_PIN_PC27, 0); /* TXD2 */
 125         gpio_select_periph_B(GPIO_PIN_PC28, 0); /* TXD3 */
 126         gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */
 127         gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */
 128         gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */
 129         gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD  */
 130 #endif
 131 }
 132 #endif
 133
 134 #ifdef AT32AP700x_CHIP_HAS_MMCI
 135 void gpio_enable_mmci(void)
 136 {
 137         gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK   */
 138         gpio_select_periph_A(GPIO_PIN_PA11, 0); /* CMD   */
 139         gpio_select_periph_A(GPIO_PIN_PA12, 0); /* DATA0 */
 140         gpio_select_periph_A(GPIO_PIN_PA13, 0); /* DATA1 */
 141         gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */
 142         gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
 143 }
 144 #endif