board/RPXClassic/RPXClassic.c

   1 /*
   2  * (C)  Copyright 2001
   3  * Stäubli Faverges - <www.staubli.com>
   4  * Pierre AUBERT  p.aubert@staubli.com
   5  * U-Boot port on RPXClassic LF (CLLF_BW31) board
   6  *
   7  * (C) Copyright 2000
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #include <common.h>
  30 #include <i2c.h>
  31 #include <config.h>
  32 #include <mpc8xx.h>
  33
  34 /* ------------------------------------------------------------------------- */
  35
  36 static long int dram_size (long int, long int *, long int);
  37 static unsigned char aschex_to_byte (unsigned char *cp);
  38
  39 /* ------------------------------------------------------------------------- */
  40
  41 #define _NOT_USED_      0xFFFFCC25
  42
  43 const uint sdram_table[] =
  44 {
  45         /*
  46          * Single Read. (Offset 00h in UPMA RAM)
  47          */
  48         0xCFFFCC24, 0x0FFFCC04, 0X0CAFCC04, 0X03AFCC08,
  49         0x3FBFCC27, /* last */
  50         _NOT_USED_, _NOT_USED_, _NOT_USED_,
  51
  52         /*
  53          * Burst Read. (Offset 08h in UPMA RAM)
  54          */
  55         0xCFFFCC24, 0x0FFFCC04, 0x0CAFCC84, 0x03AFCC88,
  56         0x3FBFCC27, /* last */
  57         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
  58         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
  59         _NOT_USED_, _NOT_USED_, _NOT_USED_,
  60
  61         /*
  62          * Single Write. (Offset 18h in UPMA RAM)
  63          */
  64         0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC04, 0x03FFCC00,
  65         0x3FFFCC27, /* last */
  66         _NOT_USED_, _NOT_USED_, _NOT_USED_,
  67
  68         /*
  69          * Burst Write. (Offset 20h in UPMA RAM)
  70          */
  71         0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC80, 0x03FFCC8C,
  72         0x0CFFCC00, 0x33FFCC27, /* last */
  73         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
  74         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
  75         _NOT_USED_, _NOT_USED_,
  76
  77         /*
  78          * Refresh. (Offset 30h in UPMA RAM)
  79          */
  80         0xC0FFCC24, 0x03FFCC24, 0x0FFFCC24, 0x0FFFCC24,
  81         0x3FFFCC27, /* last */
  82         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
  83         _NOT_USED_, _NOT_USED_, _NOT_USED_,
  84
  85         /*
  86          * Exception. (Offset 3Ch in UPMA RAM)
  87          */
  88         _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
  89 };
  90
  91 /* ------------------------------------------------------------------------- */
  92
  93
  94 /*
  95  * Check Board Identity:
  96  */
  97
  98 int checkboard (void)
  99 {
 100         puts ("Board: RPXClassic\n");
 101         return (0);
 102 }
 103
 104 /*-----------------------------------------------------------------------------
 105  * board_get_enetaddr -- Read the MAC Address in the I2C EEPROM
 106  *-----------------------------------------------------------------------------
 107  */
 108 void board_get_enetaddr (uchar * enet)
 109 {
 110         int i;
 111         char buff[256], *cp;
 112
 113         /* Initialize I2C                                       */
 114         i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
 115
 116         /* Read 256 bytes in EEPROM                             */
 117         i2c_read (0x54, 0, 1, (uchar *)buff, 128);
 118         i2c_read (0x54, 128, 1, (uchar *)buff + 128, 128);
 119
 120         /* Retrieve MAC address in buffer (key EA)              */
 121         for (cp = buff;;) {
 122                 if (cp[0] == 'E' && cp[1] == 'A') {
 123                         cp += 3;
 124                         /* Read MAC address                     */
 125                         for (i = 0; i < 6; i++, cp += 2) {
 126                                 enet[i] = aschex_to_byte ((unsigned char *)cp);
 127                         }
 128                 }
 129                 /* Scan to the end of the record                */
 130                 while ((*cp != '\n') && (*cp != (char)0xff)) {
 131                         cp++;
 132                 }
 133                 /* If the next character is a \n, 0 or ff, we are done. */
 134                 cp++;
 135                 if ((*cp == '\n') || (*cp == 0) || (*cp == (char)0xff))
 136                         break;
 137         }
 138
 139 #ifdef CONFIG_FEC_ENET
 140         /* The MAC address is the same as normal ethernet except the 3rd byte    */
 141         /* (See the E.P. Planet Core Overview manual            */
 142         enet[3] |= 0x80;
 143 #endif
 144
 145         printf ("MAC address = %02x:%02x:%02x:%02x:%02x:%02x\n",
 146                 enet[0], enet[1], enet[2], enet[3], enet[4], enet[5]);
 147
 148 }
 149
 150 void rpxclassic_init (void)
 151 {
 152         /* Enable NVRAM */
 153         *((uchar *) BCSR0) |= BCSR0_ENNVRAM;
 154
 155 #ifdef CONFIG_FEC_ENET
 156
 157         /* Validate the fast ethernet tranceiver                             */
 158         *((volatile uchar *) BCSR2) &= ~BCSR2_MIICTL;
 159         *((volatile uchar *) BCSR2) &= ~BCSR2_MIIPWRDWN;
 160         *((volatile uchar *) BCSR2) |= BCSR2_MIIRST;
 161         *((volatile uchar *) BCSR2) |= BCSR2_MIIPWRDWN;
 162 #endif
 163
 164 }
 165
 166 /* ------------------------------------------------------------------------- */
 167
 168 long int initdram (int board_type)
 169 {
 170         volatile immap_t *immap = (immap_t *) CFG_IMMR;
 171         volatile memctl8xx_t *memctl = &immap->im_memctl;
 172         long int size10;
 173
 174         upmconfig (UPMA, (uint *) sdram_table,
 175                            sizeof (sdram_table) / sizeof (uint));
 176
 177         /* Refresh clock prescalar */
 178         memctl->memc_mptpr = CFG_MPTPR;
 179
 180         memctl->memc_mar = 0x00000000;
 181
 182         /* Map controller banks 1 to the SDRAM bank */
 183         memctl->memc_or1 = CFG_OR1_PRELIM;
 184         memctl->memc_br1 = CFG_BR1_PRELIM;
 185
 186         memctl->memc_mamr = CFG_MAMR_10COL & (~(MAMR_PTAE));    /* no refresh yet */
 187
 188         udelay (200);
 189
 190         /* perform SDRAM initializsation sequence */
 191
 192         memctl->memc_mcr = 0x80002230;  /* SDRAM bank 0 - refresh twice */
 193         udelay (1);
 194
 195         memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
 196
 197         udelay (1000);
 198
 199         /* Check Bank 0 Memory Size
 200          * try 10 column mode
 201          */
 202
 203         size10 = dram_size (CFG_MAMR_10COL, SDRAM_BASE_PRELIM,
 204                                                 SDRAM_MAX_SIZE);
 205
 206         return (size10);
 207 }
 208
 209 /* ------------------------------------------------------------------------- */
 210
 211 /*
 212  * Check memory range for valid RAM. A simple memory test determines
 213  * the actually available RAM size between addresses `base' and
 214  * `base + maxsize'. Some (not all) hardware errors are detected:
 215  * - short between address lines
 216  * - short between data lines
 217  */
 218
 219 static long int dram_size (long int mamr_value, long int *base, long int maxsize)
 220 {
 221         volatile immap_t *immap = (immap_t *) CFG_IMMR;
 222         volatile memctl8xx_t *memctl = &immap->im_memctl;
 223
 224         memctl->memc_mamr = mamr_value;
 225
 226         return (get_ram_size(base, maxsize));
 227 }
 228 /*-----------------------------------------------------------------------------
 229  * aschex_to_byte --
 230  *-----------------------------------------------------------------------------
 231  */
 232 static unsigned char aschex_to_byte (unsigned char *cp)
 233 {
 234         u_char byte, c;
 235
 236         c = *cp++;
 237
 238         if ((c >= 'A') && (c <= 'F')) {
 239                 c -= 'A';
 240                 c += 10;
 241         } else if ((c >= 'a') && (c <= 'f')) {
 242                 c -= 'a';
 243                 c += 10;
 244         } else {
 245                 c -= '0';
 246         }
 247
 248         byte = c * 16;
 249
 250         c = *cp;
 251
 252         if ((c >= 'A') && (c <= 'F')) {
 253                 c -= 'A';
 254                 c += 10;
 255         } else if ((c >= 'a') && (c <= 'f')) {
 256                 c -= 'a';
 257                 c += 10;
 258         } else {
 259                 c -= '0';
 260         }
 261
 262         byte += c;
 263
 264         return (byte);
 265 }