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uboot-s3c2440.patch
[u-boot-openmoko/mini2440.git] / cpu / arm920t / s3c24x0 / usb_ohci.c
blobfef39860b39fbc88273a46600c149299f7455348
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 *
29 */
30 /*
31 * IMPORTANT NOTES
32 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
33 * board or this driver will NOT work!
34 * 2 - this driver is intended for use with USB Mass Storage Devices
35 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
36 */
37
38 #include <common.h>
39 /* #include <pci.h> no PCI on the S3C24X0 */
40
41 #ifdef CONFIG_USB_OHCI
42
43 #if defined(CONFIG_S3C2400)
44 #include <s3c2400.h>
45 #elif defined(CONFIG_S3C2410)
46 #include <s3c2410.h>
47 #elif defined(CONFIG_S3C2440)
48 #include <s3c2440.h>
49 #endif
50
51 #include <malloc.h>
52 #include <usb.h>
53 #include "usb_ohci.h"
54
55 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
56 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
57
58
59 /* For initializing controller (mask in an HCFS mode too) */
60 #define OHCI_CONTROL_INIT \
61 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
62
63 #define readl(a) (*((vu_long *)(a)))
64 #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
65
66 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
67
68 #undef DEBUG
69 #ifdef DEBUG
70 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
71 #else
72 #define dbg(format, arg...) do {} while(0)
73 #endif /* DEBUG */
74 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
75 #undef SHOW_INFO
76 #ifdef SHOW_INFO
77 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
78 #else
79 #define info(format, arg...) do {} while(0)
80 #endif
81
82 #define m16_swap(x) swap_16(x)
83 #define m32_swap(x) swap_32(x)
84
85 /* global ohci_t */
86 static ohci_t gohci;
87 /* this must be aligned to a 256 byte boundary */
88 struct ohci_hcca ghcca[1];
89 /* a pointer to the aligned storage */
90 struct ohci_hcca *phcca;
91 /* this allocates EDs for all possible endpoints */
92 struct ohci_device ohci_dev;
93 /* urb_priv */
94 urb_priv_t urb_priv;
95 /* RHSC flag */
96 int got_rhsc;
97 /* device which was disconnected */
98 struct usb_device *devgone;
99 /* flag guarding URB transation */
100 int urb_finished = 0;
101
102 /*-------------------------------------------------------------------------*/
103
104 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
105 * The erratum (#4) description is incorrect. AMD's workaround waits
106 * till some bits (mostly reserved) are clear; ok for all revs.
107 */
108 #define OHCI_QUIRK_AMD756 0xabcd
109 #define read_roothub(hc, register, mask) ({ \
110 u32 temp = readl (&hc->regs->roothub.register); \
111 if (hc->flags & OHCI_QUIRK_AMD756) \
112 while (temp & mask) \
113 temp = readl (&hc->regs->roothub.register); \
114 temp; })
115
116 static u32 roothub_a (struct ohci *hc)
117 { return read_roothub (hc, a, 0xfc0fe000); }
118 static inline u32 roothub_b (struct ohci *hc)
119 { return readl (&hc->regs->roothub.b); }
120 static inline u32 roothub_status (struct ohci *hc)
121 { return readl (&hc->regs->roothub.status); }
122 static u32 roothub_portstatus (struct ohci *hc, int i)
123 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
124
125
126 /* forward declaration */
127 static int hc_interrupt (void);
128 static void
129 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
130 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
131
132 /*-------------------------------------------------------------------------*
133 * URB support functions
134 *-------------------------------------------------------------------------*/
135
136 /* free HCD-private data associated with this URB */
137
138 static void urb_free_priv (urb_priv_t * urb)
139 {
140 int i;
141 int last;
142 struct td * td;
143
144 last = urb->length - 1;
145 if (last >= 0) {
146 for (i = 0; i <= last; i++) {
147 td = urb->td[i];
148 if (td) {
149 td->usb_dev = NULL;
150 urb->td[i] = NULL;
151 }
152 }
153 }
154 }
155
156 /*-------------------------------------------------------------------------*/
157
158 #ifdef DEBUG
159 static int sohci_get_current_frame_number (struct usb_device * dev);
160
161 /* debug| print the main components of an URB
162 * small: 0) header + data packets 1) just header */
163
164 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
165 int transfer_len, struct devrequest * setup, char * str, int small)
166 {
167 urb_priv_t * purb = &urb_priv;
168
169 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
170 str,
171 sohci_get_current_frame_number (dev),
172 usb_pipedevice (pipe),
173 usb_pipeendpoint (pipe),
174 usb_pipeout (pipe)? 'O': 'I',
175 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
176 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
177 purb->actual_length,
178 transfer_len, dev->status);
179 #ifdef OHCI_VERBOSE_DEBUG
180 if (!small) {
181 int i, len;
182
183 if (usb_pipecontrol (pipe)) {
184 printf (__FILE__ ": cmd(8):");
185 for (i = 0; i < 8 ; i++)
186 printf (" %02x", ((__u8 *) setup) [i]);
187 printf ("\n");
188 }
189 if (transfer_len > 0 && buffer) {
190 printf (__FILE__ ": data(%d/%d):",
191 purb->actual_length,
192 transfer_len);
193 len = usb_pipeout (pipe)?
194 transfer_len: purb->actual_length;
195 for (i = 0; i < 16 && i < len; i++)
196 printf (" %02x", ((__u8 *) buffer) [i]);
197 printf ("%s\n", i < len? "...": "");
198 }
199 }
200 #endif
201 }
202
203 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
204 void ep_print_int_eds (ohci_t *ohci, char * str) {
205 int i, j;
206 __u32 * ed_p;
207 for (i= 0; i < 32; i++) {
208 j = 5;
209 ed_p = &(ohci->hcca->int_table [i]);
210 if (*ed_p == 0)
211 continue;
212 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
213 while (*ed_p != 0 && j--) {
214 ed_t *ed = (ed_t *)m32_swap(ed_p);
215 printf (" ed: %4x;", ed->hwINFO);
216 ed_p = &ed->hwNextED;
217 }
218 printf ("\n");
219 }
220 }
221
222 static void ohci_dump_intr_mask (char *label, __u32 mask)
223 {
224 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
225 label,
226 mask,
227 (mask & OHCI_INTR_MIE) ? " MIE" : "",
228 (mask & OHCI_INTR_OC) ? " OC" : "",
229 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
230 (mask & OHCI_INTR_FNO) ? " FNO" : "",
231 (mask & OHCI_INTR_UE) ? " UE" : "",
232 (mask & OHCI_INTR_RD) ? " RD" : "",
233 (mask & OHCI_INTR_SF) ? " SF" : "",
234 (mask & OHCI_INTR_WDH) ? " WDH" : "",
235 (mask & OHCI_INTR_SO) ? " SO" : ""
236 );
237 }
238
239 static void maybe_print_eds (char *label, __u32 value)
240 {
241 ed_t *edp = (ed_t *)value;
242
243 if (value) {
244 dbg ("%s %08x", label, value);
245 dbg ("%08x", edp->hwINFO);
246 dbg ("%08x", edp->hwTailP);
247 dbg ("%08x", edp->hwHeadP);
248 dbg ("%08x", edp->hwNextED);
249 }
250 }
251
252 static char * hcfs2string (int state)
253 {
254 switch (state) {
255 case OHCI_USB_RESET: return "reset";
256 case OHCI_USB_RESUME: return "resume";
257 case OHCI_USB_OPER: return "operational";
258 case OHCI_USB_SUSPEND: return "suspend";
259 }
260 return "?";
261 }
262
263 /* dump control and status registers */
264 static void ohci_dump_status (ohci_t *controller)
265 {
266 struct ohci_regs *regs = controller->regs;
267 __u32 temp;
268
269 temp = readl (&regs->revision) & 0xff;
270 if (temp != 0x10)
271 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
272
273 temp = readl (&regs->control);
274 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
275 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
276 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
277 (temp & OHCI_CTRL_IR) ? " IR" : "",
278 hcfs2string (temp & OHCI_CTRL_HCFS),
279 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
280 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
281 (temp & OHCI_CTRL_IE) ? " IE" : "",
282 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
283 temp & OHCI_CTRL_CBSR
284 );
285
286 temp = readl (&regs->cmdstatus);
287 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
288 (temp & OHCI_SOC) >> 16,
289 (temp & OHCI_OCR) ? " OCR" : "",
290 (temp & OHCI_BLF) ? " BLF" : "",
291 (temp & OHCI_CLF) ? " CLF" : "",
292 (temp & OHCI_HCR) ? " HCR" : ""
293 );
294
295 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
296 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
297
298 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
299
300 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
301 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
302
303 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
304 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
305
306 maybe_print_eds ("donehead", readl (&regs->donehead));
307 }
308
309 static void ohci_dump_roothub (ohci_t *controller, int verbose)
310 {
311 __u32 temp, ndp, i;
312
313 temp = roothub_a (controller);
314 ndp = (temp & RH_A_NDP);
315
316 if (verbose) {
317 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
318 ((temp & RH_A_POTPGT) >> 24) & 0xff,
319 (temp & RH_A_NOCP) ? " NOCP" : "",
320 (temp & RH_A_OCPM) ? " OCPM" : "",
321 (temp & RH_A_DT) ? " DT" : "",
322 (temp & RH_A_NPS) ? " NPS" : "",
323 (temp & RH_A_PSM) ? " PSM" : "",
324 ndp
325 );
326 temp = roothub_b (controller);
327 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
328 temp,
329 (temp & RH_B_PPCM) >> 16,
330 (temp & RH_B_DR)
331 );
332 temp = roothub_status (controller);
333 dbg ("roothub.status: %08x%s%s%s%s%s%s",
334 temp,
335 (temp & RH_HS_CRWE) ? " CRWE" : "",
336 (temp & RH_HS_OCIC) ? " OCIC" : "",
337 (temp & RH_HS_LPSC) ? " LPSC" : "",
338 (temp & RH_HS_DRWE) ? " DRWE" : "",
339 (temp & RH_HS_OCI) ? " OCI" : "",
340 (temp & RH_HS_LPS) ? " LPS" : ""
341 );
342 }
343
344 for (i = 0; i < ndp; i++) {
345 temp = roothub_portstatus (controller, i);
346 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
347 i,
348 temp,
349 (temp & RH_PS_PRSC) ? " PRSC" : "",
350 (temp & RH_PS_OCIC) ? " OCIC" : "",
351 (temp & RH_PS_PSSC) ? " PSSC" : "",
352 (temp & RH_PS_PESC) ? " PESC" : "",
353 (temp & RH_PS_CSC) ? " CSC" : "",
354
355 (temp & RH_PS_LSDA) ? " LSDA" : "",
356 (temp & RH_PS_PPS) ? " PPS" : "",
357 (temp & RH_PS_PRS) ? " PRS" : "",
358 (temp & RH_PS_POCI) ? " POCI" : "",
359 (temp & RH_PS_PSS) ? " PSS" : "",
360
361 (temp & RH_PS_PES) ? " PES" : "",
362 (temp & RH_PS_CCS) ? " CCS" : ""
363 );
364 }
365 }
366
367 static void ohci_dump (ohci_t *controller, int verbose)
368 {
369 dbg ("OHCI controller usb-%s state", controller->slot_name);
370
371 /* dumps some of the state we know about */
372 ohci_dump_status (controller);
373 if (verbose)
374 ep_print_int_eds (controller, "hcca");
375 dbg ("hcca frame #%04x", controller->hcca->frame_no);
376 ohci_dump_roothub (controller, 1);
377 }
378
379
380 #endif /* DEBUG */
381
382 /*-------------------------------------------------------------------------*
383 * Interface functions (URB)
384 *-------------------------------------------------------------------------*/
385
386 /* get a transfer request */
387
388 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
389 int transfer_len, struct devrequest *setup, int interval)
390 {
391 ohci_t *ohci;
392 ed_t * ed;
393 urb_priv_t *purb_priv;
394 int i, size = 0;
395
396 ohci = &gohci;
397
398 /* when controller's hung, permit only roothub cleanup attempts
399 * such as powering down ports */
400 if (ohci->disabled) {
401 err("sohci_submit_job: EPIPE");
402 return -1;
403 }
404
405 /* if we have an unfinished URB from previous transaction let's
406 * fail and scream as quickly as possible so as not to corrupt
407 * further communication */
408 if (!urb_finished) {
409 err("sohci_submit_job: URB NOT FINISHED");
410 return -1;
411 }
412 /* we're about to begin a new transaction here so mark the URB unfinished */
413 urb_finished = 0;
414
415 /* every endpoint has a ed, locate and fill it */
416 if (!(ed = ep_add_ed (dev, pipe))) {
417 err("sohci_submit_job: ENOMEM");
418 return -1;
419 }
420
421 /* for the private part of the URB we need the number of TDs (size) */
422 switch (usb_pipetype (pipe)) {
423 case PIPE_BULK: /* one TD for every 4096 Byte */
424 size = (transfer_len - 1) / 4096 + 1;
425 break;
426 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
427 size = (transfer_len == 0)? 2:
428 (transfer_len - 1) / 4096 + 3;
429 break;
430 }
431
432 if (size >= (N_URB_TD - 1)) {
433 err("need %d TDs, only have %d", size, N_URB_TD);
434 return -1;
435 }
436 purb_priv = &urb_priv;
437 purb_priv->pipe = pipe;
438
439 /* fill the private part of the URB */
440 purb_priv->length = size;
441 purb_priv->ed = ed;
442 purb_priv->actual_length = 0;
443
444 /* allocate the TDs */
445 /* note that td[0] was allocated in ep_add_ed */
446 for (i = 0; i < size; i++) {
447 purb_priv->td[i] = td_alloc (dev);
448 if (!purb_priv->td[i]) {
449 purb_priv->length = i;
450 urb_free_priv (purb_priv);
451 err("sohci_submit_job: ENOMEM");
452 return -1;
453 }
454 }
455
456 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
457 urb_free_priv (purb_priv);
458 err("sohci_submit_job: EINVAL");
459 return -1;
460 }
461
462 /* link the ed into a chain if is not already */
463 if (ed->state != ED_OPER)
464 ep_link (ohci, ed);
465
466 /* fill the TDs and link it to the ed */
467 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
468
469 return 0;
470 }
471
472 /*-------------------------------------------------------------------------*/
473
474 #ifdef DEBUG
475 /* tell us the current USB frame number */
476
477 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
478 {
479 ohci_t *ohci = &gohci;
480
481 return m16_swap (ohci->hcca->frame_no);
482 }
483 #endif
484
485 /*-------------------------------------------------------------------------*
486 * ED handling functions
487 *-------------------------------------------------------------------------*/
488
489 /* link an ed into one of the HC chains */
490
491 static int ep_link (ohci_t *ohci, ed_t *edi)
492 {
493 volatile ed_t *ed = edi;
494
495 ed->state = ED_OPER;
496
497 switch (ed->type) {
498 case PIPE_CONTROL:
499 ed->hwNextED = 0;
500 if (ohci->ed_controltail == NULL) {
501 writel (ed, &ohci->regs->ed_controlhead);
502 } else {
503 ohci->ed_controltail->hwNextED = (__u32)m32_swap (ed);
504 }
505 ed->ed_prev = ohci->ed_controltail;
506 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
507 !ohci->ed_rm_list[1] && !ohci->sleeping) {
508 ohci->hc_control |= OHCI_CTRL_CLE;
509 writel (ohci->hc_control, &ohci->regs->control);
510 }
511 ohci->ed_controltail = edi;
512 break;
513
514 case PIPE_BULK:
515 ed->hwNextED = 0;
516 if (ohci->ed_bulktail == NULL) {
517 writel (ed, &ohci->regs->ed_bulkhead);
518 } else {
519 ohci->ed_bulktail->hwNextED = (__u32)m32_swap (ed);
520 }
521 ed->ed_prev = ohci->ed_bulktail;
522 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
523 !ohci->ed_rm_list[1] && !ohci->sleeping) {
524 ohci->hc_control |= OHCI_CTRL_BLE;
525 writel (ohci->hc_control, &ohci->regs->control);
526 }
527 ohci->ed_bulktail = edi;
528 break;
529 }
530 return 0;
531 }
532
533 /*-------------------------------------------------------------------------*/
534
535 /* unlink an ed from one of the HC chains.
536 * just the link to the ed is unlinked.
537 * the link from the ed still points to another operational ed or 0
538 * so the HC can eventually finish the processing of the unlinked ed */
539
540 static int ep_unlink (ohci_t *ohci, ed_t *ed)
541 {
542 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
543
544 switch (ed->type) {
545 case PIPE_CONTROL:
546 if (ed->ed_prev == NULL) {
547 if (!ed->hwNextED) {
548 ohci->hc_control &= ~OHCI_CTRL_CLE;
549 writel (ohci->hc_control, &ohci->regs->control);
550 }
551 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
552 } else {
553 ed->ed_prev->hwNextED = ed->hwNextED;
554 }
555 if (ohci->ed_controltail == ed) {
556 ohci->ed_controltail = ed->ed_prev;
557 } else {
558 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
559 }
560 break;
561
562 case PIPE_BULK:
563 if (ed->ed_prev == NULL) {
564 if (!ed->hwNextED) {
565 ohci->hc_control &= ~OHCI_CTRL_BLE;
566 writel (ohci->hc_control, &ohci->regs->control);
567 }
568 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
569 } else {
570 ed->ed_prev->hwNextED = ed->hwNextED;
571 }
572 if (ohci->ed_bulktail == ed) {
573 ohci->ed_bulktail = ed->ed_prev;
574 } else {
575 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
576 }
577 break;
578 }
579 ed->state = ED_UNLINK;
580 return 0;
581 }
582
583
584 /*-------------------------------------------------------------------------*/
585
586 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
587 * but the USB stack is a little bit stateless so we do it at every transaction
588 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
589 * in all other cases the state is left unchanged
590 * the ed info fields are setted anyway even though most of them should not change */
591
592 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
593 {
594 td_t *td;
595 ed_t *ed_ret;
596 volatile ed_t *ed;
597
598 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
599 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
600
601 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
602 err("ep_add_ed: pending delete");
603 /* pending delete request */
604 return NULL;
605 }
606
607 if (ed->state == ED_NEW) {
608 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
609 /* dummy td; end of td list for ed */
610 td = td_alloc (usb_dev);
611 ed->hwTailP = (__u32)m32_swap (td);
612 ed->hwHeadP = ed->hwTailP;
613 ed->state = ED_UNLINK;
614 ed->type = usb_pipetype (pipe);
615 ohci_dev.ed_cnt++;
616 }
617
618 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
619 | usb_pipeendpoint (pipe) << 7
620 | (usb_pipeisoc (pipe)? 0x8000: 0)
621 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
622 | usb_pipeslow (pipe) << 13
623 | usb_maxpacket (usb_dev, pipe) << 16);
624
625 return ed_ret;
626 }
627
628 /*-------------------------------------------------------------------------*
629 * TD handling functions
630 *-------------------------------------------------------------------------*/
631
632 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
633
634 static void td_fill (ohci_t *ohci, unsigned int info,
635 void *data, int len,
636 struct usb_device *dev, int index, urb_priv_t *urb_priv)
637 {
638 volatile td_t *td, *td_pt;
639 #ifdef OHCI_FILL_TRACE
640 int i;
641 #endif
642
643 if (index > urb_priv->length) {
644 err("index > length");
645 return;
646 }
647 /* use this td as the next dummy */
648 td_pt = urb_priv->td [index];
649 td_pt->hwNextTD = 0;
650
651 /* fill the old dummy TD */
652 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
653
654 td->ed = urb_priv->ed;
655 td->next_dl_td = NULL;
656 td->index = index;
657 td->data = (__u32)data;
658 #ifdef OHCI_FILL_TRACE
659 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
660 for (i = 0; i < len; i++)
661 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
662 printf("\n");
663 }
664 #endif
665 if (!len)
666 data = 0;
667
668 td->hwINFO = (__u32)m32_swap (info);
669 td->hwCBP = (__u32)m32_swap (data);
670 if (data)
671 td->hwBE = (__u32)m32_swap (data + len - 1);
672 else
673 td->hwBE = 0;
674 td->hwNextTD = (__u32)m32_swap (td_pt);
675
676 /* append to queue */
677 td->ed->hwTailP = td->hwNextTD;
678 }
679
680 /*-------------------------------------------------------------------------*/
681
682 /* prepare all TDs of a transfer */
683
684 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
685 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
686 {
687 ohci_t *ohci = &gohci;
688 int data_len = transfer_len;
689 void *data;
690 int cnt = 0;
691 __u32 info = 0;
692 unsigned int toggle = 0;
693
694 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
695 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
696 toggle = TD_T_TOGGLE;
697 } else {
698 toggle = TD_T_DATA0;
699 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
700 }
701 urb->td_cnt = 0;
702 if (data_len)
703 data = buffer;
704 else
705 data = 0;
706
707 switch (usb_pipetype (pipe)) {
708 case PIPE_BULK:
709 info = usb_pipeout (pipe)?
710 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
711 while(data_len > 4096) {
712 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
713 data += 4096; data_len -= 4096; cnt++;
714 }
715 info = usb_pipeout (pipe)?
716 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
717 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
718 cnt++;
719
720 if (!ohci->sleeping)
721 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
722 break;
723
724 case PIPE_CONTROL:
725 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
726 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
727 if (data_len > 0) {
728 info = usb_pipeout (pipe)?
729 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
730 /* NOTE: mishandles transfers >8K, some >4K */
731 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
732 }
733 info = usb_pipeout (pipe)?
734 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
735 td_fill (ohci, info, data, 0, dev, cnt++, urb);
736 if (!ohci->sleeping)
737 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
738 break;
739 }
740 if (urb->length != cnt)
741 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
742 }
743
744 /*-------------------------------------------------------------------------*
745 * Done List handling functions
746 *-------------------------------------------------------------------------*/
747
748
749 /* calculate the transfer length and update the urb */
750
751 static void dl_transfer_length(td_t * td)
752 {
753 __u32 tdINFO, tdBE, tdCBP;
754 urb_priv_t *lurb_priv = &urb_priv;
755
756 tdINFO = m32_swap (td->hwINFO);
757 tdBE = m32_swap (td->hwBE);
758 tdCBP = m32_swap (td->hwCBP);
759
760
761 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
762 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
763 if (tdBE != 0) {
764 if (td->hwCBP == 0)
765 lurb_priv->actual_length += tdBE - td->data + 1;
766 else
767 lurb_priv->actual_length += tdCBP - td->data;
768 }
769 }
770 }
771
772 /*-------------------------------------------------------------------------*/
773
774 /* replies to the request have to be on a FIFO basis so
775 * we reverse the reversed done-list */
776
777 static td_t * dl_reverse_done_list (ohci_t *ohci)
778 {
779 __u32 td_list_hc;
780 td_t *td_rev = NULL;
781 td_t *td_list = NULL;
782 urb_priv_t *lurb_priv = NULL;
783
784 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
785 ohci->hcca->done_head = 0;
786
787 while (td_list_hc) {
788 td_list = (td_t *)td_list_hc;
789
790 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
791 lurb_priv = &urb_priv;
792 dbg(" USB-error/status: %x : %p",
793 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
794 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
795 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
796 td_list->ed->hwHeadP =
797 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
798 (td_list->ed->hwHeadP & m32_swap (0x2));
799 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
800 } else
801 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
802 }
803 }
804
805 td_list->next_dl_td = td_rev;
806 td_rev = td_list;
807 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
808 }
809
810 return td_list;
811 }
812
813 /*-------------------------------------------------------------------------*/
814
815 /* td done list */
816 static int dl_done_list (ohci_t *ohci, td_t *td_list)
817 {
818 td_t *td_list_next = NULL;
819 ed_t *ed;
820 int cc = 0;
821 int stat = 0;
822 /* urb_t *urb; */
823 urb_priv_t *lurb_priv;
824 __u32 tdINFO, edHeadP, edTailP;
825
826 while (td_list) {
827 td_list_next = td_list->next_dl_td;
828
829 lurb_priv = &urb_priv;
830 tdINFO = m32_swap (td_list->hwINFO);
831
832 ed = td_list->ed;
833
834 dl_transfer_length(td_list);
835
836 /* error code of transfer */
837 cc = TD_CC_GET (tdINFO);
838 if (cc != 0) {
839 dbg("ConditionCode %#x", cc);
840 stat = cc_to_error[cc];
841 }
842
843 /* see if this done list makes for all TD's of current URB,
844 * and mark the URB finished if so */
845 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
846 if ((ed->state & (ED_OPER | ED_UNLINK)))
847 urb_finished = 1;
848 else
849 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
850 } else
851 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
852 lurb_priv->length);
853
854 if (ed->state != ED_NEW) {
855 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
856 edTailP = m32_swap (ed->hwTailP);
857
858 /* unlink eds if they are not busy */
859 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
860 ep_unlink (ohci, ed);
861 }
862
863 td_list = td_list_next;
864 }
865 return stat;
866 }
867
868 /*-------------------------------------------------------------------------*
869 * Virtual Root Hub
870 *-------------------------------------------------------------------------*/
871
872 /* Device descriptor */
873 static __u8 root_hub_dev_des[] =
874 {
875 0x12, /* __u8 bLength; */
876 0x01, /* __u8 bDescriptorType; Device */
877 0x10, /* __u16 bcdUSB; v1.1 */
878 0x01,
879 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
880 0x00, /* __u8 bDeviceSubClass; */
881 0x00, /* __u8 bDeviceProtocol; */
882 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
883 0x00, /* __u16 idVendor; */
884 0x00,
885 0x00, /* __u16 idProduct; */
886 0x00,
887 0x00, /* __u16 bcdDevice; */
888 0x00,
889 0x00, /* __u8 iManufacturer; */
890 0x01, /* __u8 iProduct; */
891 0x00, /* __u8 iSerialNumber; */
892 0x01 /* __u8 bNumConfigurations; */
893 };
894
895
896 /* Configuration descriptor */
897 static __u8 root_hub_config_des[] =
898 {
899 0x09, /* __u8 bLength; */
900 0x02, /* __u8 bDescriptorType; Configuration */
901 0x19, /* __u16 wTotalLength; */
902 0x00,
903 0x01, /* __u8 bNumInterfaces; */
904 0x01, /* __u8 bConfigurationValue; */
905 0x00, /* __u8 iConfiguration; */
906 0x40, /* __u8 bmAttributes;
907 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
908 0x00, /* __u8 MaxPower; */
909
910 /* interface */
911 0x09, /* __u8 if_bLength; */
912 0x04, /* __u8 if_bDescriptorType; Interface */
913 0x00, /* __u8 if_bInterfaceNumber; */
914 0x00, /* __u8 if_bAlternateSetting; */
915 0x01, /* __u8 if_bNumEndpoints; */
916 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
917 0x00, /* __u8 if_bInterfaceSubClass; */
918 0x00, /* __u8 if_bInterfaceProtocol; */
919 0x00, /* __u8 if_iInterface; */
920
921 /* endpoint */
922 0x07, /* __u8 ep_bLength; */
923 0x05, /* __u8 ep_bDescriptorType; Endpoint */
924 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
925 0x03, /* __u8 ep_bmAttributes; Interrupt */
926 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
927 0x00,
928 0xff /* __u8 ep_bInterval; 255 ms */
929 };
930
931 static unsigned char root_hub_str_index0[] =
932 {
933 0x04, /* __u8 bLength; */
934 0x03, /* __u8 bDescriptorType; String-descriptor */
935 0x09, /* __u8 lang ID */
936 0x04, /* __u8 lang ID */
937 };
938
939 static unsigned char root_hub_str_index1[] =
940 {
941 28, /* __u8 bLength; */
942 0x03, /* __u8 bDescriptorType; String-descriptor */
943 'O', /* __u8 Unicode */
944 0, /* __u8 Unicode */
945 'H', /* __u8 Unicode */
946 0, /* __u8 Unicode */
947 'C', /* __u8 Unicode */
948 0, /* __u8 Unicode */
949 'I', /* __u8 Unicode */
950 0, /* __u8 Unicode */
951 ' ', /* __u8 Unicode */
952 0, /* __u8 Unicode */
953 'R', /* __u8 Unicode */
954 0, /* __u8 Unicode */
955 'o', /* __u8 Unicode */
956 0, /* __u8 Unicode */
957 'o', /* __u8 Unicode */
958 0, /* __u8 Unicode */
959 't', /* __u8 Unicode */
960 0, /* __u8 Unicode */
961 ' ', /* __u8 Unicode */
962 0, /* __u8 Unicode */
963 'H', /* __u8 Unicode */
964 0, /* __u8 Unicode */
965 'u', /* __u8 Unicode */
966 0, /* __u8 Unicode */
967 'b', /* __u8 Unicode */
968 0, /* __u8 Unicode */
969 };
970
971 /* Hub class-specific descriptor is constructed dynamically */
972
973
974 /*-------------------------------------------------------------------------*/
975
976 #define OK(x) len = (x); break
977 #ifdef DEBUG
978 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
979 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
980 #else
981 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
982 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
983 #endif
984 #define RD_RH_STAT roothub_status(&gohci)
985 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
986
987 /* request to virtual root hub */
988
989 int rh_check_port_status(ohci_t *controller)
990 {
991 __u32 temp, ndp, i;
992 int res;
993
994 res = -1;
995 temp = roothub_a (controller);
996 ndp = (temp & RH_A_NDP);
997 for (i = 0; i < ndp; i++) {
998 temp = roothub_portstatus (controller, i);
999 /* check for a device disconnect */
1000 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1001 (RH_PS_PESC | RH_PS_CSC)) &&
1002 ((temp & RH_PS_CCS) == 0)) {
1003 res = i;
1004 break;
1005 }
1006 }
1007 return res;
1008 }
1009
1010 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1011 void *buffer, int transfer_len, struct devrequest *cmd)
1012 {
1013 void * data = buffer;
1014 int leni = transfer_len;
1015 int len = 0;
1016 int stat = 0;
1017 __u32 datab[4];
1018 __u8 *data_buf = (__u8 *)datab;
1019 __u16 bmRType_bReq;
1020 __u16 wValue;
1021 __u16 wIndex;
1022 __u16 wLength;
1023
1024 #ifdef DEBUG
1025 urb_priv.actual_length = 0;
1026 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1027 #else
1028 wait_ms(1);
1029 #endif
1030 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1031 info("Root-Hub submit IRQ: NOT implemented");
1032 return 0;
1033 }
1034
1035 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1036 wValue = m16_swap (cmd->value);
1037 wIndex = m16_swap (cmd->index);
1038 wLength = m16_swap (cmd->length);
1039
1040 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1041 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1042
1043 switch (bmRType_bReq) {
1044 /* Request Destination:
1045 without flags: Device,
1046 RH_INTERFACE: interface,
1047 RH_ENDPOINT: endpoint,
1048 RH_CLASS means HUB here,
1049 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1050 */
1051
1052 case RH_GET_STATUS:
1053 *(__u16 *) data_buf = m16_swap (1); OK (2);
1054 case RH_GET_STATUS | RH_INTERFACE:
1055 *(__u16 *) data_buf = m16_swap (0); OK (2);
1056 case RH_GET_STATUS | RH_ENDPOINT:
1057 *(__u16 *) data_buf = m16_swap (0); OK (2);
1058 case RH_GET_STATUS | RH_CLASS:
1059 *(__u32 *) data_buf = m32_swap (
1060 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1061 OK (4);
1062 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1063 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1064
1065 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1066 switch (wValue) {
1067 case (RH_ENDPOINT_STALL): OK (0);
1068 }
1069 break;
1070
1071 case RH_CLEAR_FEATURE | RH_CLASS:
1072 switch (wValue) {
1073 case RH_C_HUB_LOCAL_POWER:
1074 OK(0);
1075 case (RH_C_HUB_OVER_CURRENT):
1076 WR_RH_STAT(RH_HS_OCIC); OK (0);
1077 }
1078 break;
1079
1080 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1081 switch (wValue) {
1082 case (RH_PORT_ENABLE):
1083 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1084 case (RH_PORT_SUSPEND):
1085 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1086 case (RH_PORT_POWER):
1087 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1088 case (RH_C_PORT_CONNECTION):
1089 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1090 case (RH_C_PORT_ENABLE):
1091 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1092 case (RH_C_PORT_SUSPEND):
1093 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1094 case (RH_C_PORT_OVER_CURRENT):
1095 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1096 case (RH_C_PORT_RESET):
1097 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1098 }
1099 break;
1100
1101 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1102 switch (wValue) {
1103 case (RH_PORT_SUSPEND):
1104 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1105 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1106 if (RD_RH_PORTSTAT & RH_PS_CCS)
1107 WR_RH_PORTSTAT (RH_PS_PRS);
1108 OK (0);
1109 case (RH_PORT_POWER):
1110 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1111 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1112 if (RD_RH_PORTSTAT & RH_PS_CCS)
1113 WR_RH_PORTSTAT (RH_PS_PES );
1114 OK (0);
1115 }
1116 break;
1117
1118 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1119
1120 case RH_GET_DESCRIPTOR:
1121 switch ((wValue & 0xff00) >> 8) {
1122 case (0x01): /* device descriptor */
1123 len = min_t(unsigned int,
1124 leni,
1125 min_t(unsigned int,
1126 sizeof (root_hub_dev_des),
1127 wLength));
1128 data_buf = root_hub_dev_des; OK(len);
1129 case (0x02): /* configuration descriptor */
1130 len = min_t(unsigned int,
1131 leni,
1132 min_t(unsigned int,
1133 sizeof (root_hub_config_des),
1134 wLength));
1135 data_buf = root_hub_config_des; OK(len);
1136 case (0x03): /* string descriptors */
1137 if(wValue==0x0300) {
1138 len = min_t(unsigned int,
1139 leni,
1140 min_t(unsigned int,
1141 sizeof (root_hub_str_index0),
1142 wLength));
1143 data_buf = root_hub_str_index0;
1144 OK(len);
1145 }
1146 if(wValue==0x0301) {
1147 len = min_t(unsigned int,
1148 leni,
1149 min_t(unsigned int,
1150 sizeof (root_hub_str_index1),
1151 wLength));
1152 data_buf = root_hub_str_index1;
1153 OK(len);
1154 }
1155 default:
1156 stat = USB_ST_STALLED;
1157 }
1158 break;
1159
1160 case RH_GET_DESCRIPTOR | RH_CLASS:
1161 {
1162 __u32 temp = roothub_a (&gohci);
1163
1164 data_buf [0] = 9; /* min length; */
1165 data_buf [1] = 0x29;
1166 data_buf [2] = temp & RH_A_NDP;
1167 data_buf [3] = 0;
1168 if (temp & RH_A_PSM) /* per-port power switching? */
1169 data_buf [3] |= 0x1;
1170 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1171 data_buf [3] |= 0x10;
1172 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1173 data_buf [3] |= 0x8;
1174
1175 /* corresponds to data_buf[4-7] */
1176 datab [1] = 0;
1177 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1178 temp = roothub_b (&gohci);
1179 data_buf [7] = temp & RH_B_DR;
1180 if (data_buf [2] < 7) {
1181 data_buf [8] = 0xff;
1182 } else {
1183 data_buf [0] += 2;
1184 data_buf [8] = (temp & RH_B_DR) >> 8;
1185 data_buf [10] = data_buf [9] = 0xff;
1186 }
1187
1188 len = min_t(unsigned int, leni,
1189 min_t(unsigned int, data_buf [0], wLength));
1190 OK (len);
1191 }
1192
1193 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1194
1195 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1196
1197 default:
1198 dbg ("unsupported root hub command");
1199 stat = USB_ST_STALLED;
1200 }
1201
1202 #ifdef DEBUG
1203 ohci_dump_roothub (&gohci, 1);
1204 #else
1205 wait_ms(1);
1206 #endif
1207
1208 len = min_t(int, len, leni);
1209 if (data != data_buf)
1210 memcpy (data, data_buf, len);
1211 dev->act_len = len;
1212 dev->status = stat;
1213
1214 #ifdef DEBUG
1215 if (transfer_len)
1216 urb_priv.actual_length = transfer_len;
1217 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1218 #else
1219 wait_ms(1);
1220 #endif
1221
1222 return stat;
1223 }
1224
1225 /*-------------------------------------------------------------------------*/
1226
1227 /* common code for handling submit messages - used for all but root hub */
1228 /* accesses. */
1229 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1230 int transfer_len, struct devrequest *setup, int interval)
1231 {
1232 int stat = 0;
1233 int maxsize = usb_maxpacket(dev, pipe);
1234 int timeout;
1235
1236 /* device pulled? Shortcut the action. */
1237 if (devgone == dev) {
1238 dev->status = USB_ST_CRC_ERR;
1239 return 0;
1240 }
1241
1242 #ifdef DEBUG
1243 urb_priv.actual_length = 0;
1244 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1245 #else
1246 wait_ms(1);
1247 #endif
1248 if (!maxsize) {
1249 err("submit_common_message: pipesize for pipe %lx is zero",
1250 pipe);
1251 return -1;
1252 }
1253
1254 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1255 err("sohci_submit_job failed");
1256 return -1;
1257 }
1258
1259 wait_ms(10);
1260 /* ohci_dump_status(&gohci); */
1261
1262 /* allow more time for a BULK device to react - some are slow */
1263 #define BULK_TO 5000 /* timeout in milliseconds */
1264 if (usb_pipetype (pipe) == PIPE_BULK)
1265 timeout = BULK_TO;
1266 else
1267 timeout = 100;
1268
1269 /* wait for it to complete */
1270 for (;;) {
1271 /* check whether the controller is done */
1272 stat = hc_interrupt();
1273
1274 if (stat < 0) {
1275 stat = USB_ST_CRC_ERR;
1276 break;
1277 }
1278
1279 /* NOTE: since we are not interrupt driven in U-Boot and always
1280 * handle only one URB at a time, we cannot assume the
1281 * transaction finished on the first successful return from
1282 * hc_interrupt().. unless the flag for current URB is set,
1283 * meaning that all TD's to/from device got actually
1284 * transferred and processed. If the current URB is not
1285 * finished we need to re-iterate this loop so as
1286 * hc_interrupt() gets called again as there needs to be some
1287 * more TD's to process still */
1288 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1289 /* 0xff is returned for an SF-interrupt */
1290 break;
1291 }
1292
1293 if (--timeout) {
1294 wait_ms(1);
1295 if (!urb_finished)
1296 dbg("\%");
1297
1298 } else {
1299 err("CTL:TIMEOUT ");
1300 dbg("submit_common_msg: TO status %x\n", stat);
1301 stat = USB_ST_CRC_ERR;
1302 urb_finished = 1;
1303 break;
1304 }
1305 }
1306
1307 #if 0
1308 /* we got an Root Hub Status Change interrupt */
1309 if (got_rhsc) {
1310 #ifdef DEBUG
1311 ohci_dump_roothub (&gohci, 1);
1312 #endif
1313 got_rhsc = 0;
1314 /* abuse timeout */
1315 timeout = rh_check_port_status(&gohci);
1316 if (timeout >= 0) {
1317 #if 0 /* this does nothing useful, but leave it here in case that changes */
1318 /* the called routine adds 1 to the passed value */
1319 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1320 #endif
1321 /*
1322 * XXX
1323 * This is potentially dangerous because it assumes
1324 * that only one device is ever plugged in!
1325 */
1326 devgone = dev;
1327 }
1328 }
1329 #endif
1330
1331 dev->status = stat;
1332 dev->act_len = transfer_len;
1333
1334 #ifdef DEBUG
1335 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1336 #else
1337 wait_ms(1);
1338 #endif
1339
1340 /* free TDs in urb_priv */
1341 urb_free_priv (&urb_priv);
1342 return 0;
1343 }
1344
1345 /* submit routines called from usb.c */
1346 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1347 int transfer_len)
1348 {
1349 info("submit_bulk_msg");
1350 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1351 }
1352
1353 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1354 int transfer_len, struct devrequest *setup)
1355 {
1356 int maxsize = usb_maxpacket(dev, pipe);
1357
1358 info("submit_control_msg");
1359 #ifdef DEBUG
1360 urb_priv.actual_length = 0;
1361 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1362 #else
1363 wait_ms(1);
1364 #endif
1365 if (!maxsize) {
1366 err("submit_control_message: pipesize for pipe %lx is zero",
1367 pipe);
1368 return -1;
1369 }
1370 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1371 gohci.rh.dev = dev;
1372 /* root hub - redirect */
1373 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1374 setup);
1375 }
1376
1377 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1378 }
1379
1380 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1381 int transfer_len, int interval)
1382 {
1383 info("submit_int_msg");
1384 return -1;
1385 }
1386
1387 /*-------------------------------------------------------------------------*
1388 * HC functions
1389 *-------------------------------------------------------------------------*/
1390
1391 /* reset the HC and BUS */
1392
1393 static int hc_reset (ohci_t *ohci)
1394 {
1395 int timeout = 30;
1396 int smm_timeout = 50; /* 0,5 sec */
1397
1398 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1399 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1400 info("USB HC TakeOver from SMM");
1401 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1402 wait_ms (10);
1403 if (--smm_timeout == 0) {
1404 err("USB HC TakeOver failed!");
1405 return -1;
1406 }
1407 }
1408 }
1409
1410 /* Disable HC interrupts */
1411 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1412
1413 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1414 ohci->slot_name,
1415 readl (&ohci->regs->control));
1416
1417 /* Reset USB (needed by some controllers) */
1418 writel (0, &ohci->regs->control);
1419
1420 /* HC Reset requires max 10 us delay */
1421 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1422 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1423 if (--timeout == 0) {
1424 err("USB HC reset timed out!");
1425 return -1;
1426 }
1427 udelay (1);
1428 }
1429 return 0;
1430 }
1431
1432 /*-------------------------------------------------------------------------*/
1433
1434 /* Start an OHCI controller, set the BUS operational
1435 * enable interrupts
1436 * connect the virtual root hub */
1437
1438 static int hc_start (ohci_t * ohci)
1439 {
1440 __u32 mask;
1441 unsigned int fminterval;
1442
1443 ohci->disabled = 1;
1444
1445 /* Tell the controller where the control and bulk lists are
1446 * The lists are empty now. */
1447
1448 writel (0, &ohci->regs->ed_controlhead);
1449 writel (0, &ohci->regs->ed_bulkhead);
1450
1451 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1452
1453 fminterval = 0x2edf;
1454 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1455 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1456 writel (fminterval, &ohci->regs->fminterval);
1457 writel (0x628, &ohci->regs->lsthresh);
1458
1459 /* start controller operations */
1460 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1461 ohci->disabled = 0;
1462 writel (ohci->hc_control, &ohci->regs->control);
1463
1464 /* disable all interrupts */
1465 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1466 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1467 OHCI_INTR_OC | OHCI_INTR_MIE);
1468 writel (mask, &ohci->regs->intrdisable);
1469 /* clear all interrupts */
1470 mask &= ~OHCI_INTR_MIE;
1471 writel (mask, &ohci->regs->intrstatus);
1472 /* Choose the interrupts we care about now - but w/o MIE */
1473 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1474 writel (mask, &ohci->regs->intrenable);
1475
1476 #ifdef OHCI_USE_NPS
1477 /* required for AMD-756 and some Mac platforms */
1478 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1479 &ohci->regs->roothub.a);
1480 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1481 #endif /* OHCI_USE_NPS */
1482
1483 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1484 /* POTPGT delay is bits 24-31, in 2 ms units. */
1485 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1486
1487 /* connect the virtual root hub */
1488 ohci->rh.devnum = 0;
1489
1490 return 0;
1491 }
1492
1493 /*-------------------------------------------------------------------------*/
1494
1495 /* an interrupt happens */
1496
1497 static int
1498 hc_interrupt (void)
1499 {
1500 ohci_t *ohci = &gohci;
1501 struct ohci_regs *regs = ohci->regs;
1502 int ints;
1503 int stat = -1;
1504
1505 if ((ohci->hcca->done_head != 0) &&
1506 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1507
1508 ints = OHCI_INTR_WDH;
1509
1510 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1511 ohci->disabled++;
1512 err ("%s device removed!", ohci->slot_name);
1513 return -1;
1514
1515 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1516 dbg("hc_interrupt: returning..\n");
1517 return 0xff;
1518 }
1519
1520 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1521
1522 if (ints & OHCI_INTR_RHSC) {
1523 got_rhsc = 1;
1524 stat = 0xff;
1525 }
1526
1527 if (ints & OHCI_INTR_UE) {
1528 ohci->disabled++;
1529 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1530 ohci->slot_name);
1531 /* e.g. due to PCI Master/Target Abort */
1532
1533 #ifdef DEBUG
1534 ohci_dump (ohci, 1);
1535 #else
1536 wait_ms(1);
1537 #endif
1538 /* FIXME: be optimistic, hope that bug won't repeat often. */
1539 /* Make some non-interrupt context restart the controller. */
1540 /* Count and limit the retries though; either hardware or */
1541 /* software errors can go forever... */
1542 hc_reset (ohci);
1543 return -1;
1544 }
1545
1546 if (ints & OHCI_INTR_WDH) {
1547 wait_ms(1);
1548
1549 writel (OHCI_INTR_WDH, &regs->intrdisable);
1550 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1551 writel (OHCI_INTR_WDH, &regs->intrenable);
1552 }
1553
1554 if (ints & OHCI_INTR_SO) {
1555 dbg("USB Schedule overrun\n");
1556 writel (OHCI_INTR_SO, &regs->intrenable);
1557 stat = -1;
1558 }
1559
1560 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1561 if (ints & OHCI_INTR_SF) {
1562 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1563 wait_ms(1);
1564 writel (OHCI_INTR_SF, &regs->intrdisable);
1565 if (ohci->ed_rm_list[frame] != NULL)
1566 writel (OHCI_INTR_SF, &regs->intrenable);
1567 stat = 0xff;
1568 }
1569
1570 writel (ints, &regs->intrstatus);
1571 return stat;
1572 }
1573
1574 /*-------------------------------------------------------------------------*/
1575
1576 /*-------------------------------------------------------------------------*/
1577
1578 /* De-allocate all resources.. */
1579
1580 static void hc_release_ohci (ohci_t *ohci)
1581 {
1582 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1583
1584 if (!ohci->disabled)
1585 hc_reset (ohci);
1586 }
1587
1588 /*-------------------------------------------------------------------------*/
1589
1590 /*
1591 * low level initalisation routine, called from usb.c
1592 */
1593 static char ohci_inited = 0;
1594
1595 int usb_lowlevel_init(void)
1596 {
1597 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1598 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1599
1600 /*
1601 * Set the 48 MHz UPLL clocking. Values are taken from
1602 * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1603 */
1604 clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
1605 gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
1606
1607 /*
1608 * Enable USB host clock.
1609 */
1610 clk_power->CLKCON |= (1 << 4);
1611
1612 memset (&gohci, 0, sizeof (ohci_t));
1613 memset (&urb_priv, 0, sizeof (urb_priv_t));
1614
1615 /* align the storage */
1616 if ((__u32)&ghcca[0] & 0xff) {
1617 err("HCCA not aligned!!");
1618 return -1;
1619 }
1620 phcca = &ghcca[0];
1621 info("aligned ghcca %p", phcca);
1622 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1623 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1624 err("EDs not aligned!!");
1625 return -1;
1626 }
1627 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1628 if ((__u32)gtd & 0x7) {
1629 err("TDs not aligned!!");
1630 return -1;
1631 }
1632 ptd = gtd;
1633 gohci.hcca = phcca;
1634 memset (phcca, 0, sizeof (struct ohci_hcca));
1635
1636 gohci.disabled = 1;
1637 gohci.sleeping = 0;
1638 gohci.irq = -1;
1639 gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1640
1641 gohci.flags = 0;
1642 gohci.slot_name = "s3c2400";
1643
1644 if (hc_reset (&gohci) < 0) {
1645 hc_release_ohci (&gohci);
1646 /* Initialization failed */
1647 clk_power->CLKCON &= ~(1 << 4);
1648 return -1;
1649 }
1650
1651 /* FIXME this is a second HC reset; why?? */
1652 gohci.hc_control = OHCI_USB_RESET;
1653 writel (gohci.hc_control, &gohci.regs->control);
1654 wait_ms (10);
1655
1656 if (hc_start (&gohci) < 0) {
1657 err ("can't start usb-%s", gohci.slot_name);
1658 hc_release_ohci (&gohci);
1659 /* Initialization failed */
1660 clk_power->CLKCON &= ~(1 << 4);
1661 return -1;
1662 }
1663
1664 #ifdef DEBUG
1665 ohci_dump (&gohci, 1);
1666 #else
1667 wait_ms(1);
1668 #endif
1669 ohci_inited = 1;
1670 urb_finished = 1;
1671
1672 return 0;
1673 }
1674
1675 int usb_lowlevel_stop(void)
1676 {
1677 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1678
1679 /* this gets called really early - before the controller has */
1680 /* even been initialized! */
1681 if (!ohci_inited)
1682 return 0;
1683 /* TODO release any interrupts, etc. */
1684 /* call hc_release_ohci() here ? */
1685 hc_reset (&gohci);
1686 /* may not want to do this */
1687 clk_power->CLKCON &= ~(1 << 4);
1688 return 0;
1689 }
1690
1691 #endif /* CONFIG_USB_OHCI */
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