cpu/arm920t/s3c24x0/interrupts.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Alex Zuepke <azu@sysgo.de>
   9  *
  10  * (C) Copyright 2002
  11  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #include <common.h>
  33 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
  34     defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
  35
  36 #include <arm920t.h>
  37 #if defined(CONFIG_S3C2400)
  38 #include <s3c2400.h>
  39 #elif defined(CONFIG_S3C2410)
  40 #include <s3c2410.h>
  41 #elif defined(CONFIG_S3C2440)
  42 #include <s3c2440.h>
  43 #endif
  44
  45 int timer_load_val = 0;
  46
  47 /* macro to read the 16 bit timer */
  48 static inline ulong READ_TIMER(void)
  49 {
  50         S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
  51
  52         return (timers->TCNTO4 & 0xffff);
  53 }
  54
  55 static ulong timestamp;
  56 static ulong lastdec;
  57
  58 int interrupt_init (void)
  59 {
  60         S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
  61
  62         /* use PWM Timer 4 because it has no output */
  63         /* prescaler for Timer 4 is 16 */
  64         timers->TCFG0 = 0x0f00;
  65 #ifndef CONFIG_S3C2440
  66         if (timer_load_val == 0)
  67         {
  68                 /*
  69                  * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
  70                  * (default) and prescaler = 16. Should be 10390
  71                  * @33.25MHz and 15625 @ 50 MHz
  72                  */
  73                 timer_load_val = get_PCLK()/(2 * 16 * 100);
  74         }
  75 #else
  76         timer_load_val = get_PCLK()/(2 * 16 * 100);
  77 #endif
  78         /* load value for 10 ms timeout */
  79         lastdec = timers->TCNTB4 = timer_load_val;
  80         /* auto load, manual update of Timer 4 */
  81         timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
  82         /* auto load, start Timer 4 */
  83         timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
  84         timestamp = 0;
  85
  86         return (0);
  87 }
  88
  89 /*
  90  * timer without interrupts
  91  */
  92
  93 void reset_timer (void)
  94 {
  95         reset_timer_masked ();
  96 }
  97
  98 ulong get_timer (ulong base)
  99 {
 100         return get_timer_masked () - base;
 101 }
 102
 103 void set_timer (ulong t)
 104 {
 105         timestamp = t;
 106 }
 107
 108 void udelay (unsigned long usec)
 109 {
 110         ulong tmo;
 111         ulong start = get_timer(0);
 112
 113         tmo = usec / 1000;
 114         tmo *= (timer_load_val * 100);
 115         tmo /= 1000;
 116
 117         while ((ulong)(get_timer_masked () - start) < tmo)
 118                 /*NOP*/;
 119 }
 120
 121 void reset_timer_masked (void)
 122 {
 123         /* reset time */
 124         lastdec = READ_TIMER();
 125         timestamp = 0;
 126 }
 127
 128 ulong get_timer_masked (void)
 129 {
 130         ulong now = READ_TIMER();
 131
 132         if (lastdec >= now) {
 133                 /* normal mode */
 134                 timestamp += lastdec - now;
 135         } else {
 136                 /* we have an overflow ... */
 137                 timestamp += lastdec + timer_load_val - now;
 138         }
 139         lastdec = now;
 140
 141         return timestamp;
 142 }
 143
 144 void udelay_masked (unsigned long usec)
 145 {
 146         ulong tmo;
 147         ulong endtime;
 148         signed long diff;
 149
 150         if (usec >= 1000) {
 151                 tmo = usec / 1000;
 152                 tmo *= (timer_load_val * 100);
 153                 tmo /= 1000;
 154         } else {
 155                 tmo = usec * (timer_load_val * 100);
 156                 tmo /= (1000*1000);
 157         }
 158
 159         endtime = get_timer_masked () + tmo;
 160
 161         do {
 162                 ulong now = get_timer_masked ();
 163                 diff = endtime - now;
 164         } while (diff >= 0);
 165 }
 166
 167 /*
 168  * This function is derived from PowerPC code (read timebase as long long).
 169  * On ARM it just returns the timer value.
 170  */
 171 unsigned long long get_ticks(void)
 172 {
 173         return get_timer(0);
 174 }
 175
 176 /*
 177  * This function is derived from PowerPC code (timebase clock frequency).
 178  * On ARM it returns the number of timer ticks per second.
 179  */
 180 ulong get_tbclk (void)
 181 {
 182         ulong tbclk;
 183
 184 #if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
 185         tbclk = timer_load_val * 100;
 186 #elif defined(CONFIG_SBC2410X) || \
 187       defined(CONFIG_SMDK2410) || \
 188       defined(CONFIG_SMDK2440) || \
 189       defined(CONFIG_VCMA9)
 190         tbclk = CFG_HZ;
 191 #else
 192 #       error "tbclk not configured"
 193 #endif
 194
 195         return tbclk;
 196 }
 197
 198 /*
 199  * reset the cpu by setting up the watchdog timer and let him time out
 200  */
 201 void reset_cpu (ulong ignored)
 202 {
 203         volatile S3C24X0_WATCHDOG * watchdog;
 204
 205 #ifdef CONFIG_TRAB
 206         extern void disable_vfd (void);
 207
 208         disable_vfd();
 209 #endif
 210
 211         watchdog = S3C24X0_GetBase_WATCHDOG();
 212
 213         /* Disable watchdog */
 214         watchdog->WTCON = 0x0000;
 215
 216         /* Initialize watchdog timer count register */
 217         watchdog->WTCNT = 0x0001;
 218
 219         /* Enable watchdog timer; assert reset at timer timeout */
 220         watchdog->WTCON = 0x0021;
 221
 222         while(1);       /* loop forever and wait for reset to happen */
 223
 224         /*NOTREACHED*/
 225 }
 226
 227 #ifdef CONFIG_USE_IRQ
 228 void s3c2410_irq(void)
 229 {
 230         S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
 231         u_int32_t intpnd = irq->INTPND;
 232
 233 #ifdef CONFIG_USB_DEVICE
 234         if (intpnd & BIT_USBD) {
 235                 s3c2410_udc_irq();
 236                 irq->SRCPND = BIT_USBD;
 237                 irq->INTPND = BIT_USBD;
 238         }
 239 #endif /* USB_DEVICE */
 240 }
 241 #endif /* USE_IRQ */
 242
 243 #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) ||
 244           defined(CONFIG_S3C2440) || defined (CONFIG_TRAB) */