2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
45 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
46 * The width of the port and the width of the chips are determined at initialization.
47 * These widths are used to calculate the address for access CFI data structures.
50 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
51 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
52 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
53 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
54 * AMD CFI Specification, Release 2.0 December 1, 2001
55 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
56 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
58 * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
59 * reading and writing ... (yes there is such a Hardware).
62 #ifndef CFG_FLASH_BANKS_LIST
63 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
66 #define FLASH_CMD_CFI 0x98
67 #define FLASH_CMD_READ_ID 0x90
68 #define FLASH_CMD_RESET 0xff
69 #define FLASH_CMD_BLOCK_ERASE 0x20
70 #define FLASH_CMD_ERASE_CONFIRM 0xD0
71 #define FLASH_CMD_WRITE 0x40
72 #define FLASH_CMD_PROTECT 0x60
73 #define FLASH_CMD_PROTECT_SET 0x01
74 #define FLASH_CMD_PROTECT_CLEAR 0xD0
75 #define FLASH_CMD_CLEAR_STATUS 0x50
76 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
77 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
79 #define FLASH_STATUS_DONE 0x80
80 #define FLASH_STATUS_ESS 0x40
81 #define FLASH_STATUS_ECLBS 0x20
82 #define FLASH_STATUS_PSLBS 0x10
83 #define FLASH_STATUS_VPENS 0x08
84 #define FLASH_STATUS_PSS 0x04
85 #define FLASH_STATUS_DPS 0x02
86 #define FLASH_STATUS_R 0x01
87 #define FLASH_STATUS_PROTECT 0x01
89 #define AMD_CMD_RESET 0xF0
90 #define AMD_CMD_WRITE 0xA0
91 #define AMD_CMD_ERASE_START 0x80
92 #define AMD_CMD_ERASE_SECTOR 0x30
93 #define AMD_CMD_UNLOCK_START 0xAA
94 #define AMD_CMD_UNLOCK_ACK 0x55
95 #define AMD_CMD_WRITE_TO_BUFFER 0x25
96 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
98 #define AMD_STATUS_TOGGLE 0x40
99 #define AMD_STATUS_ERROR 0x20
101 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
102 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
103 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
105 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
106 #define FLASH_OFFSET_DEVICE_ID 0x01
107 #define FLASH_OFFSET_DEVICE_ID2 0x0E
108 #define FLASH_OFFSET_DEVICE_ID3 0x0F
109 #define FLASH_OFFSET_CFI 0x55
110 #define FLASH_OFFSET_CFI_ALT 0x555
111 #define FLASH_OFFSET_CFI_RESP 0x10
112 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141 # undef FLASH_CMD_RESET
142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
149 unsigned long long ll
;
153 volatile unsigned char *cp
;
154 volatile unsigned short *wp
;
155 volatile unsigned long *lp
;
156 volatile unsigned long long *llp
;
159 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
161 static uint flash_offset_cfi
[2]={FLASH_OFFSET_CFI
,FLASH_OFFSET_CFI_ALT
};
163 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
164 #ifdef CFG_MAX_FLASH_BANKS_DETECT
165 static ulong bank_base
[CFG_MAX_FLASH_BANKS_DETECT
] = CFG_FLASH_BANKS_LIST
;
166 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS_DETECT
]; /* FLASH chips info */
168 static ulong bank_base
[CFG_MAX_FLASH_BANKS
] = CFG_FLASH_BANKS_LIST
;
169 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS
]; /* FLASH chips info */
173 * Check if chip width is defined. If not, start detecting with 8bit.
175 #ifndef CFG_FLASH_CFI_WIDTH
176 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
180 /*-----------------------------------------------------------------------
184 typedef unsigned long flash_sect_t
;
186 static void flash_add_byte (flash_info_t
* info
, cfiword_t
* cword
, uchar c
);
187 static void flash_make_cmd (flash_info_t
* info
, uchar cmd
, void *cmdbuf
);
188 static void flash_write_cmd (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
189 static void flash_unlock_seq (flash_info_t
* info
, flash_sect_t sect
);
190 static int flash_isequal (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
191 static int flash_isset (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
192 static int flash_toggle (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
193 static void flash_read_jedec_ids (flash_info_t
* info
);
194 static int flash_detect_cfi (flash_info_t
* info
);
195 static int flash_write_cfiword (flash_info_t
* info
, ulong dest
, cfiword_t cword
);
196 static int flash_full_status_check (flash_info_t
* info
, flash_sect_t sector
,
197 ulong tout
, char *prompt
);
198 ulong
flash_get_size (ulong base
, int banknum
);
199 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
200 static flash_info_t
*flash_get_info(ulong base
);
202 #ifdef CFG_FLASH_USE_BUFFER_WRITE
203 static int flash_write_cfibuffer (flash_info_t
* info
, ulong dest
, uchar
* cp
, int len
);
206 /*-----------------------------------------------------------------------
207 * create an address based on the offset and the port width
209 inline uchar
*flash_make_addr (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
211 return ((uchar
*) (info
->start
[sect
] + (offset
* info
->portwidth
)));
215 /*-----------------------------------------------------------------------
218 void print_longlong (char *str
, unsigned long long data
)
223 cp
= (unsigned char *) &data
;
224 for (i
= 0; i
< 8; i
++)
225 sprintf (&str
[i
* 2], "%2.2x", *cp
++);
227 static void flash_printqry (flash_info_t
* info
, flash_sect_t sect
)
232 for (x
= 0; x
< 0x40; x
+= 16U / info
->portwidth
) {
234 flash_make_addr (info
, sect
,
235 x
+ FLASH_OFFSET_CFI_RESP
);
236 debug ("%p : ", cptr
.cp
);
237 for (y
= 0; y
< 16; y
++) {
238 debug ("%2.2x ", cptr
.cp
[y
]);
241 for (y
= 0; y
< 16; y
++) {
242 if (cptr
.cp
[y
] >= 0x20 && cptr
.cp
[y
] <= 0x7e) {
243 debug ("%c", cptr
.cp
[y
]);
254 /*-----------------------------------------------------------------------
255 * read a character at a port width address
257 inline uchar
flash_read_uchar (flash_info_t
* info
, uint offset
)
261 cp
= flash_make_addr (info
, 0, offset
);
262 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
265 return (cp
[info
->portwidth
- 1]);
269 /*-----------------------------------------------------------------------
270 * read a short word by swapping for ppc format.
272 ushort
flash_read_ushort (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
280 addr
= flash_make_addr (info
, sect
, offset
);
283 debug ("ushort addr is at %p info->portwidth = %d\n", addr
,
285 for (x
= 0; x
< 2 * info
->portwidth
; x
++) {
286 debug ("addr[%x] = 0x%x\n", x
, addr
[x
]);
289 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
290 retval
= ((addr
[(info
->portwidth
)] << 8) | addr
[0]);
292 retval
= ((addr
[(2 * info
->portwidth
) - 1] << 8) |
293 addr
[info
->portwidth
- 1]);
296 debug ("retval = 0x%x\n", retval
);
300 /*-----------------------------------------------------------------------
301 * read a long word by picking the least significant byte of each maximum
302 * port size word. Swap for ppc format.
304 ulong
flash_read_long (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
312 addr
= flash_make_addr (info
, sect
, offset
);
315 debug ("long addr is at %p info->portwidth = %d\n", addr
,
317 for (x
= 0; x
< 4 * info
->portwidth
; x
++) {
318 debug ("addr[%x] = 0x%x\n", x
, addr
[x
]);
321 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
322 retval
= (addr
[0] << 16) | (addr
[(info
->portwidth
)] << 24) |
323 (addr
[(2 * info
->portwidth
)]) | (addr
[(3 * info
->portwidth
)] << 8);
325 retval
= (addr
[(2 * info
->portwidth
) - 1] << 24) |
326 (addr
[(info
->portwidth
) - 1] << 16) |
327 (addr
[(4 * info
->portwidth
) - 1] << 8) |
328 addr
[(3 * info
->portwidth
) - 1];
334 /*-----------------------------------------------------------------------
336 unsigned long flash_init (void)
338 unsigned long size
= 0;
341 #ifdef CFG_FLASH_PROTECTION
342 char *s
= getenv("unlock");
345 /* Init: no FLASHes known */
346 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; ++i
) {
347 flash_info
[i
].flash_id
= FLASH_UNKNOWN
;
348 size
+= flash_info
[i
].size
= flash_get_size (bank_base
[i
], i
);
349 if (flash_info
[i
].flash_id
== FLASH_UNKNOWN
) {
350 #ifndef CFG_FLASH_QUIET_TEST
351 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
352 i
+1, flash_info
[i
].size
, flash_info
[i
].size
<< 20);
353 #endif /* CFG_FLASH_QUIET_TEST */
355 #ifdef CFG_FLASH_PROTECTION
356 else if ((s
!= NULL
) && (strcmp(s
, "yes") == 0)) {
358 * Only the U-Boot image and it's environment is protected,
359 * all other sectors are unprotected (unlocked) if flash
360 * hardware protection is used (CFG_FLASH_PROTECTION) and
361 * the environment variable "unlock" is set to "yes".
363 if (flash_info
[i
].legacy_unlock
) {
367 * Disable legacy_unlock temporarily, since
368 * flash_real_protect would relock all other sectors
371 flash_info
[i
].legacy_unlock
= 0;
374 * Legacy unlocking (e.g. Intel J3) -> unlock only one
375 * sector. This will unlock all sectors.
377 flash_real_protect (&flash_info
[i
], 0, 0);
379 flash_info
[i
].legacy_unlock
= 1;
382 * Manually mark other sectors as unlocked (unprotected)
384 for (k
= 1; k
< flash_info
[i
].sector_count
; k
++)
385 flash_info
[i
].protect
[k
] = 0;
388 * No legancy unlocking -> unlock all sectors
390 flash_protect (FLAG_PROTECT_CLEAR
,
391 flash_info
[i
].start
[0],
392 flash_info
[i
].start
[0] + flash_info
[i
].size
- 1,
396 #endif /* CFG_FLASH_PROTECTION */
399 /* Monitor protection ON by default */
400 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
401 flash_protect (FLAG_PROTECT_SET
,
403 CFG_MONITOR_BASE
+ monitor_flash_len
- 1,
404 flash_get_info(CFG_MONITOR_BASE
));
407 /* Environment protection ON by default */
408 #ifdef CFG_ENV_IS_IN_FLASH
409 flash_protect (FLAG_PROTECT_SET
,
411 CFG_ENV_ADDR
+ CFG_ENV_SECT_SIZE
- 1,
412 flash_get_info(CFG_ENV_ADDR
));
415 /* Redundant environment protection ON by default */
416 #ifdef CFG_ENV_ADDR_REDUND
417 flash_protect (FLAG_PROTECT_SET
,
419 CFG_ENV_ADDR_REDUND
+ CFG_ENV_SIZE_REDUND
- 1,
420 flash_get_info(CFG_ENV_ADDR_REDUND
));
425 /*-----------------------------------------------------------------------
427 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
428 static flash_info_t
*flash_get_info(ulong base
)
431 flash_info_t
* info
= 0;
433 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; i
++) {
434 info
= & flash_info
[i
];
435 if (info
->size
&& info
->start
[0] <= base
&&
436 base
<= info
->start
[0] + info
->size
- 1)
440 return i
== CFG_MAX_FLASH_BANKS
? 0 : info
;
444 /*-----------------------------------------------------------------------
446 int flash_erase (flash_info_t
* info
, int s_first
, int s_last
)
452 if (info
->flash_id
!= FLASH_MAN_CFI
) {
453 puts ("Can't erase unknown flash type - aborted\n");
456 if ((s_first
< 0) || (s_first
> s_last
)) {
457 puts ("- no sectors to erase\n");
462 for (sect
= s_first
; sect
<= s_last
; ++sect
) {
463 if (info
->protect
[sect
]) {
468 printf ("- Warning: %d protected sectors will not be erased!\n", prot
);
474 for (sect
= s_first
; sect
<= s_last
; sect
++) {
475 if (info
->protect
[sect
] == 0) { /* not protected */
476 switch (info
->vendor
) {
477 case CFI_CMDSET_INTEL_STANDARD
:
478 case CFI_CMDSET_INTEL_EXTENDED
:
479 flash_write_cmd (info
, sect
, 0, FLASH_CMD_CLEAR_STATUS
);
480 flash_write_cmd (info
, sect
, 0, FLASH_CMD_BLOCK_ERASE
);
481 flash_write_cmd (info
, sect
, 0, FLASH_CMD_ERASE_CONFIRM
);
483 case CFI_CMDSET_AMD_STANDARD
:
484 case CFI_CMDSET_AMD_EXTENDED
:
485 flash_unlock_seq (info
, sect
);
486 flash_write_cmd (info
, sect
, AMD_ADDR_ERASE_START
,
487 AMD_CMD_ERASE_START
);
488 flash_unlock_seq (info
, sect
);
489 flash_write_cmd (info
, sect
, 0, AMD_CMD_ERASE_SECTOR
);
492 debug ("Unkown flash vendor %d\n",
497 if (flash_full_status_check
498 (info
, sect
, info
->erase_blk_tout
, "erase")) {
508 /*-----------------------------------------------------------------------
510 void flash_print_info (flash_info_t
* info
)
514 if (info
->flash_id
!= FLASH_MAN_CFI
) {
515 puts ("missing or unknown FLASH type\n");
519 printf ("CFI conformant FLASH (%d x %d)",
520 (info
->portwidth
<< 3), (info
->chipwidth
<< 3));
521 printf (" Size: %ld MB in %d Sectors\n",
522 info
->size
>> 20, info
->sector_count
);
524 switch (info
->vendor
) {
525 case CFI_CMDSET_INTEL_STANDARD
:
526 printf ("Intel Standard");
528 case CFI_CMDSET_INTEL_EXTENDED
:
529 printf ("Intel Extended");
531 case CFI_CMDSET_AMD_STANDARD
:
532 printf ("AMD Standard");
534 case CFI_CMDSET_AMD_EXTENDED
:
535 printf ("AMD Extended");
538 printf ("Unknown (%d)", info
->vendor
);
541 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
542 info
->manufacturer_id
, info
->device_id
);
543 if (info
->device_id
== 0x7E) {
544 printf("%04X", info
->device_id2
);
546 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
547 info
->erase_blk_tout
,
549 if (info
->buffer_size
> 1) {
550 printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n",
551 info
->buffer_write_tout
,
555 puts ("\n Sector Start Addresses:");
556 for (i
= 0; i
< info
->sector_count
; ++i
) {
559 #ifdef CFG_FLASH_EMPTY_INFO
563 volatile unsigned long *flash
;
566 * Check if whole sector is erased
568 if (i
!= (info
->sector_count
- 1))
569 size
= info
->start
[i
+ 1] - info
->start
[i
];
571 size
= info
->start
[0] + info
->size
- info
->start
[i
];
573 flash
= (volatile unsigned long *) info
->start
[i
];
574 size
= size
>> 2; /* divide by 4 for longword access */
575 for (k
= 0; k
< size
; k
++) {
576 if (*flash
++ != 0xffffffff) {
582 /* print empty and read-only info */
583 printf (" %08lX %c %s ",
586 info
->protect
[i
] ? "RO" : " ");
587 #else /* ! CFG_FLASH_EMPTY_INFO */
588 printf (" %08lX %s ",
590 info
->protect
[i
] ? "RO" : " ");
597 /*-----------------------------------------------------------------------
598 * Copy memory to flash, returns:
601 * 2 - Flash not erased
603 int write_buff (flash_info_t
* info
, uchar
* src
, ulong addr
, ulong cnt
)
611 #ifdef CFG_FLASH_USE_BUFFER_WRITE
614 /* get lower aligned address */
615 /* get lower aligned address */
616 wp
= (addr
& ~(info
->portwidth
- 1));
618 /* handle unaligned start */
619 if ((aln
= addr
- wp
) != 0) {
622 for (i
= 0; i
< aln
; ++i
, ++cp
)
623 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
625 for (; (i
< info
->portwidth
) && (cnt
> 0); i
++) {
626 flash_add_byte (info
, &cword
, *src
++);
630 for (; (cnt
== 0) && (i
< info
->portwidth
); ++i
, ++cp
)
631 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
632 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
637 /* handle the aligned part */
638 #ifdef CFG_FLASH_USE_BUFFER_WRITE
639 buffered_size
= (info
->portwidth
/ info
->chipwidth
);
640 buffered_size
*= info
->buffer_size
;
641 while (cnt
>= info
->portwidth
) {
642 /* prohibit buffer write when buffer_size is 1 */
643 if (info
->buffer_size
== 1) {
645 for (i
= 0; i
< info
->portwidth
; i
++)
646 flash_add_byte (info
, &cword
, *src
++);
647 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
649 wp
+= info
->portwidth
;
650 cnt
-= info
->portwidth
;
654 /* write buffer until next buffered_size aligned boundary */
655 i
= buffered_size
- (wp
% buffered_size
);
658 if ((rc
= flash_write_cfibuffer (info
, wp
, src
, i
)) != ERR_OK
)
660 i
-= i
& (info
->portwidth
- 1);
666 while (cnt
>= info
->portwidth
) {
668 for (i
= 0; i
< info
->portwidth
; i
++) {
669 flash_add_byte (info
, &cword
, *src
++);
671 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
673 wp
+= info
->portwidth
;
674 cnt
-= info
->portwidth
;
676 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
682 * handle unaligned tail bytes
685 for (i
= 0, cp
= wp
; (i
< info
->portwidth
) && (cnt
> 0); ++i
, ++cp
) {
686 flash_add_byte (info
, &cword
, *src
++);
689 for (; i
< info
->portwidth
; ++i
, ++cp
) {
690 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
693 return flash_write_cfiword (info
, wp
, cword
);
696 /*-----------------------------------------------------------------------
698 #ifdef CFG_FLASH_PROTECTION
700 int flash_real_protect (flash_info_t
* info
, long sector
, int prot
)
704 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
705 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT
);
707 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_SET
);
709 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_CLEAR
);
712 flash_full_status_check (info
, sector
, info
->erase_blk_tout
,
713 prot
? "protect" : "unprotect")) == 0) {
715 info
->protect
[sector
] = prot
;
718 * On some of Intel's flash chips (marked via legacy_unlock)
719 * unprotect unprotects all locking.
721 if ((prot
== 0) && (info
->legacy_unlock
)) {
724 for (i
= 0; i
< info
->sector_count
; i
++) {
725 if (info
->protect
[i
])
726 flash_real_protect (info
, i
, 1);
733 /*-----------------------------------------------------------------------
734 * flash_read_user_serial - read the OneTimeProgramming cells
736 void flash_read_user_serial (flash_info_t
* info
, void *buffer
, int offset
,
743 src
= flash_make_addr (info
, 0, FLASH_OFFSET_USER_PROTECTION
);
744 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
745 memcpy (dst
, src
+ offset
, len
);
746 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
750 * flash_read_factory_serial - read the device Id from the protection area
752 void flash_read_factory_serial (flash_info_t
* info
, void *buffer
, int offset
,
757 src
= flash_make_addr (info
, 0, FLASH_OFFSET_INTEL_PROTECTION
);
758 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
759 memcpy (buffer
, src
+ offset
, len
);
760 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
763 #endif /* CFG_FLASH_PROTECTION */
766 * flash_is_busy - check to see if the flash is busy
767 * This routine checks the status of the chip and returns true if the chip is busy
769 static int flash_is_busy (flash_info_t
* info
, flash_sect_t sect
)
773 switch (info
->vendor
) {
774 case CFI_CMDSET_INTEL_STANDARD
:
775 case CFI_CMDSET_INTEL_EXTENDED
:
776 retval
= !flash_isset (info
, sect
, 0, FLASH_STATUS_DONE
);
778 case CFI_CMDSET_AMD_STANDARD
:
779 case CFI_CMDSET_AMD_EXTENDED
:
780 retval
= flash_toggle (info
, sect
, 0, AMD_STATUS_TOGGLE
);
785 debug ("flash_is_busy: %d\n", retval
);
789 /*-----------------------------------------------------------------------
790 * wait for XSR.7 to be set. Time out with an error if it does not.
791 * This routine does not set the flash to read-array mode.
793 static int flash_status_check (flash_info_t
* info
, flash_sect_t sector
,
794 ulong tout
, char *prompt
)
802 /* Wait for command completion */
803 start
= get_timer (0);
804 while (flash_is_busy (info
, sector
)) {
805 if (get_timer (start
) > tout
) {
806 printf ("Flash %s timeout at address %lx data %lx\n",
807 prompt
, info
->start
[sector
],
808 flash_read_long (info
, sector
, 0));
809 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
812 udelay (1); /* also triggers watchdog */
817 /*-----------------------------------------------------------------------
818 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
819 * This routine sets the flash to read-array mode.
821 static int flash_full_status_check (flash_info_t
* info
, flash_sect_t sector
,
822 ulong tout
, char *prompt
)
826 retcode
= flash_status_check (info
, sector
, tout
, prompt
);
827 switch (info
->vendor
) {
828 case CFI_CMDSET_INTEL_EXTENDED
:
829 case CFI_CMDSET_INTEL_STANDARD
:
830 if ((retcode
== ERR_OK
)
831 && !flash_isequal (info
, sector
, 0, FLASH_STATUS_DONE
)) {
833 printf ("Flash %s error at address %lx\n", prompt
,
834 info
->start
[sector
]);
835 if (flash_isset (info
, sector
, 0, FLASH_STATUS_ECLBS
| FLASH_STATUS_PSLBS
)) {
836 puts ("Command Sequence Error.\n");
837 } else if (flash_isset (info
, sector
, 0, FLASH_STATUS_ECLBS
)) {
838 puts ("Block Erase Error.\n");
839 retcode
= ERR_NOT_ERASED
;
840 } else if (flash_isset (info
, sector
, 0, FLASH_STATUS_PSLBS
)) {
841 puts ("Locking Error\n");
843 if (flash_isset (info
, sector
, 0, FLASH_STATUS_DPS
)) {
844 puts ("Block locked.\n");
845 retcode
= ERR_PROTECTED
;
847 if (flash_isset (info
, sector
, 0, FLASH_STATUS_VPENS
))
848 puts ("Vpp Low Error.\n");
850 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
858 /*-----------------------------------------------------------------------
860 static void flash_add_byte (flash_info_t
* info
, cfiword_t
* cword
, uchar c
)
862 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
865 unsigned long long ll
;
868 switch (info
->portwidth
) {
872 case FLASH_CFI_16BIT
:
873 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
876 cword
->w
= (cword
->w
>> 8) | w
;
878 cword
->w
= (cword
->w
<< 8) | c
;
881 case FLASH_CFI_32BIT
:
882 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
885 cword
->l
= (cword
->l
>> 8) | l
;
887 cword
->l
= (cword
->l
<< 8) | c
;
890 case FLASH_CFI_64BIT
:
891 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
894 cword
->ll
= (cword
->ll
>> 8) | ll
;
896 cword
->ll
= (cword
->ll
<< 8) | c
;
903 /*-----------------------------------------------------------------------
904 * make a proper sized command based on the port and chip widths
906 static void flash_make_cmd (flash_info_t
* info
, uchar cmd
, void *cmdbuf
)
909 uchar
*cp
= (uchar
*) cmdbuf
;
911 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
912 for (i
= info
->portwidth
; i
> 0; i
--)
914 for (i
= 1; i
<= info
->portwidth
; i
++)
916 *cp
++ = (i
& (info
->chipwidth
- 1)) ? '\0' : cmd
;
920 * Write a proper sized command to the correct address
922 static void flash_write_cmd (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
925 volatile cfiptr_t addr
;
928 addr
.cp
= flash_make_addr (info
, sect
, offset
);
929 flash_make_cmd (info
, cmd
, &cword
);
930 switch (info
->portwidth
) {
932 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr
.cp
, cmd
,
933 cword
.c
, info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
936 case FLASH_CFI_16BIT
:
937 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr
.wp
,
939 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
942 case FLASH_CFI_32BIT
:
943 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr
.lp
,
945 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
948 case FLASH_CFI_64BIT
:
953 print_longlong (str
, cword
.ll
);
955 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
957 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
960 *addr
.llp
= cword
.ll
;
964 /* Ensure all the instructions are fully finished */
968 static void flash_unlock_seq (flash_info_t
* info
, flash_sect_t sect
)
970 flash_write_cmd (info
, sect
, AMD_ADDR_START
, AMD_CMD_UNLOCK_START
);
971 flash_write_cmd (info
, sect
, AMD_ADDR_ACK
, AMD_CMD_UNLOCK_ACK
);
974 /*-----------------------------------------------------------------------
976 static int flash_isequal (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
982 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
983 flash_make_cmd (info
, cmd
, &cword
);
985 debug ("is= cmd %x(%c) addr %p ", cmd
, cmd
, cptr
.cp
);
986 switch (info
->portwidth
) {
988 debug ("is= %x %x\n", cptr
.cp
[0], cword
.c
);
989 retval
= (cptr
.cp
[0] == cword
.c
);
991 case FLASH_CFI_16BIT
:
992 debug ("is= %4.4x %4.4x\n", cptr
.wp
[0], cword
.w
);
993 retval
= (cptr
.wp
[0] == cword
.w
);
995 case FLASH_CFI_32BIT
:
996 debug ("is= %8.8lx %8.8lx\n", cptr
.lp
[0], cword
.l
);
997 retval
= (cptr
.lp
[0] == cword
.l
);
999 case FLASH_CFI_64BIT
:
1005 print_longlong (str1
, cptr
.llp
[0]);
1006 print_longlong (str2
, cword
.ll
);
1007 debug ("is= %s %s\n", str1
, str2
);
1010 retval
= (cptr
.llp
[0] == cword
.ll
);
1019 /*-----------------------------------------------------------------------
1021 static int flash_isset (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
1027 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
1028 flash_make_cmd (info
, cmd
, &cword
);
1029 switch (info
->portwidth
) {
1030 case FLASH_CFI_8BIT
:
1031 retval
= ((cptr
.cp
[0] & cword
.c
) == cword
.c
);
1033 case FLASH_CFI_16BIT
:
1034 retval
= ((cptr
.wp
[0] & cword
.w
) == cword
.w
);
1036 case FLASH_CFI_32BIT
:
1037 retval
= ((cptr
.lp
[0] & cword
.l
) == cword
.l
);
1039 case FLASH_CFI_64BIT
:
1040 retval
= ((cptr
.llp
[0] & cword
.ll
) == cword
.ll
);
1049 /*-----------------------------------------------------------------------
1051 static int flash_toggle (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
1057 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
1058 flash_make_cmd (info
, cmd
, &cword
);
1059 switch (info
->portwidth
) {
1060 case FLASH_CFI_8BIT
:
1061 retval
= ((cptr
.cp
[0] & cword
.c
) != (cptr
.cp
[0] & cword
.c
));
1063 case FLASH_CFI_16BIT
:
1064 retval
= ((cptr
.wp
[0] & cword
.w
) != (cptr
.wp
[0] & cword
.w
));
1066 case FLASH_CFI_32BIT
:
1067 retval
= ((cptr
.lp
[0] & cword
.l
) != (cptr
.lp
[0] & cword
.l
));
1069 case FLASH_CFI_64BIT
:
1070 retval
= ((cptr
.llp
[0] & cword
.ll
) !=
1071 (cptr
.llp
[0] & cword
.ll
));
1080 /*-----------------------------------------------------------------------
1081 * read jedec ids from device and set corresponding fields in info struct
1083 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1086 static void flash_read_jedec_ids (flash_info_t
* info
)
1088 info
->manufacturer_id
= 0;
1089 info
->device_id
= 0;
1090 info
->device_id2
= 0;
1092 switch (info
->vendor
) {
1093 case CFI_CMDSET_INTEL_STANDARD
:
1094 case CFI_CMDSET_INTEL_EXTENDED
:
1095 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
1096 flash_write_cmd(info
, 0, 0, FLASH_CMD_READ_ID
);
1097 udelay(1000); /* some flash are slow to respond */
1098 info
->manufacturer_id
= flash_read_uchar (info
,
1099 FLASH_OFFSET_MANUFACTURER_ID
);
1100 info
->device_id
= flash_read_uchar (info
,
1101 FLASH_OFFSET_DEVICE_ID
);
1102 flash_write_cmd(info
, 0, 0, FLASH_CMD_RESET
);
1104 case CFI_CMDSET_AMD_STANDARD
:
1105 case CFI_CMDSET_AMD_EXTENDED
:
1106 flash_write_cmd(info
, 0, 0, AMD_CMD_RESET
);
1107 flash_unlock_seq(info
, 0);
1108 flash_write_cmd(info
, 0, AMD_ADDR_START
, FLASH_CMD_READ_ID
);
1109 udelay(1000); /* some flash are slow to respond */
1110 info
->manufacturer_id
= flash_read_uchar (info
,
1111 FLASH_OFFSET_MANUFACTURER_ID
);
1112 info
->device_id
= flash_read_uchar (info
,
1113 FLASH_OFFSET_DEVICE_ID
);
1114 if (info
->device_id
== 0x7E) {
1115 /* AMD 3-byte (expanded) device ids */
1116 info
->device_id2
= flash_read_uchar (info
,
1117 FLASH_OFFSET_DEVICE_ID2
);
1118 info
->device_id2
<<= 8;
1119 info
->device_id2
|= flash_read_uchar (info
,
1120 FLASH_OFFSET_DEVICE_ID3
);
1122 flash_write_cmd(info
, 0, 0, AMD_CMD_RESET
);
1129 /*-----------------------------------------------------------------------
1130 * detect if flash is compatible with the Common Flash Interface (CFI)
1131 * http://www.jedec.org/download/search/jesd68.pdf
1134 static int flash_detect_cfi (flash_info_t
* info
)
1137 debug ("flash detect cfi\n");
1139 for (info
->portwidth
= CFG_FLASH_CFI_WIDTH
;
1140 info
->portwidth
<= FLASH_CFI_64BIT
; info
->portwidth
<<= 1) {
1141 for (info
->chipwidth
= FLASH_CFI_BY8
;
1142 info
->chipwidth
<= info
->portwidth
;
1143 info
->chipwidth
<<= 1) {
1144 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1145 for (cfi_offset
=0; cfi_offset
< sizeof(flash_offset_cfi
)/sizeof(uint
); cfi_offset
++) {
1146 flash_write_cmd (info
, 0, flash_offset_cfi
[cfi_offset
], FLASH_CMD_CFI
);
1147 if (flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
, 'Q')
1148 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 1, 'R')
1149 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 2, 'Y')) {
1150 info
->interface
= flash_read_ushort (info
, 0, FLASH_OFFSET_INTERFACE
);
1151 info
->cfi_offset
=flash_offset_cfi
[cfi_offset
];
1152 debug ("device interface is %d\n",
1154 debug ("found port %d chip %d ",
1155 info
->portwidth
, info
->chipwidth
);
1156 debug ("port %d bits chip %d bits\n",
1157 info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
1158 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
1164 debug ("not found\n");
1169 * The following code cannot be run from FLASH!
1172 ulong
flash_get_size (ulong base
, int banknum
)
1174 flash_info_t
*info
= &flash_info
[banknum
];
1176 flash_sect_t sect_cnt
;
1177 unsigned long sector
;
1180 uchar num_erase_regions
;
1181 int erase_region_size
;
1182 int erase_region_count
;
1183 int geometry_reversed
= 0;
1186 info
->cfi_version
= 0;
1187 #ifdef CFG_FLASH_PROTECTION
1188 info
->legacy_unlock
= 0;
1191 info
->start
[0] = base
;
1193 if (flash_detect_cfi (info
)) {
1194 info
->vendor
= flash_read_ushort (info
, 0,
1195 FLASH_OFFSET_PRIMARY_VENDOR
);
1196 flash_read_jedec_ids (info
);
1197 flash_write_cmd (info
, 0, info
->cfi_offset
, FLASH_CMD_CFI
);
1198 num_erase_regions
= flash_read_uchar (info
,
1199 FLASH_OFFSET_NUM_ERASE_REGIONS
);
1200 info
->ext_addr
= flash_read_ushort (info
, 0,
1201 FLASH_OFFSET_EXT_QUERY_T_P_ADDR
);
1202 if (info
->ext_addr
) {
1203 info
->cfi_version
= (ushort
) flash_read_uchar (info
,
1204 info
->ext_addr
+ 3) << 8;
1205 info
->cfi_version
|= (ushort
) flash_read_uchar (info
,
1206 info
->ext_addr
+ 4);
1209 flash_printqry (info
, 0);
1211 switch (info
->vendor
) {
1212 case CFI_CMDSET_INTEL_STANDARD
:
1213 case CFI_CMDSET_INTEL_EXTENDED
:
1215 info
->cmd_reset
= FLASH_CMD_RESET
;
1216 #ifdef CFG_FLASH_PROTECTION
1217 /* read legacy lock/unlock bit from intel flash */
1218 if (info
->ext_addr
) {
1219 info
->legacy_unlock
= flash_read_uchar (info
,
1220 info
->ext_addr
+ 5) & 0x08;
1224 case CFI_CMDSET_AMD_STANDARD
:
1225 case CFI_CMDSET_AMD_EXTENDED
:
1226 info
->cmd_reset
= AMD_CMD_RESET
;
1227 /* check if flash geometry needs reversal */
1228 if (num_erase_regions
<= 1)
1230 /* reverse geometry if top boot part */
1231 if (info
->cfi_version
< 0x3131) {
1232 /* CFI < 1.1, try to guess from device id */
1233 if ((info
->device_id
& 0x80) != 0) {
1234 geometry_reversed
= 1;
1238 /* CFI >= 1.1, deduct from top/bottom flag */
1239 /* note: ext_addr is valid since cfi_version > 0 */
1240 if (flash_read_uchar(info
, info
->ext_addr
+ 0xf) == 3) {
1241 geometry_reversed
= 1;
1246 debug ("manufacturer is %d\n", info
->vendor
);
1247 debug ("manufacturer id is 0x%x\n", info
->manufacturer_id
);
1248 debug ("device id is 0x%x\n", info
->device_id
);
1249 debug ("device id2 is 0x%x\n", info
->device_id2
);
1250 debug ("cfi version is 0x%04x\n", info
->cfi_version
);
1252 size_ratio
= info
->portwidth
/ info
->chipwidth
;
1253 /* if the chip is x8/x16 reduce the ratio by half */
1254 if ((info
->interface
== FLASH_CFI_X8X16
)
1255 && (info
->chipwidth
== FLASH_CFI_BY8
)) {
1258 debug ("size_ratio %d port %d bits chip %d bits\n",
1259 size_ratio
, info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
1260 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
1261 debug ("found %d erase regions\n", num_erase_regions
);
1264 for (i
= 0; i
< num_erase_regions
; i
++) {
1265 if (i
> NUM_ERASE_REGIONS
) {
1266 printf ("%d erase regions found, only %d used\n",
1267 num_erase_regions
, NUM_ERASE_REGIONS
);
1270 if (geometry_reversed
)
1271 tmp
= flash_read_long (info
, 0,
1272 FLASH_OFFSET_ERASE_REGIONS
+
1273 (num_erase_regions
- 1 - i
) * 4);
1275 tmp
= flash_read_long (info
, 0,
1276 FLASH_OFFSET_ERASE_REGIONS
+
1279 (tmp
& 0xffff) ? ((tmp
& 0xffff) * 256) : 128;
1281 erase_region_count
= (tmp
& 0xffff) + 1;
1282 debug ("erase_region_count = %d erase_region_size = %d\n",
1283 erase_region_count
, erase_region_size
);
1284 for (j
= 0; j
< erase_region_count
; j
++) {
1285 info
->start
[sect_cnt
] = sector
;
1286 sector
+= (erase_region_size
* size_ratio
);
1289 * Only read protection status from supported devices (intel...)
1291 switch (info
->vendor
) {
1292 case CFI_CMDSET_INTEL_EXTENDED
:
1293 case CFI_CMDSET_INTEL_STANDARD
:
1294 info
->protect
[sect_cnt
] =
1295 flash_isset (info
, sect_cnt
,
1296 FLASH_OFFSET_PROTECT
,
1297 FLASH_STATUS_PROTECT
);
1300 info
->protect
[sect_cnt
] = 0; /* default: not protected */
1307 info
->sector_count
= sect_cnt
;
1308 /* multiply the size by the number of chips */
1309 info
->size
= (1 << flash_read_uchar (info
, FLASH_OFFSET_SIZE
)) * size_ratio
;
1310 info
->buffer_size
= (1 << flash_read_ushort (info
, 0, FLASH_OFFSET_BUFFER_SIZE
));
1311 tmp
= 1 << flash_read_uchar (info
, FLASH_OFFSET_ETOUT
);
1312 info
->erase_blk_tout
= (tmp
* (1 << flash_read_uchar (info
, FLASH_OFFSET_EMAX_TOUT
)));
1313 tmp
= (1 << flash_read_uchar (info
, FLASH_OFFSET_WBTOUT
)) *
1314 (1 << flash_read_uchar (info
, FLASH_OFFSET_WBMAX_TOUT
));
1315 info
->buffer_write_tout
= tmp
/ 1000 + (tmp
% 1000 ? 1 : 0); /* round up when converting to ms */
1316 tmp
= (1 << flash_read_uchar (info
, FLASH_OFFSET_WTOUT
)) *
1317 (1 << flash_read_uchar (info
, FLASH_OFFSET_WMAX_TOUT
));
1318 info
->write_tout
= tmp
/ 1000 + (tmp
% 1000 ? 1 : 0); /* round up when converting to ms */
1319 info
->flash_id
= FLASH_MAN_CFI
;
1320 if ((info
->interface
== FLASH_CFI_X8X16
) && (info
->chipwidth
== FLASH_CFI_BY8
)) {
1321 info
->portwidth
>>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1325 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1326 return (info
->size
);
1329 /* loop through the sectors from the highest address
1330 * when the passed address is greater or equal to the sector address
1333 static flash_sect_t
find_sector (flash_info_t
* info
, ulong addr
)
1335 flash_sect_t sector
;
1337 for (sector
= info
->sector_count
- 1; sector
>= 0; sector
--) {
1338 if (addr
>= info
->start
[sector
])
1344 /*-----------------------------------------------------------------------
1346 static int flash_write_cfiword (flash_info_t
* info
, ulong dest
,
1353 ctladdr
.cp
= flash_make_addr (info
, 0, 0);
1354 cptr
.cp
= (uchar
*) dest
;
1356 /* Check if Flash is (sufficiently) erased */
1357 switch (info
->portwidth
) {
1358 case FLASH_CFI_8BIT
:
1359 flag
= ((cptr
.cp
[0] & cword
.c
) == cword
.c
);
1361 case FLASH_CFI_16BIT
:
1362 flag
= ((cptr
.wp
[0] & cword
.w
) == cword
.w
);
1364 case FLASH_CFI_32BIT
:
1365 flag
= ((cptr
.lp
[0] & cword
.l
) == cword
.l
);
1367 case FLASH_CFI_64BIT
:
1368 flag
= ((cptr
.llp
[0] & cword
.ll
) == cword
.ll
);
1376 /* Disable interrupts which might cause a timeout here */
1377 flag
= disable_interrupts ();
1379 switch (info
->vendor
) {
1380 case CFI_CMDSET_INTEL_EXTENDED
:
1381 case CFI_CMDSET_INTEL_STANDARD
:
1382 flash_write_cmd (info
, 0, 0, FLASH_CMD_CLEAR_STATUS
);
1383 flash_write_cmd (info
, 0, 0, FLASH_CMD_WRITE
);
1385 case CFI_CMDSET_AMD_EXTENDED
:
1386 case CFI_CMDSET_AMD_STANDARD
:
1387 flash_unlock_seq (info
, 0);
1388 flash_write_cmd (info
, 0, AMD_ADDR_START
, AMD_CMD_WRITE
);
1392 switch (info
->portwidth
) {
1393 case FLASH_CFI_8BIT
:
1394 cptr
.cp
[0] = cword
.c
;
1396 case FLASH_CFI_16BIT
:
1397 cptr
.wp
[0] = cword
.w
;
1399 case FLASH_CFI_32BIT
:
1400 cptr
.lp
[0] = cword
.l
;
1402 case FLASH_CFI_64BIT
:
1403 cptr
.llp
[0] = cword
.ll
;
1407 /* re-enable interrupts if necessary */
1409 enable_interrupts ();
1411 return flash_full_status_check (info
, find_sector (info
, dest
),
1412 info
->write_tout
, "write");
1415 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1417 static int flash_write_cfibuffer (flash_info_t
* info
, ulong dest
, uchar
* cp
,
1420 flash_sect_t sector
;
1423 volatile cfiptr_t src
;
1424 volatile cfiptr_t dst
;
1426 switch (info
->vendor
) {
1427 case CFI_CMDSET_INTEL_STANDARD
:
1428 case CFI_CMDSET_INTEL_EXTENDED
:
1430 dst
.cp
= (uchar
*) dest
;
1431 sector
= find_sector (info
, dest
);
1432 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
1433 flash_write_cmd (info
, sector
, 0, FLASH_CMD_WRITE_TO_BUFFER
);
1434 if ((retcode
= flash_status_check (info
, sector
, info
->buffer_write_tout
,
1435 "write to buffer")) == ERR_OK
) {
1436 /* reduce the number of loops by the width of the port */
1437 switch (info
->portwidth
) {
1438 case FLASH_CFI_8BIT
:
1441 case FLASH_CFI_16BIT
:
1444 case FLASH_CFI_32BIT
:
1447 case FLASH_CFI_64BIT
:
1454 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1456 switch (info
->portwidth
) {
1457 case FLASH_CFI_8BIT
:
1458 *dst
.cp
++ = *src
.cp
++;
1460 case FLASH_CFI_16BIT
:
1461 *dst
.wp
++ = *src
.wp
++;
1463 case FLASH_CFI_32BIT
:
1464 *dst
.lp
++ = *src
.lp
++;
1466 case FLASH_CFI_64BIT
:
1467 *dst
.llp
++ = *src
.llp
++;
1474 flash_write_cmd (info
, sector
, 0,
1475 FLASH_CMD_WRITE_BUFFER_CONFIRM
);
1476 retcode
= flash_full_status_check (info
, sector
,
1477 info
->buffer_write_tout
,
1482 case CFI_CMDSET_AMD_STANDARD
:
1483 case CFI_CMDSET_AMD_EXTENDED
:
1485 dst
.cp
= (uchar
*) dest
;
1486 sector
= find_sector (info
, dest
);
1488 flash_unlock_seq(info
,0);
1489 flash_write_cmd (info
, sector
, 0, AMD_CMD_WRITE_TO_BUFFER
);
1491 switch (info
->portwidth
) {
1492 case FLASH_CFI_8BIT
:
1494 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1495 while (cnt
-- > 0) *dst
.cp
++ = *src
.cp
++;
1497 case FLASH_CFI_16BIT
:
1499 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1500 while (cnt
-- > 0) *dst
.wp
++ = *src
.wp
++;
1502 case FLASH_CFI_32BIT
:
1504 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1505 while (cnt
-- > 0) *dst
.lp
++ = *src
.lp
++;
1507 case FLASH_CFI_64BIT
:
1509 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1510 while (cnt
-- > 0) *dst
.llp
++ = *src
.llp
++;
1516 flash_write_cmd (info
, sector
, 0, AMD_CMD_WRITE_BUFFER_CONFIRM
);
1517 retcode
= flash_full_status_check (info
, sector
, info
->buffer_write_tout
,
1522 debug ("Unknown Command Set\n");
1526 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1528 #endif /* CFG_FLASH_CFI */