post/lib_ppc/rlwimi.c

   1 /*
   2  * (C) Copyright 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25
  26 /*
  27  * CPU test
  28  * Shift instructions:          rlwimi
  29  *
  30  * The test contains a pre-built table of instructions, operands and
  31  * expected results. For each table entry, the test will cyclically use
  32  * different sets of operand registers and result registers.
  33  */
  34
  35 #ifdef CONFIG_POST
  36
  37 #include <post.h>
  38 #include "cpu_asm.h"
  39
  40 #if CONFIG_POST & CFG_POST_CPU
  41
  42 extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
  43     ulong op2);
  44 extern ulong cpu_post_makecr (long v);
  45
  46 static struct cpu_post_rlwimi_s
  47 {
  48     ulong cmd;
  49     ulong op0;
  50     ulong op1;
  51     uchar op2;
  52     uchar mb;
  53     uchar me;
  54     ulong res;
  55 } cpu_post_rlwimi_table[] =
  56 {
  57     {
  58         OP_RLWIMI,
  59         0xff00ffff,
  60         0x0000aa00,
  61         8,
  62         8,
  63         15,
  64         0xffaaffff
  65     },
  66 };
  67 static unsigned int cpu_post_rlwimi_size =
  68     sizeof (cpu_post_rlwimi_table) / sizeof (struct cpu_post_rlwimi_s);
  69
  70 int cpu_post_test_rlwimi (void)
  71 {
  72     int ret = 0;
  73     unsigned int i, reg;
  74     int flag = disable_interrupts();
  75
  76     for (i = 0; i < cpu_post_rlwimi_size && ret == 0; i++)
  77     {
  78         struct cpu_post_rlwimi_s *test = cpu_post_rlwimi_table + i;
  79
  80         for (reg = 0; reg < 32 && ret == 0; reg++)
  81         {
  82             unsigned int reg0 = (reg + 0) % 32;
  83             unsigned int reg1 = (reg + 1) % 32;
  84             unsigned int stk = reg < 16 ? 31 : 15;
  85             unsigned long code[] =
  86             {
  87                 ASM_STW(stk, 1, -4),
  88                 ASM_ADDI(stk, 1, -20),
  89                 ASM_STW(3, stk, 8),
  90                 ASM_STW(4, stk, 12),
  91                 ASM_STW(reg0, stk, 4),
  92                 ASM_STW(reg1, stk, 0),
  93                 ASM_LWZ(reg1, stk, 8),
  94                 ASM_LWZ(reg0, stk, 12),
  95                 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me),
  96                 ASM_STW(reg1, stk, 8),
  97                 ASM_LWZ(reg1, stk, 0),
  98                 ASM_LWZ(reg0, stk, 4),
  99                 ASM_LWZ(3, stk, 8),
 100                 ASM_ADDI(1, stk, 20),
 101                 ASM_LWZ(stk, 1, -4),
 102                 ASM_BLR,
 103             };
 104             unsigned long codecr[] =
 105             {
 106                 ASM_STW(stk, 1, -4),
 107                 ASM_ADDI(stk, 1, -20),
 108                 ASM_STW(3, stk, 8),
 109                 ASM_STW(4, stk, 12),
 110                 ASM_STW(reg0, stk, 4),
 111                 ASM_STW(reg1, stk, 0),
 112                 ASM_LWZ(reg1, stk, 8),
 113                 ASM_LWZ(reg0, stk, 12),
 114                 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) |
 115                     BIT_C,
 116                 ASM_STW(reg1, stk, 8),
 117                 ASM_LWZ(reg1, stk, 0),
 118                 ASM_LWZ(reg0, stk, 4),
 119                 ASM_LWZ(3, stk, 8),
 120                 ASM_ADDI(1, stk, 20),
 121                 ASM_LWZ(stk, 1, -4),
 122                 ASM_BLR,
 123             };
 124             ulong res;
 125             ulong cr;
 126
 127             if (ret == 0)
 128             {
 129                 cr = 0;
 130                 cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
 131
 132                 ret = res == test->res && cr == 0 ? 0 : -1;
 133
 134                 if (ret != 0)
 135                 {
 136                     post_log ("Error at rlwimi test %d !\n", i);
 137                 }
 138             }
 139
 140             if (ret == 0)
 141             {
 142                 cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
 143
 144                 ret = res == test->res &&
 145                       (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 146
 147                 if (ret != 0)
 148                 {
 149                     post_log ("Error at rlwimi test %d !\n", i);
 150                 }
 151             }
 152         }
 153     }
 154
 155     if (flag)
 156         enable_interrupts();
 157
 158     return ret;
 159 }
 160
 161 #endif
 162 #endif