cpu/ppc4xx/gpio.c

   1 /*
   2  * (C) Copyright 2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <asm/gpio.h>
  28
  29 #if defined(CFG_4xx_GPIO_TABLE)
  30 gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX] = CFG_4xx_GPIO_TABLE;
  31 #endif
  32
  33 #if defined(GPIO0_OSRL)
  34 /* Only some 4xx variants support alternate funtions on the GPIO's */
  35 void gpio_config(int pin, int in_out, int gpio_alt, int out_val)
  36 {
  37         u32 mask;
  38         u32 mask2;
  39         u32 val;
  40         u32 offs = 0;
  41         u32 offs2 = 0;
  42         int pin2 = pin << 1;
  43
  44         if (pin >= GPIO_MAX) {
  45                 offs = 0x100;
  46                 pin -= GPIO_MAX;
  47         }
  48
  49         if (pin >= GPIO_MAX/2) {
  50                 offs2 = 0x4;
  51                 pin2 = (pin - GPIO_MAX/2) << 1;
  52         }
  53
  54         mask = 0x80000000 >> pin;
  55         mask2 = 0xc0000000 >> (pin2 << 1);
  56
  57         /* first set TCR to 0 */
  58         out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
  59
  60         if (in_out == GPIO_OUT) {
  61                 val = in_be32((void *)GPIO0_OSRL + offs + offs2) & ~mask2;
  62                 switch (gpio_alt) {
  63                 case GPIO_ALT1:
  64                         val |= GPIO_ALT1_SEL >> pin2;
  65                         break;
  66                 case GPIO_ALT2:
  67                         val |= GPIO_ALT2_SEL >> pin2;
  68                         break;
  69                 case GPIO_ALT3:
  70                         val |= GPIO_ALT3_SEL >> pin2;
  71                         break;
  72                 }
  73                 out_be32((void *)GPIO0_OSRL + offs + offs2, val);
  74
  75                 /* setup requested output value */
  76                 if (out_val == GPIO_OUT_0)
  77                         out_be32((void *)GPIO0_OR + offs,
  78                                  in_be32((void *)GPIO0_OR + offs) & ~mask);
  79                 else if (out_val == GPIO_OUT_1)
  80                         out_be32((void *)GPIO0_OR + offs,
  81                                  in_be32((void *)GPIO0_OR + offs) | mask);
  82
  83                 /* now configure TCR to drive output if selected */
  84                 out_be32((void *)GPIO0_TCR + offs,
  85                          in_be32((void *)GPIO0_TCR + offs) | mask);
  86         } else {
  87                 val = in_be32((void *)GPIO0_ISR1L + offs + offs2) & ~mask2;
  88                 val |= GPIO_IN_SEL >> pin2;
  89                 out_be32((void *)GPIO0_ISR1L + offs + offs2, val);
  90         }
  91 }
  92 #endif /* GPIO_OSRL */
  93
  94 void gpio_write_bit(int pin, int val)
  95 {
  96         u32 offs = 0;
  97
  98         if (pin >= GPIO_MAX) {
  99                 offs = 0x100;
 100                 pin -= GPIO_MAX;
 101         }
 102
 103         if (val)
 104                 out_be32((void *)GPIO0_OR + offs,
 105                          in_be32((void *)GPIO0_OR + offs) | GPIO_VAL(pin));
 106         else
 107                 out_be32((void *)GPIO0_OR + offs,
 108                          in_be32((void *)GPIO0_OR + offs) & ~GPIO_VAL(pin));
 109 }
 110
 111 int gpio_read_out_bit(int pin)
 112 {
 113         u32 offs = 0;
 114
 115         if (pin >= GPIO_MAX) {
 116                 offs = 0x100;
 117                 pin -= GPIO_MAX;
 118         }
 119
 120         return (in_be32((void *)GPIO0_OR + offs) & GPIO_VAL(pin) ? 1 : 0);
 121 }
 122
 123 #if defined(CFG_4xx_GPIO_TABLE)
 124 void gpio_set_chip_configuration(void)
 125 {
 126         unsigned char i=0, j=0, offs=0, gpio_core;
 127         unsigned long reg, core_add;
 128
 129         for (gpio_core=0; gpio_core<GPIO_GROUP_MAX; gpio_core++) {
 130                 j = 0;
 131                 offs = 0;
 132                 /* GPIO config of the GPIOs 0 to 31 */
 133                 for (i=0; i<GPIO_MAX; i++, j++) {
 134                         if (i == GPIO_MAX/2) {
 135                                 offs = 4;
 136                                 j = i-16;
 137                         }
 138
 139                         core_add = gpio_tab[gpio_core][i].add;
 140
 141                         if ((gpio_tab[gpio_core][i].in_out == GPIO_IN) ||
 142                             (gpio_tab[gpio_core][i].in_out == GPIO_BI)) {
 143
 144                                 switch (gpio_tab[gpio_core][i].alt_nb) {
 145                                 case GPIO_SEL:
 146                                         break;
 147
 148                                 case GPIO_ALT1:
 149                                         reg = in_be32((void *)GPIO_IS1(core_add+offs))
 150                                                 & ~(GPIO_MASK >> (j*2));
 151                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 152                                         out_be32((void *)GPIO_IS1(core_add+offs), reg);
 153                                         break;
 154
 155                                 case GPIO_ALT2:
 156                                         reg = in_be32((void *)GPIO_IS2(core_add+offs))
 157                                                 & ~(GPIO_MASK >> (j*2));
 158                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 159                                         out_be32((void *)GPIO_IS2(core_add+offs), reg);
 160                                         break;
 161
 162                                 case GPIO_ALT3:
 163                                         reg = in_be32((void *)GPIO_IS3(core_add+offs))
 164                                                 & ~(GPIO_MASK >> (j*2));
 165                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 166                                         out_be32((void *)GPIO_IS3(core_add+offs), reg);
 167                                         break;
 168                                 }
 169                         }
 170
 171                         if ((gpio_tab[gpio_core][i].in_out == GPIO_OUT) ||
 172                             (gpio_tab[gpio_core][i].in_out == GPIO_BI)) {
 173
 174                                 switch (gpio_tab[gpio_core][i].alt_nb) {
 175                                 case GPIO_SEL:
 176                                         /*
 177                                          * Setup output value
 178                                          * 1 -> high level
 179                                          * 0 -> low level
 180                                          * else -> don't touch
 181                                          */
 182                                         reg = in_be32((void *)GPIO_OR(core_add));
 183                                         if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1)
 184                                                 reg |= (0x80000000 >> (i));
 185                                         else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0)
 186                                                 reg &= ~(0x80000000 >> (i));
 187                                         out_be32((void *)GPIO_OR(core_add), reg);
 188
 189                                         reg = in_be32((void *)GPIO_TCR(core_add)) |
 190                                                 (0x80000000 >> (i));
 191                                         out_be32((void *)GPIO_TCR(core_add), reg);
 192
 193                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 194                                                 & ~(GPIO_MASK >> (j*2));
 195                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 196                                         reg = in_be32((void *)GPIO_TS(core_add+offs))
 197                                                 & ~(GPIO_MASK >> (j*2));
 198                                         out_be32((void *)GPIO_TS(core_add+offs), reg);
 199                                         break;
 200
 201                                 case GPIO_ALT1:
 202                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 203                                                 & ~(GPIO_MASK >> (j*2));
 204                                         reg = reg | (GPIO_ALT1_SEL >> (j*2));
 205                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 206                                         reg = in_be32((void *)GPIO_TS(core_add+offs))
 207                                                 & ~(GPIO_MASK >> (j*2));
 208                                         reg = reg | (GPIO_ALT1_SEL >> (j*2));
 209                                         out_be32((void *)GPIO_TS(core_add+offs), reg);
 210                                         break;
 211
 212                                 case GPIO_ALT2:
 213                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 214                                                 & ~(GPIO_MASK >> (j*2));
 215                                         reg = reg | (GPIO_ALT2_SEL >> (j*2));
 216                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 217                                         reg = in_be32((void *)GPIO_TS(core_add+offs))
 218                                                 & ~(GPIO_MASK >> (j*2));
 219                                         reg = reg | (GPIO_ALT2_SEL >> (j*2));
 220                                         out_be32((void *)GPIO_TS(core_add+offs), reg);
 221                                         break;
 222
 223                                 case GPIO_ALT3:
 224                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 225                                                 & ~(GPIO_MASK >> (j*2));
 226                                         reg = reg | (GPIO_ALT3_SEL >> (j*2));
 227                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 228                                         reg = in_be32((void *)GPIO_TS(core_add+offs))
 229                                                 & ~(GPIO_MASK >> (j*2));
 230                                         reg = reg | (GPIO_ALT3_SEL >> (j*2));
 231                                         out_be32((void *)GPIO_TS(core_add+offs), reg);
 232                                         break;
 233                                 }
 234                         }
 235                 }
 236         }
 237 }
 238 #endif /* CFG_4xx_GPIO_TABLE */