arm: Kirkwood: arch specific updated for ehci-Kirkwood driver support
[u-boot-kw.git] / nand_spl / nand_boot_fsl_elbc.c
blob0d0c44e1e366d3343b8b5e14bfbe6fbe122f8d20
1 /*
2 * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
4 * (C) Copyright 2006-2008
5 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 * Copyright (c) 2008 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
26 #include <common.h>
27 #include <asm/io.h>
28 #include <asm/immap_83xx.h>
29 #include <asm/fsl_lbc.h>
30 #include <linux/mtd/nand.h>
32 #define WINDOW_SIZE 8192
34 static void nand_wait(void)
36 fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
38 for (;;) {
39 uint32_t status = in_be32(&regs->ltesr);
41 if (status == 1)
42 return;
44 if (status & 1) {
45 puts("read failed (ltesr)\n");
46 for (;;);
51 static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
53 fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
54 uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
55 int large = in_be32(&regs->bank[0].or) & OR_FCM_PGS;
56 int block_shift = large ? 17 : 14;
57 int block_size = 1 << block_shift;
58 int page_size = large ? 2048 : 512;
59 int bad_marker = large ? page_size + 0 : page_size + 5;
60 int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
61 int pos = 0;
63 if (offs & (block_size - 1)) {
64 puts("bad offset\n");
65 for (;;);
68 if (large) {
69 fmr |= FMR_ECCM;
70 out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
71 (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
72 out_be32(&regs->fir,
73 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
74 (FIR_OP_CA << FIR_OP1_SHIFT) |
75 (FIR_OP_PA << FIR_OP2_SHIFT) |
76 (FIR_OP_CW1 << FIR_OP3_SHIFT) |
77 (FIR_OP_RBW << FIR_OP4_SHIFT));
78 } else {
79 out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
80 out_be32(&regs->fir,
81 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
82 (FIR_OP_CA << FIR_OP1_SHIFT) |
83 (FIR_OP_PA << FIR_OP2_SHIFT) |
84 (FIR_OP_RBW << FIR_OP3_SHIFT));
87 out_be32(&regs->fbcr, 0);
88 clrsetbits_be32(&regs->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
90 while (pos < uboot_size) {
91 int i = 0;
92 out_be32(&regs->fbar, offs >> block_shift);
94 do {
95 int j;
96 unsigned int page_offs = (offs & (block_size - 1)) << 1;
98 out_be32(&regs->ltesr, ~0);
99 out_be32(&regs->lteatr, 0);
100 out_be32(&regs->fpar, page_offs);
101 out_be32(&regs->fmr, fmr);
102 out_be32(&regs->lsor, 0);
103 nand_wait();
105 page_offs %= WINDOW_SIZE;
108 * If either of the first two pages are marked bad,
109 * continue to the next block.
111 if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
112 puts("skipping\n");
113 offs = (offs + block_size) & ~(block_size - 1);
114 pos &= ~(block_size - 1);
115 break;
118 for (j = 0; j < page_size; j++)
119 dst[pos + j] = buf[page_offs + j];
121 pos += page_size;
122 offs += page_size;
123 } while (offs & (block_size - 1));
128 * The main entry for NAND booting. It's necessary that SDRAM is already
129 * configured and available since this code loads the main U-Boot image
130 * from NAND into SDRAM and starts it from there.
132 void nand_boot(void)
134 __attribute__((noreturn)) void (*uboot)(void);
137 * Load U-Boot image from NAND into RAM
139 nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
140 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
143 * Jump to U-Boot image
145 puts("transfering control\n");
147 * Clean d-cache and invalidate i-cache, to
148 * make sure that no stale data is executed.
150 flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
151 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
152 uboot();