Logic board rev. 3: no more clearance errors regarding vias.
commit5e50249228bc36065f9f8f74f521987ce24aae89
authorJeff Connelly <shellreef+git@gmail.com>
Thu, 10 Jul 2008 05:47:59 +0000 (9 22:47 -0700)
committerJeff Connelly <shellreef+git@gmail.com>
Thu, 10 Jul 2008 05:47:59 +0000 (9 22:47 -0700)
treea610a18d3dbf7035236aac315d4e56d86a744dde
parentc7bd1cb3db98e4e537c6eac095e1a8625267f21d
Logic board rev. 3: no more clearance errors regarding vias.

Reroute with 20 mil clearance between vias.

Didn't let it optimize as long, so there are a few more vias
than rev.2, but they have more room.
bb/CAM-Logic/CAM-logic3.zip [moved from bb/CAM-Logic/CAM-logic2.zip with 63% similarity]
bb/CAM-Logic/bottom_copper.grb
bb/CAM-Logic/bottom_solder_mask.grb
bb/CAM-Logic/drill_file.drl
bb/CAM-Logic/top_copper.grb
bb/CAM-Logic/top_solder_mask.grb
bb/logic_board_routed.fpc