| commit | 4480636fc689e6440f6e444f9b83906935998c6d | |
| author | Jeff Connelly <shellreef+git@gmail.com> | |
| Sat, 10 May 2008 22:44:08 +0000 (10 15:44 -0700) | ||
| committer | Jeff Connelly <shellreef+git@gmail.com> | |
| Sat, 10 May 2008 22:44:08 +0000 (10 15:44 -0700) | ||
| tree | 52aadad11bc724f475bed671c33cbe2ae4aac4c4 | treesnapshot (tar.gz zip) |
| parent | f3216f98054c840ecd4dbf970b1bb3d26c86a657 | commitdiff |
Change to a 2-phase clock generator, from 3-phase.
Intended purposes:
FETCH - clock in next PC, which is fed into SWROM address, that
feeds the instruction into the decoder and control signals
to various parts of the computer
EXECUTE - clocks in the result from the instruction execution,
after the outputs have settled down
Intended purposes:
FETCH - clock in next PC, which is fed into SWROM address, that
feeds the instruction into the decoder and control signals
to various parts of the computer
EXECUTE - clocks in the result from the instruction execution,
after the outputs have settled down
| circuits/clock_gen.asc | diffblobblamehistory | |
| circuits/clock_gen.asy | diffblobblamehistory | |
| circuits/clock_gen_test.asc | diffblobblamehistory | |
| circuits/main.asc | diffblobblamehistory |