release/src-rt-6.x.4708/linux/linux-2.6.36/sound/soc/au1x/psc-ac97.c

   1 /*
   2  * Au12x0/Au1550 PSC ALSA ASoC audio support.
   3  *
   4  * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
   5  *      Manuel Lauss <manuel.lauss@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Au1xxx-PSC AC97 glue.
  12  *
  13  * NOTE: all of these drivers can only work with a SINGLE instance
  14  *       of a PSC. Multiple independent audio devices are impossible
  15  *       with ASoC v1.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/slab.h>
  21 #include <linux/device.h>
  22 #include <linux/delay.h>
  23 #include <linux/mutex.h>
  24 #include <linux/suspend.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/initval.h>
  28 #include <sound/soc.h>
  29 #include <asm/mach-au1x00/au1000.h>
  30 #include <asm/mach-au1x00/au1xxx_psc.h>
  31
  32 #include "psc.h"
  33
  34 /* how often to retry failed codec register reads/writes */
  35 #define AC97_RW_RETRIES 5
  36
  37 #define AC97_DIR        \
  38         (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  39
  40 #define AC97_RATES      \
  41         SNDRV_PCM_RATE_8000_48000
  42
  43 #define AC97_FMTS       \
  44         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
  45
  46 #define AC97PCR_START(stype)    \
  47         ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
  48 #define AC97PCR_STOP(stype)     \
  49         ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
  50 #define AC97PCR_CLRFIFO(stype)  \
  51         ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
  52
  53 #define AC97STAT_BUSY(stype)    \
  54         ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
  55
  56 /* instance data. There can be only one, MacLeod!!!! */
  57 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
  58
  59 /* AC97 controller reads codec register */
  60 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
  61                                         unsigned short reg)
  62 {
  63         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
  64         unsigned short retry, tmo;
  65         unsigned long data;
  66
  67         au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  68         au_sync();
  69
  70         retry = AC97_RW_RETRIES;
  71         do {
  72                 mutex_lock(&pscdata->lock);
  73
  74                 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
  75                           AC97_CDC(pscdata));
  76                 au_sync();
  77
  78                 tmo = 20;
  79                 do {
  80                         udelay(21);
  81                         if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
  82                                 break;
  83                 } while (--tmo);
  84
  85                 data = au_readl(AC97_CDC(pscdata));
  86
  87                 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  88                 au_sync();
  89
  90                 mutex_unlock(&pscdata->lock);
  91
  92                 if (reg != ((data >> 16) & 0x7f))
  93                         tmo = 1;        /* wrong register, try again */
  94
  95         } while (--retry && !tmo);
  96
  97         return retry ? data & 0xffff : 0xffff;
  98 }
  99
 100 /* AC97 controller writes to codec register */
 101 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
 102                                 unsigned short val)
 103 {
 104         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 105         unsigned int tmo, retry;
 106
 107         au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
 108         au_sync();
 109
 110         retry = AC97_RW_RETRIES;
 111         do {
 112                 mutex_lock(&pscdata->lock);
 113
 114                 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
 115                           AC97_CDC(pscdata));
 116                 au_sync();
 117
 118                 tmo = 20;
 119                 do {
 120                         udelay(21);
 121                         if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
 122                                 break;
 123                 } while (--tmo);
 124
 125                 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
 126                 au_sync();
 127
 128                 mutex_unlock(&pscdata->lock);
 129         } while (--retry && !tmo);
 130 }
 131
 132 /* AC97 controller asserts a warm reset */
 133 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
 134 {
 135         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 136
 137         au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
 138         au_sync();
 139         msleep(10);
 140         au_writel(0, AC97_RST(pscdata));
 141         au_sync();
 142 }
 143
 144 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
 145 {
 146         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 147         int i;
 148
 149         /* disable PSC during cold reset */
 150         au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
 151         au_sync();
 152         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
 153         au_sync();
 154
 155         /* issue cold reset */
 156         au_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
 157         au_sync();
 158         msleep(500);
 159         au_writel(0, AC97_RST(pscdata));
 160         au_sync();
 161
 162         /* enable PSC */
 163         au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
 164         au_sync();
 165
 166         /* wait for PSC to indicate it's ready */
 167         i = 1000;
 168         while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
 169                 msleep(1);
 170
 171         if (i == 0) {
 172                 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
 173                 return;
 174         }
 175
 176         /* enable the ac97 function */
 177         au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 178         au_sync();
 179
 180         /* wait for AC97 core to become ready */
 181         i = 1000;
 182         while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
 183                 msleep(1);
 184         if (i == 0)
 185                 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
 186 }
 187
 188 /* AC97 controller operations */
 189 struct snd_ac97_bus_ops soc_ac97_ops = {
 190         .read           = au1xpsc_ac97_read,
 191         .write          = au1xpsc_ac97_write,
 192         .reset          = au1xpsc_ac97_cold_reset,
 193         .warm_reset     = au1xpsc_ac97_warm_reset,
 194 };
 195 EXPORT_SYMBOL_GPL(soc_ac97_ops);
 196
 197 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
 198                                   struct snd_pcm_hw_params *params,
 199                                   struct snd_soc_dai *dai)
 200 {
 201         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 202         unsigned long r, ro, stat;
 203         int chans, t, stype = SUBSTREAM_TYPE(substream);
 204
 205         chans = params_channels(params);
 206
 207         r = ro = au_readl(AC97_CFG(pscdata));
 208         stat = au_readl(AC97_STAT(pscdata));
 209
 210         /* already active? */
 211         if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
 212                 /* reject parameters not currently set up */
 213                 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
 214                     (pscdata->rate != params_rate(params)))
 215                         return -EINVAL;
 216         } else {
 217
 218                 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
 219                 r &= ~PSC_AC97CFG_LEN_MASK;
 220                 r |= PSC_AC97CFG_SET_LEN(params->msbits);
 221
 222                 /* channels: enable slots for front L/R channel */
 223                 if (stype == PCM_TX) {
 224                         r &= ~PSC_AC97CFG_TXSLOT_MASK;
 225                         r |= PSC_AC97CFG_TXSLOT_ENA(3);
 226                         r |= PSC_AC97CFG_TXSLOT_ENA(4);
 227                 } else {
 228                         r &= ~PSC_AC97CFG_RXSLOT_MASK;
 229                         r |= PSC_AC97CFG_RXSLOT_ENA(3);
 230                         r |= PSC_AC97CFG_RXSLOT_ENA(4);
 231                 }
 232
 233                 /* do we need to poke the hardware? */
 234                 if (!(r ^ ro))
 235                         goto out;
 236
 237                 /* ac97 engine is about to be disabled */
 238                 mutex_lock(&pscdata->lock);
 239
 240                 /* disable AC97 device controller first... */
 241                 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 242                 au_sync();
 243
 244                 /* ...wait for it... */
 245                 t = 100;
 246                 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
 247                         msleep(1);
 248
 249                 if (!t)
 250                         printk(KERN_ERR "PSC-AC97: can't disable!\n");
 251
 252                 /* ...write config... */
 253                 au_writel(r, AC97_CFG(pscdata));
 254                 au_sync();
 255
 256                 /* ...enable the AC97 controller again... */
 257                 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 258                 au_sync();
 259
 260                 /* ...and wait for ready bit */
 261                 t = 100;
 262                 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
 263                         msleep(1);
 264
 265                 if (!t)
 266                         printk(KERN_ERR "PSC-AC97: can't enable!\n");
 267
 268                 mutex_unlock(&pscdata->lock);
 269
 270                 pscdata->cfg = r;
 271                 pscdata->rate = params_rate(params);
 272         }
 273
 274 out:
 275         return 0;
 276 }
 277
 278 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
 279                                 int cmd, struct snd_soc_dai *dai)
 280 {
 281         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 282         int ret, stype = SUBSTREAM_TYPE(substream);
 283
 284         ret = 0;
 285
 286         switch (cmd) {
 287         case SNDRV_PCM_TRIGGER_START:
 288         case SNDRV_PCM_TRIGGER_RESUME:
 289                 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
 290                 au_sync();
 291                 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
 292                 au_sync();
 293                 break;
 294         case SNDRV_PCM_TRIGGER_STOP:
 295         case SNDRV_PCM_TRIGGER_SUSPEND:
 296                 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
 297                 au_sync();
 298
 299                 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
 300                         asm volatile ("nop");
 301
 302                 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
 303                 au_sync();
 304
 305                 break;
 306         default:
 307                 ret = -EINVAL;
 308         }
 309         return ret;
 310 }
 311
 312 static int au1xpsc_ac97_probe(struct platform_device *pdev,
 313                               struct snd_soc_dai *dai)
 314 {
 315         return au1xpsc_ac97_workdata ? 0 : -ENODEV;
 316 }
 317
 318 static void au1xpsc_ac97_remove(struct platform_device *pdev,
 319                                 struct snd_soc_dai *dai)
 320 {
 321 }
 322
 323 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
 324         .trigger        = au1xpsc_ac97_trigger,
 325         .hw_params      = au1xpsc_ac97_hw_params,
 326 };
 327
 328 struct snd_soc_dai au1xpsc_ac97_dai = {
 329         .name                   = "au1xpsc_ac97",
 330         .ac97_control           = 1,
 331         .probe                  = au1xpsc_ac97_probe,
 332         .remove                 = au1xpsc_ac97_remove,
 333         .playback = {
 334                 .rates          = AC97_RATES,
 335                 .formats        = AC97_FMTS,
 336                 .channels_min   = 2,
 337                 .channels_max   = 2,
 338         },
 339         .capture = {
 340                 .rates          = AC97_RATES,
 341                 .formats        = AC97_FMTS,
 342                 .channels_min   = 2,
 343                 .channels_max   = 2,
 344         },
 345         .ops = &au1xpsc_ac97_dai_ops,
 346 };
 347 EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
 348
 349 static int __devinit au1xpsc_ac97_drvprobe(struct platform_device *pdev)
 350 {
 351         int ret;
 352         struct resource *r;
 353         unsigned long sel;
 354         struct au1xpsc_audio_data *wd;
 355
 356         if (au1xpsc_ac97_workdata)
 357                 return -EBUSY;
 358
 359         wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
 360         if (!wd)
 361                 return -ENOMEM;
 362
 363         mutex_init(&wd->lock);
 364
 365         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 366         if (!r) {
 367                 ret = -ENODEV;
 368                 goto out0;
 369         }
 370
 371         ret = -EBUSY;
 372         if (!request_mem_region(r->start, resource_size(r), pdev->name))
 373                 goto out0;
 374
 375         wd->mmio = ioremap(r->start, resource_size(r));
 376         if (!wd->mmio)
 377                 goto out1;
 378
 379         /* configuration: max dma trigger threshold, enable ac97 */
 380         wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
 381                   PSC_AC97CFG_DE_ENABLE;
 382
 383         /* preserve PSC clock source set up by platform  */
 384         sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
 385         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 386         au_sync();
 387         au_writel(0, PSC_SEL(wd));
 388         au_sync();
 389         au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
 390         au_sync();
 391
 392         ret = snd_soc_register_dai(&au1xpsc_ac97_dai);
 393         if (ret)
 394                 goto out1;
 395
 396         wd->dmapd = au1xpsc_pcm_add(pdev);
 397         if (wd->dmapd) {
 398                 platform_set_drvdata(pdev, wd);
 399                 au1xpsc_ac97_workdata = wd;     /* MDEV */
 400                 return 0;
 401         }
 402
 403         snd_soc_unregister_dai(&au1xpsc_ac97_dai);
 404 out1:
 405         release_mem_region(r->start, resource_size(r));
 406 out0:
 407         kfree(wd);
 408         return ret;
 409 }
 410
 411 static int __devexit au1xpsc_ac97_drvremove(struct platform_device *pdev)
 412 {
 413         struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
 414         struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 415
 416         if (wd->dmapd)
 417                 au1xpsc_pcm_destroy(wd->dmapd);
 418
 419         snd_soc_unregister_dai(&au1xpsc_ac97_dai);
 420
 421         /* disable PSC completely */
 422         au_writel(0, AC97_CFG(wd));
 423         au_sync();
 424         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 425         au_sync();
 426
 427         iounmap(wd->mmio);
 428         release_mem_region(r->start, resource_size(r));
 429         kfree(wd);
 430
 431         au1xpsc_ac97_workdata = NULL;   /* MDEV */
 432
 433         return 0;
 434 }
 435
 436 #ifdef CONFIG_PM
 437 static int au1xpsc_ac97_drvsuspend(struct device *dev)
 438 {
 439         struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
 440
 441         /* save interesting registers and disable PSC */
 442         wd->pm[0] = au_readl(PSC_SEL(wd));
 443
 444         au_writel(0, AC97_CFG(wd));
 445         au_sync();
 446         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 447         au_sync();
 448
 449         return 0;
 450 }
 451
 452 static int au1xpsc_ac97_drvresume(struct device *dev)
 453 {
 454         struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
 455
 456         /* restore PSC clock config */
 457         au_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
 458         au_sync();
 459
 460         /* after this point the ac97 core will cold-reset the codec.
 461          * During cold-reset the PSC is reinitialized and the last
 462          * configuration set up in hw_params() is restored.
 463          */
 464         return 0;
 465 }
 466
 467 static struct dev_pm_ops au1xpscac97_pmops = {
 468         .suspend        = au1xpsc_ac97_drvsuspend,
 469         .resume         = au1xpsc_ac97_drvresume,
 470 };
 471
 472 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
 473
 474 #else
 475
 476 #define AU1XPSCAC97_PMOPS NULL
 477
 478 #endif
 479
 480 static struct platform_driver au1xpsc_ac97_driver = {
 481         .driver = {
 482                 .name   = "au1xpsc_ac97",
 483                 .owner  = THIS_MODULE,
 484                 .pm     = AU1XPSCAC97_PMOPS,
 485         },
 486         .probe          = au1xpsc_ac97_drvprobe,
 487         .remove         = __devexit_p(au1xpsc_ac97_drvremove),
 488 };
 489
 490 static int __init au1xpsc_ac97_load(void)
 491 {
 492         au1xpsc_ac97_workdata = NULL;
 493         return platform_driver_register(&au1xpsc_ac97_driver);
 494 }
 495
 496 static void __exit au1xpsc_ac97_unload(void)
 497 {
 498         platform_driver_unregister(&au1xpsc_ac97_driver);
 499 }
 500
 501 module_init(au1xpsc_ac97_load);
 502 module_exit(au1xpsc_ac97_unload);
 503
 504 MODULE_LICENSE("GPL");
 505 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
 506 MODULE_AUTHOR("Manuel Lauss");