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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / sound / pci / cs46xx / dsp_spos.c
blob05313e8b7187cb199ac85c3759683e46baea5d2c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 */
17
18 /*
19 * 2002-07 Benny Sjostrand benny@hostmobility.com
20 */
21
22
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/pm.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mutex.h>
30
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
35 #include <sound/cs46xx.h>
36
37 #include "cs46xx_lib.h"
38 #include "dsp_spos.h"
39
40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
41 struct dsp_scb_descriptor * fg_entry);
42
43 static enum wide_opcode wide_opcodes[] = {
44 WIDE_FOR_BEGIN_LOOP,
45 WIDE_FOR_BEGIN_LOOP2,
46 WIDE_COND_GOTO_ADDR,
47 WIDE_COND_GOTO_CALL,
48 WIDE_TBEQ_COND_GOTO_ADDR,
49 WIDE_TBEQ_COND_CALL_ADDR,
50 WIDE_TBEQ_NCOND_GOTO_ADDR,
51 WIDE_TBEQ_NCOND_CALL_ADDR,
52 WIDE_TBEQ_COND_GOTO1_ADDR,
53 WIDE_TBEQ_COND_CALL1_ADDR,
54 WIDE_TBEQ_NCOND_GOTOI_ADDR,
55 WIDE_TBEQ_NCOND_CALL1_ADDR
56 };
57
58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
59 u32 overlay_begin_address)
60 {
61 unsigned int i = 0, j, nreallocated = 0;
62 u32 hival,loval,address;
63 u32 mop_operands,mop_type,wide_op;
64 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
65
66 if (snd_BUG_ON(size %2))
67 return -EINVAL;
68
69 while (i < size) {
70 loval = data[i++];
71 hival = data[i++];
72
73 if (ins->code.offset > 0) {
74 mop_operands = (hival >> 6) & 0x03fff;
75 mop_type = mop_operands >> 10;
76
77 /* check for wide type instruction */
78 if (mop_type == 0 &&
79 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
80 (mop_operands & WIDE_INSTR_MASK) != 0) {
81 wide_op = loval & 0x7f;
82 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
83 if (wide_opcodes[j] == wide_op) {
84 /* need to reallocate instruction */
85 address = (hival & 0x00FFF) << 5;
86 address |= loval >> 15;
87
88 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
89
90 if ( !(address & 0x8000) ) {
91 address += (ins->code.offset / 2) - overlay_begin_address;
92 } else {
93 snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
94 }
95
96 hival &= 0xFF000;
97 loval &= 0x07FFF;
98
99 hival |= ( (address >> 5) & 0x00FFF);
100 loval |= ( (address << 15) & 0xF8000);
101
102 address = (hival & 0x00FFF) << 5;
103 address |= loval >> 15;
104
105 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
106 nreallocated ++;
107 } /* wide_opcodes[j] == wide_op */
108 } /* for */
109 } /* mod_type == 0 ... */
110 } /* ins->code.offset > 0 */
111
112 ins->code.data[ins->code.size++] = loval;
113 ins->code.data[ins->code.size++] = hival;
114 }
115
116 snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
117 return nreallocated;
118 }
119
120 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
121 {
122 int i;
123 for (i = 0;i < module->nsegments; ++i) {
124 if (module->segments[i].segment_type == seg_type) {
125 return (module->segments + i);
126 }
127 }
128
129 return NULL;
130 };
131
132 static int find_free_symbol_index (struct dsp_spos_instance * ins)
133 {
134 int index = ins->symbol_table.nsymbols,i;
135
136 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
137 if (ins->symbol_table.symbols[i].deleted) {
138 index = i;
139 break;
140 }
141 }
142
143 return index;
144 }
145
146 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
147 {
148 int i;
149 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
150
151 if (module->symbol_table.nsymbols > 0) {
152 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
153 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
154 module->overlay_begin_address = module->symbol_table.symbols[0].address;
155 }
156 }
157
158 for (i = 0;i < module->symbol_table.nsymbols; ++i) {
159 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
160 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
161 return -ENOMEM;
162 }
163
164
165 if (cs46xx_dsp_lookup_symbol(chip,
166 module->symbol_table.symbols[i].symbol_name,
167 module->symbol_table.symbols[i].symbol_type) == NULL) {
168
169 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
170 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
171 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
172 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
173
174 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
175 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
176
177 ins->symbol_table.nsymbols++;
178 } else {
179 /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
180 module->symbol_table.symbols[i].symbol_name); */
181 }
182 }
183
184 return 0;
185 }
186
187 static struct dsp_symbol_entry *
188 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
189 {
190 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
191 struct dsp_symbol_entry * symbol = NULL;
192 int index;
193
194 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
195 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
196 return NULL;
197 }
198
199 if (cs46xx_dsp_lookup_symbol(chip,
200 symbol_name,
201 type) != NULL) {
202 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
203 return NULL;
204 }
205
206 index = find_free_symbol_index (ins);
207
208 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
209 ins->symbol_table.symbols[index].address = address;
210 ins->symbol_table.symbols[index].symbol_type = type;
211 ins->symbol_table.symbols[index].module = NULL;
212 ins->symbol_table.symbols[index].deleted = 0;
213 symbol = (ins->symbol_table.symbols + index);
214
215 if (index > ins->symbol_table.highest_frag_index)
216 ins->symbol_table.highest_frag_index = index;
217
218 if (index == ins->symbol_table.nsymbols)
219 ins->symbol_table.nsymbols++; /* no frag. in list */
220
221 return symbol;
222 }
223
224 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
225 {
226 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
227
228 if (ins == NULL)
229 return NULL;
230
231 /* better to use vmalloc for this big table */
232 ins->symbol_table.nsymbols = 0;
233 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
234 DSP_MAX_SYMBOLS);
235 ins->symbol_table.highest_frag_index = 0;
236
237 if (ins->symbol_table.symbols == NULL) {
238 cs46xx_dsp_spos_destroy(chip);
239 goto error;
240 }
241
242 ins->code.offset = 0;
243 ins->code.size = 0;
244 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
245
246 if (ins->code.data == NULL) {
247 cs46xx_dsp_spos_destroy(chip);
248 goto error;
249 }
250
251 ins->nscb = 0;
252 ins->ntask = 0;
253
254 ins->nmodules = 0;
255 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
256
257 if (ins->modules == NULL) {
258 cs46xx_dsp_spos_destroy(chip);
259 goto error;
260 }
261
262 /* default SPDIF input sample rate
263 to 48000 khz */
264 ins->spdif_in_sample_rate = 48000;
265
266 /* maximize volume */
267 ins->dac_volume_right = 0x8000;
268 ins->dac_volume_left = 0x8000;
269 ins->spdif_input_volume_right = 0x8000;
270 ins->spdif_input_volume_left = 0x8000;
271
272 /* set left and right validity bits and
273 default channel status */
274 ins->spdif_csuv_default =
275 ins->spdif_csuv_stream =
276 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) |
277 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
278 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
279 /* left and right validity bits */ (1 << 13) | (1 << 12);
280
281 return ins;
282
283 error:
284 kfree(ins);
285 return NULL;
286 }
287
288 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
289 {
290 int i;
291 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
292
293 if (snd_BUG_ON(!ins))
294 return;
295
296 mutex_lock(&chip->spos_mutex);
297 for (i = 0; i < ins->nscb; ++i) {
298 if (ins->scbs[i].deleted) continue;
299
300 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
301 #ifdef CONFIG_PM
302 kfree(ins->scbs[i].data);
303 #endif
304 }
305
306 kfree(ins->code.data);
307 vfree(ins->symbol_table.symbols);
308 kfree(ins->modules);
309 kfree(ins);
310 mutex_unlock(&chip->spos_mutex);
311 }
312
313 static int dsp_load_parameter(struct snd_cs46xx *chip,
314 struct dsp_segment_desc *parameter)
315 {
316 u32 doffset, dsize;
317
318 if (!parameter) {
319 snd_printdd("dsp_spos: module got no parameter segment\n");
320 return 0;
321 }
322
323 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
324 dsize = parameter->size * 4;
325
326 snd_printdd("dsp_spos: "
327 "downloading parameter data to chip (%08x-%08x)\n",
328 doffset,doffset + dsize);
329 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
330 snd_printk(KERN_ERR "dsp_spos: "
331 "failed to download parameter data to DSP\n");
332 return -EINVAL;
333 }
334 return 0;
335 }
336
337 static int dsp_load_sample(struct snd_cs46xx *chip,
338 struct dsp_segment_desc *sample)
339 {
340 u32 doffset, dsize;
341
342 if (!sample) {
343 snd_printdd("dsp_spos: module got no sample segment\n");
344 return 0;
345 }
346
347 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET);
348 dsize = sample->size * 4;
349
350 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
351 doffset,doffset + dsize);
352
353 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
354 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
355 return -EINVAL;
356 }
357 return 0;
358 }
359
360 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
361 {
362 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
363 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
364 u32 doffset, dsize;
365 int err;
366
367 if (ins->nmodules == DSP_MAX_MODULES - 1) {
368 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
369 return -ENOMEM;
370 }
371
372 snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
373
374 if (ins->nmodules == 0) {
375 snd_printdd("dsp_spos: clearing parameter area\n");
376 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
377 }
378
379 err = dsp_load_parameter(chip, get_segment_desc(module,
380 SEGTYPE_SP_PARAMETER));
381 if (err < 0)
382 return err;
383
384 if (ins->nmodules == 0) {
385 snd_printdd("dsp_spos: clearing sample area\n");
386 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
387 }
388
389 err = dsp_load_sample(chip, get_segment_desc(module,
390 SEGTYPE_SP_SAMPLE));
391 if (err < 0)
392 return err;
393
394 if (ins->nmodules == 0) {
395 snd_printdd("dsp_spos: clearing code area\n");
396 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
397 }
398
399 if (code == NULL) {
400 snd_printdd("dsp_spos: module got no code segment\n");
401 } else {
402 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
403 snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
404 return -ENOMEM;
405 }
406
407 module->load_address = ins->code.offset;
408 module->overlay_begin_address = 0x000;
409
410 /* if module has a code segment it must have
411 symbol table */
412 if (snd_BUG_ON(!module->symbol_table.symbols))
413 return -ENOMEM;
414 if (add_symbols(chip,module)) {
415 snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
416 return -ENOMEM;
417 }
418
419 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
420 dsize = code->size * 4;
421 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
422 doffset,doffset + dsize);
423
424 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
425
426 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
427 snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
428 return -EINVAL;
429 }
430
431 ins->code.offset += code->size;
432 }
433
434 /* NOTE: module segments and symbol table must be
435 statically allocated. Case that module data is
436 not generated by the ospparser */
437 ins->modules[ins->nmodules] = *module;
438 ins->nmodules++;
439
440 return 0;
441 }
442
443 struct dsp_symbol_entry *
444 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
445 {
446 int i;
447 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
448
449 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
450
451 if (ins->symbol_table.symbols[i].deleted)
452 continue;
453
454 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
455 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
456 return (ins->symbol_table.symbols + i);
457 }
458 }
459
460
461 return NULL;
462 }
463
464
465 #ifdef CONFIG_PROC_FS
466 static struct dsp_symbol_entry *
467 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
468 {
469 int i;
470 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
471
472 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
473
474 if (ins->symbol_table.symbols[i].deleted)
475 continue;
476
477 if (ins->symbol_table.symbols[i].address == address &&
478 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
479 return (ins->symbol_table.symbols + i);
480 }
481 }
482
483
484 return NULL;
485 }
486
487
488 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
489 struct snd_info_buffer *buffer)
490 {
491 struct snd_cs46xx *chip = entry->private_data;
492 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
493 int i;
494
495 snd_iprintf(buffer, "SYMBOLS:\n");
496 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
497 char *module_str = "system";
498
499 if (ins->symbol_table.symbols[i].deleted)
500 continue;
501
502 if (ins->symbol_table.symbols[i].module != NULL) {
503 module_str = ins->symbol_table.symbols[i].module->module_name;
504 }
505
506
507 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
508 ins->symbol_table.symbols[i].address,
509 ins->symbol_table.symbols[i].symbol_type,
510 ins->symbol_table.symbols[i].symbol_name,
511 module_str);
512 }
513 }
514
515
516 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
517 struct snd_info_buffer *buffer)
518 {
519 struct snd_cs46xx *chip = entry->private_data;
520 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
521 int i,j;
522
523 mutex_lock(&chip->spos_mutex);
524 snd_iprintf(buffer, "MODULES:\n");
525 for ( i = 0; i < ins->nmodules; ++i ) {
526 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
527 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols);
528 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups);
529
530 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
531 struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
532 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n",
533 desc->segment_type,desc->offset, desc->size);
534 }
535 }
536 mutex_unlock(&chip->spos_mutex);
537 }
538
539 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
540 struct snd_info_buffer *buffer)
541 {
542 struct snd_cs46xx *chip = entry->private_data;
543 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
544 int i, j, col;
545 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
546
547 mutex_lock(&chip->spos_mutex);
548 snd_iprintf(buffer, "TASK TREES:\n");
549 for ( i = 0; i < ins->ntask; ++i) {
550 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
551
552 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
553 u32 val;
554 if (col == 4) {
555 snd_iprintf(buffer,"\n");
556 col = 0;
557 }
558 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
559 snd_iprintf(buffer,"%08x ",val);
560 }
561 }
562
563 snd_iprintf(buffer,"\n");
564 mutex_unlock(&chip->spos_mutex);
565 }
566
567 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
568 struct snd_info_buffer *buffer)
569 {
570 struct snd_cs46xx *chip = entry->private_data;
571 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
572 int i;
573
574 mutex_lock(&chip->spos_mutex);
575 snd_iprintf(buffer, "SCB's:\n");
576 for ( i = 0; i < ins->nscb; ++i) {
577 if (ins->scbs[i].deleted)
578 continue;
579 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
580
581 if (ins->scbs[i].parent_scb_ptr != NULL) {
582 snd_iprintf(buffer,"parent [%s:%04x] ",
583 ins->scbs[i].parent_scb_ptr->scb_name,
584 ins->scbs[i].parent_scb_ptr->address);
585 } else snd_iprintf(buffer,"parent [none] ");
586
587 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
588 ins->scbs[i].sub_list_ptr->scb_name,
589 ins->scbs[i].sub_list_ptr->address,
590 ins->scbs[i].next_scb_ptr->scb_name,
591 ins->scbs[i].next_scb_ptr->address,
592 ins->scbs[i].task_entry->symbol_name,
593 ins->scbs[i].task_entry->address);
594 }
595
596 snd_iprintf(buffer,"\n");
597 mutex_unlock(&chip->spos_mutex);
598 }
599
600 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
601 struct snd_info_buffer *buffer)
602 {
603 struct snd_cs46xx *chip = entry->private_data;
604 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
605 unsigned int i, col = 0;
606 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
607 struct dsp_symbol_entry * symbol;
608
609 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
610 if (col == 4) {
611 snd_iprintf(buffer,"\n");
612 col = 0;
613 }
614
615 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
616 col = 0;
617 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
618 }
619
620 if (col == 0) {
621 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
622 }
623
624 snd_iprintf(buffer,"%08X ",readl(dst + i));
625 }
626 }
627
628 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
629 struct snd_info_buffer *buffer)
630 {
631 struct snd_cs46xx *chip = entry->private_data;
632 int i,col = 0;
633 void __iomem *dst = chip->region.idx[2].remap_addr;
634
635 snd_iprintf(buffer,"PCMREADER:\n");
636 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
637 if (col == 4) {
638 snd_iprintf(buffer,"\n");
639 col = 0;
640 }
641
642 if (col == 0) {
643 snd_iprintf(buffer, "%04X ",i);
644 }
645
646 snd_iprintf(buffer,"%08X ",readl(dst + i));
647 }
648
649 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
650
651 col = 0;
652 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
653 if (col == 4) {
654 snd_iprintf(buffer,"\n");
655 col = 0;
656 }
657
658 if (col == 0) {
659 snd_iprintf(buffer, "%04X ",i);
660 }
661
662 snd_iprintf(buffer,"%08X ",readl(dst + i));
663 }
664
665 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
666 col = 0;
667 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
668 if (col == 4) {
669 snd_iprintf(buffer,"\n");
670 col = 0;
671 }
672
673 if (col == 0) {
674 snd_iprintf(buffer, "%04X ",i);
675 }
676
677 snd_iprintf(buffer,"%08X ",readl(dst + i));
678 }
679
680
681 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
682 col = 0;
683 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
684 if (col == 4) {
685 snd_iprintf(buffer,"\n");
686 col = 0;
687 }
688
689 if (col == 0) {
690 snd_iprintf(buffer, "%04X ",i);
691 }
692
693 snd_iprintf(buffer,"%08X ",readl(dst + i));
694 }
695
696 snd_iprintf(buffer,"\n...\n");
697 col = 0;
698
699 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
700 if (col == 4) {
701 snd_iprintf(buffer,"\n");
702 col = 0;
703 }
704
705 if (col == 0) {
706 snd_iprintf(buffer, "%04X ",i);
707 }
708
709 snd_iprintf(buffer,"%08X ",readl(dst + i));
710 }
711
712
713 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
714 col = 0;
715 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
716 if (col == 4) {
717 snd_iprintf(buffer,"\n");
718 col = 0;
719 }
720
721 if (col == 0) {
722 snd_iprintf(buffer, "%04X ",i);
723 }
724
725 snd_iprintf(buffer,"%08X ",readl(dst + i));
726 }
727
728 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
729 col = 0;
730 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
731 if (col == 4) {
732 snd_iprintf(buffer,"\n");
733 col = 0;
734 }
735
736 if (col == 0) {
737 snd_iprintf(buffer, "%04X ",i);
738 }
739
740 snd_iprintf(buffer,"%08X ",readl(dst + i));
741 }
742
743 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
744 col = 0;
745 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
746 if (col == 4) {
747 snd_iprintf(buffer,"\n");
748 col = 0;
749 }
750
751 if (col == 0) {
752 snd_iprintf(buffer, "%04X ",i);
753 }
754
755 snd_iprintf(buffer,"%08X ",readl(dst + i));
756 }
757 snd_iprintf(buffer,"\n");
758 }
759
760 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
761 {
762 struct snd_info_entry *entry;
763 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
764 int i;
765
766 ins->snd_card = card;
767
768 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
769 entry->content = SNDRV_INFO_CONTENT_TEXT;
770 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
771
772 if (snd_info_register(entry) < 0) {
773 snd_info_free_entry(entry);
774 entry = NULL;
775 }
776 }
777
778 ins->proc_dsp_dir = entry;
779
780 if (!ins->proc_dsp_dir)
781 return -ENOMEM;
782
783 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
784 entry->content = SNDRV_INFO_CONTENT_TEXT;
785 entry->private_data = chip;
786 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
787 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
788 if (snd_info_register(entry) < 0) {
789 snd_info_free_entry(entry);
790 entry = NULL;
791 }
792 }
793 ins->proc_sym_info_entry = entry;
794
795 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
796 entry->content = SNDRV_INFO_CONTENT_TEXT;
797 entry->private_data = chip;
798 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
799 entry->c.text.read = cs46xx_dsp_proc_modules_read;
800 if (snd_info_register(entry) < 0) {
801 snd_info_free_entry(entry);
802 entry = NULL;
803 }
804 }
805 ins->proc_modules_info_entry = entry;
806
807 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
808 entry->content = SNDRV_INFO_CONTENT_TEXT;
809 entry->private_data = chip;
810 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
811 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
812 if (snd_info_register(entry) < 0) {
813 snd_info_free_entry(entry);
814 entry = NULL;
815 }
816 }
817 ins->proc_parameter_dump_info_entry = entry;
818
819 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
820 entry->content = SNDRV_INFO_CONTENT_TEXT;
821 entry->private_data = chip;
822 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
823 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
824 if (snd_info_register(entry) < 0) {
825 snd_info_free_entry(entry);
826 entry = NULL;
827 }
828 }
829 ins->proc_sample_dump_info_entry = entry;
830
831 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
832 entry->content = SNDRV_INFO_CONTENT_TEXT;
833 entry->private_data = chip;
834 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
835 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
836 if (snd_info_register(entry) < 0) {
837 snd_info_free_entry(entry);
838 entry = NULL;
839 }
840 }
841 ins->proc_task_info_entry = entry;
842
843 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
844 entry->content = SNDRV_INFO_CONTENT_TEXT;
845 entry->private_data = chip;
846 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
847 entry->c.text.read = cs46xx_dsp_proc_scb_read;
848 if (snd_info_register(entry) < 0) {
849 snd_info_free_entry(entry);
850 entry = NULL;
851 }
852 }
853 ins->proc_scb_info_entry = entry;
854
855 mutex_lock(&chip->spos_mutex);
856 /* register/update SCB's entries on proc */
857 for (i = 0; i < ins->nscb; ++i) {
858 if (ins->scbs[i].deleted) continue;
859
860 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
861 }
862 mutex_unlock(&chip->spos_mutex);
863
864 return 0;
865 }
866
867 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
868 {
869 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
870 int i;
871
872 snd_info_free_entry(ins->proc_sym_info_entry);
873 ins->proc_sym_info_entry = NULL;
874
875 snd_info_free_entry(ins->proc_modules_info_entry);
876 ins->proc_modules_info_entry = NULL;
877
878 snd_info_free_entry(ins->proc_parameter_dump_info_entry);
879 ins->proc_parameter_dump_info_entry = NULL;
880
881 snd_info_free_entry(ins->proc_sample_dump_info_entry);
882 ins->proc_sample_dump_info_entry = NULL;
883
884 snd_info_free_entry(ins->proc_scb_info_entry);
885 ins->proc_scb_info_entry = NULL;
886
887 snd_info_free_entry(ins->proc_task_info_entry);
888 ins->proc_task_info_entry = NULL;
889
890 mutex_lock(&chip->spos_mutex);
891 for (i = 0; i < ins->nscb; ++i) {
892 if (ins->scbs[i].deleted) continue;
893 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
894 }
895 mutex_unlock(&chip->spos_mutex);
896
897 snd_info_free_entry(ins->proc_dsp_dir);
898 ins->proc_dsp_dir = NULL;
899
900 return 0;
901 }
902 #endif /* CONFIG_PROC_FS */
903
904 static int debug_tree;
905 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
906 u32 dest, int size)
907 {
908 void __iomem *spdst = chip->region.idx[1].remap_addr +
909 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
910 int i;
911
912 for (i = 0; i < size; ++i) {
913 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
914 writel(task_data[i],spdst);
915 spdst += sizeof(u32);
916 }
917 }
918
919 static int debug_scb;
920 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
921 {
922 void __iomem *spdst = chip->region.idx[1].remap_addr +
923 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
924 int i;
925
926 for (i = 0; i < 0x10; ++i) {
927 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
928 writel(scb_data[i],spdst);
929 spdst += sizeof(u32);
930 }
931 }
932
933 static int find_free_scb_index (struct dsp_spos_instance * ins)
934 {
935 int index = ins->nscb, i;
936
937 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
938 if (ins->scbs[i].deleted) {
939 index = i;
940 break;
941 }
942 }
943
944 return index;
945 }
946
947 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
948 {
949 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
950 struct dsp_scb_descriptor * desc = NULL;
951 int index;
952
953 if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
954 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
955 return NULL;
956 }
957
958 index = find_free_scb_index (ins);
959
960 memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
961 strcpy(ins->scbs[index].scb_name, name);
962 ins->scbs[index].address = dest;
963 ins->scbs[index].index = index;
964 ins->scbs[index].ref_count = 1;
965
966 desc = (ins->scbs + index);
967 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
968
969 if (index > ins->scb_highest_frag_index)
970 ins->scb_highest_frag_index = index;
971
972 if (index == ins->nscb)
973 ins->nscb++;
974
975 return desc;
976 }
977
978 static struct dsp_task_descriptor *
979 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
980 {
981 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
982 struct dsp_task_descriptor * desc = NULL;
983
984 if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
985 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
986 return NULL;
987 }
988
989 if (name)
990 strcpy(ins->tasks[ins->ntask].task_name, name);
991 else
992 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
993 ins->tasks[ins->ntask].address = dest;
994 ins->tasks[ins->ntask].size = size;
995
996 /* quick find in list */
997 ins->tasks[ins->ntask].index = ins->ntask;
998 desc = (ins->tasks + ins->ntask);
999 ins->ntask++;
1000
1001 if (name)
1002 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1003 return desc;
1004 }
1005
1006 #define SCB_BYTES (0x10 * 4)
1007
1008 struct dsp_scb_descriptor *
1009 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1010 {
1011 struct dsp_scb_descriptor * desc;
1012
1013 #ifdef CONFIG_PM
1014 /* copy the data for resume */
1015 scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
1016 if (!scb_data)
1017 return NULL;
1018 #endif
1019
1020 desc = _map_scb (chip,name,dest);
1021 if (desc) {
1022 desc->data = scb_data;
1023 _dsp_create_scb(chip,scb_data,dest);
1024 } else {
1025 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1026 #ifdef CONFIG_PM
1027 kfree(scb_data);
1028 #endif
1029 }
1030
1031 return desc;
1032 }
1033
1034
1035 static struct dsp_task_descriptor *
1036 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1037 u32 dest, int size)
1038 {
1039 struct dsp_task_descriptor * desc;
1040
1041 desc = _map_task_tree (chip,name,dest,size);
1042 if (desc) {
1043 desc->data = task_data;
1044 _dsp_create_task_tree(chip,task_data,dest,size);
1045 } else {
1046 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1047 }
1048
1049 return desc;
1050 }
1051
1052 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1053 {
1054 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1055 struct dsp_symbol_entry * fg_task_tree_header_code;
1056 struct dsp_symbol_entry * task_tree_header_code;
1057 struct dsp_symbol_entry * task_tree_thread;
1058 struct dsp_symbol_entry * null_algorithm;
1059 struct dsp_symbol_entry * magic_snoop_task;
1060
1061 struct dsp_scb_descriptor * timing_master_scb;
1062 struct dsp_scb_descriptor * codec_out_scb;
1063 struct dsp_scb_descriptor * codec_in_scb;
1064 struct dsp_scb_descriptor * src_task_scb;
1065 struct dsp_scb_descriptor * master_mix_scb;
1066 struct dsp_scb_descriptor * rear_mix_scb;
1067 struct dsp_scb_descriptor * record_mix_scb;
1068 struct dsp_scb_descriptor * write_back_scb;
1069 struct dsp_scb_descriptor * vari_decimate_scb;
1070 struct dsp_scb_descriptor * rear_codec_out_scb;
1071 struct dsp_scb_descriptor * clfe_codec_out_scb;
1072 struct dsp_scb_descriptor * magic_snoop_scb;
1073
1074 int fifo_addr, fifo_span, valid_slots;
1075
1076 static struct dsp_spos_control_block sposcb = {
1077 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1078 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1079 /* 2 */ DSP_SPOS_DC,0,
1080 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1081 /* 4 */ 0,0,
1082 /* 5 */ DSP_SPOS_UU,0,
1083 /* 6 */ FG_TASK_HEADER_ADDR,0,
1084 /* 7 */ 0,0,
1085 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1086 /* 9 */ 0,
1087 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1088 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1089 /* C */ DSP_SPOS_DC_DC,
1090 /* D */ DSP_SPOS_DC_DC,
1091 /* E */ DSP_SPOS_DC_DC,
1092 /* F */ DSP_SPOS_DC_DC
1093 };
1094
1095 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1096
1097 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1098 if (null_algorithm == NULL) {
1099 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1100 return -EIO;
1101 }
1102
1103 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1104 if (fg_task_tree_header_code == NULL) {
1105 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1106 return -EIO;
1107 }
1108
1109 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1110 if (task_tree_header_code == NULL) {
1111 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1112 return -EIO;
1113 }
1114
1115 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1116 if (task_tree_thread == NULL) {
1117 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1118 return -EIO;
1119 }
1120
1121 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1122 if (magic_snoop_task == NULL) {
1123 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1124 return -EIO;
1125 }
1126
1127 {
1128 /* create the null SCB */
1129 static struct dsp_generic_scb null_scb = {
1130 { 0, 0, 0, 0 },
1131 { 0, 0, 0, 0, 0 },
1132 NULL_SCB_ADDR, NULL_SCB_ADDR,
1133 0, 0, 0, 0, 0,
1134 {
1135 0,0,
1136 0,0,
1137 }
1138 };
1139
1140 null_scb.entry_point = null_algorithm->address;
1141 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1142 ins->the_null_scb->task_entry = null_algorithm;
1143 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1144 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1145 ins->the_null_scb->parent_scb_ptr = NULL;
1146 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1147 }
1148
1149 {
1150 /* setup foreground task tree */
1151 static struct dsp_task_tree_control_block fg_task_tree_hdr = {
1152 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1153 DSP_SPOS_DC_DC,
1154 DSP_SPOS_DC_DC,
1155 0x0000,DSP_SPOS_DC,
1156 DSP_SPOS_DC, DSP_SPOS_DC,
1157 DSP_SPOS_DC_DC,
1158 DSP_SPOS_DC_DC,
1159 DSP_SPOS_DC_DC,
1160 DSP_SPOS_DC,DSP_SPOS_DC },
1161
1162 {
1163 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1164 0,
1165 FG_TASK_HEADER_ADDR + TCBData,
1166 },
1167
1168 {
1169 4,0,
1170 1,0,
1171 2,SPOSCB_ADDR + HFGFlags,
1172 0,0,
1173 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1174 },
1175
1176 {
1177 DSP_SPOS_DC,0,
1178 DSP_SPOS_DC,DSP_SPOS_DC,
1179 DSP_SPOS_DC,DSP_SPOS_DC,
1180 DSP_SPOS_DC,DSP_SPOS_DC,
1181 DSP_SPOS_DC,DSP_SPOS_DC,
1182 DSP_SPOS_DCDC,
1183 DSP_SPOS_UU,1,
1184 DSP_SPOS_DCDC,
1185 DSP_SPOS_DCDC,
1186 DSP_SPOS_DCDC,
1187 DSP_SPOS_DCDC,
1188 DSP_SPOS_DCDC,
1189 DSP_SPOS_DCDC,
1190 DSP_SPOS_DCDC,
1191 DSP_SPOS_DCDC,
1192 DSP_SPOS_DCDC,
1193 DSP_SPOS_DCDC,
1194 DSP_SPOS_DCDC,
1195 DSP_SPOS_DCDC,
1196 DSP_SPOS_DCDC,
1197 DSP_SPOS_DCDC,
1198 DSP_SPOS_DCDC,
1199 DSP_SPOS_DCDC,
1200 DSP_SPOS_DCDC,
1201 DSP_SPOS_DCDC,
1202 DSP_SPOS_DCDC,
1203 DSP_SPOS_DCDC,
1204 DSP_SPOS_DCDC,
1205 DSP_SPOS_DCDC,
1206 DSP_SPOS_DCDC,
1207 DSP_SPOS_DCDC,
1208 DSP_SPOS_DCDC,
1209 DSP_SPOS_DCDC,
1210 DSP_SPOS_DCDC,
1211 DSP_SPOS_DCDC
1212 },
1213 {
1214 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1215 0,0
1216 }
1217 };
1218
1219 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1220 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1221 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1222 }
1223
1224
1225 {
1226 /* setup foreground task tree */
1227 static struct dsp_task_tree_control_block bg_task_tree_hdr = {
1228 { DSP_SPOS_DC_DC,
1229 DSP_SPOS_DC_DC,
1230 DSP_SPOS_DC_DC,
1231 DSP_SPOS_DC, DSP_SPOS_DC,
1232 DSP_SPOS_DC, DSP_SPOS_DC,
1233 DSP_SPOS_DC_DC,
1234 DSP_SPOS_DC_DC,
1235 DSP_SPOS_DC_DC,
1236 DSP_SPOS_DC,DSP_SPOS_DC },
1237
1238 {
1239 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */
1240 0,
1241 BG_TREE_SCB_ADDR + TCBData,
1242 },
1243
1244 {
1245 9999,0,
1246 0,1,
1247 0,SPOSCB_ADDR + HFGFlags,
1248 0,0,
1249 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1250 },
1251
1252 {
1253 DSP_SPOS_DC,0,
1254 DSP_SPOS_DC,DSP_SPOS_DC,
1255 DSP_SPOS_DC,DSP_SPOS_DC,
1256 DSP_SPOS_DC,DSP_SPOS_DC,
1257 DSP_SPOS_DC,DSP_SPOS_DC,
1258 DSP_SPOS_DCDC,
1259 DSP_SPOS_UU,1,
1260 DSP_SPOS_DCDC,
1261 DSP_SPOS_DCDC,
1262 DSP_SPOS_DCDC,
1263 DSP_SPOS_DCDC,
1264 DSP_SPOS_DCDC,
1265 DSP_SPOS_DCDC,
1266 DSP_SPOS_DCDC,
1267 DSP_SPOS_DCDC,
1268 DSP_SPOS_DCDC,
1269 DSP_SPOS_DCDC,
1270 DSP_SPOS_DCDC,
1271 DSP_SPOS_DCDC,
1272 DSP_SPOS_DCDC,
1273 DSP_SPOS_DCDC,
1274 DSP_SPOS_DCDC,
1275 DSP_SPOS_DCDC,
1276 DSP_SPOS_DCDC,
1277 DSP_SPOS_DCDC,
1278 DSP_SPOS_DCDC,
1279 DSP_SPOS_DCDC,
1280 DSP_SPOS_DCDC,
1281 DSP_SPOS_DCDC,
1282 DSP_SPOS_DCDC,
1283 DSP_SPOS_DCDC,
1284 DSP_SPOS_DCDC,
1285 DSP_SPOS_DCDC,
1286 DSP_SPOS_DCDC,
1287 DSP_SPOS_DCDC
1288 },
1289 {
1290 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1291 0,0
1292 }
1293 };
1294
1295 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1296 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1297 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1298 }
1299
1300 /* create timing master SCB */
1301 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1302
1303 /* create the CODEC output task */
1304 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1305 MASTERMIX_SCB_ADDR,
1306 CODECOUT_SCB_ADDR,timing_master_scb,
1307 SCB_ON_PARENT_SUBLIST_SCB);
1308
1309 if (!codec_out_scb) goto _fail_end;
1310 /* create the master mix SCB */
1311 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1312 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1313 codec_out_scb,
1314 SCB_ON_PARENT_SUBLIST_SCB);
1315 ins->master_mix_scb = master_mix_scb;
1316
1317 if (!master_mix_scb) goto _fail_end;
1318
1319 /* create codec in */
1320 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1321 CODEC_INPUT_BUF1,
1322 CODECIN_SCB_ADDR,codec_out_scb,
1323 SCB_ON_PARENT_NEXT_SCB);
1324 if (!codec_in_scb) goto _fail_end;
1325 ins->codec_in_scb = codec_in_scb;
1326
1327 /* create write back scb */
1328 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1329 WRITE_BACK_BUF1,WRITE_BACK_SPB,
1330 WRITEBACK_SCB_ADDR,
1331 timing_master_scb,
1332 SCB_ON_PARENT_NEXT_SCB);
1333 if (!write_back_scb) goto _fail_end;
1334
1335 {
1336 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1337 0x00020000,
1338 0x0000ffff
1339 };
1340
1341 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1342 (u32 *)&mix2_ostream_spb,
1343 WRITE_BACK_SPB, 2))
1344 goto _fail_end;
1345 }
1346
1347 /* input sample converter */
1348 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1349 VARI_DECIMATE_BUF0,
1350 VARI_DECIMATE_BUF1,
1351 VARIDECIMATE_SCB_ADDR,
1352 write_back_scb,
1353 SCB_ON_PARENT_SUBLIST_SCB);
1354 if (!vari_decimate_scb) goto _fail_end;
1355
1356 /* create the record mixer SCB */
1357 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1358 MIX_SAMPLE_BUF2,
1359 RECORD_MIXER_SCB_ADDR,
1360 vari_decimate_scb,
1361 SCB_ON_PARENT_SUBLIST_SCB);
1362 ins->record_mixer_scb = record_mix_scb;
1363
1364 if (!record_mix_scb) goto _fail_end;
1365
1366 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1367
1368 if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1369 goto _fail_end;
1370
1371 if (chip->nr_ac97_codecs == 1) {
1372 /* output on slot 5 and 11
1373 on primary CODEC */
1374 fifo_addr = 0x20;
1375 fifo_span = 0x60;
1376
1377 /* enable slot 5 and 11 */
1378 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1379 } else {
1380 /* output on slot 7 and 8
1381 on secondary CODEC */
1382 fifo_addr = 0x40;
1383 fifo_span = 0x10;
1384
1385 /* enable slot 7 and 8 */
1386 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1387 }
1388 /* create CODEC tasklet for rear speakers output*/
1389 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1390 REAR_MIXER_SCB_ADDR,
1391 REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1392 SCB_ON_PARENT_NEXT_SCB);
1393 if (!rear_codec_out_scb) goto _fail_end;
1394
1395
1396 /* create the rear PCM channel mixer SCB */
1397 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1398 MIX_SAMPLE_BUF3,
1399 REAR_MIXER_SCB_ADDR,
1400 rear_codec_out_scb,
1401 SCB_ON_PARENT_SUBLIST_SCB);
1402 ins->rear_mix_scb = rear_mix_scb;
1403 if (!rear_mix_scb) goto _fail_end;
1404
1405 if (chip->nr_ac97_codecs == 2) {
1406 /* create CODEC tasklet for rear Center/LFE output
1407 slot 6 and 9 on seconadry CODEC */
1408 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1409 CLFE_MIXER_SCB_ADDR,
1410 CLFE_CODEC_SCB_ADDR,
1411 rear_codec_out_scb,
1412 SCB_ON_PARENT_NEXT_SCB);
1413 if (!clfe_codec_out_scb) goto _fail_end;
1414
1415
1416 /* create the rear PCM channel mixer SCB */
1417 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1418 MIX_SAMPLE_BUF4,
1419 CLFE_MIXER_SCB_ADDR,
1420 clfe_codec_out_scb,
1421 SCB_ON_PARENT_SUBLIST_SCB);
1422 if (!ins->center_lfe_mix_scb) goto _fail_end;
1423
1424 /* enable slot 6 and 9 */
1425 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1426 } else {
1427 clfe_codec_out_scb = rear_codec_out_scb;
1428 ins->center_lfe_mix_scb = rear_mix_scb;
1429 }
1430
1431 /* enable slots depending on CODEC configuration */
1432 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1433
1434 /* the magic snooper */
1435 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1436 OUTPUT_SNOOP_BUFFER,
1437 codec_out_scb,
1438 clfe_codec_out_scb,
1439 SCB_ON_PARENT_NEXT_SCB);
1440
1441
1442 if (!magic_snoop_scb) goto _fail_end;
1443 ins->ref_snoop_scb = magic_snoop_scb;
1444
1445 /* SP IO access */
1446 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1447 magic_snoop_scb,
1448 SCB_ON_PARENT_NEXT_SCB))
1449 goto _fail_end;
1450
1451 /* SPDIF input sampel rate converter */
1452 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1453 ins->spdif_in_sample_rate,
1454 SRC_OUTPUT_BUF1,
1455 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1456 master_mix_scb,
1457 SCB_ON_PARENT_SUBLIST_SCB,1);
1458
1459 if (!src_task_scb) goto _fail_end;
1460 cs46xx_src_unlink(chip,src_task_scb);
1461
1462 /* NOTE: when we now how to detect the SPDIF input
1463 sample rate we will use this SRC to adjust it */
1464 ins->spdif_in_src = src_task_scb;
1465
1466 cs46xx_dsp_async_init(chip,timing_master_scb);
1467 return 0;
1468
1469 _fail_end:
1470 snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1471 return -EINVAL;
1472 }
1473
1474 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1475 struct dsp_scb_descriptor * fg_entry)
1476 {
1477 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1478 struct dsp_symbol_entry * s16_async_codec_input_task;
1479 struct dsp_symbol_entry * spdifo_task;
1480 struct dsp_symbol_entry * spdifi_task;
1481 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1482
1483 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1484 if (s16_async_codec_input_task == NULL) {
1485 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1486 return -EIO;
1487 }
1488 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1489 if (spdifo_task == NULL) {
1490 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1491 return -EIO;
1492 }
1493
1494 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1495 if (spdifi_task == NULL) {
1496 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1497 return -EIO;
1498 }
1499
1500 {
1501 /* 0xBC0 */
1502 struct dsp_spdifoscb spdifo_scb = {
1503 /* 0 */ DSP_SPOS_UUUU,
1504 {
1505 /* 1 */ 0xb0,
1506 /* 2 */ 0,
1507 /* 3 */ 0,
1508 /* 4 */ 0,
1509 },
1510 /* NOTE: the SPDIF output task read samples in mono
1511 format, the AsynchFGTxSCB task writes to buffer
1512 in stereo format
1513 */
1514 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1515 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC,
1516 /* 7 */ 0,0,
1517 /* 8 */ 0,
1518 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1519 /* A */ spdifo_task->address,
1520 SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1521 {
1522 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1523 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1524 },
1525 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1526 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1527 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */
1528 };
1529
1530 /* 0xBB0 */
1531 struct dsp_spdifiscb spdifi_scb = {
1532 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1533 /* 1 */ 0,
1534 /* 2 */ 0,
1535 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */
1536 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1537 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1538 /* 6 */ DSP_SPOS_UUUU, /* Free3 */
1539 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/
1540 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */
1541 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1542 /* A */ spdifi_task->address,
1543 SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1544 /* NOTE: The SPDIF input task write the sample in mono
1545 format from the HW FIFO, the AsynchFGRxSCB task reads
1546 them in stereo
1547 */
1548 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1549 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1550 /* D */ 0x8048,0,
1551 /* E */ 0x01f0,0x0001,
1552 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1553 };
1554
1555 /* 0xBA0 */
1556 struct dsp_async_codec_input_scb async_codec_input_scb = {
1557 /* 0 */ DSP_SPOS_UUUU,
1558 /* 1 */ 0,
1559 /* 2 */ 0,
1560 /* 3 */ 1,4000,
1561 /* 4 */ 0x0118,0x0001,
1562 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1563 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1564 /* 7 */ DSP_SPOS_UU,0x3,
1565 /* 8 */ DSP_SPOS_UUUU,
1566 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1567 /* A */ s16_async_codec_input_task->address,
1568 HFG_TREE_SCB + AsyncCIOFIFOPointer,
1569
1570 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1571 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1572
1573 #ifdef UseASER1Input
1574 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1575 Init. 0000:8042: for ASER1
1576 0000:8044: for ASER2 */
1577 /* D */ 0x8042,0,
1578
1579 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1580 Init 1 stero:8050 ASER1
1581 Init 0 mono:8070 ASER2
1582 Init 1 Stereo : 0100 ASER1 (Set by script) */
1583 /* E */ 0x0100,0x0001,
1584
1585 #endif
1586
1587 #ifdef UseASER2Input
1588 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1589 Init. 0000:8042: for ASER1
1590 0000:8044: for ASER2 */
1591 /* D */ 0x8044,0,
1592
1593 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1594 Init 1 stero:8050 ASER1
1595 Init 0 mono:8070 ASER2
1596 Init 1 Stereo : 0100 ASER1 (Set by script) */
1597 /* E */ 0x0110,0x0001,
1598
1599 #endif
1600
1601 /* short AsyncCIOutputBufModulo:AsyncCIFree;
1602 AsyncCIOutputBufModulo: The modulo size for
1603 the output buffer of this task */
1604 /* F */ 0, /* DSP_SPOS_UUUU */
1605 };
1606
1607 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1608
1609 if (snd_BUG_ON(!spdifo_scb_desc))
1610 return -EIO;
1611 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1612 if (snd_BUG_ON(!spdifi_scb_desc))
1613 return -EIO;
1614 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1615 if (snd_BUG_ON(!async_codec_scb_desc))
1616 return -EIO;
1617
1618 async_codec_scb_desc->parent_scb_ptr = NULL;
1619 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1620 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1621 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1622
1623 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1624 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1625 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1626 spdifi_scb_desc->task_entry = spdifi_task;
1627
1628 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1629 spdifo_scb_desc->next_scb_ptr = fg_entry;
1630 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1631 spdifo_scb_desc->task_entry = spdifo_task;
1632
1633 /* this one is faked, as the parnet of SPDIFO task
1634 is the FG task tree */
1635 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1636
1637 /* for proc fs */
1638 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1639 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1640 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1641
1642 /* Async MASTER ENABLE, affects both SPDIF input and output */
1643 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1644 }
1645
1646 return 0;
1647 }
1648
1649 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1650 {
1651 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1652
1653 /* set SPDIF output FIFO slot */
1654 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1655
1656 /* SPDIF output MASTER ENABLE */
1657 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1658
1659 /* right and left validate bit */
1660 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1661 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1662
1663 /* clear fifo pointer */
1664 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1665
1666 /* monitor state */
1667 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1668 }
1669
1670 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1671 {
1672 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1673
1674 /* if hw-ctrl already enabled, turn off to reset logic ... */
1675 cs46xx_dsp_disable_spdif_hw (chip);
1676 udelay(50);
1677
1678 /* set SPDIF output FIFO slot */
1679 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1680
1681 /* SPDIF output MASTER ENABLE */
1682 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1683
1684 /* right and left validate bit */
1685 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1686
1687 /* monitor state */
1688 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1689
1690 return 0;
1691 }
1692
1693 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1694 {
1695 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1696
1697 /* turn on amplifier */
1698 chip->active_ctrl(chip, 1);
1699 chip->amplifier_ctrl(chip, 1);
1700
1701 if (snd_BUG_ON(ins->asynch_rx_scb))
1702 return -EINVAL;
1703 if (snd_BUG_ON(!ins->spdif_in_src))
1704 return -EINVAL;
1705
1706 mutex_lock(&chip->spos_mutex);
1707
1708 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1709 /* time countdown enable */
1710 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1711 /* NOTE: 80000005 value is just magic. With all values
1712 that I've tested this one seem to give the best result.
1713 Got no explication why. (Benny) */
1714
1715 /* SPDIF input MASTER ENABLE */
1716 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1717
1718 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1719 }
1720
1721 /* create and start the asynchronous receiver SCB */
1722 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1723 ASYNCRX_SCB_ADDR,
1724 SPDIFI_SCB_INST,
1725 SPDIFI_IP_OUTPUT_BUFFER1,
1726 ins->spdif_in_src,
1727 SCB_ON_PARENT_SUBLIST_SCB);
1728
1729 spin_lock_irq(&chip->reg_lock);
1730
1731 /* reset SPDIF input sample buffer pointer */
1732 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1733 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1734
1735 /* reset FIFO ptr */
1736 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1737 cs46xx_src_link(chip,ins->spdif_in_src);
1738
1739 /* unmute SRC volume */
1740 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1741
1742 spin_unlock_irq(&chip->reg_lock);
1743
1744 /* set SPDIF input sample rate and unmute
1745 NOTE: only 48khz support for SPDIF input this time */
1746 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1747
1748 /* monitor state */
1749 ins->spdif_status_in = 1;
1750 mutex_unlock(&chip->spos_mutex);
1751
1752 return 0;
1753 }
1754
1755 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1756 {
1757 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1758
1759 if (snd_BUG_ON(!ins->asynch_rx_scb))
1760 return -EINVAL;
1761 if (snd_BUG_ON(!ins->spdif_in_src))
1762 return -EINVAL;
1763
1764 mutex_lock(&chip->spos_mutex);
1765
1766 /* Remove the asynchronous receiver SCB */
1767 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1768 ins->asynch_rx_scb = NULL;
1769
1770 cs46xx_src_unlink(chip,ins->spdif_in_src);
1771
1772 /* monitor state */
1773 ins->spdif_status_in = 0;
1774 mutex_unlock(&chip->spos_mutex);
1775
1776 /* restore amplifier */
1777 chip->active_ctrl(chip, -1);
1778 chip->amplifier_ctrl(chip, -1);
1779
1780 return 0;
1781 }
1782
1783 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1784 {
1785 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1786
1787 if (snd_BUG_ON(ins->pcm_input))
1788 return -EINVAL;
1789 if (snd_BUG_ON(!ins->ref_snoop_scb))
1790 return -EINVAL;
1791
1792 mutex_lock(&chip->spos_mutex);
1793 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1794 "PCMSerialInput_Wave");
1795 mutex_unlock(&chip->spos_mutex);
1796
1797 return 0;
1798 }
1799
1800 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1801 {
1802 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1803
1804 if (snd_BUG_ON(!ins->pcm_input))
1805 return -EINVAL;
1806
1807 mutex_lock(&chip->spos_mutex);
1808 cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1809 ins->pcm_input = NULL;
1810 mutex_unlock(&chip->spos_mutex);
1811
1812 return 0;
1813 }
1814
1815 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1816 {
1817 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1818
1819 if (snd_BUG_ON(ins->adc_input))
1820 return -EINVAL;
1821 if (snd_BUG_ON(!ins->codec_in_scb))
1822 return -EINVAL;
1823
1824 mutex_lock(&chip->spos_mutex);
1825 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1826 "PCMSerialInput_ADC");
1827 mutex_unlock(&chip->spos_mutex);
1828
1829 return 0;
1830 }
1831
1832 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1833 {
1834 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1835
1836 if (snd_BUG_ON(!ins->adc_input))
1837 return -EINVAL;
1838
1839 mutex_lock(&chip->spos_mutex);
1840 cs46xx_dsp_remove_scb (chip,ins->adc_input);
1841 ins->adc_input = NULL;
1842 mutex_unlock(&chip->spos_mutex);
1843
1844 return 0;
1845 }
1846
1847 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1848 {
1849 u32 temp;
1850 int i;
1851
1852 /* santiy check the parameters. (These numbers are not 100% correct. They are
1853 a rough guess from looking at the controller spec.) */
1854 if (address < 0x8000 || address >= 0x9000)
1855 return -EINVAL;
1856
1857 /* initialize the SP_IO_WRITE SCB with the data. */
1858 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */
1859
1860 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp);
1861 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1862 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1863
1864 /* Poke this location to tell the task to start */
1865 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1866
1867 /* Verify that the task ran */
1868 for (i=0; i<25; i++) {
1869 udelay(125);
1870
1871 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1872 if (temp == 0x00000000)
1873 break;
1874 }
1875
1876 if (i == 25) {
1877 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1878 return -EBUSY;
1879 }
1880
1881 return 0;
1882 }
1883
1884 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1885 {
1886 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1887 struct dsp_scb_descriptor * scb;
1888
1889 mutex_lock(&chip->spos_mutex);
1890
1891 /* main output */
1892 scb = ins->master_mix_scb->sub_list_ptr;
1893 while (scb != ins->the_null_scb) {
1894 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1895 scb = scb->next_scb_ptr;
1896 }
1897
1898 /* rear output */
1899 scb = ins->rear_mix_scb->sub_list_ptr;
1900 while (scb != ins->the_null_scb) {
1901 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1902 scb = scb->next_scb_ptr;
1903 }
1904
1905 ins->dac_volume_left = left;
1906 ins->dac_volume_right = right;
1907
1908 mutex_unlock(&chip->spos_mutex);
1909
1910 return 0;
1911 }
1912
1913 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1914 {
1915 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1916
1917 mutex_lock(&chip->spos_mutex);
1918
1919 if (ins->asynch_rx_scb != NULL)
1920 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1921 left,right);
1922
1923 ins->spdif_input_volume_left = left;
1924 ins->spdif_input_volume_right = right;
1925
1926 mutex_unlock(&chip->spos_mutex);
1927
1928 return 0;
1929 }
1930
1931 #ifdef CONFIG_PM
1932 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1933 {
1934 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1935 int i, err;
1936
1937 /* clear parameter, sample and code areas */
1938 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1939 DSP_PARAMETER_BYTE_SIZE);
1940 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1941 DSP_SAMPLE_BYTE_SIZE);
1942 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1943
1944 for (i = 0; i < ins->nmodules; i++) {
1945 struct dsp_module_desc *module = &ins->modules[i];
1946 struct dsp_segment_desc *seg;
1947 u32 doffset, dsize;
1948
1949 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1950 err = dsp_load_parameter(chip, seg);
1951 if (err < 0)
1952 return err;
1953
1954 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1955 err = dsp_load_sample(chip, seg);
1956 if (err < 0)
1957 return err;
1958
1959 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
1960 if (!seg)
1961 continue;
1962
1963 doffset = seg->offset * 4 + module->load_address * 4
1964 + DSP_CODE_BYTE_OFFSET;
1965 dsize = seg->size * 4;
1966 err = snd_cs46xx_download(chip,
1967 ins->code.data + module->load_address,
1968 doffset, dsize);
1969 if (err < 0)
1970 return err;
1971 }
1972
1973 for (i = 0; i < ins->ntask; i++) {
1974 struct dsp_task_descriptor *t = &ins->tasks[i];
1975 _dsp_create_task_tree(chip, t->data, t->address, t->size);
1976 }
1977
1978 for (i = 0; i < ins->nscb; i++) {
1979 struct dsp_scb_descriptor *s = &ins->scbs[i];
1980 if (s->deleted)
1981 continue;
1982 _dsp_create_scb(chip, s->data, s->address);
1983 }
1984 for (i = 0; i < ins->nscb; i++) {
1985 struct dsp_scb_descriptor *s = &ins->scbs[i];
1986 if (s->deleted)
1987 continue;
1988 if (s->updated)
1989 cs46xx_dsp_spos_update_scb(chip, s);
1990 if (s->volume_set)
1991 cs46xx_dsp_scb_set_volume(chip, s,
1992 s->volume[0], s->volume[1]);
1993 }
1994 if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
1995 cs46xx_dsp_enable_spdif_hw(chip);
1996 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
1997 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
1998 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
1999 cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
2000 ins->spdif_csuv_stream);
2001 }
2002 if (chip->dsp_spos_instance->spdif_status_in) {
2003 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
2004 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
2005 }
2006 return 0;
2007 }
2008 #endif
Tomato firmware and modifications.