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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / sound / pci / atiixp.c
blob95867397fc1268d8022fc528ead8cebfebcaa966
1 /*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <asm/io.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/pci.h>
27 #include <linux/slab.h>
28 #include <linux/moduleparam.h>
29 #include <linux/mutex.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP AC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
41
42 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44 static int ac97_clock = 48000;
45 static char *ac97_quirk;
46 static int spdif_aclink = 1;
47 static int ac97_codec = -1;
48
49 module_param(index, int, 0444);
50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51 module_param(id, charp, 0444);
52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
53 module_param(ac97_clock, int, 0444);
54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55 module_param(ac97_quirk, charp, 0444);
56 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
57 module_param(ac97_codec, int, 0444);
58 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
59 module_param(spdif_aclink, bool, 0444);
60 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
62 /* just for backward compatibility */
63 static int enable;
64 module_param(enable, bool, 0444);
65
66
67 /*
68 */
69
70 #define ATI_REG_ISR 0x00 /* interrupt source */
71 #define ATI_REG_ISR_IN_XRUN (1U<<0)
72 #define ATI_REG_ISR_IN_STATUS (1U<<1)
73 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
74 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
75 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
78 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
83
84 #define ATI_REG_IER 0x04 /* interrupt enable */
85 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98
99 #define ATI_REG_CMD 0x08 /* command */
100 #define ATI_REG_CMD_POWERDOWN (1U<<0)
101 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102 #define ATI_REG_CMD_SEND_EN (1U<<2)
103 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
104 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
123 #define ATI_REG_CMD_BURST_EN (1U<<25)
124 #define ATI_REG_CMD_PANIC_EN (1U<<26)
125 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128 #define ATI_REG_CMD_AC_SYNC (1U<<30)
129 #define ATI_REG_CMD_AC_RESET (1U<<31)
130
131 #define ATI_REG_PHYS_OUT_ADDR 0x0c
132 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133 #define ATI_REG_PHYS_OUT_RW (1U<<2)
134 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137
138 #define ATI_REG_PHYS_IN_ADDR 0x10
139 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
142
143 #define ATI_REG_SLOTREQ 0x14
144
145 #define ATI_REG_COUNTER 0x18
146 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148
149 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150
151 #define ATI_REG_IN_DMA_LINKPTR 0x20
152 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155 #define ATI_REG_IN_DMA_DT_SIZE 0x30
156
157 #define ATI_REG_OUT_DMA_SLOT 0x34
158 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162
163 #define ATI_REG_OUT_DMA_LINKPTR 0x38
164 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
168
169 #define ATI_REG_SPDF_CMD 0x4c
170 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173
174 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
175 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179
180 #define ATI_REG_MODEM_MIRROR 0x7c
181 #define ATI_REG_AUDIO_MIRROR 0x80
182
183 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185
186 #define ATI_REG_FIFO_FLUSH 0x88
187 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
189
190 /* LINKPTR */
191 #define ATI_REG_LINKPTR_EN (1U<<0)
192
193 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197 #define ATI_REG_DMA_STATE (7U<<26)
198
199
200 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
201
202
203 struct atiixp;
204
205 /*
206 * DMA packate descriptor
207 */
208
209 struct atiixp_dma_desc {
210 u32 addr; /* DMA buffer address */
211 u16 status; /* status bits */
212 u16 size; /* size of the packet in dwords */
213 u32 next; /* address of the next packet descriptor */
214 };
215
216 /*
217 * stream enum
218 */
219 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
220 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
221 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222
223 #define NUM_ATI_CODECS 3
224
225
226 /*
227 * constants and callbacks for each DMA type
228 */
229 struct atiixp_dma_ops {
230 int type; /* ATI_DMA_XXX */
231 unsigned int llp_offset; /* LINKPTR offset */
232 unsigned int dt_cur; /* DT_CUR offset */
233 /* called from open callback */
234 void (*enable_dma)(struct atiixp *chip, int on);
235 /* called from trigger (START/STOP) */
236 void (*enable_transfer)(struct atiixp *chip, int on);
237 /* called from trigger (STOP only) */
238 void (*flush_dma)(struct atiixp *chip);
239 };
240
241 /*
242 * DMA stream
243 */
244 struct atiixp_dma {
245 const struct atiixp_dma_ops *ops;
246 struct snd_dma_buffer desc_buf;
247 struct snd_pcm_substream *substream; /* assigned PCM substream */
248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
252 int suspended;
253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256 };
257
258 /*
259 * ATI IXP chip
260 */
261 struct atiixp {
262 struct snd_card *card;
263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
269 struct snd_ac97_bus *ac97_bus;
270 struct snd_ac97 *ac97[NUM_ATI_CODECS];
271
272 spinlock_t reg_lock;
273
274 struct atiixp_dma dmas[NUM_ATI_DMAS];
275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
283 struct mutex open_mutex; /* playback open mutex */
284 };
285
286
287 /*
288 */
289 static DEFINE_PCI_DEVICE_TABLE(snd_atiixp_ids) = {
290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
294 { 0, }
295 };
296
297 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
299 static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
300 SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0),
301 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
302 { } /* terminator */
303 };
304
305 /*
306 * lowlevel functions
307 */
308
309 /*
310 * update the bits of the given register.
311 * return 1 if the bits changed.
312 */
313 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
314 unsigned int mask, unsigned int value)
315 {
316 void __iomem *addr = chip->remap_addr + reg;
317 unsigned int data, old_data;
318 old_data = data = readl(addr);
319 data &= ~mask;
320 data |= value;
321 if (old_data == data)
322 return 0;
323 writel(data, addr);
324 return 1;
325 }
326
327 /*
328 * macros for easy use
329 */
330 #define atiixp_write(chip,reg,value) \
331 writel(value, chip->remap_addr + ATI_REG_##reg)
332 #define atiixp_read(chip,reg) \
333 readl(chip->remap_addr + ATI_REG_##reg)
334 #define atiixp_update(chip,reg,mask,val) \
335 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
336
337 /*
338 * handling DMA packets
339 *
340 * we allocate a linear buffer for the DMA, and split it to each packet.
341 * in a future version, a scatter-gather buffer should be implemented.
342 */
343
344 #define ATI_DESC_LIST_SIZE \
345 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
346
347 /*
348 * build packets ring for the given buffer size.
349 *
350 * IXP handles the buffer descriptors, which are connected as a linked
351 * list. although we can change the list dynamically, in this version,
352 * a static RING of buffer descriptors is used.
353 *
354 * the ring is built in this function, and is set up to the hardware.
355 */
356 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
357 struct snd_pcm_substream *substream,
358 unsigned int periods,
359 unsigned int period_bytes)
360 {
361 unsigned int i;
362 u32 addr, desc_addr;
363 unsigned long flags;
364
365 if (periods > ATI_MAX_DESCRIPTORS)
366 return -ENOMEM;
367
368 if (dma->desc_buf.area == NULL) {
369 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
370 snd_dma_pci_data(chip->pci),
371 ATI_DESC_LIST_SIZE,
372 &dma->desc_buf) < 0)
373 return -ENOMEM;
374 dma->period_bytes = dma->periods = 0; /* clear */
375 }
376
377 if (dma->periods == periods && dma->period_bytes == period_bytes)
378 return 0;
379
380 /* reset DMA before changing the descriptor table */
381 spin_lock_irqsave(&chip->reg_lock, flags);
382 writel(0, chip->remap_addr + dma->ops->llp_offset);
383 dma->ops->enable_dma(chip, 0);
384 dma->ops->enable_dma(chip, 1);
385 spin_unlock_irqrestore(&chip->reg_lock, flags);
386
387 /* fill the entries */
388 addr = (u32)substream->runtime->dma_addr;
389 desc_addr = (u32)dma->desc_buf.addr;
390 for (i = 0; i < periods; i++) {
391 struct atiixp_dma_desc *desc;
392 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
393 desc->addr = cpu_to_le32(addr);
394 desc->status = 0;
395 desc->size = period_bytes >> 2; /* in dwords */
396 desc_addr += sizeof(struct atiixp_dma_desc);
397 if (i == periods - 1)
398 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
399 else
400 desc->next = cpu_to_le32(desc_addr);
401 addr += period_bytes;
402 }
403
404 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
405 chip->remap_addr + dma->ops->llp_offset);
406
407 dma->period_bytes = period_bytes;
408 dma->periods = periods;
409
410 return 0;
411 }
412
413 /*
414 * remove the ring buffer and release it if assigned
415 */
416 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
417 struct snd_pcm_substream *substream)
418 {
419 if (dma->desc_buf.area) {
420 writel(0, chip->remap_addr + dma->ops->llp_offset);
421 snd_dma_free_pages(&dma->desc_buf);
422 dma->desc_buf.area = NULL;
423 }
424 }
425
426 /*
427 * AC97 interface
428 */
429 static int snd_atiixp_acquire_codec(struct atiixp *chip)
430 {
431 int timeout = 1000;
432
433 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
434 if (! timeout--) {
435 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
436 return -EBUSY;
437 }
438 udelay(1);
439 }
440 return 0;
441 }
442
443 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
444 {
445 unsigned int data;
446 int timeout;
447
448 if (snd_atiixp_acquire_codec(chip) < 0)
449 return 0xffff;
450 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
451 ATI_REG_PHYS_OUT_ADDR_EN |
452 ATI_REG_PHYS_OUT_RW |
453 codec;
454 atiixp_write(chip, PHYS_OUT_ADDR, data);
455 if (snd_atiixp_acquire_codec(chip) < 0)
456 return 0xffff;
457 timeout = 1000;
458 do {
459 data = atiixp_read(chip, PHYS_IN_ADDR);
460 if (data & ATI_REG_PHYS_IN_READ_FLAG)
461 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
462 udelay(1);
463 } while (--timeout);
464 /* time out may happen during reset */
465 if (reg < 0x7c)
466 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
467 return 0xffff;
468 }
469
470
471 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
472 unsigned short reg, unsigned short val)
473 {
474 unsigned int data;
475
476 if (snd_atiixp_acquire_codec(chip) < 0)
477 return;
478 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
479 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
480 ATI_REG_PHYS_OUT_ADDR_EN | codec;
481 atiixp_write(chip, PHYS_OUT_ADDR, data);
482 }
483
484
485 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
486 unsigned short reg)
487 {
488 struct atiixp *chip = ac97->private_data;
489 return snd_atiixp_codec_read(chip, ac97->num, reg);
490
491 }
492
493 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
494 unsigned short val)
495 {
496 struct atiixp *chip = ac97->private_data;
497 snd_atiixp_codec_write(chip, ac97->num, reg, val);
498 }
499
500 /*
501 * reset AC link
502 */
503 static int snd_atiixp_aclink_reset(struct atiixp *chip)
504 {
505 int timeout;
506
507 /* reset powerdoewn */
508 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
509 udelay(10);
510
511 /* perform a software reset */
512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
513 atiixp_read(chip, CMD);
514 udelay(10);
515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
516
517 timeout = 10;
518 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
519 /* do a hard reset */
520 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
521 ATI_REG_CMD_AC_SYNC);
522 atiixp_read(chip, CMD);
523 mdelay(1);
524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
525 if (--timeout) {
526 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
527 break;
528 }
529 }
530
531 /* deassert RESET and assert SYNC to make sure */
532 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
533 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
534
535 return 0;
536 }
537
538 #ifdef CONFIG_PM
539 static int snd_atiixp_aclink_down(struct atiixp *chip)
540 {
541 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
542 // return -EBUSY;
543 atiixp_update(chip, CMD,
544 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
545 ATI_REG_CMD_POWERDOWN);
546 return 0;
547 }
548 #endif
549
550 /*
551 * auto-detection of codecs
552 *
553 * the IXP chip can generate interrupts for the non-existing codecs.
554 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
555 * even if all three codecs are connected.
556 */
557
558 #define ALL_CODEC_NOT_READY \
559 (ATI_REG_ISR_CODEC0_NOT_READY |\
560 ATI_REG_ISR_CODEC1_NOT_READY |\
561 ATI_REG_ISR_CODEC2_NOT_READY)
562 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
563
564 static int __devinit ac97_probing_bugs(struct pci_dev *pci)
565 {
566 const struct snd_pci_quirk *q;
567
568 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
569 if (q) {
570 snd_printdd(KERN_INFO "Atiixp quirk for %s. "
571 "Forcing codec %d\n", q->name, q->value);
572 return q->value;
573 }
574 /* this hardware doesn't need workarounds. Probe for codec */
575 return -1;
576 }
577
578 static int __devinit snd_atiixp_codec_detect(struct atiixp *chip)
579 {
580 int timeout;
581
582 chip->codec_not_ready_bits = 0;
583 if (ac97_codec == -1)
584 ac97_codec = ac97_probing_bugs(chip->pci);
585 if (ac97_codec >= 0) {
586 chip->codec_not_ready_bits |=
587 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
588 return 0;
589 }
590
591 atiixp_write(chip, IER, CODEC_CHECK_BITS);
592 /* wait for the interrupts */
593 timeout = 50;
594 while (timeout-- > 0) {
595 mdelay(1);
596 if (chip->codec_not_ready_bits)
597 break;
598 }
599 atiixp_write(chip, IER, 0); /* disable irqs */
600
601 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
602 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
603 return -ENXIO;
604 }
605 return 0;
606 }
607
608
609 /*
610 * enable DMA and irqs
611 */
612 static int snd_atiixp_chip_start(struct atiixp *chip)
613 {
614 unsigned int reg;
615
616 /* set up spdif, enable burst mode */
617 reg = atiixp_read(chip, CMD);
618 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
619 reg |= ATI_REG_CMD_BURST_EN;
620 atiixp_write(chip, CMD, reg);
621
622 reg = atiixp_read(chip, SPDF_CMD);
623 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
624 atiixp_write(chip, SPDF_CMD, reg);
625
626 /* clear all interrupt source */
627 atiixp_write(chip, ISR, 0xffffffff);
628 /* enable irqs */
629 atiixp_write(chip, IER,
630 ATI_REG_IER_IO_STATUS_EN |
631 ATI_REG_IER_IN_XRUN_EN |
632 ATI_REG_IER_OUT_XRUN_EN |
633 ATI_REG_IER_SPDF_XRUN_EN |
634 ATI_REG_IER_SPDF_STATUS_EN);
635 return 0;
636 }
637
638
639 /*
640 * disable DMA and IRQs
641 */
642 static int snd_atiixp_chip_stop(struct atiixp *chip)
643 {
644 /* clear interrupt source */
645 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
646 /* disable irqs */
647 atiixp_write(chip, IER, 0);
648 return 0;
649 }
650
651
652 /*
653 * PCM section
654 */
655
656 /*
657 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
658 * position. when SG-buffer is implemented, the offset must be calculated
659 * correctly...
660 */
661 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
662 {
663 struct atiixp *chip = snd_pcm_substream_chip(substream);
664 struct snd_pcm_runtime *runtime = substream->runtime;
665 struct atiixp_dma *dma = runtime->private_data;
666 unsigned int curptr;
667 int timeout = 1000;
668
669 while (timeout--) {
670 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
671 if (curptr < dma->buf_addr)
672 continue;
673 curptr -= dma->buf_addr;
674 if (curptr >= dma->buf_bytes)
675 continue;
676 return bytes_to_frames(runtime, curptr);
677 }
678 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
679 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
680 return 0;
681 }
682
683 /*
684 * XRUN detected, and stop the PCM substream
685 */
686 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
687 {
688 if (! dma->substream || ! dma->running)
689 return;
690 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
691 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
692 }
693
694 /*
695 * the period ack. update the substream.
696 */
697 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
698 {
699 if (! dma->substream || ! dma->running)
700 return;
701 snd_pcm_period_elapsed(dma->substream);
702 }
703
704 /* set BUS_BUSY interrupt bit if any DMA is running */
705 /* call with spinlock held */
706 static void snd_atiixp_check_bus_busy(struct atiixp *chip)
707 {
708 unsigned int bus_busy;
709 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
710 ATI_REG_CMD_RECEIVE_EN |
711 ATI_REG_CMD_SPDF_OUT_EN))
712 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
713 else
714 bus_busy = 0;
715 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
716 }
717
718 /* common trigger callback
719 * calling the lowlevel callbacks in it
720 */
721 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
722 {
723 struct atiixp *chip = snd_pcm_substream_chip(substream);
724 struct atiixp_dma *dma = substream->runtime->private_data;
725 int err = 0;
726
727 if (snd_BUG_ON(!dma->ops->enable_transfer ||
728 !dma->ops->flush_dma))
729 return -EINVAL;
730
731 spin_lock(&chip->reg_lock);
732 switch (cmd) {
733 case SNDRV_PCM_TRIGGER_START:
734 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
735 case SNDRV_PCM_TRIGGER_RESUME:
736 dma->ops->enable_transfer(chip, 1);
737 dma->running = 1;
738 dma->suspended = 0;
739 break;
740 case SNDRV_PCM_TRIGGER_STOP:
741 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
742 case SNDRV_PCM_TRIGGER_SUSPEND:
743 dma->ops->enable_transfer(chip, 0);
744 dma->running = 0;
745 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
746 break;
747 default:
748 err = -EINVAL;
749 break;
750 }
751 if (! err) {
752 snd_atiixp_check_bus_busy(chip);
753 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
754 dma->ops->flush_dma(chip);
755 snd_atiixp_check_bus_busy(chip);
756 }
757 }
758 spin_unlock(&chip->reg_lock);
759 return err;
760 }
761
762
763 /*
764 * lowlevel callbacks for each DMA type
765 *
766 * every callback is supposed to be called in chip->reg_lock spinlock
767 */
768
769 /* flush FIFO of analog OUT DMA */
770 static void atiixp_out_flush_dma(struct atiixp *chip)
771 {
772 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
773 }
774
775 /* enable/disable analog OUT DMA */
776 static void atiixp_out_enable_dma(struct atiixp *chip, int on)
777 {
778 unsigned int data;
779 data = atiixp_read(chip, CMD);
780 if (on) {
781 if (data & ATI_REG_CMD_OUT_DMA_EN)
782 return;
783 atiixp_out_flush_dma(chip);
784 data |= ATI_REG_CMD_OUT_DMA_EN;
785 } else
786 data &= ~ATI_REG_CMD_OUT_DMA_EN;
787 atiixp_write(chip, CMD, data);
788 }
789
790 /* start/stop transfer over OUT DMA */
791 static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
792 {
793 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
794 on ? ATI_REG_CMD_SEND_EN : 0);
795 }
796
797 /* enable/disable analog IN DMA */
798 static void atiixp_in_enable_dma(struct atiixp *chip, int on)
799 {
800 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
801 on ? ATI_REG_CMD_IN_DMA_EN : 0);
802 }
803
804 /* start/stop analog IN DMA */
805 static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
806 {
807 if (on) {
808 unsigned int data = atiixp_read(chip, CMD);
809 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
810 data |= ATI_REG_CMD_RECEIVE_EN;
811 atiixp_write(chip, CMD, data);
812 }
813 } else
814 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
815 }
816
817 /* flush FIFO of analog IN DMA */
818 static void atiixp_in_flush_dma(struct atiixp *chip)
819 {
820 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
821 }
822
823 /* enable/disable SPDIF OUT DMA */
824 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
825 {
826 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
827 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
828 }
829
830 /* start/stop SPDIF OUT DMA */
831 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
832 {
833 unsigned int data;
834 data = atiixp_read(chip, CMD);
835 if (on)
836 data |= ATI_REG_CMD_SPDF_OUT_EN;
837 else
838 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
839 atiixp_write(chip, CMD, data);
840 }
841
842 /* flush FIFO of SPDIF OUT DMA */
843 static void atiixp_spdif_flush_dma(struct atiixp *chip)
844 {
845 int timeout;
846
847 /* DMA off, transfer on */
848 atiixp_spdif_enable_dma(chip, 0);
849 atiixp_spdif_enable_transfer(chip, 1);
850
851 timeout = 100;
852 do {
853 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
854 break;
855 udelay(1);
856 } while (timeout-- > 0);
857
858 atiixp_spdif_enable_transfer(chip, 0);
859 }
860
861 /* set up slots and formats for SPDIF OUT */
862 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
863 {
864 struct atiixp *chip = snd_pcm_substream_chip(substream);
865
866 spin_lock_irq(&chip->reg_lock);
867 if (chip->spdif_over_aclink) {
868 unsigned int data;
869 /* enable slots 10/11 */
870 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
871 ATI_REG_CMD_SPDF_CONFIG_01);
872 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
873 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
874 ATI_REG_OUT_DMA_SLOT_BIT(11);
875 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
876 atiixp_write(chip, OUT_DMA_SLOT, data);
877 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
878 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
879 ATI_REG_CMD_INTERLEAVE_OUT : 0);
880 } else {
881 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
882 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
883 }
884 spin_unlock_irq(&chip->reg_lock);
885 return 0;
886 }
887
888 /* set up slots and formats for analog OUT */
889 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
890 {
891 struct atiixp *chip = snd_pcm_substream_chip(substream);
892 unsigned int data;
893
894 spin_lock_irq(&chip->reg_lock);
895 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
896 switch (substream->runtime->channels) {
897 case 8:
898 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
899 ATI_REG_OUT_DMA_SLOT_BIT(11);
900 /* fallthru */
901 case 6:
902 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
903 ATI_REG_OUT_DMA_SLOT_BIT(8);
904 /* fallthru */
905 case 4:
906 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
907 ATI_REG_OUT_DMA_SLOT_BIT(9);
908 /* fallthru */
909 default:
910 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
911 ATI_REG_OUT_DMA_SLOT_BIT(4);
912 break;
913 }
914
915 /* set output threshold */
916 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
917 atiixp_write(chip, OUT_DMA_SLOT, data);
918
919 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
920 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
921 ATI_REG_CMD_INTERLEAVE_OUT : 0);
922
923 /*
924 * enable 6 channel re-ordering bit if needed
925 */
926 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
927 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
928
929 spin_unlock_irq(&chip->reg_lock);
930 return 0;
931 }
932
933 /* set up slots and formats for analog IN */
934 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
935 {
936 struct atiixp *chip = snd_pcm_substream_chip(substream);
937
938 spin_lock_irq(&chip->reg_lock);
939 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
940 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
941 ATI_REG_CMD_INTERLEAVE_IN : 0);
942 spin_unlock_irq(&chip->reg_lock);
943 return 0;
944 }
945
946 /*
947 * hw_params - allocate the buffer and set up buffer descriptors
948 */
949 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
950 struct snd_pcm_hw_params *hw_params)
951 {
952 struct atiixp *chip = snd_pcm_substream_chip(substream);
953 struct atiixp_dma *dma = substream->runtime->private_data;
954 int err;
955
956 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
957 if (err < 0)
958 return err;
959 dma->buf_addr = substream->runtime->dma_addr;
960 dma->buf_bytes = params_buffer_bytes(hw_params);
961
962 err = atiixp_build_dma_packets(chip, dma, substream,
963 params_periods(hw_params),
964 params_period_bytes(hw_params));
965 if (err < 0)
966 return err;
967
968 if (dma->ac97_pcm_type >= 0) {
969 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
970 /* PCM is bound to AC97 codec(s)
971 * set up the AC97 codecs
972 */
973 if (dma->pcm_open_flag) {
974 snd_ac97_pcm_close(pcm);
975 dma->pcm_open_flag = 0;
976 }
977 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
978 params_channels(hw_params),
979 pcm->r[0].slots);
980 if (err >= 0)
981 dma->pcm_open_flag = 1;
982 }
983
984 return err;
985 }
986
987 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
988 {
989 struct atiixp *chip = snd_pcm_substream_chip(substream);
990 struct atiixp_dma *dma = substream->runtime->private_data;
991
992 if (dma->pcm_open_flag) {
993 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
994 snd_ac97_pcm_close(pcm);
995 dma->pcm_open_flag = 0;
996 }
997 atiixp_clear_dma_packets(chip, dma, substream);
998 snd_pcm_lib_free_pages(substream);
999 return 0;
1000 }
1001
1002
1003 /*
1004 * pcm hardware definition, identical for all DMA types
1005 */
1006 static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1007 {
1008 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1009 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1010 SNDRV_PCM_INFO_PAUSE |
1011 SNDRV_PCM_INFO_RESUME |
1012 SNDRV_PCM_INFO_MMAP_VALID),
1013 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1014 .rates = SNDRV_PCM_RATE_48000,
1015 .rate_min = 48000,
1016 .rate_max = 48000,
1017 .channels_min = 2,
1018 .channels_max = 2,
1019 .buffer_bytes_max = 256 * 1024,
1020 .period_bytes_min = 32,
1021 .period_bytes_max = 128 * 1024,
1022 .periods_min = 2,
1023 .periods_max = ATI_MAX_DESCRIPTORS,
1024 };
1025
1026 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1027 struct atiixp_dma *dma, int pcm_type)
1028 {
1029 struct atiixp *chip = snd_pcm_substream_chip(substream);
1030 struct snd_pcm_runtime *runtime = substream->runtime;
1031 int err;
1032
1033 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1034 return -EINVAL;
1035
1036 if (dma->opened)
1037 return -EBUSY;
1038 dma->substream = substream;
1039 runtime->hw = snd_atiixp_pcm_hw;
1040 dma->ac97_pcm_type = pcm_type;
1041 if (pcm_type >= 0) {
1042 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1043 snd_pcm_limit_hw_rates(runtime);
1044 } else {
1045 /* direct SPDIF */
1046 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1047 }
1048 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1049 return err;
1050 runtime->private_data = dma;
1051
1052 /* enable DMA bits */
1053 spin_lock_irq(&chip->reg_lock);
1054 dma->ops->enable_dma(chip, 1);
1055 spin_unlock_irq(&chip->reg_lock);
1056 dma->opened = 1;
1057
1058 return 0;
1059 }
1060
1061 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1062 struct atiixp_dma *dma)
1063 {
1064 struct atiixp *chip = snd_pcm_substream_chip(substream);
1065 /* disable DMA bits */
1066 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1067 return -EINVAL;
1068 spin_lock_irq(&chip->reg_lock);
1069 dma->ops->enable_dma(chip, 0);
1070 spin_unlock_irq(&chip->reg_lock);
1071 dma->substream = NULL;
1072 dma->opened = 0;
1073 return 0;
1074 }
1075
1076 /*
1077 */
1078 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1079 {
1080 struct atiixp *chip = snd_pcm_substream_chip(substream);
1081 int err;
1082
1083 mutex_lock(&chip->open_mutex);
1084 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1085 mutex_unlock(&chip->open_mutex);
1086 if (err < 0)
1087 return err;
1088 substream->runtime->hw.channels_max = chip->max_channels;
1089 if (chip->max_channels > 2)
1090 /* channels must be even */
1091 snd_pcm_hw_constraint_step(substream->runtime, 0,
1092 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1093 return 0;
1094 }
1095
1096 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1097 {
1098 struct atiixp *chip = snd_pcm_substream_chip(substream);
1099 int err;
1100 mutex_lock(&chip->open_mutex);
1101 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1102 mutex_unlock(&chip->open_mutex);
1103 return err;
1104 }
1105
1106 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1107 {
1108 struct atiixp *chip = snd_pcm_substream_chip(substream);
1109 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1110 }
1111
1112 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1113 {
1114 struct atiixp *chip = snd_pcm_substream_chip(substream);
1115 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1116 }
1117
1118 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1119 {
1120 struct atiixp *chip = snd_pcm_substream_chip(substream);
1121 int err;
1122 mutex_lock(&chip->open_mutex);
1123 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1124 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1125 else
1126 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1127 mutex_unlock(&chip->open_mutex);
1128 return err;
1129 }
1130
1131 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1132 {
1133 struct atiixp *chip = snd_pcm_substream_chip(substream);
1134 int err;
1135 mutex_lock(&chip->open_mutex);
1136 if (chip->spdif_over_aclink)
1137 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1138 else
1139 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1140 mutex_unlock(&chip->open_mutex);
1141 return err;
1142 }
1143
1144 /* AC97 playback */
1145 static struct snd_pcm_ops snd_atiixp_playback_ops = {
1146 .open = snd_atiixp_playback_open,
1147 .close = snd_atiixp_playback_close,
1148 .ioctl = snd_pcm_lib_ioctl,
1149 .hw_params = snd_atiixp_pcm_hw_params,
1150 .hw_free = snd_atiixp_pcm_hw_free,
1151 .prepare = snd_atiixp_playback_prepare,
1152 .trigger = snd_atiixp_pcm_trigger,
1153 .pointer = snd_atiixp_pcm_pointer,
1154 };
1155
1156 /* AC97 capture */
1157 static struct snd_pcm_ops snd_atiixp_capture_ops = {
1158 .open = snd_atiixp_capture_open,
1159 .close = snd_atiixp_capture_close,
1160 .ioctl = snd_pcm_lib_ioctl,
1161 .hw_params = snd_atiixp_pcm_hw_params,
1162 .hw_free = snd_atiixp_pcm_hw_free,
1163 .prepare = snd_atiixp_capture_prepare,
1164 .trigger = snd_atiixp_pcm_trigger,
1165 .pointer = snd_atiixp_pcm_pointer,
1166 };
1167
1168 /* SPDIF playback */
1169 static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1170 .open = snd_atiixp_spdif_open,
1171 .close = snd_atiixp_spdif_close,
1172 .ioctl = snd_pcm_lib_ioctl,
1173 .hw_params = snd_atiixp_pcm_hw_params,
1174 .hw_free = snd_atiixp_pcm_hw_free,
1175 .prepare = snd_atiixp_spdif_prepare,
1176 .trigger = snd_atiixp_pcm_trigger,
1177 .pointer = snd_atiixp_pcm_pointer,
1178 };
1179
1180 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1181 /* front PCM */
1182 {
1183 .exclusive = 1,
1184 .r = { {
1185 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1186 (1 << AC97_SLOT_PCM_RIGHT) |
1187 (1 << AC97_SLOT_PCM_CENTER) |
1188 (1 << AC97_SLOT_PCM_SLEFT) |
1189 (1 << AC97_SLOT_PCM_SRIGHT) |
1190 (1 << AC97_SLOT_LFE)
1191 }
1192 }
1193 },
1194 /* PCM IN #1 */
1195 {
1196 .stream = 1,
1197 .exclusive = 1,
1198 .r = { {
1199 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1200 (1 << AC97_SLOT_PCM_RIGHT)
1201 }
1202 }
1203 },
1204 /* S/PDIF OUT (optional) */
1205 {
1206 .exclusive = 1,
1207 .spdif = 1,
1208 .r = { {
1209 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1210 (1 << AC97_SLOT_SPDIF_RIGHT2)
1211 }
1212 }
1213 },
1214 };
1215
1216 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1217 .type = ATI_DMA_PLAYBACK,
1218 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1219 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1220 .enable_dma = atiixp_out_enable_dma,
1221 .enable_transfer = atiixp_out_enable_transfer,
1222 .flush_dma = atiixp_out_flush_dma,
1223 };
1224
1225 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1226 .type = ATI_DMA_CAPTURE,
1227 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1228 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1229 .enable_dma = atiixp_in_enable_dma,
1230 .enable_transfer = atiixp_in_enable_transfer,
1231 .flush_dma = atiixp_in_flush_dma,
1232 };
1233
1234 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1235 .type = ATI_DMA_SPDIF,
1236 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1237 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1238 .enable_dma = atiixp_spdif_enable_dma,
1239 .enable_transfer = atiixp_spdif_enable_transfer,
1240 .flush_dma = atiixp_spdif_flush_dma,
1241 };
1242
1243
1244 static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1245 {
1246 struct snd_pcm *pcm;
1247 struct snd_ac97_bus *pbus = chip->ac97_bus;
1248 int err, i, num_pcms;
1249
1250 /* initialize constants */
1251 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1252 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1253 if (! chip->spdif_over_aclink)
1254 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1255
1256 /* assign AC97 pcm */
1257 if (chip->spdif_over_aclink)
1258 num_pcms = 3;
1259 else
1260 num_pcms = 2;
1261 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1262 if (err < 0)
1263 return err;
1264 for (i = 0; i < num_pcms; i++)
1265 chip->pcms[i] = &pbus->pcms[i];
1266
1267 chip->max_channels = 2;
1268 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1269 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1270 chip->max_channels = 6;
1271 else
1272 chip->max_channels = 4;
1273 }
1274
1275 /* PCM #0: analog I/O */
1276 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1277 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1278 if (err < 0)
1279 return err;
1280 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1281 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1282 pcm->private_data = chip;
1283 strcpy(pcm->name, "ATI IXP AC97");
1284 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1285
1286 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1287 snd_dma_pci_data(chip->pci),
1288 64*1024, 128*1024);
1289
1290 /* no SPDIF support on codec? */
1291 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1292 return 0;
1293
1294 if (chip->pcms[ATI_PCM_SPDIF])
1295 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1296
1297 /* PCM #1: spdif playback */
1298 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1299 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1300 if (err < 0)
1301 return err;
1302 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1303 pcm->private_data = chip;
1304 if (chip->spdif_over_aclink)
1305 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1306 else
1307 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1308 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1309
1310 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1311 snd_dma_pci_data(chip->pci),
1312 64*1024, 128*1024);
1313
1314 /* pre-select AC97 SPDIF slots 10/11 */
1315 for (i = 0; i < NUM_ATI_CODECS; i++) {
1316 if (chip->ac97[i])
1317 snd_ac97_update_bits(chip->ac97[i],
1318 AC97_EXTENDED_STATUS,
1319 0x03 << 4, 0x03 << 4);
1320 }
1321
1322 return 0;
1323 }
1324
1325
1326
1327 /*
1328 * interrupt handler
1329 */
1330 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1331 {
1332 struct atiixp *chip = dev_id;
1333 unsigned int status;
1334
1335 status = atiixp_read(chip, ISR);
1336
1337 if (! status)
1338 return IRQ_NONE;
1339
1340 /* process audio DMA */
1341 if (status & ATI_REG_ISR_OUT_XRUN)
1342 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1343 else if (status & ATI_REG_ISR_OUT_STATUS)
1344 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1345 if (status & ATI_REG_ISR_IN_XRUN)
1346 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1347 else if (status & ATI_REG_ISR_IN_STATUS)
1348 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1349 if (! chip->spdif_over_aclink) {
1350 if (status & ATI_REG_ISR_SPDF_XRUN)
1351 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1352 else if (status & ATI_REG_ISR_SPDF_STATUS)
1353 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1354 }
1355
1356 /* for codec detection */
1357 if (status & CODEC_CHECK_BITS) {
1358 unsigned int detected;
1359 detected = status & CODEC_CHECK_BITS;
1360 spin_lock(&chip->reg_lock);
1361 chip->codec_not_ready_bits |= detected;
1362 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1363 spin_unlock(&chip->reg_lock);
1364 }
1365
1366 /* ack */
1367 atiixp_write(chip, ISR, status);
1368
1369 return IRQ_HANDLED;
1370 }
1371
1372
1373 /*
1374 * ac97 mixer section
1375 */
1376
1377 static struct ac97_quirk ac97_quirks[] __devinitdata = {
1378 {
1379 .subvendor = 0x103c,
1380 .subdevice = 0x006b,
1381 .name = "HP Pavilion ZV5030US",
1382 .type = AC97_TUNE_MUTE_LED
1383 },
1384 {
1385 .subvendor = 0x103c,
1386 .subdevice = 0x308b,
1387 .name = "HP nx6125",
1388 .type = AC97_TUNE_MUTE_LED
1389 },
1390 {
1391 .subvendor = 0x103c,
1392 .subdevice = 0x3091,
1393 .name = "unknown HP",
1394 .type = AC97_TUNE_MUTE_LED
1395 },
1396 { } /* terminator */
1397 };
1398
1399 static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1400 const char *quirk_override)
1401 {
1402 struct snd_ac97_bus *pbus;
1403 struct snd_ac97_template ac97;
1404 int i, err;
1405 int codec_count;
1406 static struct snd_ac97_bus_ops ops = {
1407 .write = snd_atiixp_ac97_write,
1408 .read = snd_atiixp_ac97_read,
1409 };
1410 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1411 ATI_REG_ISR_CODEC0_NOT_READY,
1412 ATI_REG_ISR_CODEC1_NOT_READY,
1413 ATI_REG_ISR_CODEC2_NOT_READY,
1414 };
1415
1416 if (snd_atiixp_codec_detect(chip) < 0)
1417 return -ENXIO;
1418
1419 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1420 return err;
1421 pbus->clock = clock;
1422 chip->ac97_bus = pbus;
1423
1424 codec_count = 0;
1425 for (i = 0; i < NUM_ATI_CODECS; i++) {
1426 if (chip->codec_not_ready_bits & codec_skip[i])
1427 continue;
1428 memset(&ac97, 0, sizeof(ac97));
1429 ac97.private_data = chip;
1430 ac97.pci = chip->pci;
1431 ac97.num = i;
1432 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1433 if (! chip->spdif_over_aclink)
1434 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1435 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1436 chip->ac97[i] = NULL; /* to be sure */
1437 snd_printdd("atiixp: codec %d not available for audio\n", i);
1438 continue;
1439 }
1440 codec_count++;
1441 }
1442
1443 if (! codec_count) {
1444 snd_printk(KERN_ERR "atiixp: no codec available\n");
1445 return -ENODEV;
1446 }
1447
1448 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1449
1450 return 0;
1451 }
1452
1453
1454 #ifdef CONFIG_PM
1455 /*
1456 * power management
1457 */
1458 static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1459 {
1460 struct snd_card *card = pci_get_drvdata(pci);
1461 struct atiixp *chip = card->private_data;
1462 int i;
1463
1464 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1465 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1466 if (chip->pcmdevs[i]) {
1467 struct atiixp_dma *dma = &chip->dmas[i];
1468 if (dma->substream && dma->running)
1469 dma->saved_curptr = readl(chip->remap_addr +
1470 dma->ops->dt_cur);
1471 snd_pcm_suspend_all(chip->pcmdevs[i]);
1472 }
1473 for (i = 0; i < NUM_ATI_CODECS; i++)
1474 snd_ac97_suspend(chip->ac97[i]);
1475 snd_atiixp_aclink_down(chip);
1476 snd_atiixp_chip_stop(chip);
1477
1478 pci_disable_device(pci);
1479 pci_save_state(pci);
1480 pci_set_power_state(pci, pci_choose_state(pci, state));
1481 return 0;
1482 }
1483
1484 static int snd_atiixp_resume(struct pci_dev *pci)
1485 {
1486 struct snd_card *card = pci_get_drvdata(pci);
1487 struct atiixp *chip = card->private_data;
1488 int i;
1489
1490 pci_set_power_state(pci, PCI_D0);
1491 pci_restore_state(pci);
1492 if (pci_enable_device(pci) < 0) {
1493 printk(KERN_ERR "atiixp: pci_enable_device failed, "
1494 "disabling device\n");
1495 snd_card_disconnect(card);
1496 return -EIO;
1497 }
1498 pci_set_master(pci);
1499
1500 snd_atiixp_aclink_reset(chip);
1501 snd_atiixp_chip_start(chip);
1502
1503 for (i = 0; i < NUM_ATI_CODECS; i++)
1504 snd_ac97_resume(chip->ac97[i]);
1505
1506 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1507 if (chip->pcmdevs[i]) {
1508 struct atiixp_dma *dma = &chip->dmas[i];
1509 if (dma->substream && dma->suspended) {
1510 dma->ops->enable_dma(chip, 1);
1511 dma->substream->ops->prepare(dma->substream);
1512 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1513 chip->remap_addr + dma->ops->llp_offset);
1514 writel(dma->saved_curptr, chip->remap_addr +
1515 dma->ops->dt_cur);
1516 }
1517 }
1518
1519 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1520 return 0;
1521 }
1522 #endif /* CONFIG_PM */
1523
1524
1525 #ifdef CONFIG_PROC_FS
1526 /*
1527 * proc interface for register dump
1528 */
1529
1530 static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1531 struct snd_info_buffer *buffer)
1532 {
1533 struct atiixp *chip = entry->private_data;
1534 int i;
1535
1536 for (i = 0; i < 256; i += 4)
1537 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1538 }
1539
1540 static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1541 {
1542 struct snd_info_entry *entry;
1543
1544 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1545 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1546 }
1547 #else /* !CONFIG_PROC_FS */
1548 #define snd_atiixp_proc_init(chip)
1549 #endif
1550
1551
1552 /*
1553 * destructor
1554 */
1555
1556 static int snd_atiixp_free(struct atiixp *chip)
1557 {
1558 if (chip->irq < 0)
1559 goto __hw_end;
1560 snd_atiixp_chip_stop(chip);
1561
1562 __hw_end:
1563 if (chip->irq >= 0)
1564 free_irq(chip->irq, chip);
1565 if (chip->remap_addr)
1566 iounmap(chip->remap_addr);
1567 pci_release_regions(chip->pci);
1568 pci_disable_device(chip->pci);
1569 kfree(chip);
1570 return 0;
1571 }
1572
1573 static int snd_atiixp_dev_free(struct snd_device *device)
1574 {
1575 struct atiixp *chip = device->device_data;
1576 return snd_atiixp_free(chip);
1577 }
1578
1579 /*
1580 * constructor for chip instance
1581 */
1582 static int __devinit snd_atiixp_create(struct snd_card *card,
1583 struct pci_dev *pci,
1584 struct atiixp **r_chip)
1585 {
1586 static struct snd_device_ops ops = {
1587 .dev_free = snd_atiixp_dev_free,
1588 };
1589 struct atiixp *chip;
1590 int err;
1591
1592 if ((err = pci_enable_device(pci)) < 0)
1593 return err;
1594
1595 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1596 if (chip == NULL) {
1597 pci_disable_device(pci);
1598 return -ENOMEM;
1599 }
1600
1601 spin_lock_init(&chip->reg_lock);
1602 mutex_init(&chip->open_mutex);
1603 chip->card = card;
1604 chip->pci = pci;
1605 chip->irq = -1;
1606 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1607 pci_disable_device(pci);
1608 kfree(chip);
1609 return err;
1610 }
1611 chip->addr = pci_resource_start(pci, 0);
1612 chip->remap_addr = pci_ioremap_bar(pci, 0);
1613 if (chip->remap_addr == NULL) {
1614 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1615 snd_atiixp_free(chip);
1616 return -EIO;
1617 }
1618
1619 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1620 card->shortname, chip)) {
1621 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1622 snd_atiixp_free(chip);
1623 return -EBUSY;
1624 }
1625 chip->irq = pci->irq;
1626 pci_set_master(pci);
1627 synchronize_irq(chip->irq);
1628
1629 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1630 snd_atiixp_free(chip);
1631 return err;
1632 }
1633
1634 snd_card_set_dev(card, &pci->dev);
1635
1636 *r_chip = chip;
1637 return 0;
1638 }
1639
1640
1641 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1642 const struct pci_device_id *pci_id)
1643 {
1644 struct snd_card *card;
1645 struct atiixp *chip;
1646 int err;
1647
1648 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
1649 if (err < 0)
1650 return err;
1651
1652 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1653 strcpy(card->shortname, "ATI IXP");
1654 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1655 goto __error;
1656 card->private_data = chip;
1657
1658 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1659 goto __error;
1660
1661 chip->spdif_over_aclink = spdif_aclink;
1662
1663 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1664 goto __error;
1665
1666 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1667 goto __error;
1668
1669 snd_atiixp_proc_init(chip);
1670
1671 snd_atiixp_chip_start(chip);
1672
1673 snprintf(card->longname, sizeof(card->longname),
1674 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1675 pci->revision,
1676 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1677 chip->addr, chip->irq);
1678
1679 if ((err = snd_card_register(card)) < 0)
1680 goto __error;
1681
1682 pci_set_drvdata(pci, card);
1683 return 0;
1684
1685 __error:
1686 snd_card_free(card);
1687 return err;
1688 }
1689
1690 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1691 {
1692 snd_card_free(pci_get_drvdata(pci));
1693 pci_set_drvdata(pci, NULL);
1694 }
1695
1696 static struct pci_driver driver = {
1697 .name = "ATI IXP AC97 controller",
1698 .id_table = snd_atiixp_ids,
1699 .probe = snd_atiixp_probe,
1700 .remove = __devexit_p(snd_atiixp_remove),
1701 #ifdef CONFIG_PM
1702 .suspend = snd_atiixp_suspend,
1703 .resume = snd_atiixp_resume,
1704 #endif
1705 };
1706
1707
1708 static int __init alsa_card_atiixp_init(void)
1709 {
1710 return pci_register_driver(&driver);
1711 }
1712
1713 static void __exit alsa_card_atiixp_exit(void)
1714 {
1715 pci_unregister_driver(&driver);
1716 }
1717
1718 module_init(alsa_card_atiixp_init)
1719 module_exit(alsa_card_atiixp_exit)
Tomato firmware and modifications.