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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / video / vermilion / vermilion.c
blobd63242e7417c771868d0e33f36a224e1c4e326d5
1 /*
2 * Copyright (c) Intel Corp. 2007.
3 * All Rights Reserved.
4 *
5 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
6 * develop this driver.
7 *
8 * This file is part of the Vermilion Range fb driver.
9 * The Vermilion Range fb driver is free software;
10 * you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * The Vermilion Range fb driver is distributed
16 * in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 * Authors:
26 * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
27 * Michel Dänzer <michel-at-tungstengraphics-dot-com>
28 * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
29 */
30
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/mm.h>
38 #include <linux/fb.h>
39 #include <linux/pci.h>
40 #include <asm/cacheflush.h>
41 #include <asm/tlbflush.h>
42 #include <linux/mmzone.h>
43
44 /* #define VERMILION_DEBUG */
45
46 #include "vermilion.h"
47
48 #define MODULE_NAME "vmlfb"
49
50 #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
51
52 static struct mutex vml_mutex;
53 static struct list_head global_no_mode;
54 static struct list_head global_has_mode;
55 static struct fb_ops vmlfb_ops;
56 static struct vml_sys *subsys = NULL;
57 static char *vml_default_mode = "1024x768@60";
58 static struct fb_videomode defaultmode = {
59 NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
60 0, FB_VMODE_NONINTERLACED
61 };
62
63 static u32 vml_mem_requested = (10 * 1024 * 1024);
64 static u32 vml_mem_contig = (4 * 1024 * 1024);
65 static u32 vml_mem_min = (4 * 1024 * 1024);
66
67 static u32 vml_clocks[] = {
68 6750,
69 13500,
70 27000,
71 29700,
72 37125,
73 54000,
74 59400,
75 74250,
76 120000,
77 148500
78 };
79
80 static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
81
82 /*
83 * Allocate a contiguous vram area and make its linear kernel map
84 * uncached.
85 */
86
87 static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
88 unsigned min_order)
89 {
90 gfp_t flags;
91 unsigned long i;
92
93 max_order++;
94 do {
95 /*
96 * Really try hard to get the needed memory.
97 * We need memory below the first 32MB, so we
98 * add the __GFP_DMA flag that guarantees that we are
99 * below the first 16MB.
100 */
101
102 flags = __GFP_DMA | __GFP_HIGH;
103 va->logical =
104 __get_free_pages(flags, --max_order);
105 } while (va->logical == 0 && max_order > min_order);
106
107 if (!va->logical)
108 return -ENOMEM;
109
110 va->phys = virt_to_phys((void *)va->logical);
111 va->size = PAGE_SIZE << max_order;
112 va->order = max_order;
113
114
115 memset((void *)va->logical, 0x00, va->size);
116 for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
117 get_page(virt_to_page(i));
118 }
119
120 /*
121 * Change caching policy of the linear kernel map to avoid
122 * mapping type conflicts with user-space mappings.
123 */
124 set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
125
126 printk(KERN_DEBUG MODULE_NAME
127 ": Allocated %ld bytes vram area at 0x%08lx\n",
128 va->size, va->phys);
129
130 return 0;
131 }
132
133 /*
134 * Free a contiguous vram area and reset its linear kernel map
135 * mapping type.
136 */
137
138 static void vmlfb_free_vram_area(struct vram_area *va)
139 {
140 unsigned long j;
141
142 if (va->logical) {
143
144 /*
145 * Reset the linear kernel map caching policy.
146 */
147
148 set_pages_wb(virt_to_page(va->logical),
149 va->size >> PAGE_SHIFT);
150
151 /*
152 * Decrease the usage count on the pages we've used
153 * to compensate for upping when allocating.
154 */
155
156 for (j = va->logical; j < va->logical + va->size;
157 j += PAGE_SIZE) {
158 (void)put_page_testzero(virt_to_page(j));
159 }
160
161 printk(KERN_DEBUG MODULE_NAME
162 ": Freeing %ld bytes vram area at 0x%08lx\n",
163 va->size, va->phys);
164 free_pages(va->logical, va->order);
165
166 va->logical = 0;
167 }
168 }
169
170 /*
171 * Free allocated vram.
172 */
173
174 static void vmlfb_free_vram(struct vml_info *vinfo)
175 {
176 int i;
177
178 for (i = 0; i < vinfo->num_areas; ++i) {
179 vmlfb_free_vram_area(&vinfo->vram[i]);
180 }
181 vinfo->num_areas = 0;
182 }
183
184 /*
185 * Allocate vram. Currently we try to allocate contiguous areas from the
186 * __GFP_DMA zone and puzzle them together. A better approach would be to
187 * allocate one contiguous area for scanout and use one-page allocations for
188 * offscreen areas. This requires user-space and GPU virtual mappings.
189 */
190
191 static int vmlfb_alloc_vram(struct vml_info *vinfo,
192 size_t requested,
193 size_t min_total, size_t min_contig)
194 {
195 int i, j;
196 int order;
197 int contiguous;
198 int err;
199 struct vram_area *va;
200 struct vram_area *va2;
201
202 vinfo->num_areas = 0;
203 for (i = 0; i < VML_VRAM_AREAS; ++i) {
204 va = &vinfo->vram[i];
205 order = 0;
206
207 while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
208 order++;
209
210 err = vmlfb_alloc_vram_area(va, order, 0);
211
212 if (err)
213 break;
214
215 if (i == 0) {
216 vinfo->vram_start = va->phys;
217 vinfo->vram_logical = (void __iomem *) va->logical;
218 vinfo->vram_contig_size = va->size;
219 vinfo->num_areas = 1;
220 } else {
221 contiguous = 0;
222
223 for (j = 0; j < i; ++j) {
224 va2 = &vinfo->vram[j];
225 if (va->phys + va->size == va2->phys ||
226 va2->phys + va2->size == va->phys) {
227 contiguous = 1;
228 break;
229 }
230 }
231
232 if (contiguous) {
233 vinfo->num_areas++;
234 if (va->phys < vinfo->vram_start) {
235 vinfo->vram_start = va->phys;
236 vinfo->vram_logical =
237 (void __iomem *)va->logical;
238 }
239 vinfo->vram_contig_size += va->size;
240 } else {
241 vmlfb_free_vram_area(va);
242 break;
243 }
244 }
245
246 if (requested < va->size)
247 break;
248 else
249 requested -= va->size;
250 }
251
252 if (vinfo->vram_contig_size > min_total &&
253 vinfo->vram_contig_size > min_contig) {
254
255 printk(KERN_DEBUG MODULE_NAME
256 ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
257 (unsigned long)vinfo->vram_contig_size,
258 (unsigned long)vinfo->vram_start);
259
260 return 0;
261 }
262
263 printk(KERN_ERR MODULE_NAME
264 ": Could not allocate requested minimal amount of vram.\n");
265
266 vmlfb_free_vram(vinfo);
267
268 return -ENOMEM;
269 }
270
271 /*
272 * Find the GPU to use with our display controller.
273 */
274
275 static int vmlfb_get_gpu(struct vml_par *par)
276 {
277 mutex_lock(&vml_mutex);
278
279 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
280
281 if (!par->gpu) {
282 mutex_unlock(&vml_mutex);
283 return -ENODEV;
284 }
285
286 mutex_unlock(&vml_mutex);
287
288 if (pci_enable_device(par->gpu) < 0)
289 return -ENODEV;
290
291 return 0;
292 }
293
294 /*
295 * Find a contiguous vram area that contains a given offset from vram start.
296 */
297 static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
298 {
299 unsigned long aoffset;
300 unsigned i;
301
302 for (i = 0; i < vinfo->num_areas; ++i) {
303 aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
304
305 if (aoffset < vinfo->vram[i].size) {
306 return 0;
307 }
308 }
309
310 return -EINVAL;
311 }
312
313 /*
314 * Remap the MMIO register spaces of the VDC and the GPU.
315 */
316
317 static int vmlfb_enable_mmio(struct vml_par *par)
318 {
319 int err;
320
321 par->vdc_mem_base = pci_resource_start(par->vdc, 0);
322 par->vdc_mem_size = pci_resource_len(par->vdc, 0);
323 if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
324 printk(KERN_ERR MODULE_NAME
325 ": Could not claim display controller MMIO.\n");
326 return -EBUSY;
327 }
328 par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
329 if (par->vdc_mem == NULL) {
330 printk(KERN_ERR MODULE_NAME
331 ": Could not map display controller MMIO.\n");
332 err = -ENOMEM;
333 goto out_err_0;
334 }
335
336 par->gpu_mem_base = pci_resource_start(par->gpu, 0);
337 par->gpu_mem_size = pci_resource_len(par->gpu, 0);
338 if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
339 printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
340 err = -EBUSY;
341 goto out_err_1;
342 }
343 par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
344 if (par->gpu_mem == NULL) {
345 printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
346 err = -ENOMEM;
347 goto out_err_2;
348 }
349
350 return 0;
351
352 out_err_2:
353 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
354 out_err_1:
355 iounmap(par->vdc_mem);
356 out_err_0:
357 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
358 return err;
359 }
360
361 /*
362 * Unmap the VDC and GPU register spaces.
363 */
364
365 static void vmlfb_disable_mmio(struct vml_par *par)
366 {
367 iounmap(par->gpu_mem);
368 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
369 iounmap(par->vdc_mem);
370 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
371 }
372
373 /*
374 * Release and uninit the VDC and GPU.
375 */
376
377 static void vmlfb_release_devices(struct vml_par *par)
378 {
379 if (atomic_dec_and_test(&par->refcount)) {
380 pci_set_drvdata(par->vdc, NULL);
381 pci_disable_device(par->gpu);
382 pci_disable_device(par->vdc);
383 }
384 }
385
386 /*
387 * Free up allocated resources for a device.
388 */
389
390 static void __devexit vml_pci_remove(struct pci_dev *dev)
391 {
392 struct fb_info *info;
393 struct vml_info *vinfo;
394 struct vml_par *par;
395
396 info = pci_get_drvdata(dev);
397 if (info) {
398 vinfo = container_of(info, struct vml_info, info);
399 par = vinfo->par;
400 mutex_lock(&vml_mutex);
401 unregister_framebuffer(info);
402 fb_dealloc_cmap(&info->cmap);
403 vmlfb_free_vram(vinfo);
404 vmlfb_disable_mmio(par);
405 vmlfb_release_devices(par);
406 kfree(vinfo);
407 kfree(par);
408 mutex_unlock(&vml_mutex);
409 }
410 }
411
412 static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
413 {
414 switch (var->bits_per_pixel) {
415 case 16:
416 var->blue.offset = 0;
417 var->blue.length = 5;
418 var->green.offset = 5;
419 var->green.length = 5;
420 var->red.offset = 10;
421 var->red.length = 5;
422 var->transp.offset = 15;
423 var->transp.length = 1;
424 break;
425 case 32:
426 var->blue.offset = 0;
427 var->blue.length = 8;
428 var->green.offset = 8;
429 var->green.length = 8;
430 var->red.offset = 16;
431 var->red.length = 8;
432 var->transp.offset = 24;
433 var->transp.length = 0;
434 break;
435 default:
436 break;
437 }
438
439 var->blue.msb_right = var->green.msb_right =
440 var->red.msb_right = var->transp.msb_right = 0;
441 }
442
443 /*
444 * Device initialization.
445 * We initialize one vml_par struct per device and one vml_info
446 * struct per pipe. Currently we have only one pipe.
447 */
448
449 static int __devinit vml_pci_probe(struct pci_dev *dev,
450 const struct pci_device_id *id)
451 {
452 struct vml_info *vinfo;
453 struct fb_info *info;
454 struct vml_par *par;
455 int err = 0;
456
457 par = kzalloc(sizeof(*par), GFP_KERNEL);
458 if (par == NULL)
459 return -ENOMEM;
460
461 vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
462 if (vinfo == NULL) {
463 err = -ENOMEM;
464 goto out_err_0;
465 }
466
467 vinfo->par = par;
468 par->vdc = dev;
469 atomic_set(&par->refcount, 1);
470
471 switch (id->device) {
472 case VML_DEVICE_VDC:
473 if ((err = vmlfb_get_gpu(par)))
474 goto out_err_1;
475 pci_set_drvdata(dev, &vinfo->info);
476 break;
477 default:
478 err = -ENODEV;
479 goto out_err_1;
480 break;
481 }
482
483 info = &vinfo->info;
484 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
485
486 err = vmlfb_enable_mmio(par);
487 if (err)
488 goto out_err_2;
489
490 err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
491 vml_mem_contig, vml_mem_min);
492 if (err)
493 goto out_err_3;
494
495 strcpy(info->fix.id, "Vermilion Range");
496 info->fix.mmio_start = 0;
497 info->fix.mmio_len = 0;
498 info->fix.smem_start = vinfo->vram_start;
499 info->fix.smem_len = vinfo->vram_contig_size;
500 info->fix.type = FB_TYPE_PACKED_PIXELS;
501 info->fix.visual = FB_VISUAL_TRUECOLOR;
502 info->fix.ypanstep = 1;
503 info->fix.xpanstep = 1;
504 info->fix.ywrapstep = 0;
505 info->fix.accel = FB_ACCEL_NONE;
506 info->screen_base = vinfo->vram_logical;
507 info->pseudo_palette = vinfo->pseudo_palette;
508 info->par = par;
509 info->fbops = &vmlfb_ops;
510 info->device = &dev->dev;
511
512 INIT_LIST_HEAD(&vinfo->head);
513 vinfo->pipe_disabled = 1;
514 vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
515
516 info->var.grayscale = 0;
517 info->var.bits_per_pixel = 16;
518 vmlfb_set_pref_pixel_format(&info->var);
519
520 if (!fb_find_mode
521 (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
522 printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
523 }
524
525 if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
526 err = -ENOMEM;
527 goto out_err_4;
528 }
529
530 err = register_framebuffer(info);
531 if (err) {
532 printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
533 goto out_err_5;
534 }
535
536 printk("Initialized vmlfb\n");
537
538 return 0;
539
540 out_err_5:
541 fb_dealloc_cmap(&info->cmap);
542 out_err_4:
543 vmlfb_free_vram(vinfo);
544 out_err_3:
545 vmlfb_disable_mmio(par);
546 out_err_2:
547 vmlfb_release_devices(par);
548 out_err_1:
549 kfree(vinfo);
550 out_err_0:
551 kfree(par);
552 return err;
553 }
554
555 static int vmlfb_open(struct fb_info *info, int user)
556 {
557 /*
558 * Save registers here?
559 */
560 return 0;
561 }
562
563 static int vmlfb_release(struct fb_info *info, int user)
564 {
565 /*
566 * Restore registers here.
567 */
568
569 return 0;
570 }
571
572 static int vml_nearest_clock(int clock)
573 {
574
575 int i;
576 int cur_index;
577 int cur_diff;
578 int diff;
579
580 cur_index = 0;
581 cur_diff = clock - vml_clocks[0];
582 cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
583 for (i = 1; i < vml_num_clocks; ++i) {
584 diff = clock - vml_clocks[i];
585 diff = (diff < 0) ? -diff : diff;
586 if (diff < cur_diff) {
587 cur_index = i;
588 cur_diff = diff;
589 }
590 }
591 return vml_clocks[cur_index];
592 }
593
594 static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
595 struct vml_info *vinfo)
596 {
597 u32 pitch;
598 u64 mem;
599 int nearest_clock;
600 int clock;
601 int clock_diff;
602 struct fb_var_screeninfo v;
603
604 v = *var;
605 clock = PICOS2KHZ(var->pixclock);
606
607 if (subsys && subsys->nearest_clock) {
608 nearest_clock = subsys->nearest_clock(subsys, clock);
609 } else {
610 nearest_clock = vml_nearest_clock(clock);
611 }
612
613 /*
614 * Accept a 20% diff.
615 */
616
617 clock_diff = nearest_clock - clock;
618 clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
619 if (clock_diff > clock / 5) {
620 return -EINVAL;
621 }
622
623 v.pixclock = KHZ2PICOS(nearest_clock);
624
625 if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
626 printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
627 return -EINVAL;
628 }
629 if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
630 printk(KERN_DEBUG MODULE_NAME
631 ": Virtual resolution failure.\n");
632 return -EINVAL;
633 }
634 switch (v.bits_per_pixel) {
635 case 0 ... 16:
636 v.bits_per_pixel = 16;
637 break;
638 case 17 ... 32:
639 v.bits_per_pixel = 32;
640 break;
641 default:
642 printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
643 var->bits_per_pixel);
644 return -EINVAL;
645 }
646
647 pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
648 mem = pitch * var->yres_virtual;
649 if (mem > vinfo->vram_contig_size) {
650 return -ENOMEM;
651 }
652
653 switch (v.bits_per_pixel) {
654 case 16:
655 if (var->blue.offset != 0 ||
656 var->blue.length != 5 ||
657 var->green.offset != 5 ||
658 var->green.length != 5 ||
659 var->red.offset != 10 ||
660 var->red.length != 5 ||
661 var->transp.offset != 15 || var->transp.length != 1) {
662 vmlfb_set_pref_pixel_format(&v);
663 }
664 break;
665 case 32:
666 if (var->blue.offset != 0 ||
667 var->blue.length != 8 ||
668 var->green.offset != 8 ||
669 var->green.length != 8 ||
670 var->red.offset != 16 ||
671 var->red.length != 8 ||
672 (var->transp.length != 0 && var->transp.length != 8) ||
673 (var->transp.length == 8 && var->transp.offset != 24)) {
674 vmlfb_set_pref_pixel_format(&v);
675 }
676 break;
677 default:
678 return -EINVAL;
679 }
680
681 *var = v;
682
683 return 0;
684 }
685
686 static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
687 {
688 struct vml_info *vinfo = container_of(info, struct vml_info, info);
689 int ret;
690
691 mutex_lock(&vml_mutex);
692 ret = vmlfb_check_var_locked(var, vinfo);
693 mutex_unlock(&vml_mutex);
694
695 return ret;
696 }
697
698 static void vml_wait_vblank(struct vml_info *vinfo)
699 {
700 /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
701 mdelay(20);
702 }
703
704 static void vmlfb_disable_pipe(struct vml_info *vinfo)
705 {
706 struct vml_par *par = vinfo->par;
707
708 /* Disable the MDVO pad */
709 VML_WRITE32(par, VML_RCOMPSTAT, 0);
710 while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
711
712 /* Disable display planes */
713 VML_WRITE32(par, VML_DSPCCNTR,
714 VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
715 (void)VML_READ32(par, VML_DSPCCNTR);
716 /* Wait for vblank for the disable to take effect */
717 vml_wait_vblank(vinfo);
718
719 /* Next, disable display pipes */
720 VML_WRITE32(par, VML_PIPEACONF, 0);
721 (void)VML_READ32(par, VML_PIPEACONF);
722
723 vinfo->pipe_disabled = 1;
724 }
725
726 #ifdef VERMILION_DEBUG
727 static void vml_dump_regs(struct vml_info *vinfo)
728 {
729 struct vml_par *par = vinfo->par;
730
731 printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
732 printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
733 (unsigned)VML_READ32(par, VML_HTOTAL_A));
734 printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
735 (unsigned)VML_READ32(par, VML_HBLANK_A));
736 printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
737 (unsigned)VML_READ32(par, VML_HSYNC_A));
738 printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
739 (unsigned)VML_READ32(par, VML_VTOTAL_A));
740 printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
741 (unsigned)VML_READ32(par, VML_VBLANK_A));
742 printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
743 (unsigned)VML_READ32(par, VML_VSYNC_A));
744 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
745 (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
746 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
747 (unsigned)VML_READ32(par, VML_DSPCSIZE));
748 printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
749 (unsigned)VML_READ32(par, VML_DSPCPOS));
750 printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
751 (unsigned)VML_READ32(par, VML_DSPARB));
752 printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
753 (unsigned)VML_READ32(par, VML_DSPCADDR));
754 printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
755 (unsigned)VML_READ32(par, VML_BCLRPAT_A));
756 printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
757 (unsigned)VML_READ32(par, VML_CANVSCLR_A));
758 printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
759 (unsigned)VML_READ32(par, VML_PIPEASRC));
760 printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
761 (unsigned)VML_READ32(par, VML_PIPEACONF));
762 printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
763 (unsigned)VML_READ32(par, VML_DSPCCNTR));
764 printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
765 (unsigned)VML_READ32(par, VML_RCOMPSTAT));
766 printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
767 }
768 #endif
769
770 static int vmlfb_set_par_locked(struct vml_info *vinfo)
771 {
772 struct vml_par *par = vinfo->par;
773 struct fb_info *info = &vinfo->info;
774 struct fb_var_screeninfo *var = &info->var;
775 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
776 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
777 u32 dspcntr;
778 int clock;
779
780 vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
781 vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
782 info->fix.line_length = vinfo->stride;
783
784 if (!subsys)
785 return 0;
786
787 htotal =
788 var->xres + var->right_margin + var->hsync_len + var->left_margin;
789 hactive = var->xres;
790 hblank_start = var->xres;
791 hblank_end = htotal;
792 hsync_start = hactive + var->right_margin;
793 hsync_end = hsync_start + var->hsync_len;
794
795 vtotal =
796 var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
797 vactive = var->yres;
798 vblank_start = var->yres;
799 vblank_end = vtotal;
800 vsync_start = vactive + var->lower_margin;
801 vsync_end = vsync_start + var->vsync_len;
802
803 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
804 clock = PICOS2KHZ(var->pixclock);
805
806 if (subsys->nearest_clock) {
807 clock = subsys->nearest_clock(subsys, clock);
808 } else {
809 clock = vml_nearest_clock(clock);
810 }
811 printk(KERN_DEBUG MODULE_NAME
812 ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
813 ((clock / htotal) * 1000) / vtotal);
814
815 switch (var->bits_per_pixel) {
816 case 16:
817 dspcntr |= VML_GFX_ARGB1555;
818 break;
819 case 32:
820 if (var->transp.length == 8)
821 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
822 else
823 dspcntr |= VML_GFX_RGB0888;
824 break;
825 default:
826 return -EINVAL;
827 }
828
829 vmlfb_disable_pipe(vinfo);
830 mb();
831
832 if (subsys->set_clock)
833 subsys->set_clock(subsys, clock);
834 else
835 return -EINVAL;
836
837 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
838 VML_WRITE32(par, VML_HBLANK_A,
839 ((hblank_end - 1) << 16) | (hblank_start - 1));
840 VML_WRITE32(par, VML_HSYNC_A,
841 ((hsync_end - 1) << 16) | (hsync_start - 1));
842 VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
843 VML_WRITE32(par, VML_VBLANK_A,
844 ((vblank_end - 1) << 16) | (vblank_start - 1));
845 VML_WRITE32(par, VML_VSYNC_A,
846 ((vsync_end - 1) << 16) | (vsync_start - 1));
847 VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
848 VML_WRITE32(par, VML_DSPCSIZE,
849 ((var->yres - 1) << 16) | (var->xres - 1));
850 VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
851 VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
852 VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
853 VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
854 VML_WRITE32(par, VML_PIPEASRC,
855 ((var->xres - 1) << 16) | (var->yres - 1));
856
857 wmb();
858 VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
859 wmb();
860 VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
861 wmb();
862 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
863 var->yoffset * vinfo->stride +
864 var->xoffset * vinfo->bytes_per_pixel);
865
866 VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
867
868 while (!(VML_READ32(par, VML_RCOMPSTAT) &
869 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
870
871 vinfo->pipe_disabled = 0;
872 #ifdef VERMILION_DEBUG
873 vml_dump_regs(vinfo);
874 #endif
875
876 return 0;
877 }
878
879 static int vmlfb_set_par(struct fb_info *info)
880 {
881 struct vml_info *vinfo = container_of(info, struct vml_info, info);
882 int ret;
883
884 mutex_lock(&vml_mutex);
885 list_del(&vinfo->head);
886 list_add(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
887 ret = vmlfb_set_par_locked(vinfo);
888
889 mutex_unlock(&vml_mutex);
890 return ret;
891 }
892
893 static int vmlfb_blank_locked(struct vml_info *vinfo)
894 {
895 struct vml_par *par = vinfo->par;
896 u32 cur = VML_READ32(par, VML_PIPEACONF);
897
898 switch (vinfo->cur_blank_mode) {
899 case FB_BLANK_UNBLANK:
900 if (vinfo->pipe_disabled) {
901 vmlfb_set_par_locked(vinfo);
902 }
903 VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
904 (void)VML_READ32(par, VML_PIPEACONF);
905 break;
906 case FB_BLANK_NORMAL:
907 if (vinfo->pipe_disabled) {
908 vmlfb_set_par_locked(vinfo);
909 }
910 VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
911 (void)VML_READ32(par, VML_PIPEACONF);
912 break;
913 case FB_BLANK_VSYNC_SUSPEND:
914 case FB_BLANK_HSYNC_SUSPEND:
915 if (!vinfo->pipe_disabled) {
916 vmlfb_disable_pipe(vinfo);
917 }
918 break;
919 case FB_BLANK_POWERDOWN:
920 if (!vinfo->pipe_disabled) {
921 vmlfb_disable_pipe(vinfo);
922 }
923 break;
924 default:
925 return -EINVAL;
926 }
927
928 return 0;
929 }
930
931 static int vmlfb_blank(int blank_mode, struct fb_info *info)
932 {
933 struct vml_info *vinfo = container_of(info, struct vml_info, info);
934 int ret;
935
936 mutex_lock(&vml_mutex);
937 vinfo->cur_blank_mode = blank_mode;
938 ret = vmlfb_blank_locked(vinfo);
939 mutex_unlock(&vml_mutex);
940 return ret;
941 }
942
943 static int vmlfb_pan_display(struct fb_var_screeninfo *var,
944 struct fb_info *info)
945 {
946 struct vml_info *vinfo = container_of(info, struct vml_info, info);
947 struct vml_par *par = vinfo->par;
948
949 mutex_lock(&vml_mutex);
950 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
951 var->yoffset * vinfo->stride +
952 var->xoffset * vinfo->bytes_per_pixel);
953 (void)VML_READ32(par, VML_DSPCADDR);
954 mutex_unlock(&vml_mutex);
955
956 return 0;
957 }
958
959 static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
960 u_int transp, struct fb_info *info)
961 {
962 u32 v;
963
964 if (regno >= 16)
965 return -EINVAL;
966
967 if (info->var.grayscale) {
968 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
969 }
970
971 if (info->fix.visual != FB_VISUAL_TRUECOLOR)
972 return -EINVAL;
973
974 red = VML_TOHW(red, info->var.red.length);
975 blue = VML_TOHW(blue, info->var.blue.length);
976 green = VML_TOHW(green, info->var.green.length);
977 transp = VML_TOHW(transp, info->var.transp.length);
978
979 v = (red << info->var.red.offset) |
980 (green << info->var.green.offset) |
981 (blue << info->var.blue.offset) |
982 (transp << info->var.transp.offset);
983
984 switch (info->var.bits_per_pixel) {
985 case 16:
986 ((u32 *) info->pseudo_palette)[regno] = v;
987 break;
988 case 24:
989 case 32:
990 ((u32 *) info->pseudo_palette)[regno] = v;
991 break;
992 }
993 return 0;
994 }
995
996 static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
997 {
998 struct vml_info *vinfo = container_of(info, struct vml_info, info);
999 unsigned long size = vma->vm_end - vma->vm_start;
1000 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1001 int ret;
1002
1003 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
1004 return -EINVAL;
1005 if (offset + size > vinfo->vram_contig_size)
1006 return -EINVAL;
1007 ret = vmlfb_vram_offset(vinfo, offset);
1008 if (ret)
1009 return -EINVAL;
1010 offset += vinfo->vram_start;
1011 pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
1012 pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
1013 vma->vm_flags |= VM_RESERVED | VM_IO;
1014 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
1015 size, vma->vm_page_prot))
1016 return -EAGAIN;
1017 return 0;
1018 }
1019
1020 static int vmlfb_sync(struct fb_info *info)
1021 {
1022 return 0;
1023 }
1024
1025 static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1026 {
1027 return -EINVAL; /* just to force soft_cursor() call */
1028 }
1029
1030 static struct fb_ops vmlfb_ops = {
1031 .owner = THIS_MODULE,
1032 .fb_open = vmlfb_open,
1033 .fb_release = vmlfb_release,
1034 .fb_check_var = vmlfb_check_var,
1035 .fb_set_par = vmlfb_set_par,
1036 .fb_blank = vmlfb_blank,
1037 .fb_pan_display = vmlfb_pan_display,
1038 .fb_fillrect = cfb_fillrect,
1039 .fb_copyarea = cfb_copyarea,
1040 .fb_imageblit = cfb_imageblit,
1041 .fb_cursor = vmlfb_cursor,
1042 .fb_sync = vmlfb_sync,
1043 .fb_mmap = vmlfb_mmap,
1044 .fb_setcolreg = vmlfb_setcolreg
1045 };
1046
1047 static struct pci_device_id vml_ids[] = {
1048 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1049 {0}
1050 };
1051
1052 static struct pci_driver vmlfb_pci_driver = {
1053 .name = "vmlfb",
1054 .id_table = vml_ids,
1055 .probe = vml_pci_probe,
1056 .remove = __devexit_p(vml_pci_remove)
1057 };
1058
1059 static void __exit vmlfb_cleanup(void)
1060 {
1061 pci_unregister_driver(&vmlfb_pci_driver);
1062 }
1063
1064 static int __init vmlfb_init(void)
1065 {
1066
1067 #ifndef MODULE
1068 char *option = NULL;
1069
1070 if (fb_get_options(MODULE_NAME, &option))
1071 return -ENODEV;
1072 #endif
1073
1074 printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1075 mutex_init(&vml_mutex);
1076 INIT_LIST_HEAD(&global_no_mode);
1077 INIT_LIST_HEAD(&global_has_mode);
1078
1079 return pci_register_driver(&vmlfb_pci_driver);
1080 }
1081
1082 int vmlfb_register_subsys(struct vml_sys *sys)
1083 {
1084 struct vml_info *entry;
1085 struct list_head *list;
1086 u32 save_activate;
1087
1088 mutex_lock(&vml_mutex);
1089 if (subsys != NULL) {
1090 subsys->restore(subsys);
1091 }
1092 subsys = sys;
1093 subsys->save(subsys);
1094
1095 /*
1096 * We need to restart list traversal for each item, since we
1097 * release the list mutex in the loop.
1098 */
1099
1100 list = global_no_mode.next;
1101 while (list != &global_no_mode) {
1102 list_del_init(list);
1103 entry = list_entry(list, struct vml_info, head);
1104
1105 /*
1106 * First, try the current mode which might not be
1107 * completely validated with respect to the pixel clock.
1108 */
1109
1110 if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1111 vmlfb_set_par_locked(entry);
1112 list_add_tail(list, &global_has_mode);
1113 } else {
1114
1115 /*
1116 * Didn't work. Try to find another mode,
1117 * that matches this subsys.
1118 */
1119
1120 mutex_unlock(&vml_mutex);
1121 save_activate = entry->info.var.activate;
1122 entry->info.var.bits_per_pixel = 16;
1123 vmlfb_set_pref_pixel_format(&entry->info.var);
1124 if (fb_find_mode(&entry->info.var,
1125 &entry->info,
1126 vml_default_mode, NULL, 0, NULL, 16)) {
1127 entry->info.var.activate |=
1128 FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1129 fb_set_var(&entry->info, &entry->info.var);
1130 } else {
1131 printk(KERN_ERR MODULE_NAME
1132 ": Sorry. no mode found for this subsys.\n");
1133 }
1134 entry->info.var.activate = save_activate;
1135 mutex_lock(&vml_mutex);
1136 }
1137 vmlfb_blank_locked(entry);
1138 list = global_no_mode.next;
1139 }
1140 mutex_unlock(&vml_mutex);
1141
1142 printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1143 subsys->name ? subsys->name : "unknown");
1144 return 0;
1145 }
1146
1147 EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1148
1149 void vmlfb_unregister_subsys(struct vml_sys *sys)
1150 {
1151 struct vml_info *entry, *next;
1152
1153 mutex_lock(&vml_mutex);
1154 if (subsys != sys) {
1155 mutex_unlock(&vml_mutex);
1156 return;
1157 }
1158 subsys->restore(subsys);
1159 subsys = NULL;
1160 list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1161 printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1162 vmlfb_disable_pipe(entry);
1163 list_del(&entry->head);
1164 list_add_tail(&entry->head, &global_no_mode);
1165 }
1166 mutex_unlock(&vml_mutex);
1167 }
1168
1169 EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1170
1171 module_init(vmlfb_init);
1172 module_exit(vmlfb_cleanup);
1173
1174 MODULE_AUTHOR("Tungsten Graphics");
1175 MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1176 MODULE_VERSION("1.0.0");
1177 MODULE_LICENSE("GPL");
Tomato firmware and modifications.