?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / video / neofb.c
blobc547d1fa319984febd9fe33ae05f8a3ae96315dc
1 /*
2 * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
3 *
4 * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org>
5 *
6 *
7 * Card specific code is based on XFree86's neomagic driver.
8 * Framebuffer framework code is based on code of cyber2000fb.
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
13 *
14 *
15 * 0.4.1
16 * - Cosmetic changes (dok)
17 *
18 * 0.4
19 * - Toshiba Libretto support, allow modes larger than LCD size if
20 * LCD is disabled, keep BIOS settings if internal/external display
21 * haven't been enabled explicitly
22 * (Thomas J. Moore <dark@mama.indstate.edu>)
23 *
24 * 0.3.3
25 * - Porting over to new fbdev api. (jsimmons)
26 *
27 * 0.3.2
28 * - got rid of all floating point (dok)
29 *
30 * 0.3.1
31 * - added module license (dok)
32 *
33 * 0.3
34 * - hardware accelerated clear and move for 2200 and above (dok)
35 * - maximum allowed dotclock is handled now (dok)
36 *
37 * 0.2.1
38 * - correct panning after X usage (dok)
39 * - added module and kernel parameters (dok)
40 * - no stretching if external display is enabled (dok)
41 *
42 * 0.2
43 * - initial version (dok)
44 *
45 *
46 * TODO
47 * - ioctl for internal/external switching
48 * - blanking
49 * - 32bit depth support, maybe impossible
50 * - disable pan-on-sync, need specs
51 *
52 * BUGS
53 * - white margin on bootup like with tdfxfb (colormap problem?)
54 *
55 */
56
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/errno.h>
60 #include <linux/string.h>
61 #include <linux/mm.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/fb.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #ifdef CONFIG_TOSHIBA
68 #include <linux/toshiba.h>
69 #endif
70
71 #include <asm/io.h>
72 #include <asm/irq.h>
73 #include <asm/pgtable.h>
74 #include <asm/system.h>
75
76 #ifdef CONFIG_MTRR
77 #include <asm/mtrr.h>
78 #endif
79
80 #include <video/vga.h>
81 #include <video/neomagic.h>
82
83 #define NEOFB_VERSION "0.4.2"
84
85 /* --------------------------------------------------------------------- */
86
87 static int internal;
88 static int external;
89 static int libretto;
90 static int nostretch;
91 static int nopciburst;
92 static char *mode_option __devinitdata = NULL;
93
94 #ifdef MODULE
95
96 MODULE_AUTHOR("(c) 2001-2002 Denis Oliver Kropp <dok@convergence.de>");
97 MODULE_LICENSE("GPL");
98 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
99 module_param(internal, bool, 0);
100 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
101 module_param(external, bool, 0);
102 MODULE_PARM_DESC(external, "Enable output on external CRT.");
103 module_param(libretto, bool, 0);
104 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
105 module_param(nostretch, bool, 0);
106 MODULE_PARM_DESC(nostretch,
107 "Disable stretching of modes smaller than LCD.");
108 module_param(nopciburst, bool, 0);
109 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
110 module_param(mode_option, charp, 0);
111 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
112
113 #endif
114
115
116 /* --------------------------------------------------------------------- */
117
118 static biosMode bios8[] = {
119 {320, 240, 0x40},
120 {300, 400, 0x42},
121 {640, 400, 0x20},
122 {640, 480, 0x21},
123 {800, 600, 0x23},
124 {1024, 768, 0x25},
125 };
126
127 static biosMode bios16[] = {
128 {320, 200, 0x2e},
129 {320, 240, 0x41},
130 {300, 400, 0x43},
131 {640, 480, 0x31},
132 {800, 600, 0x34},
133 {1024, 768, 0x37},
134 };
135
136 static biosMode bios24[] = {
137 {640, 480, 0x32},
138 {800, 600, 0x35},
139 {1024, 768, 0x38}
140 };
141
142 #ifdef NO_32BIT_SUPPORT_YET
143 static biosMode bios32[] = {
144 {640, 480, 0x33},
145 {800, 600, 0x36},
146 {1024, 768, 0x39}
147 };
148 #endif
149
150 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
151 {
152 writel(val, par->neo2200 + par->cursorOff + regindex);
153 }
154
155 static int neoFindMode(int xres, int yres, int depth)
156 {
157 int xres_s;
158 int i, size;
159 biosMode *mode;
160
161 switch (depth) {
162 case 8:
163 size = ARRAY_SIZE(bios8);
164 mode = bios8;
165 break;
166 case 16:
167 size = ARRAY_SIZE(bios16);
168 mode = bios16;
169 break;
170 case 24:
171 size = ARRAY_SIZE(bios24);
172 mode = bios24;
173 break;
174 #ifdef NO_32BIT_SUPPORT_YET
175 case 32:
176 size = ARRAY_SIZE(bios32);
177 mode = bios32;
178 break;
179 #endif
180 default:
181 return 0;
182 }
183
184 for (i = 0; i < size; i++) {
185 if (xres <= mode[i].x_res) {
186 xres_s = mode[i].x_res;
187 for (; i < size; i++) {
188 if (mode[i].x_res != xres_s)
189 return mode[i - 1].mode;
190 if (yres <= mode[i].y_res)
191 return mode[i].mode;
192 }
193 }
194 }
195 return mode[size - 1].mode;
196 }
197
198 /*
199 * neoCalcVCLK --
200 *
201 * Determine the closest clock frequency to the one requested.
202 */
203 #define MAX_N 127
204 #define MAX_D 31
205 #define MAX_F 1
206
207 static void neoCalcVCLK(const struct fb_info *info,
208 struct neofb_par *par, long freq)
209 {
210 int n, d, f;
211 int n_best = 0, d_best = 0, f_best = 0;
212 long f_best_diff = 0x7ffff;
213
214 for (f = 0; f <= MAX_F; f++)
215 for (d = 0; d <= MAX_D; d++)
216 for (n = 0; n <= MAX_N; n++) {
217 long f_out;
218 long f_diff;
219
220 f_out = ((14318 * (n + 1)) / (d + 1)) >> f;
221 f_diff = abs(f_out - freq);
222 if (f_diff <= f_best_diff) {
223 f_best_diff = f_diff;
224 n_best = n;
225 d_best = d;
226 f_best = f;
227 }
228 if (f_out > freq)
229 break;
230 }
231
232 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
233 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
234 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
235 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
236 /* NOT_DONE: We are trying the full range of the 2200 clock.
237 We should be able to try n up to 2047 */
238 par->VCLK3NumeratorLow = n_best;
239 par->VCLK3NumeratorHigh = (f_best << 7);
240 } else
241 par->VCLK3NumeratorLow = n_best | (f_best << 7);
242
243 par->VCLK3Denominator = d_best;
244
245 #ifdef NEOFB_DEBUG
246 printk(KERN_DEBUG "neoVCLK: f:%ld NumLow=%d NumHi=%d Den=%d Df=%ld\n",
247 freq,
248 par->VCLK3NumeratorLow,
249 par->VCLK3NumeratorHigh,
250 par->VCLK3Denominator, f_best_diff);
251 #endif
252 }
253
254 /*
255 * vgaHWInit --
256 * Handle the initialization, etc. of a screen.
257 * Return FALSE on failure.
258 */
259
260 static int vgaHWInit(const struct fb_var_screeninfo *var,
261 struct neofb_par *par)
262 {
263 int hsync_end = var->xres + var->right_margin + var->hsync_len;
264 int htotal = (hsync_end + var->left_margin) >> 3;
265 int vsync_start = var->yres + var->lower_margin;
266 int vsync_end = vsync_start + var->vsync_len;
267 int vtotal = vsync_end + var->upper_margin;
268
269 par->MiscOutReg = 0x23;
270
271 if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
272 par->MiscOutReg |= 0x40;
273
274 if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
275 par->MiscOutReg |= 0x80;
276
277 /*
278 * Time Sequencer
279 */
280 par->Sequencer[0] = 0x00;
281 par->Sequencer[1] = 0x01;
282 par->Sequencer[2] = 0x0F;
283 par->Sequencer[3] = 0x00; /* Font select */
284 par->Sequencer[4] = 0x0E; /* Misc */
285
286 /*
287 * CRTC Controller
288 */
289 par->CRTC[0] = htotal - 5;
290 par->CRTC[1] = (var->xres >> 3) - 1;
291 par->CRTC[2] = (var->xres >> 3) - 1;
292 par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80;
293 par->CRTC[4] = ((var->xres + var->right_margin) >> 3);
294 par->CRTC[5] = (((htotal - 1) & 0x20) << 2)
295 | (((hsync_end >> 3)) & 0x1F);
296 par->CRTC[6] = (vtotal - 2) & 0xFF;
297 par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8)
298 | (((var->yres - 1) & 0x100) >> 7)
299 | ((vsync_start & 0x100) >> 6)
300 | (((var->yres - 1) & 0x100) >> 5)
301 | 0x10 | (((vtotal - 2) & 0x200) >> 4)
302 | (((var->yres - 1) & 0x200) >> 3)
303 | ((vsync_start & 0x200) >> 2);
304 par->CRTC[8] = 0x00;
305 par->CRTC[9] = (((var->yres - 1) & 0x200) >> 4) | 0x40;
306
307 if (var->vmode & FB_VMODE_DOUBLE)
308 par->CRTC[9] |= 0x80;
309
310 par->CRTC[10] = 0x00;
311 par->CRTC[11] = 0x00;
312 par->CRTC[12] = 0x00;
313 par->CRTC[13] = 0x00;
314 par->CRTC[14] = 0x00;
315 par->CRTC[15] = 0x00;
316 par->CRTC[16] = vsync_start & 0xFF;
317 par->CRTC[17] = (vsync_end & 0x0F) | 0x20;
318 par->CRTC[18] = (var->yres - 1) & 0xFF;
319 par->CRTC[19] = var->xres_virtual >> 4;
320 par->CRTC[20] = 0x00;
321 par->CRTC[21] = (var->yres - 1) & 0xFF;
322 par->CRTC[22] = (vtotal - 1) & 0xFF;
323 par->CRTC[23] = 0xC3;
324 par->CRTC[24] = 0xFF;
325
326 /*
327 * are these unnecessary?
328 * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
329 * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
330 */
331
332 /*
333 * Graphics Display Controller
334 */
335 par->Graphics[0] = 0x00;
336 par->Graphics[1] = 0x00;
337 par->Graphics[2] = 0x00;
338 par->Graphics[3] = 0x00;
339 par->Graphics[4] = 0x00;
340 par->Graphics[5] = 0x40;
341 par->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */
342 par->Graphics[7] = 0x0F;
343 par->Graphics[8] = 0xFF;
344
345
346 par->Attribute[0] = 0x00; /* standard colormap translation */
347 par->Attribute[1] = 0x01;
348 par->Attribute[2] = 0x02;
349 par->Attribute[3] = 0x03;
350 par->Attribute[4] = 0x04;
351 par->Attribute[5] = 0x05;
352 par->Attribute[6] = 0x06;
353 par->Attribute[7] = 0x07;
354 par->Attribute[8] = 0x08;
355 par->Attribute[9] = 0x09;
356 par->Attribute[10] = 0x0A;
357 par->Attribute[11] = 0x0B;
358 par->Attribute[12] = 0x0C;
359 par->Attribute[13] = 0x0D;
360 par->Attribute[14] = 0x0E;
361 par->Attribute[15] = 0x0F;
362 par->Attribute[16] = 0x41;
363 par->Attribute[17] = 0xFF;
364 par->Attribute[18] = 0x0F;
365 par->Attribute[19] = 0x00;
366 par->Attribute[20] = 0x00;
367 return 0;
368 }
369
370 static void vgaHWLock(struct vgastate *state)
371 {
372 /* Protect CRTC[0-7] */
373 vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
374 }
375
376 static void vgaHWUnlock(void)
377 {
378 /* Unprotect CRTC[0-7] */
379 vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
380 }
381
382 static void neoLock(struct vgastate *state)
383 {
384 vga_wgfx(state->vgabase, 0x09, 0x00);
385 vgaHWLock(state);
386 }
387
388 static void neoUnlock(void)
389 {
390 vgaHWUnlock();
391 vga_wgfx(NULL, 0x09, 0x26);
392 }
393
394 /*
395 * VGA Palette management
396 */
397 static int paletteEnabled = 0;
398
399 static inline void VGAenablePalette(void)
400 {
401 vga_r(NULL, VGA_IS1_RC);
402 vga_w(NULL, VGA_ATT_W, 0x00);
403 paletteEnabled = 1;
404 }
405
406 static inline void VGAdisablePalette(void)
407 {
408 vga_r(NULL, VGA_IS1_RC);
409 vga_w(NULL, VGA_ATT_W, 0x20);
410 paletteEnabled = 0;
411 }
412
413 static inline void VGAwATTR(u8 index, u8 value)
414 {
415 if (paletteEnabled)
416 index &= ~0x20;
417 else
418 index |= 0x20;
419
420 vga_r(NULL, VGA_IS1_RC);
421 vga_wattr(NULL, index, value);
422 }
423
424 static void vgaHWProtect(int on)
425 {
426 unsigned char tmp;
427
428 tmp = vga_rseq(NULL, 0x01);
429 if (on) {
430 /*
431 * Turn off screen and disable sequencer.
432 */
433 vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */
434 vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */
435
436 VGAenablePalette();
437 } else {
438 /*
439 * Reenable sequencer, then turn on screen.
440 */
441 vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */
442 vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */
443
444 VGAdisablePalette();
445 }
446 }
447
448 static void vgaHWRestore(const struct fb_info *info,
449 const struct neofb_par *par)
450 {
451 int i;
452
453 vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
454
455 for (i = 1; i < 5; i++)
456 vga_wseq(NULL, i, par->Sequencer[i]);
457
458 /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
459 vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
460
461 for (i = 0; i < 25; i++)
462 vga_wcrt(NULL, i, par->CRTC[i]);
463
464 for (i = 0; i < 9; i++)
465 vga_wgfx(NULL, i, par->Graphics[i]);
466
467 VGAenablePalette();
468
469 for (i = 0; i < 21; i++)
470 VGAwATTR(i, par->Attribute[i]);
471
472 VGAdisablePalette();
473 }
474
475
476 /* -------------------- Hardware specific routines ------------------------- */
477
478 /*
479 * Hardware Acceleration for Neo2200+
480 */
481 static inline int neo2200_sync(struct fb_info *info)
482 {
483 struct neofb_par *par = info->par;
484
485 while (readl(&par->neo2200->bltStat) & 1)
486 cpu_relax();
487 return 0;
488 }
489
490 static inline void neo2200_wait_fifo(struct fb_info *info,
491 int requested_fifo_space)
492 {
493 // ndev->neo.waitfifo_calls++;
494 // ndev->neo.waitfifo_sum += requested_fifo_space;
495
496
497 neo2200_sync(info);
498 }
499
500 static inline void neo2200_accel_init(struct fb_info *info,
501 struct fb_var_screeninfo *var)
502 {
503 struct neofb_par *par = info->par;
504 Neo2200 __iomem *neo2200 = par->neo2200;
505 u32 bltMod, pitch;
506
507 neo2200_sync(info);
508
509 switch (var->bits_per_pixel) {
510 case 8:
511 bltMod = NEO_MODE1_DEPTH8;
512 pitch = var->xres_virtual;
513 break;
514 case 15:
515 case 16:
516 bltMod = NEO_MODE1_DEPTH16;
517 pitch = var->xres_virtual * 2;
518 break;
519 case 24:
520 bltMod = NEO_MODE1_DEPTH24;
521 pitch = var->xres_virtual * 3;
522 break;
523 default:
524 printk(KERN_ERR
525 "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
526 return;
527 }
528
529 writel(bltMod << 16, &neo2200->bltStat);
530 writel((pitch << 16) | pitch, &neo2200->pitch);
531 }
532
533 /* --------------------------------------------------------------------- */
534
535 static int
536 neofb_open(struct fb_info *info, int user)
537 {
538 struct neofb_par *par = info->par;
539
540 if (!par->ref_count) {
541 memset(&par->state, 0, sizeof(struct vgastate));
542 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
543 save_vga(&par->state);
544 }
545 par->ref_count++;
546
547 return 0;
548 }
549
550 static int
551 neofb_release(struct fb_info *info, int user)
552 {
553 struct neofb_par *par = info->par;
554
555 if (!par->ref_count)
556 return -EINVAL;
557
558 if (par->ref_count == 1) {
559 restore_vga(&par->state);
560 }
561 par->ref_count--;
562
563 return 0;
564 }
565
566 static int
567 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
568 {
569 struct neofb_par *par = info->par;
570 int memlen, vramlen;
571 int mode_ok = 0;
572
573 DBG("neofb_check_var");
574
575 if (PICOS2KHZ(var->pixclock) > par->maxClock)
576 return -EINVAL;
577
578 /* Is the mode larger than the LCD panel? */
579 if (par->internal_display &&
580 ((var->xres > par->NeoPanelWidth) ||
581 (var->yres > par->NeoPanelHeight))) {
582 printk(KERN_INFO
583 "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
584 var->xres, var->yres, par->NeoPanelWidth,
585 par->NeoPanelHeight);
586 return -EINVAL;
587 }
588
589 /* Is the mode one of the acceptable sizes? */
590 if (!par->internal_display)
591 mode_ok = 1;
592 else {
593 switch (var->xres) {
594 case 1280:
595 if (var->yres == 1024)
596 mode_ok = 1;
597 break;
598 case 1024:
599 if (var->yres == 768)
600 mode_ok = 1;
601 break;
602 case 800:
603 if (var->yres == (par->libretto ? 480 : 600))
604 mode_ok = 1;
605 break;
606 case 640:
607 if (var->yres == 480)
608 mode_ok = 1;
609 break;
610 }
611 }
612
613 if (!mode_ok) {
614 printk(KERN_INFO
615 "Mode (%dx%d) won't display properly on LCD\n",
616 var->xres, var->yres);
617 return -EINVAL;
618 }
619
620 var->red.msb_right = 0;
621 var->green.msb_right = 0;
622 var->blue.msb_right = 0;
623 var->transp.msb_right = 0;
624
625 var->transp.offset = 0;
626 var->transp.length = 0;
627 switch (var->bits_per_pixel) {
628 case 8: /* PSEUDOCOLOUR, 256 */
629 var->red.offset = 0;
630 var->red.length = 8;
631 var->green.offset = 0;
632 var->green.length = 8;
633 var->blue.offset = 0;
634 var->blue.length = 8;
635 break;
636
637 case 16: /* DIRECTCOLOUR, 64k */
638 var->red.offset = 11;
639 var->red.length = 5;
640 var->green.offset = 5;
641 var->green.length = 6;
642 var->blue.offset = 0;
643 var->blue.length = 5;
644 break;
645
646 case 24: /* TRUECOLOUR, 16m */
647 var->red.offset = 16;
648 var->red.length = 8;
649 var->green.offset = 8;
650 var->green.length = 8;
651 var->blue.offset = 0;
652 var->blue.length = 8;
653 break;
654
655 #ifdef NO_32BIT_SUPPORT_YET
656 case 32: /* TRUECOLOUR, 16m */
657 var->transp.offset = 24;
658 var->transp.length = 8;
659 var->red.offset = 16;
660 var->red.length = 8;
661 var->green.offset = 8;
662 var->green.length = 8;
663 var->blue.offset = 0;
664 var->blue.length = 8;
665 break;
666 #endif
667 default:
668 printk(KERN_WARNING "neofb: no support for %dbpp\n",
669 var->bits_per_pixel);
670 return -EINVAL;
671 }
672
673 vramlen = info->fix.smem_len;
674 if (vramlen > 4 * 1024 * 1024)
675 vramlen = 4 * 1024 * 1024;
676
677 if (var->xres_virtual < var->xres)
678 var->xres_virtual = var->xres;
679
680 memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
681
682 if (memlen > vramlen) {
683 var->yres_virtual = vramlen * 8 / (var->xres_virtual *
684 var->bits_per_pixel);
685 memlen = var->xres_virtual * var->bits_per_pixel *
686 var->yres_virtual / 8;
687 }
688
689 /* we must round yres/xres down, we already rounded y/xres_virtual up
690 if it was possible. We should return -EINVAL, but I disagree */
691 if (var->yres_virtual < var->yres)
692 var->yres = var->yres_virtual;
693 if (var->xoffset + var->xres > var->xres_virtual)
694 var->xoffset = var->xres_virtual - var->xres;
695 if (var->yoffset + var->yres > var->yres_virtual)
696 var->yoffset = var->yres_virtual - var->yres;
697
698 var->nonstd = 0;
699 var->height = -1;
700 var->width = -1;
701
702 if (var->bits_per_pixel >= 24 || !par->neo2200)
703 var->accel_flags &= ~FB_ACCELF_TEXT;
704 return 0;
705 }
706
707 static int neofb_set_par(struct fb_info *info)
708 {
709 struct neofb_par *par = info->par;
710 unsigned char temp;
711 int i, clock_hi = 0;
712 int lcd_stretch;
713 int hoffset, voffset;
714 int vsync_start, vtotal;
715
716 DBG("neofb_set_par");
717
718 neoUnlock();
719
720 vgaHWProtect(1); /* Blank the screen */
721
722 vsync_start = info->var.yres + info->var.lower_margin;
723 vtotal = vsync_start + info->var.vsync_len + info->var.upper_margin;
724
725 /*
726 * This will allocate the datastructure and initialize all of the
727 * generic VGA registers.
728 */
729
730 if (vgaHWInit(&info->var, par))
731 return -EINVAL;
732
733 /*
734 * The default value assigned by vgaHW.c is 0x41, but this does
735 * not work for NeoMagic.
736 */
737 par->Attribute[16] = 0x01;
738
739 switch (info->var.bits_per_pixel) {
740 case 8:
741 par->CRTC[0x13] = info->var.xres_virtual >> 3;
742 par->ExtCRTOffset = info->var.xres_virtual >> 11;
743 par->ExtColorModeSelect = 0x11;
744 break;
745 case 16:
746 par->CRTC[0x13] = info->var.xres_virtual >> 2;
747 par->ExtCRTOffset = info->var.xres_virtual >> 10;
748 par->ExtColorModeSelect = 0x13;
749 break;
750 case 24:
751 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
752 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
753 par->ExtColorModeSelect = 0x14;
754 break;
755 #ifdef NO_32BIT_SUPPORT_YET
756 case 32:
757 par->CRTC[0x13] = info->var.xres_virtual >> 1;
758 par->ExtCRTOffset = info->var.xres_virtual >> 9;
759 par->ExtColorModeSelect = 0x15;
760 break;
761 #endif
762 default:
763 break;
764 }
765
766 par->ExtCRTDispAddr = 0x10;
767
768 /* Vertical Extension */
769 par->VerticalExt = (((vtotal - 2) & 0x400) >> 10)
770 | (((info->var.yres - 1) & 0x400) >> 9)
771 | (((vsync_start) & 0x400) >> 8)
772 | (((vsync_start) & 0x400) >> 7);
773
774 /* Fast write bursts on unless disabled. */
775 if (par->pci_burst)
776 par->SysIfaceCntl1 = 0x30;
777 else
778 par->SysIfaceCntl1 = 0x00;
779
780 par->SysIfaceCntl2 = 0xc0; /* VESA Bios sets this to 0x80! */
781
782 /* Initialize: by default, we want display config register to be read */
783 par->PanelDispCntlRegRead = 1;
784
785 /* Enable any user specified display devices. */
786 par->PanelDispCntlReg1 = 0x00;
787 if (par->internal_display)
788 par->PanelDispCntlReg1 |= 0x02;
789 if (par->external_display)
790 par->PanelDispCntlReg1 |= 0x01;
791
792 /* If the user did not specify any display devices, then... */
793 if (par->PanelDispCntlReg1 == 0x00) {
794 /* Default to internal (i.e., LCD) only. */
795 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
796 }
797
798 /* If we are using a fixed mode, then tell the chip we are. */
799 switch (info->var.xres) {
800 case 1280:
801 par->PanelDispCntlReg1 |= 0x60;
802 break;
803 case 1024:
804 par->PanelDispCntlReg1 |= 0x40;
805 break;
806 case 800:
807 par->PanelDispCntlReg1 |= 0x20;
808 break;
809 case 640:
810 default:
811 break;
812 }
813
814 /* Setup shadow register locking. */
815 switch (par->PanelDispCntlReg1 & 0x03) {
816 case 0x01: /* External CRT only mode: */
817 par->GeneralLockReg = 0x00;
818 /* We need to program the VCLK for external display only mode. */
819 par->ProgramVCLK = 1;
820 break;
821 case 0x02: /* Internal LCD only mode: */
822 case 0x03: /* Simultaneous internal/external (LCD/CRT) mode: */
823 par->GeneralLockReg = 0x01;
824 /* Don't program the VCLK when using the LCD. */
825 par->ProgramVCLK = 0;
826 break;
827 }
828
829 /*
830 * If the screen is to be stretched, turn on stretching for the
831 * various modes.
832 *
833 * OPTION_LCD_STRETCH means stretching should be turned off!
834 */
835 par->PanelDispCntlReg2 = 0x00;
836 par->PanelDispCntlReg3 = 0x00;
837
838 if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) && /* LCD only */
839 (info->var.xres != par->NeoPanelWidth)) {
840 switch (info->var.xres) {
841 case 320: /* Needs testing. KEM -- 24 May 98 */
842 case 400: /* Needs testing. KEM -- 24 May 98 */
843 case 640:
844 case 800:
845 case 1024:
846 lcd_stretch = 1;
847 par->PanelDispCntlReg2 |= 0xC6;
848 break;
849 default:
850 lcd_stretch = 0;
851 /* No stretching in these modes. */
852 }
853 } else
854 lcd_stretch = 0;
855
856 /*
857 * If the screen is to be centerd, turn on the centering for the
858 * various modes.
859 */
860 par->PanelVertCenterReg1 = 0x00;
861 par->PanelVertCenterReg2 = 0x00;
862 par->PanelVertCenterReg3 = 0x00;
863 par->PanelVertCenterReg4 = 0x00;
864 par->PanelVertCenterReg5 = 0x00;
865 par->PanelHorizCenterReg1 = 0x00;
866 par->PanelHorizCenterReg2 = 0x00;
867 par->PanelHorizCenterReg3 = 0x00;
868 par->PanelHorizCenterReg4 = 0x00;
869 par->PanelHorizCenterReg5 = 0x00;
870
871
872 if (par->PanelDispCntlReg1 & 0x02) {
873 if (info->var.xres == par->NeoPanelWidth) {
874 /*
875 * No centering required when the requested display width
876 * equals the panel width.
877 */
878 } else {
879 par->PanelDispCntlReg2 |= 0x01;
880 par->PanelDispCntlReg3 |= 0x10;
881
882 /* Calculate the horizontal and vertical offsets. */
883 if (!lcd_stretch) {
884 hoffset =
885 ((par->NeoPanelWidth -
886 info->var.xres) >> 4) - 1;
887 voffset =
888 ((par->NeoPanelHeight -
889 info->var.yres) >> 1) - 2;
890 } else {
891 /* Stretched modes cannot be centered. */
892 hoffset = 0;
893 voffset = 0;
894 }
895
896 switch (info->var.xres) {
897 case 320: /* Needs testing. KEM -- 24 May 98 */
898 par->PanelHorizCenterReg3 = hoffset;
899 par->PanelVertCenterReg2 = voffset;
900 break;
901 case 400: /* Needs testing. KEM -- 24 May 98 */
902 par->PanelHorizCenterReg4 = hoffset;
903 par->PanelVertCenterReg1 = voffset;
904 break;
905 case 640:
906 par->PanelHorizCenterReg1 = hoffset;
907 par->PanelVertCenterReg3 = voffset;
908 break;
909 case 800:
910 par->PanelHorizCenterReg2 = hoffset;
911 par->PanelVertCenterReg4 = voffset;
912 break;
913 case 1024:
914 par->PanelHorizCenterReg5 = hoffset;
915 par->PanelVertCenterReg5 = voffset;
916 break;
917 case 1280:
918 default:
919 /* No centering in these modes. */
920 break;
921 }
922 }
923 }
924
925 par->biosMode =
926 neoFindMode(info->var.xres, info->var.yres,
927 info->var.bits_per_pixel);
928
929 /*
930 * Calculate the VCLK that most closely matches the requested dot
931 * clock.
932 */
933 neoCalcVCLK(info, par, PICOS2KHZ(info->var.pixclock));
934
935 /* Since we program the clocks ourselves, always use VCLK3. */
936 par->MiscOutReg |= 0x0C;
937
938 /* alread unlocked above */
939 /* BOGUS vga_wgfx(NULL, 0x09, 0x26); */
940
941 /* don't know what this is, but it's 0 from bootup anyway */
942 vga_wgfx(NULL, 0x15, 0x00);
943
944 /* was set to 0x01 by my bios in text and vesa modes */
945 vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
946
947 /*
948 * The color mode needs to be set before calling vgaHWRestore
949 * to ensure the DAC is initialized properly.
950 *
951 * NOTE: Make sure we don't change bits make sure we don't change
952 * any reserved bits.
953 */
954 temp = vga_rgfx(NULL, 0x90);
955 switch (info->fix.accel) {
956 case FB_ACCEL_NEOMAGIC_NM2070:
957 temp &= 0xF0; /* Save bits 7:4 */
958 temp |= (par->ExtColorModeSelect & ~0xF0);
959 break;
960 case FB_ACCEL_NEOMAGIC_NM2090:
961 case FB_ACCEL_NEOMAGIC_NM2093:
962 case FB_ACCEL_NEOMAGIC_NM2097:
963 case FB_ACCEL_NEOMAGIC_NM2160:
964 case FB_ACCEL_NEOMAGIC_NM2200:
965 case FB_ACCEL_NEOMAGIC_NM2230:
966 case FB_ACCEL_NEOMAGIC_NM2360:
967 case FB_ACCEL_NEOMAGIC_NM2380:
968 temp &= 0x70; /* Save bits 6:4 */
969 temp |= (par->ExtColorModeSelect & ~0x70);
970 break;
971 }
972
973 vga_wgfx(NULL, 0x90, temp);
974
975 /*
976 * In some rare cases a lockup might occur if we don't delay
977 * here. (Reported by Miles Lane)
978 */
979 //mdelay(200);
980
981 /*
982 * Disable horizontal and vertical graphics and text expansions so
983 * that vgaHWRestore works properly.
984 */
985 temp = vga_rgfx(NULL, 0x25);
986 temp &= 0x39;
987 vga_wgfx(NULL, 0x25, temp);
988
989 /*
990 * Sleep for 200ms to make sure that the two operations above have
991 * had time to take effect.
992 */
993 mdelay(200);
994
995 /*
996 * This function handles restoring the generic VGA registers. */
997 vgaHWRestore(info, par);
998
999 /* linear colormap for non palettized modes */
1000 switch (info->var.bits_per_pixel) {
1001 case 8:
1002 /* PseudoColor, 256 */
1003 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1004 break;
1005 case 16:
1006 /* TrueColor, 64k */
1007 info->fix.visual = FB_VISUAL_TRUECOLOR;
1008
1009 for (i = 0; i < 64; i++) {
1010 outb(i, 0x3c8);
1011
1012 outb(i << 1, 0x3c9);
1013 outb(i, 0x3c9);
1014 outb(i << 1, 0x3c9);
1015 }
1016 break;
1017 case 24:
1018 #ifdef NO_32BIT_SUPPORT_YET
1019 case 32:
1020 #endif
1021 /* TrueColor, 16m */
1022 info->fix.visual = FB_VISUAL_TRUECOLOR;
1023
1024 for (i = 0; i < 256; i++) {
1025 outb(i, 0x3c8);
1026
1027 outb(i, 0x3c9);
1028 outb(i, 0x3c9);
1029 outb(i, 0x3c9);
1030 }
1031 break;
1032 }
1033
1034 vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1035 vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1036 temp = vga_rgfx(NULL, 0x10);
1037 temp &= 0x0F; /* Save bits 3:0 */
1038 temp |= (par->SysIfaceCntl1 & ~0x0F); /* VESA Bios sets bit 1! */
1039 vga_wgfx(NULL, 0x10, temp);
1040
1041 vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1042 vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1043 vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1044
1045 temp = vga_rgfx(NULL, 0x20);
1046 switch (info->fix.accel) {
1047 case FB_ACCEL_NEOMAGIC_NM2070:
1048 temp &= 0xFC; /* Save bits 7:2 */
1049 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1050 break;
1051 case FB_ACCEL_NEOMAGIC_NM2090:
1052 case FB_ACCEL_NEOMAGIC_NM2093:
1053 case FB_ACCEL_NEOMAGIC_NM2097:
1054 case FB_ACCEL_NEOMAGIC_NM2160:
1055 temp &= 0xDC; /* Save bits 7:6,4:2 */
1056 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1057 break;
1058 case FB_ACCEL_NEOMAGIC_NM2200:
1059 case FB_ACCEL_NEOMAGIC_NM2230:
1060 case FB_ACCEL_NEOMAGIC_NM2360:
1061 case FB_ACCEL_NEOMAGIC_NM2380:
1062 temp &= 0x98; /* Save bits 7,4:3 */
1063 temp |= (par->PanelDispCntlReg1 & ~0x98);
1064 break;
1065 }
1066 vga_wgfx(NULL, 0x20, temp);
1067
1068 temp = vga_rgfx(NULL, 0x25);
1069 temp &= 0x38; /* Save bits 5:3 */
1070 temp |= (par->PanelDispCntlReg2 & ~0x38);
1071 vga_wgfx(NULL, 0x25, temp);
1072
1073 if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1074 temp = vga_rgfx(NULL, 0x30);
1075 temp &= 0xEF; /* Save bits 7:5 and bits 3:0 */
1076 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1077 vga_wgfx(NULL, 0x30, temp);
1078 }
1079
1080 vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1081 vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1082 vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1083
1084 if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1085 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1086 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1087 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1088 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1089 }
1090
1091 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1092 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1093
1094 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1095 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1096 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1097 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1098 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1099 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1100 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1101
1102 clock_hi = 1;
1103 }
1104
1105 /* Program VCLK3 if needed. */
1106 if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1107 || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1108 || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1109 != (par->VCLK3NumeratorHigh &
1110 ~0x0F))))) {
1111 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1112 if (clock_hi) {
1113 temp = vga_rgfx(NULL, 0x8F);
1114 temp &= 0x0F; /* Save bits 3:0 */
1115 temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1116 vga_wgfx(NULL, 0x8F, temp);
1117 }
1118 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1119 }
1120
1121 if (par->biosMode)
1122 vga_wcrt(NULL, 0x23, par->biosMode);
1123
1124 vga_wgfx(NULL, 0x93, 0xc0); /* Gives 5x faster framebuffer writes !!! */
1125
1126 /* Program vertical extension register */
1127 if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1128 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1129 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1130 info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1131 vga_wcrt(NULL, 0x70, par->VerticalExt);
1132 }
1133
1134 vgaHWProtect(0); /* Turn on screen */
1135
1136 /* Calling this also locks offset registers required in update_start */
1137 neoLock(&par->state);
1138
1139 info->fix.line_length =
1140 info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1141
1142 switch (info->fix.accel) {
1143 case FB_ACCEL_NEOMAGIC_NM2200:
1144 case FB_ACCEL_NEOMAGIC_NM2230:
1145 case FB_ACCEL_NEOMAGIC_NM2360:
1146 case FB_ACCEL_NEOMAGIC_NM2380:
1147 neo2200_accel_init(info, &info->var);
1148 break;
1149 default:
1150 break;
1151 }
1152 return 0;
1153 }
1154
1155 /*
1156 * Pan or Wrap the Display
1157 */
1158 static int neofb_pan_display(struct fb_var_screeninfo *var,
1159 struct fb_info *info)
1160 {
1161 struct neofb_par *par = info->par;
1162 struct vgastate *state = &par->state;
1163 int oldExtCRTDispAddr;
1164 int Base;
1165
1166 DBG("neofb_update_start");
1167
1168 Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1169 Base *= (var->bits_per_pixel + 7) / 8;
1170
1171 neoUnlock();
1172
1173 /*
1174 * These are the generic starting address registers.
1175 */
1176 vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1177 vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1178
1179 /*
1180 * Make sure we don't clobber some other bits that might already
1181 * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1182 * be needed.
1183 */
1184 oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1185 vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1186
1187 neoLock(state);
1188
1189 return 0;
1190 }
1191
1192 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1193 u_int transp, struct fb_info *fb)
1194 {
1195 if (regno >= fb->cmap.len || regno > 255)
1196 return -EINVAL;
1197
1198 if (fb->var.bits_per_pixel <= 8) {
1199 outb(regno, 0x3c8);
1200
1201 outb(red >> 10, 0x3c9);
1202 outb(green >> 10, 0x3c9);
1203 outb(blue >> 10, 0x3c9);
1204 } else if (regno < 16) {
1205 switch (fb->var.bits_per_pixel) {
1206 case 16:
1207 ((u32 *) fb->pseudo_palette)[regno] =
1208 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1209 ((blue & 0xf800) >> 11);
1210 break;
1211 case 24:
1212 ((u32 *) fb->pseudo_palette)[regno] =
1213 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1214 ((blue & 0xff00) >> 8);
1215 break;
1216 #ifdef NO_32BIT_SUPPORT_YET
1217 case 32:
1218 ((u32 *) fb->pseudo_palette)[regno] =
1219 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1220 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1221 break;
1222 #endif
1223 default:
1224 return 1;
1225 }
1226 }
1227
1228 return 0;
1229 }
1230
1231 /*
1232 * (Un)Blank the display.
1233 */
1234 static int neofb_blank(int blank_mode, struct fb_info *info)
1235 {
1236 /*
1237 * Blank the screen if blank_mode != 0, else unblank.
1238 * Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1239 * e.g. a video mode which doesn't support it. Implements VESA suspend
1240 * and powerdown modes for monitors, and backlight control on LCDs.
1241 * blank_mode == 0: unblanked (backlight on)
1242 * blank_mode == 1: blank (backlight on)
1243 * blank_mode == 2: suspend vsync (backlight off)
1244 * blank_mode == 3: suspend hsync (backlight off)
1245 * blank_mode == 4: powerdown (backlight off)
1246 *
1247 * wms...Enable VESA DPMS compatible powerdown mode
1248 * run "setterm -powersave powerdown" to take advantage
1249 */
1250 struct neofb_par *par = info->par;
1251 int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1252
1253 /*
1254 * Read back the register bits related to display configuration. They might
1255 * have been changed underneath the driver via Fn key stroke.
1256 */
1257 neoUnlock();
1258 tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1259 neoLock(&par->state);
1260
1261 /* In case we blank the screen, we want to store the possibly new
1262 * configuration in the driver. During un-blank, we re-apply this setting,
1263 * since the LCD bit will be cleared in order to switch off the backlight.
1264 */
1265 if (par->PanelDispCntlRegRead) {
1266 par->PanelDispCntlReg1 = tmpdisp;
1267 }
1268 par->PanelDispCntlRegRead = !blank_mode;
1269
1270 switch (blank_mode) {
1271 case FB_BLANK_POWERDOWN: /* powerdown - both sync lines down */
1272 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1273 lcdflags = 0; /* LCD off */
1274 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1275 NEO_GR01_SUPPRESS_VSYNC;
1276 #ifdef CONFIG_TOSHIBA
1277 /* Do we still need this ? */
1278 /* attempt to turn off backlight on toshiba; also turns off external */
1279 {
1280 SMMRegisters regs;
1281
1282 regs.eax = 0xff00; /* HCI_SET */
1283 regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1284 regs.ecx = 0x0000; /* HCI_DISABLE */
1285 tosh_smm(&regs);
1286 }
1287 #endif
1288 break;
1289 case FB_BLANK_HSYNC_SUSPEND: /* hsync off */
1290 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1291 lcdflags = 0; /* LCD off */
1292 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1293 break;
1294 case FB_BLANK_VSYNC_SUSPEND: /* vsync off */
1295 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1296 lcdflags = 0; /* LCD off */
1297 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1298 break;
1299 case FB_BLANK_NORMAL: /* just blank screen (backlight stays on) */
1300 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1301 /*
1302 * During a blank operation with the LID shut, we might store "LCD off"
1303 * by mistake. Due to timing issues, the BIOS may switch the lights
1304 * back on, and we turn it back off once we "unblank".
1305 *
1306 * So here is an attempt to implement ">=" - if we are in the process
1307 * of unblanking, and the LCD bit is unset in the driver but set in the
1308 * register, we must keep it.
1309 */
1310 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1311 dpmsflags = 0x00; /* no hsync/vsync suppression */
1312 break;
1313 case FB_BLANK_UNBLANK: /* unblank */
1314 seqflags = 0; /* Enable sequencer */
1315 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1316 dpmsflags = 0x00; /* no hsync/vsync suppression */
1317 #ifdef CONFIG_TOSHIBA
1318 /* Do we still need this ? */
1319 /* attempt to re-enable backlight/external on toshiba */
1320 {
1321 SMMRegisters regs;
1322
1323 regs.eax = 0xff00; /* HCI_SET */
1324 regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1325 regs.ecx = 0x0001; /* HCI_ENABLE */
1326 tosh_smm(&regs);
1327 }
1328 #endif
1329 break;
1330 default: /* Anything else we don't understand; return 1 to tell
1331 * fb_blank we didn't aactually do anything */
1332 return 1;
1333 }
1334
1335 neoUnlock();
1336 reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1337 vga_wseq(NULL, 0x01, reg);
1338 reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1339 vga_wgfx(NULL, 0x20, reg);
1340 reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1341 vga_wgfx(NULL, 0x01, reg);
1342 neoLock(&par->state);
1343 return 0;
1344 }
1345
1346 static void
1347 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1348 {
1349 struct neofb_par *par = info->par;
1350 u_long dst, rop;
1351
1352 dst = rect->dx + rect->dy * info->var.xres_virtual;
1353 rop = rect->rop ? 0x060000 : 0x0c0000;
1354
1355 neo2200_wait_fifo(info, 4);
1356
1357 /* set blt control */
1358 writel(NEO_BC3_FIFO_EN |
1359 NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1360 // NEO_BC3_DST_XY_ADDR |
1361 // NEO_BC3_SRC_XY_ADDR |
1362 rop, &par->neo2200->bltCntl);
1363
1364 switch (info->var.bits_per_pixel) {
1365 case 8:
1366 writel(rect->color, &par->neo2200->fgColor);
1367 break;
1368 case 16:
1369 case 24:
1370 writel(((u32 *) (info->pseudo_palette))[rect->color],
1371 &par->neo2200->fgColor);
1372 break;
1373 }
1374
1375 writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1376 &par->neo2200->dstStart);
1377 writel((rect->height << 16) | (rect->width & 0xffff),
1378 &par->neo2200->xyExt);
1379 }
1380
1381 static void
1382 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1383 {
1384 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1385 struct neofb_par *par = info->par;
1386 u_long src, dst, bltCntl;
1387
1388 bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1389
1390 if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1391 /* Start with the lower right corner */
1392 sy += (area->height - 1);
1393 dy += (area->height - 1);
1394 sx += (area->width - 1);
1395 dx += (area->width - 1);
1396
1397 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1398 }
1399
1400 src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1401 dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1402
1403 neo2200_wait_fifo(info, 4);
1404
1405 /* set blt control */
1406 writel(bltCntl, &par->neo2200->bltCntl);
1407
1408 writel(src, &par->neo2200->srcStart);
1409 writel(dst, &par->neo2200->dstStart);
1410 writel((area->height << 16) | (area->width & 0xffff),
1411 &par->neo2200->xyExt);
1412 }
1413
1414 static void
1415 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1416 {
1417 struct neofb_par *par = info->par;
1418 int s_pitch = (image->width * image->depth + 7) >> 3;
1419 int scan_align = info->pixmap.scan_align - 1;
1420 int buf_align = info->pixmap.buf_align - 1;
1421 int bltCntl_flags, d_pitch, data_len;
1422
1423 // The data is padded for the hardware
1424 d_pitch = (s_pitch + scan_align) & ~scan_align;
1425 data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1426
1427 neo2200_sync(info);
1428
1429 if (image->depth == 1) {
1430 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1431 cfb_imageblit(info, image);
1432 return;
1433 }
1434 bltCntl_flags = NEO_BC0_SRC_MONO;
1435 } else if (image->depth == info->var.bits_per_pixel) {
1436 bltCntl_flags = 0;
1437 } else {
1438 /* We don't currently support hardware acceleration if image
1439 * depth is different from display */
1440 cfb_imageblit(info, image);
1441 return;
1442 }
1443
1444 switch (info->var.bits_per_pixel) {
1445 case 8:
1446 writel(image->fg_color, &par->neo2200->fgColor);
1447 writel(image->bg_color, &par->neo2200->bgColor);
1448 break;
1449 case 16:
1450 case 24:
1451 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1452 &par->neo2200->fgColor);
1453 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1454 &par->neo2200->bgColor);
1455 break;
1456 }
1457
1458 writel(NEO_BC0_SYS_TO_VID |
1459 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1460 // NEO_BC3_DST_XY_ADDR |
1461 0x0c0000, &par->neo2200->bltCntl);
1462
1463 writel(0, &par->neo2200->srcStart);
1464 // par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1465 writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1466 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1467 writel((image->height << 16) | (image->width & 0xffff),
1468 &par->neo2200->xyExt);
1469
1470 memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1471 }
1472
1473 static void
1474 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1475 {
1476 switch (info->fix.accel) {
1477 case FB_ACCEL_NEOMAGIC_NM2200:
1478 case FB_ACCEL_NEOMAGIC_NM2230:
1479 case FB_ACCEL_NEOMAGIC_NM2360:
1480 case FB_ACCEL_NEOMAGIC_NM2380:
1481 neo2200_fillrect(info, rect);
1482 break;
1483 default:
1484 cfb_fillrect(info, rect);
1485 break;
1486 }
1487 }
1488
1489 static void
1490 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1491 {
1492 switch (info->fix.accel) {
1493 case FB_ACCEL_NEOMAGIC_NM2200:
1494 case FB_ACCEL_NEOMAGIC_NM2230:
1495 case FB_ACCEL_NEOMAGIC_NM2360:
1496 case FB_ACCEL_NEOMAGIC_NM2380:
1497 neo2200_copyarea(info, area);
1498 break;
1499 default:
1500 cfb_copyarea(info, area);
1501 break;
1502 }
1503 }
1504
1505 static void
1506 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1507 {
1508 switch (info->fix.accel) {
1509 case FB_ACCEL_NEOMAGIC_NM2200:
1510 case FB_ACCEL_NEOMAGIC_NM2230:
1511 case FB_ACCEL_NEOMAGIC_NM2360:
1512 case FB_ACCEL_NEOMAGIC_NM2380:
1513 neo2200_imageblit(info, image);
1514 break;
1515 default:
1516 cfb_imageblit(info, image);
1517 break;
1518 }
1519 }
1520
1521 static int
1522 neofb_sync(struct fb_info *info)
1523 {
1524 switch (info->fix.accel) {
1525 case FB_ACCEL_NEOMAGIC_NM2200:
1526 case FB_ACCEL_NEOMAGIC_NM2230:
1527 case FB_ACCEL_NEOMAGIC_NM2360:
1528 case FB_ACCEL_NEOMAGIC_NM2380:
1529 neo2200_sync(info);
1530 break;
1531 default:
1532 break;
1533 }
1534 return 0;
1535 }
1536
1537 /*
1538 static void
1539 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1540 {
1541 //memset_io(info->sprite.addr, 0xff, 1);
1542 }
1543
1544 static int
1545 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1546 {
1547 struct neofb_par *par = (struct neofb_par *) info->par;
1548
1549 * Disable cursor *
1550 write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1551
1552 if (cursor->set & FB_CUR_SETPOS) {
1553 u32 x = cursor->image.dx;
1554 u32 y = cursor->image.dy;
1555
1556 info->cursor.image.dx = x;
1557 info->cursor.image.dy = y;
1558 write_le32(NEOREG_CURSX, x, par);
1559 write_le32(NEOREG_CURSY, y, par);
1560 }
1561
1562 if (cursor->set & FB_CUR_SETSIZE) {
1563 info->cursor.image.height = cursor->image.height;
1564 info->cursor.image.width = cursor->image.width;
1565 }
1566
1567 if (cursor->set & FB_CUR_SETHOT)
1568 info->cursor.hot = cursor->hot;
1569
1570 if (cursor->set & FB_CUR_SETCMAP) {
1571 if (cursor->image.depth == 1) {
1572 u32 fg = cursor->image.fg_color;
1573 u32 bg = cursor->image.bg_color;
1574
1575 info->cursor.image.fg_color = fg;
1576 info->cursor.image.bg_color = bg;
1577
1578 fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1579 bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1580 write_le32(NEOREG_CURSFGCOLOR, fg, par);
1581 write_le32(NEOREG_CURSBGCOLOR, bg, par);
1582 }
1583 }
1584
1585 if (cursor->set & FB_CUR_SETSHAPE)
1586 fb_load_cursor_image(info);
1587
1588 if (info->cursor.enable)
1589 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1590 return 0;
1591 }
1592 */
1593
1594 static struct fb_ops neofb_ops = {
1595 .owner = THIS_MODULE,
1596 .fb_open = neofb_open,
1597 .fb_release = neofb_release,
1598 .fb_check_var = neofb_check_var,
1599 .fb_set_par = neofb_set_par,
1600 .fb_setcolreg = neofb_setcolreg,
1601 .fb_pan_display = neofb_pan_display,
1602 .fb_blank = neofb_blank,
1603 .fb_sync = neofb_sync,
1604 .fb_fillrect = neofb_fillrect,
1605 .fb_copyarea = neofb_copyarea,
1606 .fb_imageblit = neofb_imageblit,
1607 };
1608
1609 /* --------------------------------------------------------------------- */
1610
1611 static struct fb_videomode __devinitdata mode800x480 = {
1612 .xres = 800,
1613 .yres = 480,
1614 .pixclock = 25000,
1615 .left_margin = 88,
1616 .right_margin = 40,
1617 .upper_margin = 23,
1618 .lower_margin = 1,
1619 .hsync_len = 128,
1620 .vsync_len = 4,
1621 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1622 .vmode = FB_VMODE_NONINTERLACED
1623 };
1624
1625 static int __devinit neo_map_mmio(struct fb_info *info,
1626 struct pci_dev *dev)
1627 {
1628 struct neofb_par *par = info->par;
1629
1630 DBG("neo_map_mmio");
1631
1632 switch (info->fix.accel) {
1633 case FB_ACCEL_NEOMAGIC_NM2070:
1634 info->fix.mmio_start = pci_resource_start(dev, 0)+
1635 0x100000;
1636 break;
1637 case FB_ACCEL_NEOMAGIC_NM2090:
1638 case FB_ACCEL_NEOMAGIC_NM2093:
1639 info->fix.mmio_start = pci_resource_start(dev, 0)+
1640 0x200000;
1641 break;
1642 case FB_ACCEL_NEOMAGIC_NM2160:
1643 case FB_ACCEL_NEOMAGIC_NM2097:
1644 case FB_ACCEL_NEOMAGIC_NM2200:
1645 case FB_ACCEL_NEOMAGIC_NM2230:
1646 case FB_ACCEL_NEOMAGIC_NM2360:
1647 case FB_ACCEL_NEOMAGIC_NM2380:
1648 info->fix.mmio_start = pci_resource_start(dev, 1);
1649 break;
1650 default:
1651 info->fix.mmio_start = pci_resource_start(dev, 0);
1652 }
1653 info->fix.mmio_len = MMIO_SIZE;
1654
1655 if (!request_mem_region
1656 (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1657 printk("neofb: memory mapped IO in use\n");
1658 return -EBUSY;
1659 }
1660
1661 par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1662 if (!par->mmio_vbase) {
1663 printk("neofb: unable to map memory mapped IO\n");
1664 release_mem_region(info->fix.mmio_start,
1665 info->fix.mmio_len);
1666 return -ENOMEM;
1667 } else
1668 printk(KERN_INFO "neofb: mapped io at %p\n",
1669 par->mmio_vbase);
1670 return 0;
1671 }
1672
1673 static void neo_unmap_mmio(struct fb_info *info)
1674 {
1675 struct neofb_par *par = info->par;
1676
1677 DBG("neo_unmap_mmio");
1678
1679 iounmap(par->mmio_vbase);
1680 par->mmio_vbase = NULL;
1681
1682 release_mem_region(info->fix.mmio_start,
1683 info->fix.mmio_len);
1684 }
1685
1686 static int __devinit neo_map_video(struct fb_info *info,
1687 struct pci_dev *dev, int video_len)
1688 {
1689 //unsigned long addr;
1690
1691 DBG("neo_map_video");
1692
1693 info->fix.smem_start = pci_resource_start(dev, 0);
1694 info->fix.smem_len = video_len;
1695
1696 if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1697 "frame buffer")) {
1698 printk("neofb: frame buffer in use\n");
1699 return -EBUSY;
1700 }
1701
1702 info->screen_base =
1703 ioremap(info->fix.smem_start, info->fix.smem_len);
1704 if (!info->screen_base) {
1705 printk("neofb: unable to map screen memory\n");
1706 release_mem_region(info->fix.smem_start,
1707 info->fix.smem_len);
1708 return -ENOMEM;
1709 } else
1710 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1711 info->screen_base);
1712
1713 #ifdef CONFIG_MTRR
1714 ((struct neofb_par *)(info->par))->mtrr =
1715 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1716 MTRR_TYPE_WRCOMB, 1);
1717 #endif
1718
1719 /* Clear framebuffer, it's all white in memory after boot */
1720 memset_io(info->screen_base, 0, info->fix.smem_len);
1721
1722 /* Allocate Cursor drawing pad.
1723 info->fix.smem_len -= PAGE_SIZE;
1724 addr = info->fix.smem_start + info->fix.smem_len;
1725 write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1726 ((0x0ff0 & (addr >> 10)) >> 4), par);
1727 addr = (unsigned long) info->screen_base + info->fix.smem_len;
1728 info->sprite.addr = (u8 *) addr; */
1729 return 0;
1730 }
1731
1732 static void neo_unmap_video(struct fb_info *info)
1733 {
1734 DBG("neo_unmap_video");
1735
1736 #ifdef CONFIG_MTRR
1737 {
1738 struct neofb_par *par = info->par;
1739
1740 mtrr_del(par->mtrr, info->fix.smem_start,
1741 info->fix.smem_len);
1742 }
1743 #endif
1744 iounmap(info->screen_base);
1745 info->screen_base = NULL;
1746
1747 release_mem_region(info->fix.smem_start,
1748 info->fix.smem_len);
1749 }
1750
1751 static int __devinit neo_scan_monitor(struct fb_info *info)
1752 {
1753 struct neofb_par *par = info->par;
1754 unsigned char type, display;
1755 int w;
1756
1757 // Eventually we will have i2c support.
1758 info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1759 if (!info->monspecs.modedb)
1760 return -ENOMEM;
1761 info->monspecs.modedb_len = 1;
1762
1763 /* Determine the panel type */
1764 vga_wgfx(NULL, 0x09, 0x26);
1765 type = vga_rgfx(NULL, 0x21);
1766 display = vga_rgfx(NULL, 0x20);
1767 if (!par->internal_display && !par->external_display) {
1768 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1769 par->external_display = display & 1;
1770 printk (KERN_INFO "Autodetected %s display\n",
1771 par->internal_display && par->external_display ? "simultaneous" :
1772 par->internal_display ? "internal" : "external");
1773 }
1774
1775 /* Determine panel width -- used in NeoValidMode. */
1776 w = vga_rgfx(NULL, 0x20);
1777 vga_wgfx(NULL, 0x09, 0x00);
1778 switch ((w & 0x18) >> 3) {
1779 case 0x00:
1780 // 640x480@60
1781 par->NeoPanelWidth = 640;
1782 par->NeoPanelHeight = 480;
1783 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1784 break;
1785 case 0x01:
1786 par->NeoPanelWidth = 800;
1787 if (par->libretto) {
1788 par->NeoPanelHeight = 480;
1789 memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1790 } else {
1791 // 800x600@60
1792 par->NeoPanelHeight = 600;
1793 memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1794 }
1795 break;
1796 case 0x02:
1797 // 1024x768@60
1798 par->NeoPanelWidth = 1024;
1799 par->NeoPanelHeight = 768;
1800 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1801 break;
1802 case 0x03:
1803 /* 1280x1024@60 panel support needs to be added */
1804 #ifdef NOT_DONE
1805 par->NeoPanelWidth = 1280;
1806 par->NeoPanelHeight = 1024;
1807 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1808 break;
1809 #else
1810 printk(KERN_ERR
1811 "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1812 return -1;
1813 #endif
1814 default:
1815 // 640x480@60
1816 par->NeoPanelWidth = 640;
1817 par->NeoPanelHeight = 480;
1818 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1819 break;
1820 }
1821
1822 printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1823 par->NeoPanelWidth,
1824 par->NeoPanelHeight,
1825 (type & 0x02) ? "color" : "monochrome",
1826 (type & 0x10) ? "TFT" : "dual scan");
1827 return 0;
1828 }
1829
1830 static int __devinit neo_init_hw(struct fb_info *info)
1831 {
1832 struct neofb_par *par = info->par;
1833 int videoRam = 896;
1834 int maxClock = 65000;
1835 int CursorMem = 1024;
1836 int CursorOff = 0x100;
1837
1838 DBG("neo_init_hw");
1839
1840 neoUnlock();
1841
1842 switch (info->fix.accel) {
1843 case FB_ACCEL_NEOMAGIC_NM2070:
1844 videoRam = 896;
1845 maxClock = 65000;
1846 break;
1847 case FB_ACCEL_NEOMAGIC_NM2090:
1848 case FB_ACCEL_NEOMAGIC_NM2093:
1849 case FB_ACCEL_NEOMAGIC_NM2097:
1850 videoRam = 1152;
1851 maxClock = 80000;
1852 break;
1853 case FB_ACCEL_NEOMAGIC_NM2160:
1854 videoRam = 2048;
1855 maxClock = 90000;
1856 break;
1857 case FB_ACCEL_NEOMAGIC_NM2200:
1858 videoRam = 2560;
1859 maxClock = 110000;
1860 break;
1861 case FB_ACCEL_NEOMAGIC_NM2230:
1862 videoRam = 3008;
1863 maxClock = 110000;
1864 break;
1865 case FB_ACCEL_NEOMAGIC_NM2360:
1866 videoRam = 4096;
1867 maxClock = 110000;
1868 break;
1869 case FB_ACCEL_NEOMAGIC_NM2380:
1870 videoRam = 6144;
1871 maxClock = 110000;
1872 break;
1873 }
1874 switch (info->fix.accel) {
1875 case FB_ACCEL_NEOMAGIC_NM2070:
1876 case FB_ACCEL_NEOMAGIC_NM2090:
1877 case FB_ACCEL_NEOMAGIC_NM2093:
1878 CursorMem = 2048;
1879 CursorOff = 0x100;
1880 break;
1881 case FB_ACCEL_NEOMAGIC_NM2097:
1882 case FB_ACCEL_NEOMAGIC_NM2160:
1883 CursorMem = 1024;
1884 CursorOff = 0x100;
1885 break;
1886 case FB_ACCEL_NEOMAGIC_NM2200:
1887 case FB_ACCEL_NEOMAGIC_NM2230:
1888 case FB_ACCEL_NEOMAGIC_NM2360:
1889 case FB_ACCEL_NEOMAGIC_NM2380:
1890 CursorMem = 1024;
1891 CursorOff = 0x1000;
1892
1893 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1894 break;
1895 }
1896 /*
1897 info->sprite.size = CursorMem;
1898 info->sprite.scan_align = 1;
1899 info->sprite.buf_align = 1;
1900 info->sprite.flags = FB_PIXMAP_IO;
1901 info->sprite.outbuf = neofb_draw_cursor;
1902 */
1903 par->maxClock = maxClock;
1904 par->cursorOff = CursorOff;
1905 return videoRam * 1024;
1906 }
1907
1908
1909 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
1910 pci_device_id *id)
1911 {
1912 struct fb_info *info;
1913 struct neofb_par *par;
1914
1915 info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
1916
1917 if (!info)
1918 return NULL;
1919
1920 par = info->par;
1921
1922 info->fix.accel = id->driver_data;
1923
1924 par->pci_burst = !nopciburst;
1925 par->lcd_stretch = !nostretch;
1926 par->libretto = libretto;
1927
1928 par->internal_display = internal;
1929 par->external_display = external;
1930 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1931
1932 switch (info->fix.accel) {
1933 case FB_ACCEL_NEOMAGIC_NM2070:
1934 snprintf(info->fix.id, sizeof(info->fix.id),
1935 "MagicGraph 128");
1936 break;
1937 case FB_ACCEL_NEOMAGIC_NM2090:
1938 snprintf(info->fix.id, sizeof(info->fix.id),
1939 "MagicGraph 128V");
1940 break;
1941 case FB_ACCEL_NEOMAGIC_NM2093:
1942 snprintf(info->fix.id, sizeof(info->fix.id),
1943 "MagicGraph 128ZV");
1944 break;
1945 case FB_ACCEL_NEOMAGIC_NM2097:
1946 snprintf(info->fix.id, sizeof(info->fix.id),
1947 "MagicGraph 128ZV+");
1948 break;
1949 case FB_ACCEL_NEOMAGIC_NM2160:
1950 snprintf(info->fix.id, sizeof(info->fix.id),
1951 "MagicGraph 128XD");
1952 break;
1953 case FB_ACCEL_NEOMAGIC_NM2200:
1954 snprintf(info->fix.id, sizeof(info->fix.id),
1955 "MagicGraph 256AV");
1956 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1957 FBINFO_HWACCEL_COPYAREA |
1958 FBINFO_HWACCEL_FILLRECT;
1959 break;
1960 case FB_ACCEL_NEOMAGIC_NM2230:
1961 snprintf(info->fix.id, sizeof(info->fix.id),
1962 "MagicGraph 256AV+");
1963 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1964 FBINFO_HWACCEL_COPYAREA |
1965 FBINFO_HWACCEL_FILLRECT;
1966 break;
1967 case FB_ACCEL_NEOMAGIC_NM2360:
1968 snprintf(info->fix.id, sizeof(info->fix.id),
1969 "MagicGraph 256ZX");
1970 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1971 FBINFO_HWACCEL_COPYAREA |
1972 FBINFO_HWACCEL_FILLRECT;
1973 break;
1974 case FB_ACCEL_NEOMAGIC_NM2380:
1975 snprintf(info->fix.id, sizeof(info->fix.id),
1976 "MagicGraph 256XL+");
1977 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
1978 FBINFO_HWACCEL_COPYAREA |
1979 FBINFO_HWACCEL_FILLRECT;
1980 break;
1981 }
1982
1983 info->fix.type = FB_TYPE_PACKED_PIXELS;
1984 info->fix.type_aux = 0;
1985 info->fix.xpanstep = 0;
1986 info->fix.ypanstep = 4;
1987 info->fix.ywrapstep = 0;
1988 info->fix.accel = id->driver_data;
1989
1990 info->fbops = &neofb_ops;
1991 info->pseudo_palette = par->palette;
1992 return info;
1993 }
1994
1995 static void neo_free_fb_info(struct fb_info *info)
1996 {
1997 if (info) {
1998 /*
1999 * Free the colourmap
2000 */
2001 fb_dealloc_cmap(&info->cmap);
2002 framebuffer_release(info);
2003 }
2004 }
2005
2006 /* --------------------------------------------------------------------- */
2007
2008 static int __devinit neofb_probe(struct pci_dev *dev,
2009 const struct pci_device_id *id)
2010 {
2011 struct fb_info *info;
2012 u_int h_sync, v_sync;
2013 int video_len, err;
2014
2015 DBG("neofb_probe");
2016
2017 err = pci_enable_device(dev);
2018 if (err)
2019 return err;
2020
2021 err = -ENOMEM;
2022 info = neo_alloc_fb_info(dev, id);
2023 if (!info)
2024 return err;
2025
2026 err = neo_map_mmio(info, dev);
2027 if (err)
2028 goto err_map_mmio;
2029
2030 err = neo_scan_monitor(info);
2031 if (err)
2032 goto err_scan_monitor;
2033
2034 video_len = neo_init_hw(info);
2035 if (video_len < 0) {
2036 err = video_len;
2037 goto err_init_hw;
2038 }
2039
2040 err = neo_map_video(info, dev, video_len);
2041 if (err)
2042 goto err_init_hw;
2043
2044 if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2045 info->monspecs.modedb, 16)) {
2046 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2047 goto err_map_video;
2048 }
2049
2050 /*
2051 * Calculate the hsync and vsync frequencies. Note that
2052 * we split the 1e12 constant up so that we can preserve
2053 * the precision and fit the results into 32-bit registers.
2054 * (1953125000 * 512 = 1e12)
2055 */
2056 h_sync = 1953125000 / info->var.pixclock;
2057 h_sync =
2058 h_sync * 512 / (info->var.xres + info->var.left_margin +
2059 info->var.right_margin + info->var.hsync_len);
2060 v_sync =
2061 h_sync / (info->var.yres + info->var.upper_margin +
2062 info->var.lower_margin + info->var.vsync_len);
2063
2064 printk(KERN_INFO "neofb v" NEOFB_VERSION
2065 ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2066 info->fix.smem_len >> 10, info->var.xres,
2067 info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2068
2069 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2070 goto err_map_video;
2071
2072 err = register_framebuffer(info);
2073 if (err < 0)
2074 goto err_reg_fb;
2075
2076 printk(KERN_INFO "fb%d: %s frame buffer device\n",
2077 info->node, info->fix.id);
2078
2079 /*
2080 * Our driver data
2081 */
2082 pci_set_drvdata(dev, info);
2083 return 0;
2084
2085 err_reg_fb:
2086 fb_dealloc_cmap(&info->cmap);
2087 err_map_video:
2088 neo_unmap_video(info);
2089 err_init_hw:
2090 fb_destroy_modedb(info->monspecs.modedb);
2091 err_scan_monitor:
2092 neo_unmap_mmio(info);
2093 err_map_mmio:
2094 neo_free_fb_info(info);
2095 return err;
2096 }
2097
2098 static void __devexit neofb_remove(struct pci_dev *dev)
2099 {
2100 struct fb_info *info = pci_get_drvdata(dev);
2101
2102 DBG("neofb_remove");
2103
2104 if (info) {
2105 /*
2106 * If unregister_framebuffer fails, then
2107 * we will be leaving hooks that could cause
2108 * oopsen laying around.
2109 */
2110 if (unregister_framebuffer(info))
2111 printk(KERN_WARNING
2112 "neofb: danger danger! Oopsen imminent!\n");
2113
2114 neo_unmap_video(info);
2115 fb_destroy_modedb(info->monspecs.modedb);
2116 neo_unmap_mmio(info);
2117 neo_free_fb_info(info);
2118
2119 /*
2120 * Ensure that the driver data is no longer
2121 * valid.
2122 */
2123 pci_set_drvdata(dev, NULL);
2124 }
2125 }
2126
2127 static struct pci_device_id neofb_devices[] = {
2128 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2130
2131 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2132 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2133
2134 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2136
2137 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2138 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2139
2140 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2141 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2142
2143 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2145
2146 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2147 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2148
2149 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2151
2152 {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2153 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2154
2155 {0, 0, 0, 0, 0, 0, 0}
2156 };
2157
2158 MODULE_DEVICE_TABLE(pci, neofb_devices);
2159
2160 static struct pci_driver neofb_driver = {
2161 .name = "neofb",
2162 .id_table = neofb_devices,
2163 .probe = neofb_probe,
2164 .remove = __devexit_p(neofb_remove)
2165 };
2166
2167 /* ************************* init in-kernel code ************************** */
2168
2169 #ifndef MODULE
2170 static int __init neofb_setup(char *options)
2171 {
2172 char *this_opt;
2173
2174 DBG("neofb_setup");
2175
2176 if (!options || !*options)
2177 return 0;
2178
2179 while ((this_opt = strsep(&options, ",")) != NULL) {
2180 if (!*this_opt)
2181 continue;
2182
2183 if (!strncmp(this_opt, "internal", 8))
2184 internal = 1;
2185 else if (!strncmp(this_opt, "external", 8))
2186 external = 1;
2187 else if (!strncmp(this_opt, "nostretch", 9))
2188 nostretch = 1;
2189 else if (!strncmp(this_opt, "nopciburst", 10))
2190 nopciburst = 1;
2191 else if (!strncmp(this_opt, "libretto", 8))
2192 libretto = 1;
2193 else
2194 mode_option = this_opt;
2195 }
2196 return 0;
2197 }
2198 #endif /* MODULE */
2199
2200 static int __init neofb_init(void)
2201 {
2202 #ifndef MODULE
2203 char *option = NULL;
2204
2205 if (fb_get_options("neofb", &option))
2206 return -ENODEV;
2207 neofb_setup(option);
2208 #endif
2209 return pci_register_driver(&neofb_driver);
2210 }
2211
2212 module_init(neofb_init);
2213
2214 #ifdef MODULE
2215 static void __exit neofb_exit(void)
2216 {
2217 pci_unregister_driver(&neofb_driver);
2218 }
2219
2220 module_exit(neofb_exit);
2221 #endif /* MODULE */
Tomato firmware and modifications.