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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / video / matrox / matroxfb_base.c
blob4817752bd9964177623623e8ad7ebe93743959a2
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #define __OLD_VIDIOC_
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/slab.h>
117 #include <linux/uaccess.h>
118
119 #ifdef CONFIG_PPC_PMAC
120 #include <asm/machdep.h>
121 unsigned char nvram_read_byte(int);
122 static int default_vmode = VMODE_NVRAM;
123 static int default_cmode = CMODE_NVRAM;
124 #endif
125
126 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
127
128 /* --------------------------------------------------------------------- */
129
130 /*
131 * card parameters
132 */
133
134 /* --------------------------------------------------------------------- */
135
136 static struct fb_var_screeninfo vesafb_defined = {
137 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
138 0,0, /* virtual -> visible no offset */
139 8, /* depth -> load bits_per_pixel */
140 0, /* greyscale ? */
141 {0,0,0}, /* R */
142 {0,0,0}, /* G */
143 {0,0,0}, /* B */
144 {0,0,0}, /* transparency */
145 0, /* standard pixel format */
146 FB_ACTIVATE_NOW,
147 -1,-1,
148 FB_ACCELF_TEXT, /* accel flags */
149 39721L,48L,16L,33L,10L,
150 96L,2L,~0, /* No sync info */
151 FB_VMODE_NONINTERLACED,
152 0, {0,0,0,0,0}
153 };
154
155
156
157 /* --------------------------------------------------------------------- */
158 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
159 {
160 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
161
162 /* Make sure that displays are compatible */
163 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
164 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
165 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
166 ) {
167 switch (minfo->fbcon.var.bits_per_pixel) {
168 case 16:
169 case 32:
170 pos = pos * 8;
171 if (info->interlaced) {
172 mga_outl(0x3C2C, pos);
173 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
174 } else {
175 mga_outl(0x3C28, pos);
176 }
177 break;
178 }
179 }
180 }
181
182 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
183 {
184 if (minfo->crtc1.panpos >= 0) {
185 unsigned long flags;
186 int panpos;
187
188 matroxfb_DAC_lock_irqsave(flags);
189 panpos = minfo->crtc1.panpos;
190 if (panpos >= 0) {
191 unsigned int extvga_reg;
192
193 minfo->crtc1.panpos = -1; /* No update pending anymore */
194 extvga_reg = mga_inb(M_EXTVGA_INDEX);
195 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
196 if (extvga_reg != 0x00) {
197 mga_outb(M_EXTVGA_INDEX, extvga_reg);
198 }
199 }
200 matroxfb_DAC_unlock_irqrestore(flags);
201 }
202 }
203
204 static irqreturn_t matrox_irq(int irq, void *dev_id)
205 {
206 u_int32_t status;
207 int handled = 0;
208 struct matrox_fb_info *minfo = dev_id;
209
210 status = mga_inl(M_STATUS);
211
212 if (status & 0x20) {
213 mga_outl(M_ICLEAR, 0x20);
214 minfo->crtc1.vsync.cnt++;
215 matroxfb_crtc1_panpos(minfo);
216 wake_up_interruptible(&minfo->crtc1.vsync.wait);
217 handled = 1;
218 }
219 if (status & 0x200) {
220 mga_outl(M_ICLEAR, 0x200);
221 minfo->crtc2.vsync.cnt++;
222 wake_up_interruptible(&minfo->crtc2.vsync.wait);
223 handled = 1;
224 }
225 return IRQ_RETVAL(handled);
226 }
227
228 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
229 {
230 u_int32_t bm;
231
232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
233 bm = 0x220;
234 else
235 bm = 0x020;
236
237 if (!test_and_set_bit(0, &minfo->irq_flags)) {
238 if (request_irq(minfo->pcidev->irq, matrox_irq,
239 IRQF_SHARED, "matroxfb", minfo)) {
240 clear_bit(0, &minfo->irq_flags);
241 return -EINVAL;
242 }
243 /* Clear any pending field interrupts */
244 mga_outl(M_ICLEAR, bm);
245 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
246 } else if (reenable) {
247 u_int32_t ien;
248
249 ien = mga_inl(M_IEN);
250 if ((ien & bm) != bm) {
251 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
252 mga_outl(M_IEN, ien | bm);
253 }
254 }
255 return 0;
256 }
257
258 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
259 {
260 if (test_and_clear_bit(0, &minfo->irq_flags)) {
261 /* Flush pending pan-at-vbl request... */
262 matroxfb_crtc1_panpos(minfo);
263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
265 else
266 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
267 free_irq(minfo->pcidev->irq, minfo);
268 }
269 }
270
271 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
272 {
273 struct matrox_vsync *vs;
274 unsigned int cnt;
275 int ret;
276
277 switch (crtc) {
278 case 0:
279 vs = &minfo->crtc1.vsync;
280 break;
281 case 1:
282 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
283 return -ENODEV;
284 }
285 vs = &minfo->crtc2.vsync;
286 break;
287 default:
288 return -ENODEV;
289 }
290 ret = matroxfb_enable_irq(minfo, 0);
291 if (ret) {
292 return ret;
293 }
294
295 cnt = vs->cnt;
296 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
297 if (ret < 0) {
298 return ret;
299 }
300 if (ret == 0) {
301 matroxfb_enable_irq(minfo, 1);
302 return -ETIMEDOUT;
303 }
304 return 0;
305 }
306
307 /* --------------------------------------------------------------------- */
308
309 static void matrox_pan_var(struct matrox_fb_info *minfo,
310 struct fb_var_screeninfo *var)
311 {
312 unsigned int pos;
313 unsigned short p0, p1, p2;
314 unsigned int p3;
315 int vbl;
316 unsigned long flags;
317
318 CRITFLAGS
319
320 DBG(__func__)
321
322 if (minfo->dead)
323 return;
324
325 minfo->fbcon.var.xoffset = var->xoffset;
326 minfo->fbcon.var.yoffset = var->yoffset;
327 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
328 pos += minfo->curr.ydstorg.chunks;
329 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
330 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
331 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
332 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
333
334 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
335 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
336
337 CRITBEGIN
338
339 matroxfb_DAC_lock_irqsave(flags);
340 mga_setr(M_CRTC_INDEX, 0x0D, p0);
341 mga_setr(M_CRTC_INDEX, 0x0C, p1);
342 if (minfo->devflags.support32MB)
343 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
344 if (vbl) {
345 minfo->crtc1.panpos = p2;
346 } else {
347 /* Abort any pending change */
348 minfo->crtc1.panpos = -1;
349 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
350 }
351 matroxfb_DAC_unlock_irqrestore(flags);
352
353 update_crtc2(minfo, pos);
354
355 CRITEND
356 }
357
358 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
359 {
360 /* Currently we are holding big kernel lock on all dead & usecount updates.
361 * Destroy everything after all users release it. Especially do not unregister
362 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
363 * for device unplugged when in use.
364 * In future we should point mmio.vbase & video.vbase somewhere where we can
365 * write data without causing too much damage...
366 */
367
368 minfo->dead = 1;
369 if (minfo->usecount) {
370 /* destroy it later */
371 return;
372 }
373 matroxfb_unregister_device(minfo);
374 unregister_framebuffer(&minfo->fbcon);
375 matroxfb_g450_shutdown(minfo);
376 #ifdef CONFIG_MTRR
377 if (minfo->mtrr.vram_valid)
378 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
379 #endif
380 mga_iounmap(minfo->mmio.vbase);
381 mga_iounmap(minfo->video.vbase);
382 release_mem_region(minfo->video.base, minfo->video.len_maximum);
383 release_mem_region(minfo->mmio.base, 16384);
384 kfree(minfo);
385 }
386
387 /*
388 * Open/Release the frame buffer device
389 */
390
391 static int matroxfb_open(struct fb_info *info, int user)
392 {
393 struct matrox_fb_info *minfo = info2minfo(info);
394
395 DBG_LOOP(__func__)
396
397 if (minfo->dead) {
398 return -ENXIO;
399 }
400 minfo->usecount++;
401 if (user) {
402 minfo->userusecount++;
403 }
404 return(0);
405 }
406
407 static int matroxfb_release(struct fb_info *info, int user)
408 {
409 struct matrox_fb_info *minfo = info2minfo(info);
410
411 DBG_LOOP(__func__)
412
413 if (user) {
414 if (0 == --minfo->userusecount) {
415 matroxfb_disable_irq(minfo);
416 }
417 }
418 if (!(--minfo->usecount) && minfo->dead) {
419 matroxfb_remove(minfo, 0);
420 }
421 return(0);
422 }
423
424 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
425 struct fb_info* info) {
426 struct matrox_fb_info *minfo = info2minfo(info);
427
428 DBG(__func__)
429
430 matrox_pan_var(minfo, var);
431 return 0;
432 }
433
434 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
435 int bpp)
436 {
437 int bppshft2;
438
439 DBG(__func__)
440
441 bppshft2 = bpp;
442 if (!bppshft2) {
443 return 8;
444 }
445 if (isInterleave(minfo))
446 bppshft2 >>= 1;
447 if (minfo->devflags.video64bits)
448 bppshft2 >>= 1;
449 return bppshft2;
450 }
451
452 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
453 int xres, int bpp)
454 {
455 int over;
456 int rounding;
457
458 DBG(__func__)
459
460 switch (bpp) {
461 case 0: return xres;
462 case 4: rounding = 128;
463 break;
464 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
465 break;
466 case 16: rounding = 32;
467 break;
468 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
469 break;
470 default: rounding = 16;
471 /* on G400, 16 really does not work */
472 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
473 rounding = 32;
474 break;
475 }
476 if (isInterleave(minfo)) {
477 rounding *= 2;
478 }
479 over = xres % rounding;
480 if (over)
481 xres += rounding-over;
482 return xres;
483 }
484
485 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
486 int bpp)
487 {
488 const int* width;
489 int xres_new;
490
491 DBG(__func__)
492
493 if (!bpp) return xres;
494
495 width = minfo->capable.vxres;
496
497 if (minfo->devflags.precise_width) {
498 while (*width) {
499 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
500 break;
501 }
502 width++;
503 }
504 xres_new = *width;
505 } else {
506 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
507 }
508 return xres_new;
509 }
510
511 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
512
513 DBG(__func__)
514
515 switch (var->bits_per_pixel) {
516 case 4:
517 return 16; /* pseudocolor... 16 entries HW palette */
518 case 8:
519 return 256; /* pseudocolor... 256 entries HW palette */
520 case 16:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 case 24:
524 return 16; /* directcolor... 16 entries SW palette */
525 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526 case 32:
527 return 16; /* directcolor... 16 entries SW palette */
528 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
529 }
530 return 16; /* return something reasonable... or panic()? */
531 }
532
533 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
534 struct fb_var_screeninfo *var, int *visual,
535 int *video_cmap_len, unsigned int* ydstorg)
536 {
537 struct RGBT {
538 unsigned char bpp;
539 struct {
540 unsigned char offset,
541 length;
542 } red,
543 green,
544 blue,
545 transp;
546 signed char visual;
547 };
548 static const struct RGBT table[]= {
549 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
550 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
551 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
552 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
553 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
554 };
555 struct RGBT const *rgbt;
556 unsigned int bpp = var->bits_per_pixel;
557 unsigned int vramlen;
558 unsigned int memlen;
559
560 DBG(__func__)
561
562 switch (bpp) {
563 case 4: if (!minfo->capable.cfb4) return -EINVAL;
564 break;
565 case 8: break;
566 case 16: break;
567 case 24: break;
568 case 32: break;
569 default: return -EINVAL;
570 }
571 *ydstorg = 0;
572 vramlen = minfo->video.len_usable;
573 if (var->yres_virtual < var->yres)
574 var->yres_virtual = var->yres;
575 if (var->xres_virtual < var->xres)
576 var->xres_virtual = var->xres;
577
578 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580 if (memlen > vramlen) {
581 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
582 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
583 }
584 /* There is hardware bug that no line can cross 4MB boundary */
585 /* for other try to do something */
586 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
587 if (bpp == 24) {
588 /* sorry */
589 } else {
590 unsigned int linelen;
591 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
592 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
593 unsigned int max_yres;
594
595 while (m1) {
596 int t;
597
598 while (m2 >= m1) m2 -= m1;
599 t = m1;
600 m1 = m2;
601 m2 = t;
602 }
603 m2 = linelen * PAGE_SIZE / m2;
604 *ydstorg = m2 = 0x400000 % m2;
605 max_yres = (vramlen - m2) / linelen;
606 if (var->yres_virtual > max_yres)
607 var->yres_virtual = max_yres;
608 }
609 }
610 /* YDSTLEN contains only signed 16bit value */
611 if (var->yres_virtual > 32767)
612 var->yres_virtual = 32767;
613 /* we must round yres/xres down, we already rounded y/xres_virtual up
614 if it was possible. We should return -EINVAL, but I disagree */
615 if (var->yres_virtual < var->yres)
616 var->yres = var->yres_virtual;
617 if (var->xres_virtual < var->xres)
618 var->xres = var->xres_virtual;
619 if (var->xoffset + var->xres > var->xres_virtual)
620 var->xoffset = var->xres_virtual - var->xres;
621 if (var->yoffset + var->yres > var->yres_virtual)
622 var->yoffset = var->yres_virtual - var->yres;
623
624 if (bpp == 16 && var->green.length == 5) {
625 bpp--; /* an artifical value - 15 */
626 }
627
628 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
629 #define SETCLR(clr)\
630 var->clr.offset = rgbt->clr.offset;\
631 var->clr.length = rgbt->clr.length
632 SETCLR(red);
633 SETCLR(green);
634 SETCLR(blue);
635 SETCLR(transp);
636 #undef SETCLR
637 *visual = rgbt->visual;
638
639 if (bpp > 8)
640 dprintk("matroxfb: truecolor: "
641 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
642 var->transp.length, var->red.length, var->green.length, var->blue.length,
643 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
644
645 *video_cmap_len = matroxfb_get_cmap_len(var);
646 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
647 var->xres_virtual, var->yres_virtual);
648 return 0;
649 }
650
651 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
652 unsigned blue, unsigned transp,
653 struct fb_info *fb_info)
654 {
655 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
656
657 DBG(__func__)
658
659 /*
660 * Set a single color register. The values supplied are
661 * already rounded down to the hardware's capabilities
662 * (according to the entries in the `var' structure). Return
663 * != 0 for invalid regno.
664 */
665
666 if (regno >= minfo->curr.cmap_len)
667 return 1;
668
669 if (minfo->fbcon.var.grayscale) {
670 /* gray = 0.30*R + 0.59*G + 0.11*B */
671 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
672 }
673
674 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
675 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
676 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
677 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
678
679 switch (minfo->fbcon.var.bits_per_pixel) {
680 case 4:
681 case 8:
682 mga_outb(M_DAC_REG, regno);
683 mga_outb(M_DAC_VAL, red);
684 mga_outb(M_DAC_VAL, green);
685 mga_outb(M_DAC_VAL, blue);
686 break;
687 case 16:
688 if (regno >= 16)
689 break;
690 {
691 u_int16_t col =
692 (red << minfo->fbcon.var.red.offset) |
693 (green << minfo->fbcon.var.green.offset) |
694 (blue << minfo->fbcon.var.blue.offset) |
695 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
696 minfo->cmap[regno] = col | (col << 16);
697 }
698 break;
699 case 24:
700 case 32:
701 if (regno >= 16)
702 break;
703 minfo->cmap[regno] =
704 (red << minfo->fbcon.var.red.offset) |
705 (green << minfo->fbcon.var.green.offset) |
706 (blue << minfo->fbcon.var.blue.offset) |
707 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
708 break;
709 }
710 return 0;
711 }
712
713 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
714 {
715 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
716 DBG(__func__)
717
718 strcpy(fix->id,"MATROX");
719
720 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
721 fix->ypanstep = 1;
722 fix->ywrapstep = 0;
723 fix->mmio_start = minfo->mmio.base;
724 fix->mmio_len = minfo->mmio.len;
725 fix->accel = minfo->devflags.accelerator;
726 }
727
728 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
729 {
730 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
731 DBG(__func__)
732
733 mutex_lock(&minfo->fbcon.mm_lock);
734 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
735 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
736 mutex_unlock(&minfo->fbcon.mm_lock);
737 }
738
739 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
740 {
741 int err;
742 int visual;
743 int cmap_len;
744 unsigned int ydstorg;
745 struct matrox_fb_info *minfo = info2minfo(info);
746
747 if (minfo->dead) {
748 return -ENXIO;
749 }
750 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
751 return err;
752 return 0;
753 }
754
755 static int matroxfb_set_par(struct fb_info *info)
756 {
757 int err;
758 int visual;
759 int cmap_len;
760 unsigned int ydstorg;
761 struct fb_var_screeninfo *var;
762 struct matrox_fb_info *minfo = info2minfo(info);
763
764 DBG(__func__)
765
766 if (minfo->dead) {
767 return -ENXIO;
768 }
769
770 var = &info->var;
771 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
772 return err;
773 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
774 matroxfb_update_fix(minfo);
775 minfo->fbcon.fix.visual = visual;
776 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
777 minfo->fbcon.fix.type_aux = 0;
778 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
779 {
780 unsigned int pos;
781
782 minfo->curr.cmap_len = cmap_len;
783 ydstorg += minfo->devflags.ydstorg;
784 minfo->curr.ydstorg.bytes = ydstorg;
785 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
786 if (var->bits_per_pixel == 4)
787 minfo->curr.ydstorg.pixels = ydstorg;
788 else
789 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
790 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
791 { struct my_timming mt;
792 struct matrox_hw_state* hw;
793 int out;
794
795 matroxfb_var2my(var, &mt);
796 mt.crtc = MATROXFB_SRC_CRTC1;
797 /* CRTC1 delays */
798 switch (var->bits_per_pixel) {
799 case 0: mt.delay = 31 + 0; break;
800 case 16: mt.delay = 21 + 8; break;
801 case 24: mt.delay = 17 + 8; break;
802 case 32: mt.delay = 16 + 8; break;
803 default: mt.delay = 31 + 8; break;
804 }
805
806 hw = &minfo->hw;
807
808 down_read(&minfo->altout.lock);
809 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
810 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
811 minfo->outputs[out].output->compute) {
812 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
813 }
814 }
815 up_read(&minfo->altout.lock);
816 minfo->crtc1.pixclock = mt.pixclock;
817 minfo->crtc1.mnp = mt.mnp;
818 minfo->hw_switch->init(minfo, &mt);
819 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
820 pos += minfo->curr.ydstorg.chunks;
821
822 hw->CRTC[0x0D] = pos & 0xFF;
823 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
824 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
825 hw->CRTCEXT[8] = pos >> 21;
826 minfo->hw_switch->restore(minfo);
827 update_crtc2(minfo, pos);
828 down_read(&minfo->altout.lock);
829 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
830 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
831 minfo->outputs[out].output->program) {
832 minfo->outputs[out].output->program(minfo->outputs[out].data);
833 }
834 }
835 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
836 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
837 minfo->outputs[out].output->start) {
838 minfo->outputs[out].output->start(minfo->outputs[out].data);
839 }
840 }
841 up_read(&minfo->altout.lock);
842 matrox_cfbX_init(minfo);
843 }
844 }
845 minfo->initialized = 1;
846 return 0;
847 }
848
849 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
850 struct fb_vblank *vblank)
851 {
852 unsigned int sts1;
853
854 matroxfb_enable_irq(minfo, 0);
855 memset(vblank, 0, sizeof(*vblank));
856 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
857 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
858 sts1 = mga_inb(M_INSTS1);
859 vblank->vcount = mga_inl(M_VCOUNT);
860 /* BTW, on my PIII/450 with G400, reading M_INSTS1
861 byte makes this call about 12% slower (1.70 vs. 2.05 us
862 per ioctl()) */
863 if (sts1 & 1)
864 vblank->flags |= FB_VBLANK_HBLANKING;
865 if (sts1 & 8)
866 vblank->flags |= FB_VBLANK_VSYNCING;
867 if (vblank->vcount >= minfo->fbcon.var.yres)
868 vblank->flags |= FB_VBLANK_VBLANKING;
869 if (test_bit(0, &minfo->irq_flags)) {
870 vblank->flags |= FB_VBLANK_HAVE_COUNT;
871 /* Only one writer, aligned int value...
872 it should work without lock and without atomic_t */
873 vblank->count = minfo->crtc1.vsync.cnt;
874 }
875 return 0;
876 }
877
878 static struct matrox_altout panellink_output = {
879 .name = "Panellink output",
880 };
881
882 static int matroxfb_ioctl(struct fb_info *info,
883 unsigned int cmd, unsigned long arg)
884 {
885 void __user *argp = (void __user *)arg;
886 struct matrox_fb_info *minfo = info2minfo(info);
887
888 DBG(__func__)
889
890 if (minfo->dead) {
891 return -ENXIO;
892 }
893
894 switch (cmd) {
895 case FBIOGET_VBLANK:
896 {
897 struct fb_vblank vblank;
898 int err;
899
900 err = matroxfb_get_vblank(minfo, &vblank);
901 if (err)
902 return err;
903 if (copy_to_user(argp, &vblank, sizeof(vblank)))
904 return -EFAULT;
905 return 0;
906 }
907 case FBIO_WAITFORVSYNC:
908 {
909 u_int32_t crt;
910
911 if (get_user(crt, (u_int32_t __user *)arg))
912 return -EFAULT;
913
914 return matroxfb_wait_for_sync(minfo, crt);
915 }
916 case MATROXFB_SET_OUTPUT_MODE:
917 {
918 struct matroxioc_output_mode mom;
919 struct matrox_altout *oproc;
920 int val;
921
922 if (copy_from_user(&mom, argp, sizeof(mom)))
923 return -EFAULT;
924 if (mom.output >= MATROXFB_MAX_OUTPUTS)
925 return -ENXIO;
926 down_read(&minfo->altout.lock);
927 oproc = minfo->outputs[mom.output].output;
928 if (!oproc) {
929 val = -ENXIO;
930 } else if (!oproc->verifymode) {
931 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
932 val = 0;
933 } else {
934 val = -EINVAL;
935 }
936 } else {
937 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
938 }
939 if (!val) {
940 if (minfo->outputs[mom.output].mode != mom.mode) {
941 minfo->outputs[mom.output].mode = mom.mode;
942 val = 1;
943 }
944 }
945 up_read(&minfo->altout.lock);
946 if (val != 1)
947 return val;
948 switch (minfo->outputs[mom.output].src) {
949 case MATROXFB_SRC_CRTC1:
950 matroxfb_set_par(info);
951 break;
952 case MATROXFB_SRC_CRTC2:
953 {
954 struct matroxfb_dh_fb_info* crtc2;
955
956 down_read(&minfo->crtc2.lock);
957 crtc2 = minfo->crtc2.info;
958 if (crtc2)
959 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
960 up_read(&minfo->crtc2.lock);
961 }
962 break;
963 }
964 return 0;
965 }
966 case MATROXFB_GET_OUTPUT_MODE:
967 {
968 struct matroxioc_output_mode mom;
969 struct matrox_altout *oproc;
970 int val;
971
972 if (copy_from_user(&mom, argp, sizeof(mom)))
973 return -EFAULT;
974 if (mom.output >= MATROXFB_MAX_OUTPUTS)
975 return -ENXIO;
976 down_read(&minfo->altout.lock);
977 oproc = minfo->outputs[mom.output].output;
978 if (!oproc) {
979 val = -ENXIO;
980 } else {
981 mom.mode = minfo->outputs[mom.output].mode;
982 val = 0;
983 }
984 up_read(&minfo->altout.lock);
985 if (val)
986 return val;
987 if (copy_to_user(argp, &mom, sizeof(mom)))
988 return -EFAULT;
989 return 0;
990 }
991 case MATROXFB_SET_OUTPUT_CONNECTION:
992 {
993 u_int32_t tmp;
994 int i;
995 int changes;
996
997 if (copy_from_user(&tmp, argp, sizeof(tmp)))
998 return -EFAULT;
999 for (i = 0; i < 32; i++) {
1000 if (tmp & (1 << i)) {
1001 if (i >= MATROXFB_MAX_OUTPUTS)
1002 return -ENXIO;
1003 if (!minfo->outputs[i].output)
1004 return -ENXIO;
1005 switch (minfo->outputs[i].src) {
1006 case MATROXFB_SRC_NONE:
1007 case MATROXFB_SRC_CRTC1:
1008 break;
1009 default:
1010 return -EBUSY;
1011 }
1012 }
1013 }
1014 if (minfo->devflags.panellink) {
1015 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1016 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1017 return -EINVAL;
1018 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1019 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1020 return -EBUSY;
1021 }
1022 }
1023 }
1024 }
1025 changes = 0;
1026 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1027 if (tmp & (1 << i)) {
1028 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1029 changes = 1;
1030 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1031 }
1032 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1033 changes = 1;
1034 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1035 }
1036 }
1037 if (!changes)
1038 return 0;
1039 matroxfb_set_par(info);
1040 return 0;
1041 }
1042 case MATROXFB_GET_OUTPUT_CONNECTION:
1043 {
1044 u_int32_t conn = 0;
1045 int i;
1046
1047 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1048 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1049 conn |= 1 << i;
1050 }
1051 }
1052 if (put_user(conn, (u_int32_t __user *)arg))
1053 return -EFAULT;
1054 return 0;
1055 }
1056 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1057 {
1058 u_int32_t conn = 0;
1059 int i;
1060
1061 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1062 if (minfo->outputs[i].output) {
1063 switch (minfo->outputs[i].src) {
1064 case MATROXFB_SRC_NONE:
1065 case MATROXFB_SRC_CRTC1:
1066 conn |= 1 << i;
1067 break;
1068 }
1069 }
1070 }
1071 if (minfo->devflags.panellink) {
1072 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1073 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1074 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1075 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1076 }
1077 if (put_user(conn, (u_int32_t __user *)arg))
1078 return -EFAULT;
1079 return 0;
1080 }
1081 case MATROXFB_GET_ALL_OUTPUTS:
1082 {
1083 u_int32_t conn = 0;
1084 int i;
1085
1086 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1087 if (minfo->outputs[i].output) {
1088 conn |= 1 << i;
1089 }
1090 }
1091 if (put_user(conn, (u_int32_t __user *)arg))
1092 return -EFAULT;
1093 return 0;
1094 }
1095 case VIDIOC_QUERYCAP:
1096 {
1097 struct v4l2_capability r;
1098
1099 memset(&r, 0, sizeof(r));
1100 strcpy(r.driver, "matroxfb");
1101 strcpy(r.card, "Matrox");
1102 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1103 r.version = KERNEL_VERSION(1,0,0);
1104 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1105 if (copy_to_user(argp, &r, sizeof(r)))
1106 return -EFAULT;
1107 return 0;
1108
1109 }
1110 case VIDIOC_QUERYCTRL:
1111 {
1112 struct v4l2_queryctrl qctrl;
1113 int err;
1114
1115 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1116 return -EFAULT;
1117
1118 down_read(&minfo->altout.lock);
1119 if (!minfo->outputs[1].output) {
1120 err = -ENXIO;
1121 } else if (minfo->outputs[1].output->getqueryctrl) {
1122 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1123 } else {
1124 err = -EINVAL;
1125 }
1126 up_read(&minfo->altout.lock);
1127 if (err >= 0 &&
1128 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1129 return -EFAULT;
1130 return err;
1131 }
1132 case VIDIOC_G_CTRL:
1133 {
1134 struct v4l2_control ctrl;
1135 int err;
1136
1137 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1138 return -EFAULT;
1139
1140 down_read(&minfo->altout.lock);
1141 if (!minfo->outputs[1].output) {
1142 err = -ENXIO;
1143 } else if (minfo->outputs[1].output->getctrl) {
1144 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1145 } else {
1146 err = -EINVAL;
1147 }
1148 up_read(&minfo->altout.lock);
1149 if (err >= 0 &&
1150 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1151 return -EFAULT;
1152 return err;
1153 }
1154 case VIDIOC_S_CTRL_OLD:
1155 case VIDIOC_S_CTRL:
1156 {
1157 struct v4l2_control ctrl;
1158 int err;
1159
1160 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1161 return -EFAULT;
1162
1163 down_read(&minfo->altout.lock);
1164 if (!minfo->outputs[1].output) {
1165 err = -ENXIO;
1166 } else if (minfo->outputs[1].output->setctrl) {
1167 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1168 } else {
1169 err = -EINVAL;
1170 }
1171 up_read(&minfo->altout.lock);
1172 return err;
1173 }
1174 }
1175 return -ENOTTY;
1176 }
1177
1178 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1179
1180 static int matroxfb_blank(int blank, struct fb_info *info)
1181 {
1182 int seq;
1183 int crtc;
1184 CRITFLAGS
1185 struct matrox_fb_info *minfo = info2minfo(info);
1186
1187 DBG(__func__)
1188
1189 if (minfo->dead)
1190 return 1;
1191
1192 switch (blank) {
1193 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1194 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1195 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1196 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1197 default: seq = 0x00; crtc = 0x00; break;
1198 }
1199
1200 CRITBEGIN
1201
1202 mga_outb(M_SEQ_INDEX, 1);
1203 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1204 mga_outb(M_EXTVGA_INDEX, 1);
1205 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1206
1207 CRITEND
1208 return 0;
1209 }
1210
1211 static struct fb_ops matroxfb_ops = {
1212 .owner = THIS_MODULE,
1213 .fb_open = matroxfb_open,
1214 .fb_release = matroxfb_release,
1215 .fb_check_var = matroxfb_check_var,
1216 .fb_set_par = matroxfb_set_par,
1217 .fb_setcolreg = matroxfb_setcolreg,
1218 .fb_pan_display =matroxfb_pan_display,
1219 .fb_blank = matroxfb_blank,
1220 .fb_ioctl = matroxfb_ioctl,
1221 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1222 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1223 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1224 /* .fb_cursor = <set by matrox_cfbX_init>, */
1225 };
1226
1227 #define RSDepth(X) (((X) >> 8) & 0x0F)
1228 #define RS8bpp 0x1
1229 #define RS15bpp 0x2
1230 #define RS16bpp 0x3
1231 #define RS32bpp 0x4
1232 #define RS4bpp 0x5
1233 #define RS24bpp 0x6
1234 #define RSText 0x7
1235 #define RSText8 0x8
1236 /* 9-F */
1237 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1238 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1239 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1240 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1241 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1242 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1243 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1244 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1245 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1246 };
1247
1248 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1249 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1250 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1251 static int inv24; /* "matrox:inv24" */
1252 static int cross4MB = -1; /* "matrox:cross4MB" */
1253 static int disabled; /* "matrox:disabled" */
1254 static int noaccel; /* "matrox:noaccel" */
1255 static int nopan; /* "matrox:nopan" */
1256 static int no_pci_retry; /* "matrox:nopciretry" */
1257 static int novga; /* "matrox:novga" */
1258 static int nobios; /* "matrox:nobios" */
1259 static int noinit = 1; /* "matrox:init" */
1260 static int inverse; /* "matrox:inverse" */
1261 static int sgram; /* "matrox:sgram" */
1262 #ifdef CONFIG_MTRR
1263 static int mtrr = 1; /* "matrox:nomtrr" */
1264 #endif
1265 static int grayscale; /* "matrox:grayscale" */
1266 static int dev = -1; /* "matrox:dev:xxxxx" */
1267 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1268 static int depth = -1; /* "matrox:depth:xxxxx" */
1269 static unsigned int xres; /* "matrox:xres:xxxxx" */
1270 static unsigned int yres; /* "matrox:yres:xxxxx" */
1271 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1272 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1273 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1274 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1275 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1276 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1277 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1278 static int sync = -1; /* "matrox:sync:xxxxx" */
1279 static unsigned int fv; /* "matrox:fv:xxxxx" */
1280 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1281 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1282 static int dfp; /* "matrox:dfp */
1283 static int dfp_type = -1;
1284 static int memtype = -1;
1285 static char outputs[8];
1286
1287 #ifndef MODULE
1288 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1289 #endif
1290
1291 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1292 unsigned int maxSize, unsigned int *realSize)
1293 {
1294 vaddr_t vm;
1295 unsigned int offs;
1296 unsigned int offs2;
1297 unsigned char orig;
1298 unsigned char bytes[32];
1299 unsigned char* tmp;
1300
1301 DBG(__func__)
1302
1303 vm = minfo->video.vbase;
1304 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1305 /* at least 2MB */
1306 if (maxSize < 0x0200000) return 0;
1307 if (maxSize > 0x2000000) maxSize = 0x2000000;
1308
1309 mga_outb(M_EXTVGA_INDEX, 0x03);
1310 orig = mga_inb(M_EXTVGA_DATA);
1311 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1312
1313 tmp = bytes;
1314 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1315 *tmp++ = mga_readb(vm, offs);
1316 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1317 mga_writeb(vm, offs, 0x02);
1318 mga_outb(M_CACHEFLUSH, 0x00);
1319 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1320 if (mga_readb(vm, offs) != 0x02)
1321 break;
1322 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1323 if (mga_readb(vm, offs))
1324 break;
1325 }
1326 tmp = bytes;
1327 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1328 mga_writeb(vm, offs2, *tmp++);
1329
1330 mga_outb(M_EXTVGA_INDEX, 0x03);
1331 mga_outb(M_EXTVGA_DATA, orig);
1332
1333 *realSize = offs - 0x100000;
1334 #ifdef CONFIG_FB_MATROX_MILLENIUM
1335 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1336 #endif
1337 return 1;
1338 }
1339
1340 struct video_board {
1341 int maxvram;
1342 int maxdisplayable;
1343 int accelID;
1344 struct matrox_switch* lowlevel;
1345 };
1346 #ifdef CONFIG_FB_MATROX_MILLENIUM
1347 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1348 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1349 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1350 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1351 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1352 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1353 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1354 #ifdef CONFIG_FB_MATROX_G
1355 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1356 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1357 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1358 whole 32MB */
1359 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1360 #endif
1361
1362 #define DEVF_VIDEO64BIT 0x0001
1363 #define DEVF_SWAPS 0x0002
1364 #define DEVF_SRCORG 0x0004
1365 #define DEVF_DUALHEAD 0x0008
1366 #define DEVF_CROSS4MB 0x0010
1367 #define DEVF_TEXT4B 0x0020
1368 /* #define DEVF_recycled 0x0040 */
1369 /* #define DEVF_recycled 0x0080 */
1370 #define DEVF_SUPPORT32MB 0x0100
1371 #define DEVF_ANY_VXRES 0x0200
1372 #define DEVF_TEXT16B 0x0400
1373 #define DEVF_CRTC2 0x0800
1374 #define DEVF_MAVEN_CAPABLE 0x1000
1375 #define DEVF_PANELLINK_CAPABLE 0x2000
1376 #define DEVF_G450DAC 0x4000
1377
1378 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1379 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1380 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1381 #define DEVF_G200 (DEVF_G2CORE)
1382 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1383 /* if you'll find how to drive DFP... */
1384 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1385 #define DEVF_G550 (DEVF_G450)
1386
1387 static struct board {
1388 unsigned short vendor, device, rev, svid, sid;
1389 unsigned int flags;
1390 unsigned int maxclk;
1391 enum mga_chip chip;
1392 struct video_board* base;
1393 const char* name;
1394 } dev_list[] = {
1395 #ifdef CONFIG_FB_MATROX_MILLENIUM
1396 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1397 0, 0,
1398 DEVF_TEXT4B,
1399 230000,
1400 MGA_2064,
1401 &vbMillennium,
1402 "Millennium (PCI)"},
1403 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1404 0, 0,
1405 DEVF_SWAPS,
1406 220000,
1407 MGA_2164,
1408 &vbMillennium2,
1409 "Millennium II (PCI)"},
1410 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1411 0, 0,
1412 DEVF_SWAPS,
1413 250000,
1414 MGA_2164,
1415 &vbMillennium2A,
1416 "Millennium II (AGP)"},
1417 #endif
1418 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1419 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1420 0, 0,
1421 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1422 180000,
1423 MGA_1064,
1424 &vbMystique,
1425 "Mystique (PCI)"},
1426 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1427 0, 0,
1428 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1429 220000,
1430 MGA_1164,
1431 &vbMystique,
1432 "Mystique 220 (PCI)"},
1433 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1434 0, 0,
1435 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1436 180000,
1437 MGA_1064,
1438 &vbMystique,
1439 "Mystique (AGP)"},
1440 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1441 0, 0,
1442 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1443 220000,
1444 MGA_1164,
1445 &vbMystique,
1446 "Mystique 220 (AGP)"},
1447 #endif
1448 #ifdef CONFIG_FB_MATROX_G
1449 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1450 0, 0,
1451 DEVF_G100,
1452 230000,
1453 MGA_G100,
1454 &vbG100,
1455 "MGA-G100 (PCI)"},
1456 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1457 0, 0,
1458 DEVF_G100,
1459 230000,
1460 MGA_G100,
1461 &vbG100,
1462 "MGA-G100 (AGP)"},
1463 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF,
1464 0, 0,
1465 DEVF_G200,
1466 230000,
1467 MGA_G200,
1468 &vbG200,
1469 "MGA-G200eV (PCI)"},
1470 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1471 0, 0,
1472 DEVF_G200,
1473 250000,
1474 MGA_G200,
1475 &vbG200,
1476 "MGA-G200 (PCI)"},
1477 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1478 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1479 DEVF_G200,
1480 220000,
1481 MGA_G200,
1482 &vbG200,
1483 "MGA-G200 (AGP)"},
1484 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1485 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1486 DEVF_G200,
1487 230000,
1488 MGA_G200,
1489 &vbG200,
1490 "Mystique G200 (AGP)"},
1491 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1492 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1493 DEVF_G200,
1494 250000,
1495 MGA_G200,
1496 &vbG200,
1497 "Millennium G200 (AGP)"},
1498 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1499 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1500 DEVF_G200,
1501 230000,
1502 MGA_G200,
1503 &vbG200,
1504 "Marvel G200 (AGP)"},
1505 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1506 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1507 DEVF_G200,
1508 230000,
1509 MGA_G200,
1510 &vbG200,
1511 "MGA-G200 (AGP)"},
1512 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1513 0, 0,
1514 DEVF_G200,
1515 230000,
1516 MGA_G200,
1517 &vbG200,
1518 "G200 (AGP)"},
1519 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1520 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1521 DEVF_G400,
1522 360000,
1523 MGA_G400,
1524 &vbG400,
1525 "Millennium G400 MAX (AGP)"},
1526 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1527 0, 0,
1528 DEVF_G400,
1529 300000,
1530 MGA_G400,
1531 &vbG400,
1532 "G400 (AGP)"},
1533 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1534 0, 0,
1535 DEVF_G450,
1536 360000,
1537 MGA_G450,
1538 &vbG400,
1539 "G450"},
1540 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1541 0, 0,
1542 DEVF_G550,
1543 360000,
1544 MGA_G550,
1545 &vbG400,
1546 "G550"},
1547 #endif
1548 {0, 0, 0xFF,
1549 0, 0,
1550 0,
1551 0,
1552 0,
1553 NULL,
1554 NULL}};
1555
1556 #ifndef MODULE
1557 static struct fb_videomode defaultmode = {
1558 /* 640x480 @ 60Hz, 31.5 kHz */
1559 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1560 0, FB_VMODE_NONINTERLACED
1561 };
1562 #endif /* !MODULE */
1563
1564 static int hotplug = 0;
1565
1566 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1567 {
1568 unsigned int i;
1569 const char* ptr;
1570
1571 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1572 if (minfo->devflags.g450dac) {
1573 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1574 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1575 } else if (dfp) {
1576 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1577 }
1578 ptr = outputs;
1579 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1580 char c = *ptr++;
1581
1582 if (c == 0) {
1583 break;
1584 }
1585 if (c == '0') {
1586 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1587 } else if (c == '1') {
1588 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1589 } else if (c == '2' && minfo->devflags.crtc2) {
1590 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1591 } else {
1592 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1593 break;
1594 }
1595 }
1596 /* Nullify this option for subsequent adapters */
1597 outputs[0] = 0;
1598 }
1599
1600 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1601 {
1602 unsigned long ctrlptr_phys = 0;
1603 unsigned long video_base_phys = 0;
1604 unsigned int memsize;
1605 int err;
1606
1607 static struct pci_device_id intel_82437[] = {
1608 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1609 { },
1610 };
1611
1612 DBG(__func__)
1613
1614 /* set default values... */
1615 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1616
1617 minfo->hw_switch = b->base->lowlevel;
1618 minfo->devflags.accelerator = b->base->accelID;
1619 minfo->max_pixel_clock = b->maxclk;
1620
1621 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1622 minfo->capable.plnwt = 1;
1623 minfo->chip = b->chip;
1624 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1625 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1626 if (b->flags & DEVF_TEXT4B) {
1627 minfo->devflags.vgastep = 4;
1628 minfo->devflags.textmode = 4;
1629 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1630 } else if (b->flags & DEVF_TEXT16B) {
1631 minfo->devflags.vgastep = 16;
1632 minfo->devflags.textmode = 1;
1633 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1634 } else {
1635 minfo->devflags.vgastep = 8;
1636 minfo->devflags.textmode = 1;
1637 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1638 }
1639 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1640 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1641 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1642 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1643 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1644 minfo->devflags.dfp_type = dfp_type;
1645 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1646 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1647 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1648 setDefaultOutputs(minfo);
1649 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1650 minfo->outputs[2].data = minfo;
1651 minfo->outputs[2].output = &panellink_output;
1652 minfo->outputs[2].src = minfo->outputs[2].default_src;
1653 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1654 minfo->devflags.panellink = 1;
1655 }
1656
1657 if (minfo->capable.cross4MB < 0)
1658 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1659 if (b->flags & DEVF_SWAPS) {
1660 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1661 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1662 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1663 } else {
1664 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1665 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1666 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1667 }
1668 err = -EINVAL;
1669 if (!ctrlptr_phys) {
1670 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1671 goto fail;
1672 }
1673 if (!video_base_phys) {
1674 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1675 goto fail;
1676 }
1677 memsize = b->base->maxvram;
1678 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1679 goto fail;
1680 }
1681 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1682 goto failCtrlMR;
1683 }
1684 minfo->video.len_maximum = memsize;
1685 /* convert mem (autodetect k, M) */
1686 if (mem < 1024) mem *= 1024;
1687 if (mem < 0x00100000) mem *= 1024;
1688
1689 if (mem && (mem < memsize))
1690 memsize = mem;
1691 err = -ENOMEM;
1692 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &minfo->mmio.vbase)) {
1693 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1694 goto failVideoMR;
1695 }
1696 minfo->mmio.base = ctrlptr_phys;
1697 minfo->mmio.len = 16384;
1698 minfo->video.base = video_base_phys;
1699 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &minfo->video.vbase)) {
1700 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1701 video_base_phys, memsize);
1702 goto failCtrlIO;
1703 }
1704 {
1705 u_int32_t cmd;
1706 u_int32_t mga_option;
1707
1708 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1709 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1710 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1711 mga_option |= MX_OPTION_BSWAP;
1712 /* disable palette snooping */
1713 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1714 if (pci_dev_present(intel_82437)) {
1715 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1716 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1717 }
1718 mga_option |= 0x20000000;
1719 minfo->devflags.nopciretry = 1;
1720 }
1721 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1722 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1723 minfo->hw.MXoptionReg = mga_option;
1724
1725 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1726 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1727 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1728 }
1729
1730 err = -ENXIO;
1731 matroxfb_read_pins(minfo);
1732 if (minfo->hw_switch->preinit(minfo)) {
1733 goto failVideoIO;
1734 }
1735
1736 err = -ENOMEM;
1737 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1738 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1739 goto failVideoIO;
1740 }
1741 minfo->devflags.ydstorg = 0;
1742
1743 minfo->video.base = video_base_phys;
1744 minfo->video.len_usable = minfo->video.len;
1745 if (minfo->video.len_usable > b->base->maxdisplayable)
1746 minfo->video.len_usable = b->base->maxdisplayable;
1747 #ifdef CONFIG_MTRR
1748 if (mtrr) {
1749 minfo->mtrr.vram = mtrr_add(video_base_phys, minfo->video.len, MTRR_TYPE_WRCOMB, 1);
1750 minfo->mtrr.vram_valid = 1;
1751 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1752 }
1753 #endif /* CONFIG_MTRR */
1754
1755 if (!minfo->devflags.novga)
1756 request_region(0x3C0, 32, "matrox");
1757 matroxfb_g450_connect(minfo);
1758 minfo->hw_switch->reset(minfo);
1759
1760 minfo->fbcon.monspecs.hfmin = 0;
1761 minfo->fbcon.monspecs.hfmax = fh;
1762 minfo->fbcon.monspecs.vfmin = 0;
1763 minfo->fbcon.monspecs.vfmax = fv;
1764 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1765
1766 /* static settings */
1767 vesafb_defined.red = colors[depth-1].red;
1768 vesafb_defined.green = colors[depth-1].green;
1769 vesafb_defined.blue = colors[depth-1].blue;
1770 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1771 vesafb_defined.grayscale = grayscale;
1772 vesafb_defined.vmode = 0;
1773 if (noaccel)
1774 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1775
1776 minfo->fbops = matroxfb_ops;
1777 minfo->fbcon.fbops = &minfo->fbops;
1778 minfo->fbcon.pseudo_palette = minfo->cmap;
1779 /* after __init time we are like module... no logo */
1780 minfo->fbcon.flags = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1781 minfo->fbcon.flags |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1782 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1783 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1784 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1785 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1786 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1787 minfo->video.len_usable &= PAGE_MASK;
1788 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1789
1790 #ifndef MODULE
1791 /* mode database is marked __init!!! */
1792 if (!hotplug) {
1793 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1794 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1795 }
1796 #endif /* !MODULE */
1797
1798 /* mode modifiers */
1799 if (hslen)
1800 vesafb_defined.hsync_len = hslen;
1801 if (vslen)
1802 vesafb_defined.vsync_len = vslen;
1803 if (left != ~0)
1804 vesafb_defined.left_margin = left;
1805 if (right != ~0)
1806 vesafb_defined.right_margin = right;
1807 if (upper != ~0)
1808 vesafb_defined.upper_margin = upper;
1809 if (lower != ~0)
1810 vesafb_defined.lower_margin = lower;
1811 if (xres)
1812 vesafb_defined.xres = xres;
1813 if (yres)
1814 vesafb_defined.yres = yres;
1815 if (sync != -1)
1816 vesafb_defined.sync = sync;
1817 else if (vesafb_defined.sync == ~0) {
1818 vesafb_defined.sync = 0;
1819 if (yres < 400)
1820 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1821 else if (yres < 480)
1822 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1823 }
1824
1825 /* fv, fh, maxclk limits was specified */
1826 {
1827 unsigned int tmp;
1828
1829 if (fv) {
1830 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1831 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1832 if ((tmp < fh) || (fh == 0)) fh = tmp;
1833 }
1834 if (fh) {
1835 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1836 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1837 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1838 }
1839 tmp = (maxclk + 499) / 500;
1840 if (tmp) {
1841 tmp = (2000000000 + tmp) / tmp;
1842 if (tmp > pixclock) pixclock = tmp;
1843 }
1844 }
1845 if (pixclock) {
1846 if (pixclock < 2000) /* > 500MHz */
1847 pixclock = 4000; /* 250MHz */
1848 if (pixclock > 1000000)
1849 pixclock = 1000000; /* 1MHz */
1850 vesafb_defined.pixclock = pixclock;
1851 }
1852
1853 #if defined(CONFIG_PPC_PMAC)
1854 #ifndef MODULE
1855 if (machine_is(powermac)) {
1856 struct fb_var_screeninfo var;
1857 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1858 default_vmode = VMODE_640_480_60;
1859 #ifdef CONFIG_NVRAM
1860 if (default_cmode == CMODE_NVRAM)
1861 default_cmode = nvram_read_byte(NV_CMODE);
1862 #endif
1863 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1864 default_cmode = CMODE_8;
1865 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1866 var.accel_flags = vesafb_defined.accel_flags;
1867 var.xoffset = var.yoffset = 0;
1868 /* Note: mac_vmode_to_var() does not set all parameters */
1869 vesafb_defined = var;
1870 }
1871 }
1872 #endif /* !MODULE */
1873 #endif /* CONFIG_PPC_PMAC */
1874 vesafb_defined.xres_virtual = vesafb_defined.xres;
1875 if (nopan) {
1876 vesafb_defined.yres_virtual = vesafb_defined.yres;
1877 } else {
1878 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1879 to yres_virtual * xres_virtual < 2^32 */
1880 }
1881 matroxfb_init_fix(minfo);
1882 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1883 /* Normalize values (namely yres_virtual) */
1884 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1885 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1886 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1887 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1888 * anyway. But we at least tried... */
1889 minfo->fbcon.var = vesafb_defined;
1890 err = -EINVAL;
1891
1892 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1893 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1894 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1895 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1896 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1897
1898 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1899 * and we do not want currcon == 0 for subsequent framebuffers */
1900
1901 minfo->fbcon.device = &minfo->pcidev->dev;
1902 if (register_framebuffer(&minfo->fbcon) < 0) {
1903 goto failVideoIO;
1904 }
1905 printk("fb%d: %s frame buffer device\n",
1906 minfo->fbcon.node, minfo->fbcon.fix.id);
1907
1908 /* there is no console on this fb... but we have to initialize hardware
1909 * until someone tells me what is proper thing to do */
1910 if (!minfo->initialized) {
1911 printk(KERN_INFO "fb%d: initializing hardware\n",
1912 minfo->fbcon.node);
1913 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1914 * already before, so register_framebuffer works correctly. */
1915 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1916 fb_set_var(&minfo->fbcon, &vesafb_defined);
1917 }
1918
1919 return 0;
1920 failVideoIO:;
1921 matroxfb_g450_shutdown(minfo);
1922 mga_iounmap(minfo->video.vbase);
1923 failCtrlIO:;
1924 mga_iounmap(minfo->mmio.vbase);
1925 failVideoMR:;
1926 release_mem_region(video_base_phys, minfo->video.len_maximum);
1927 failCtrlMR:;
1928 release_mem_region(ctrlptr_phys, 16384);
1929 fail:;
1930 return err;
1931 }
1932
1933 static LIST_HEAD(matroxfb_list);
1934 static LIST_HEAD(matroxfb_driver_list);
1935
1936 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1937 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1938 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1939 struct matrox_fb_info* minfo;
1940
1941 list_add(&drv->node, &matroxfb_driver_list);
1942 for (minfo = matroxfb_l(matroxfb_list.next);
1943 minfo != matroxfb_l(&matroxfb_list);
1944 minfo = matroxfb_l(minfo->next_fb.next)) {
1945 void* p;
1946
1947 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1948 continue;
1949 p = drv->probe(minfo);
1950 if (p) {
1951 minfo->drivers_data[minfo->drivers_count] = p;
1952 minfo->drivers[minfo->drivers_count++] = drv;
1953 }
1954 }
1955 return 0;
1956 }
1957
1958 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1959 struct matrox_fb_info* minfo;
1960
1961 list_del(&drv->node);
1962 for (minfo = matroxfb_l(matroxfb_list.next);
1963 minfo != matroxfb_l(&matroxfb_list);
1964 minfo = matroxfb_l(minfo->next_fb.next)) {
1965 int i;
1966
1967 for (i = 0; i < minfo->drivers_count; ) {
1968 if (minfo->drivers[i] == drv) {
1969 if (drv && drv->remove)
1970 drv->remove(minfo, minfo->drivers_data[i]);
1971 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1972 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1973 } else
1974 i++;
1975 }
1976 }
1977 }
1978
1979 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1980 struct matroxfb_driver* drv;
1981 int i = 0;
1982 list_add(&minfo->next_fb, &matroxfb_list);
1983 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1984 drv != matroxfb_driver_l(&matroxfb_driver_list);
1985 drv = matroxfb_driver_l(drv->node.next)) {
1986 if (drv && drv->probe) {
1987 void *p = drv->probe(minfo);
1988 if (p) {
1989 minfo->drivers_data[i] = p;
1990 minfo->drivers[i++] = drv;
1991 if (i == MATROXFB_MAX_FB_DRIVERS)
1992 break;
1993 }
1994 }
1995 }
1996 minfo->drivers_count = i;
1997 }
1998
1999 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
2000 int i;
2001
2002 list_del(&minfo->next_fb);
2003 for (i = 0; i < minfo->drivers_count; i++) {
2004 struct matroxfb_driver* drv = minfo->drivers[i];
2005
2006 if (drv && drv->remove)
2007 drv->remove(minfo, minfo->drivers_data[i]);
2008 }
2009 }
2010
2011 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2012 struct board* b;
2013 u_int16_t svid;
2014 u_int16_t sid;
2015 struct matrox_fb_info* minfo;
2016 int err;
2017 u_int32_t cmd;
2018 DBG(__func__)
2019
2020 svid = pdev->subsystem_vendor;
2021 sid = pdev->subsystem_device;
2022 for (b = dev_list; b->vendor; b++) {
2023 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2024 if (b->svid)
2025 if ((b->svid != svid) || (b->sid != sid)) continue;
2026 break;
2027 }
2028 /* not match... */
2029 if (!b->vendor)
2030 return -ENODEV;
2031 if (dev > 0) {
2032 /* not requested one... */
2033 dev--;
2034 return -ENODEV;
2035 }
2036 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2037 if (pci_enable_device(pdev)) {
2038 return -1;
2039 }
2040
2041 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2042 if (!minfo)
2043 return -1;
2044 memset(minfo, 0, sizeof(*minfo));
2045
2046 minfo->pcidev = pdev;
2047 minfo->dead = 0;
2048 minfo->usecount = 0;
2049 minfo->userusecount = 0;
2050
2051 pci_set_drvdata(pdev, minfo);
2052 /* DEVFLAGS */
2053 minfo->devflags.memtype = memtype;
2054 if (memtype != -1)
2055 noinit = 0;
2056 if (cmd & PCI_COMMAND_MEMORY) {
2057 minfo->devflags.novga = novga;
2058 minfo->devflags.nobios = nobios;
2059 minfo->devflags.noinit = noinit;
2060 /* subsequent heads always needs initialization and must not enable BIOS */
2061 novga = 1;
2062 nobios = 1;
2063 noinit = 0;
2064 } else {
2065 minfo->devflags.novga = 1;
2066 minfo->devflags.nobios = 1;
2067 minfo->devflags.noinit = 0;
2068 }
2069
2070 minfo->devflags.nopciretry = no_pci_retry;
2071 minfo->devflags.mga_24bpp_fix = inv24;
2072 minfo->devflags.precise_width = option_precise_width;
2073 minfo->devflags.sgram = sgram;
2074 minfo->capable.cross4MB = cross4MB;
2075
2076 spin_lock_init(&minfo->lock.DAC);
2077 spin_lock_init(&minfo->lock.accel);
2078 init_rwsem(&minfo->crtc2.lock);
2079 init_rwsem(&minfo->altout.lock);
2080 mutex_init(&minfo->fbcon.mm_lock);
2081 minfo->irq_flags = 0;
2082 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2083 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2084 minfo->crtc1.panpos = -1;
2085
2086 err = initMatrox2(minfo, b);
2087 if (!err) {
2088 matroxfb_register_device(minfo);
2089 return 0;
2090 }
2091 kfree(minfo);
2092 return -1;
2093 }
2094
2095 static void pci_remove_matrox(struct pci_dev* pdev) {
2096 struct matrox_fb_info* minfo;
2097
2098 minfo = pci_get_drvdata(pdev);
2099 matroxfb_remove(minfo, 1);
2100 }
2101
2102 static struct pci_device_id matroxfb_devices[] = {
2103 #ifdef CONFIG_FB_MATROX_MILLENIUM
2104 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2105 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2106 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2107 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2108 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2110 #endif
2111 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2112 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2114 #endif
2115 #ifdef CONFIG_FB_MATROX_G
2116 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2117 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2118 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2119 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2120 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI,
2121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2122 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2124 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2126 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2127 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2128 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2130 #endif
2131 {0, 0,
2132 0, 0, 0, 0, 0}
2133 };
2134
2135 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2136
2137
2138 static struct pci_driver matroxfb_driver = {
2139 .name = "matroxfb",
2140 .id_table = matroxfb_devices,
2141 .probe = matroxfb_probe,
2142 .remove = pci_remove_matrox,
2143 };
2144
2145 /* **************************** init-time only **************************** */
2146
2147 #define RSResolution(X) ((X) & 0x0F)
2148 #define RS640x400 1
2149 #define RS640x480 2
2150 #define RS800x600 3
2151 #define RS1024x768 4
2152 #define RS1280x1024 5
2153 #define RS1600x1200 6
2154 #define RS768x576 7
2155 #define RS960x720 8
2156 #define RS1152x864 9
2157 #define RS1408x1056 10
2158 #define RS640x350 11
2159 #define RS1056x344 12 /* 132 x 43 text */
2160 #define RS1056x400 13 /* 132 x 50 text */
2161 #define RS1056x480 14 /* 132 x 60 text */
2162 #define RSNoxNo 15
2163 /* 10-FF */
2164 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2165 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2166 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2167 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2168 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2169 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2170 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2171 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2172 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2173 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2174 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2175 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2176 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2177 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2178 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2179 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2180 };
2181
2182 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2183 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2184 /* default must be first */
2185 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2186 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2187 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2188 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2189 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2190 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2191 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2192 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2193 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2194 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2195 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2196 { 0x110, RSCreate(RS640x480, RS15bpp) },
2197 { 0x181, RSCreate(RS768x576, RS15bpp) },
2198 { 0x113, RSCreate(RS800x600, RS15bpp) },
2199 { 0x189, RSCreate(RS960x720, RS15bpp) },
2200 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2201 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2202 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2203 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2204 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2205 { 0x111, RSCreate(RS640x480, RS16bpp) },
2206 { 0x182, RSCreate(RS768x576, RS16bpp) },
2207 { 0x114, RSCreate(RS800x600, RS16bpp) },
2208 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2209 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2210 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2211 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2212 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2213 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2214 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2215 { 0x184, RSCreate(RS768x576, RS24bpp) },
2216 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2217 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2218 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2219 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2220 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2221 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2222 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2223 { 0x112, RSCreate(RS640x480, RS32bpp) },
2224 { 0x183, RSCreate(RS768x576, RS32bpp) },
2225 { 0x115, RSCreate(RS800x600, RS32bpp) },
2226 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2227 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2228 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2229 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2230 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2231 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2232 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2233 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2234 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2235 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2236 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2237 { 0, 0 }};
2238
2239 static void __init matroxfb_init_params(void) {
2240 /* fh from kHz to Hz */
2241 if (fh < 1000)
2242 fh *= 1000; /* 1kHz minimum */
2243 /* maxclk */
2244 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2245 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2246 /* fix VESA number */
2247 if (vesa != ~0)
2248 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2249
2250 /* static settings */
2251 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2252 if (RSptr->vesa == vesa) break;
2253 }
2254 if (!RSptr->vesa) {
2255 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2256 RSptr = vesamap;
2257 }
2258 {
2259 int res = RSResolution(RSptr->info)-1;
2260 if (left == ~0)
2261 left = timmings[res].left;
2262 if (!xres)
2263 xres = timmings[res].xres;
2264 if (right == ~0)
2265 right = timmings[res].right;
2266 if (!hslen)
2267 hslen = timmings[res].hslen;
2268 if (upper == ~0)
2269 upper = timmings[res].upper;
2270 if (!yres)
2271 yres = timmings[res].yres;
2272 if (lower == ~0)
2273 lower = timmings[res].lower;
2274 if (!vslen)
2275 vslen = timmings[res].vslen;
2276 if (!(fv||fh||maxclk||pixclock))
2277 fv = timmings[res].vfreq;
2278 if (depth == -1)
2279 depth = RSDepth(RSptr->info);
2280 }
2281 }
2282
2283 static int __init matrox_init(void) {
2284 int err;
2285
2286 matroxfb_init_params();
2287 err = pci_register_driver(&matroxfb_driver);
2288 dev = -1; /* accept all new devices... */
2289 return err;
2290 }
2291
2292 /* **************************** exit-time only **************************** */
2293
2294 static void __exit matrox_done(void) {
2295 pci_unregister_driver(&matroxfb_driver);
2296 }
2297
2298 #ifndef MODULE
2299
2300 /* ************************* init in-kernel code ************************** */
2301
2302 static int __init matroxfb_setup(char *options) {
2303 char *this_opt;
2304
2305 DBG(__func__)
2306
2307 if (!options || !*options)
2308 return 0;
2309
2310 while ((this_opt = strsep(&options, ",")) != NULL) {
2311 if (!*this_opt) continue;
2312
2313 dprintk("matroxfb_setup: option %s\n", this_opt);
2314
2315 if (!strncmp(this_opt, "dev:", 4))
2316 dev = simple_strtoul(this_opt+4, NULL, 0);
2317 else if (!strncmp(this_opt, "depth:", 6)) {
2318 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2319 case 0: depth = RSText; break;
2320 case 4: depth = RS4bpp; break;
2321 case 8: depth = RS8bpp; break;
2322 case 15:depth = RS15bpp; break;
2323 case 16:depth = RS16bpp; break;
2324 case 24:depth = RS24bpp; break;
2325 case 32:depth = RS32bpp; break;
2326 default:
2327 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2328 }
2329 } else if (!strncmp(this_opt, "xres:", 5))
2330 xres = simple_strtoul(this_opt+5, NULL, 0);
2331 else if (!strncmp(this_opt, "yres:", 5))
2332 yres = simple_strtoul(this_opt+5, NULL, 0);
2333 else if (!strncmp(this_opt, "vslen:", 6))
2334 vslen = simple_strtoul(this_opt+6, NULL, 0);
2335 else if (!strncmp(this_opt, "hslen:", 6))
2336 hslen = simple_strtoul(this_opt+6, NULL, 0);
2337 else if (!strncmp(this_opt, "left:", 5))
2338 left = simple_strtoul(this_opt+5, NULL, 0);
2339 else if (!strncmp(this_opt, "right:", 6))
2340 right = simple_strtoul(this_opt+6, NULL, 0);
2341 else if (!strncmp(this_opt, "upper:", 6))
2342 upper = simple_strtoul(this_opt+6, NULL, 0);
2343 else if (!strncmp(this_opt, "lower:", 6))
2344 lower = simple_strtoul(this_opt+6, NULL, 0);
2345 else if (!strncmp(this_opt, "pixclock:", 9))
2346 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2347 else if (!strncmp(this_opt, "sync:", 5))
2348 sync = simple_strtoul(this_opt+5, NULL, 0);
2349 else if (!strncmp(this_opt, "vesa:", 5))
2350 vesa = simple_strtoul(this_opt+5, NULL, 0);
2351 else if (!strncmp(this_opt, "maxclk:", 7))
2352 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2353 else if (!strncmp(this_opt, "fh:", 3))
2354 fh = simple_strtoul(this_opt+3, NULL, 0);
2355 else if (!strncmp(this_opt, "fv:", 3))
2356 fv = simple_strtoul(this_opt+3, NULL, 0);
2357 else if (!strncmp(this_opt, "mem:", 4))
2358 mem = simple_strtoul(this_opt+4, NULL, 0);
2359 else if (!strncmp(this_opt, "mode:", 5))
2360 strlcpy(videomode, this_opt+5, sizeof(videomode));
2361 else if (!strncmp(this_opt, "outputs:", 8))
2362 strlcpy(outputs, this_opt+8, sizeof(outputs));
2363 else if (!strncmp(this_opt, "dfp:", 4)) {
2364 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2365 dfp = 1;
2366 }
2367 #ifdef CONFIG_PPC_PMAC
2368 else if (!strncmp(this_opt, "vmode:", 6)) {
2369 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2370 if (vmode > 0 && vmode <= VMODE_MAX)
2371 default_vmode = vmode;
2372 } else if (!strncmp(this_opt, "cmode:", 6)) {
2373 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2374 switch (cmode) {
2375 case 0:
2376 case 8:
2377 default_cmode = CMODE_8;
2378 break;
2379 case 15:
2380 case 16:
2381 default_cmode = CMODE_16;
2382 break;
2383 case 24:
2384 case 32:
2385 default_cmode = CMODE_32;
2386 break;
2387 }
2388 }
2389 #endif
2390 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2391 disabled = 1;
2392 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2393 disabled = 0;
2394 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2395 sgram = 1;
2396 else if (!strcmp(this_opt, "sdram"))
2397 sgram = 0;
2398 else if (!strncmp(this_opt, "memtype:", 8))
2399 memtype = simple_strtoul(this_opt+8, NULL, 0);
2400 else {
2401 int value = 1;
2402
2403 if (!strncmp(this_opt, "no", 2)) {
2404 value = 0;
2405 this_opt += 2;
2406 }
2407 if (! strcmp(this_opt, "inverse"))
2408 inverse = value;
2409 else if (!strcmp(this_opt, "accel"))
2410 noaccel = !value;
2411 else if (!strcmp(this_opt, "pan"))
2412 nopan = !value;
2413 else if (!strcmp(this_opt, "pciretry"))
2414 no_pci_retry = !value;
2415 else if (!strcmp(this_opt, "vga"))
2416 novga = !value;
2417 else if (!strcmp(this_opt, "bios"))
2418 nobios = !value;
2419 else if (!strcmp(this_opt, "init"))
2420 noinit = !value;
2421 #ifdef CONFIG_MTRR
2422 else if (!strcmp(this_opt, "mtrr"))
2423 mtrr = value;
2424 #endif
2425 else if (!strcmp(this_opt, "inv24"))
2426 inv24 = value;
2427 else if (!strcmp(this_opt, "cross4MB"))
2428 cross4MB = value;
2429 else if (!strcmp(this_opt, "grayscale"))
2430 grayscale = value;
2431 else if (!strcmp(this_opt, "dfp"))
2432 dfp = value;
2433 else {
2434 strlcpy(videomode, this_opt, sizeof(videomode));
2435 }
2436 }
2437 }
2438 return 0;
2439 }
2440
2441 static int __initdata initialized = 0;
2442
2443 static int __init matroxfb_init(void)
2444 {
2445 char *option = NULL;
2446 int err = 0;
2447
2448 DBG(__func__)
2449
2450 if (fb_get_options("matroxfb", &option))
2451 return -ENODEV;
2452 matroxfb_setup(option);
2453
2454 if (disabled)
2455 return -ENXIO;
2456 if (!initialized) {
2457 initialized = 1;
2458 err = matrox_init();
2459 }
2460 hotplug = 1;
2461 /* never return failure, user can hotplug matrox later... */
2462 return err;
2463 }
2464
2465 module_init(matroxfb_init);
2466
2467 #else
2468
2469 /* *************************** init module code **************************** */
2470
2471 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2472 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2473 MODULE_LICENSE("GPL");
2474
2475 module_param(mem, int, 0);
2476 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2477 module_param(disabled, int, 0);
2478 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2479 module_param(noaccel, int, 0);
2480 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2481 module_param(nopan, int, 0);
2482 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2483 module_param(no_pci_retry, int, 0);
2484 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2485 module_param(novga, int, 0);
2486 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2487 module_param(nobios, int, 0);
2488 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2489 module_param(noinit, int, 0);
2490 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2491 module_param(memtype, int, 0);
2492 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2493 #ifdef CONFIG_MTRR
2494 module_param(mtrr, int, 0);
2495 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2496 #endif
2497 module_param(sgram, int, 0);
2498 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2499 module_param(inv24, int, 0);
2500 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2501 module_param(inverse, int, 0);
2502 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2503 module_param(dev, int, 0);
2504 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2505 module_param(vesa, int, 0);
2506 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2507 module_param(xres, int, 0);
2508 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2509 module_param(yres, int, 0);
2510 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2511 module_param(upper, int, 0);
2512 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2513 module_param(lower, int, 0);
2514 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2515 module_param(vslen, int, 0);
2516 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2517 module_param(left, int, 0);
2518 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2519 module_param(right, int, 0);
2520 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2521 module_param(hslen, int, 0);
2522 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2523 module_param(pixclock, int, 0);
2524 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2525 module_param(sync, int, 0);
2526 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2527 module_param(depth, int, 0);
2528 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2529 module_param(maxclk, int, 0);
2530 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2531 module_param(fh, int, 0);
2532 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2533 module_param(fv, int, 0);
2534 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2535 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2536 module_param(grayscale, int, 0);
2537 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2538 module_param(cross4MB, int, 0);
2539 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2540 module_param(dfp, int, 0);
2541 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2542 module_param(dfp_type, int, 0);
2543 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2544 module_param_string(outputs, outputs, sizeof(outputs), 0);
2545 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2546 #ifdef CONFIG_PPC_PMAC
2547 module_param_named(vmode, default_vmode, int, 0);
2548 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2549 module_param_named(cmode, default_cmode, int, 0);
2550 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2551 #endif
2552
2553 int __init init_module(void){
2554
2555 DBG(__func__)
2556
2557 if (disabled)
2558 return -ENXIO;
2559
2560 if (depth == 0)
2561 depth = RSText;
2562 else if (depth == 4)
2563 depth = RS4bpp;
2564 else if (depth == 8)
2565 depth = RS8bpp;
2566 else if (depth == 15)
2567 depth = RS15bpp;
2568 else if (depth == 16)
2569 depth = RS16bpp;
2570 else if (depth == 24)
2571 depth = RS24bpp;
2572 else if (depth == 32)
2573 depth = RS32bpp;
2574 else if (depth != -1) {
2575 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2576 depth = -1;
2577 }
2578 matrox_init();
2579 /* never return failure; user can hotplug matrox later... */
2580 return 0;
2581 }
2582 #endif /* MODULE */
2583
2584 module_exit(matrox_done);
2585 EXPORT_SYMBOL(matroxfb_register_driver);
2586 EXPORT_SYMBOL(matroxfb_unregister_driver);
2587 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2588 EXPORT_SYMBOL(matroxfb_enable_irq);
2589
2590 /*
2591 * Overrides for Emacs so that we follow Linus's tabbing style.
2592 * ---------------------------------------------------------------------------
2593 * Local variables:
2594 * c-basic-offset: 8
2595 * End:
2596 */
Tomato firmware and modifications.