2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
14 * This file is licenced under the GPL.
18 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
21 #include <linux/pci.h>
25 #define AB_REG_BAR 0xf0
26 #define AB_INDX(addr) ((addr) + 0x00)
27 #define AB_DATA(addr) ((addr) + 0x04)
31 #define NB_PCIE_INDX_ADDR 0xe0
32 #define NB_PCIE_INDX_DATA 0xe4
33 #define PCIE_P_CNTL 0x10040
34 #define BIF_NB 0x10002
36 static struct pci_dev
*amd_smbus_dev
;
37 static struct pci_dev
*amd_hb_dev
;
38 static int amd_ohci_iso_count
;
40 /*-------------------------------------------------------------------------*/
42 static int broken_suspend(struct usb_hcd
*hcd
)
44 device_init_wakeup(&hcd
->self
.root_hub
->dev
, 0);
48 static int ohci_quirk_amd756(struct usb_hcd
*hcd
)
50 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
52 ohci
->flags
= OHCI_QUIRK_AMD756
;
53 ohci_dbg (ohci
, "AMD756 erratum 4 workaround\n");
55 /* also erratum 10 (suspend/resume issues) */
56 return broken_suspend(hcd
);
59 /* Apple's OHCI driver has a lot of bizarre workarounds
60 * for this chip. Evidently control and bulk lists
61 * can get confused. (B&W G3 models, and ...)
63 static int ohci_quirk_opti(struct usb_hcd
*hcd
)
65 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
67 ohci_dbg (ohci
, "WARNING: OPTi workarounds unavailable\n");
72 /* Check for NSC87560. We have to look at the bridge (fn1) to
73 * identify the USB (fn2). This quirk might apply to more or
76 static int ohci_quirk_ns(struct usb_hcd
*hcd
)
78 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
81 b
= pci_get_slot (pdev
->bus
, PCI_DEVFN (PCI_SLOT (pdev
->devfn
), 1));
82 if (b
&& b
->device
== PCI_DEVICE_ID_NS_87560_LIO
83 && b
->vendor
== PCI_VENDOR_ID_NS
) {
84 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
86 ohci
->flags
|= OHCI_QUIRK_SUPERIO
;
87 ohci_dbg (ohci
, "Using NSC SuperIO setup\n");
94 /* Check for Compaq's ZFMicro chipset, which needs short
95 * delays before control or bulk queues get re-activated
98 static int ohci_quirk_zfmicro(struct usb_hcd
*hcd
)
100 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
102 ohci
->flags
|= OHCI_QUIRK_ZFMICRO
;
103 ohci_dbg(ohci
, "enabled Compaq ZFMicro chipset quirks\n");
108 /* Check for Toshiba SCC OHCI which has big endian registers
109 * and little endian in memory data structures
111 static int ohci_quirk_toshiba_scc(struct usb_hcd
*hcd
)
113 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
115 /* That chip is only present in the southbridge of some
116 * cell based platforms which are supposed to select
117 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
118 * that was the case though.
120 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
121 ohci
->flags
|= OHCI_QUIRK_BE_MMIO
;
122 ohci_dbg (ohci
, "enabled big endian Toshiba quirk\n");
125 ohci_err (ohci
, "unsupported big endian Toshiba quirk\n");
130 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
133 static void ohci_quirk_nec_worker(struct work_struct
*work
)
135 struct ohci_hcd
*ohci
= container_of(work
, struct ohci_hcd
, nec_work
);
138 status
= ohci_init(ohci
);
140 ohci_err(ohci
, "Restarting NEC controller failed in %s, %d\n",
141 "ohci_init", status
);
145 status
= ohci_restart(ohci
);
147 ohci_err(ohci
, "Restarting NEC controller failed in %s, %d\n",
148 "ohci_restart", status
);
151 static int ohci_quirk_nec(struct usb_hcd
*hcd
)
153 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
155 ohci
->flags
|= OHCI_QUIRK_NEC
;
156 INIT_WORK(&ohci
->nec_work
, ohci_quirk_nec_worker
);
157 ohci_dbg (ohci
, "enabled NEC chipset lost interrupt quirk\n");
162 static int ohci_quirk_amd700(struct usb_hcd
*hcd
)
164 struct ohci_hcd
*ohci
= hcd_to_ohci(hcd
);
168 amd_smbus_dev
= pci_get_device(PCI_VENDOR_ID_ATI
,
169 PCI_DEVICE_ID_ATI_SBX00_SMBUS
, NULL
);
173 pci_read_config_byte(amd_smbus_dev
, PCI_REVISION_ID
, &rev
);
175 /* SB800 needs pre-fetch fix */
176 if ((rev
>= 0x40) && (rev
<= 0x4f)) {
177 ohci
->flags
|= OHCI_QUIRK_AMD_PREFETCH
;
178 ohci_dbg(ohci
, "enabled AMD prefetch quirk\n");
181 if ((rev
> 0x3b) || (rev
< 0x30)) {
182 pci_dev_put(amd_smbus_dev
);
183 amd_smbus_dev
= NULL
;
187 amd_ohci_iso_count
++;
190 amd_hb_dev
= pci_get_device(PCI_VENDOR_ID_AMD
, 0x9600, NULL
);
192 ohci
->flags
|= OHCI_QUIRK_AMD_ISO
;
193 ohci_dbg(ohci
, "enabled AMD ISO transfers quirk\n");
199 * The hardware normally enables the A-link power management feature, which
200 * lets the system lower the power consumption in idle states.
202 * Assume the system is configured to have USB 1.1 ISO transfers going
203 * to or from a USB device. Without this quirk, that stream may stutter
204 * or have breaks occasionally. For transfers going to speakers, this
205 * makes a very audible mess...
207 * That audio playback corruption is due to the audio stream getting
208 * interrupted occasionally when the link goes in lower power state
209 * This USB quirk prevents the link going into that lower power state
210 * during audio playback or other ISO operations.
212 static void quirk_amd_pll(int on
)
216 u32 bit
= (on
> 0) ? 1 : 0;
218 pci_read_config_dword(amd_smbus_dev
, AB_REG_BAR
, &addr
);
220 /* BIT names/meanings are NDA-protected, sorry ... */
222 outl(AX_INDXC
, AB_INDX(addr
));
223 outl(0x40, AB_DATA(addr
));
224 outl(AX_DATAC
, AB_INDX(addr
));
225 val
= inl(AB_DATA(addr
));
226 val
&= ~((1 << 3) | (1 << 4) | (1 << 9));
227 val
|= (bit
<< 3) | ((!bit
) << 4) | ((!bit
) << 9);
228 outl(val
, AB_DATA(addr
));
232 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_ADDR
, addr
);
234 pci_read_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, &val
);
235 val
&= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
236 val
|= bit
| (bit
<< 3) | (bit
<< 12);
237 val
|= ((!bit
) << 4) | ((!bit
) << 9);
238 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, val
);
241 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_ADDR
, addr
);
243 pci_read_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, &val
);
246 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, val
);
250 static void amd_iso_dev_put(void)
252 amd_ohci_iso_count
--;
253 if (amd_ohci_iso_count
== 0) {
255 pci_dev_put(amd_smbus_dev
);
256 amd_smbus_dev
= NULL
;
259 pci_dev_put(amd_hb_dev
);
266 static void sb800_prefetch(struct ohci_hcd
*ohci
, int on
)
268 struct pci_dev
*pdev
;
271 pdev
= to_pci_dev(ohci_to_hcd(ohci
)->self
.controller
);
272 pci_read_config_word(pdev
, 0x50, &misc
);
274 pci_write_config_word(pdev
, 0x50, misc
& 0xfcff);
276 pci_write_config_word(pdev
, 0x50, misc
| 0x0300);
279 /* List of quirks for OHCI */
280 static const struct pci_device_id ohci_pci_quirks
[] = {
282 PCI_DEVICE(PCI_VENDOR_ID_AMD
, 0x740c),
283 .driver_data
= (unsigned long)ohci_quirk_amd756
,
286 PCI_DEVICE(PCI_VENDOR_ID_OPTI
, 0xc861),
287 .driver_data
= (unsigned long)ohci_quirk_opti
,
290 PCI_DEVICE(PCI_VENDOR_ID_NS
, PCI_ANY_ID
),
291 .driver_data
= (unsigned long)ohci_quirk_ns
,
294 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ
, 0xa0f8),
295 .driver_data
= (unsigned long)ohci_quirk_zfmicro
,
298 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2
, 0x01b6),
299 .driver_data
= (unsigned long)ohci_quirk_toshiba_scc
,
302 PCI_DEVICE(PCI_VENDOR_ID_NEC
, PCI_DEVICE_ID_NEC_USB
),
303 .driver_data
= (unsigned long)ohci_quirk_nec
,
306 /* Toshiba portege 4000 */
307 .vendor
= PCI_VENDOR_ID_AL
,
309 .subvendor
= PCI_VENDOR_ID_TOSHIBA
,
311 .driver_data
= (unsigned long) broken_suspend
,
314 PCI_DEVICE(PCI_VENDOR_ID_ITE
, 0x8152),
315 .driver_data
= (unsigned long) broken_suspend
,
318 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4397),
319 .driver_data
= (unsigned long)ohci_quirk_amd700
,
322 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4398),
323 .driver_data
= (unsigned long)ohci_quirk_amd700
,
326 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4399),
327 .driver_data
= (unsigned long)ohci_quirk_amd700
,
334 static int ohci_pci_reset (struct usb_hcd
*hcd
)
336 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
339 if (hcd
->self
.controller
) {
340 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
341 const struct pci_device_id
*quirk_id
;
343 quirk_id
= pci_match_id(ohci_pci_quirks
, pdev
);
344 if (quirk_id
!= NULL
) {
345 int (*quirk
)(struct usb_hcd
*ohci
);
346 quirk
= (void *)quirk_id
->driver_data
;
351 ohci_hcd_init (ohci
);
352 return ohci_init (ohci
);
358 static int __devinit
ohci_pci_start (struct usb_hcd
*hcd
)
360 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
363 #ifdef CONFIG_PM /* avoid warnings about unused pdev */
364 if (hcd
->self
.controller
) {
365 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
367 /* RWC may not be set for add-in PCI cards, since boot
368 * firmware probably ignored them. This transfers PCI
369 * PM wakeup capabilities.
371 if (device_can_wakeup(&pdev
->dev
))
372 ohci
->hc_control
|= OHCI_CTRL_RWC
;
374 #endif /* CONFIG_PM */
376 ret
= ohci_run (ohci
);
378 ohci_err (ohci
, "can't start\n");
386 static int ohci_pci_suspend(struct usb_hcd
*hcd
, bool do_wakeup
)
388 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
392 /* Root hub was already suspended. Disable irq emission and
393 * mark HW unaccessible, bail out if RH has been resumed. Use
394 * the spinlock to properly synchronize with possible pending
395 * RH suspend or resume activity.
397 * This is still racy as hcd->state is manipulated outside of
398 * any locks =P But that will be a different fix.
400 spin_lock_irqsave (&ohci
->lock
, flags
);
401 if (hcd
->state
!= HC_STATE_SUSPENDED
) {
405 ohci_writel(ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
406 (void)ohci_readl(ohci
, &ohci
->regs
->intrdisable
);
408 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
410 spin_unlock_irqrestore (&ohci
->lock
, flags
);
416 static int ohci_pci_resume(struct usb_hcd
*hcd
, bool hibernated
)
418 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
420 /* Make sure resume from hibernation re-enumerates everything */
422 ohci_usb_reset(hcd_to_ohci(hcd
));
424 ohci_finish_controller_resume(hcd
);
428 #endif /* CONFIG_PM */
431 /*-------------------------------------------------------------------------*/
433 static const struct hc_driver ohci_pci_hc_driver
= {
434 .description
= hcd_name
,
435 .product_desc
= "OHCI Host Controller",
436 .hcd_priv_size
= sizeof(struct ohci_hcd
),
439 * generic hardware linkage
442 .flags
= HCD_MEMORY
| HCD_USB11
,
445 * basic lifecycle operations
447 .reset
= ohci_pci_reset
,
448 .start
= ohci_pci_start
,
450 .shutdown
= ohci_shutdown
,
453 .pci_suspend
= ohci_pci_suspend
,
454 .pci_resume
= ohci_pci_resume
,
458 * managing i/o requests and associated device resources
460 .urb_enqueue
= ohci_urb_enqueue
,
461 .urb_dequeue
= ohci_urb_dequeue
,
462 .endpoint_disable
= ohci_endpoint_disable
,
467 .get_frame_number
= ohci_get_frame
,
472 .hub_status_data
= ohci_hub_status_data
,
473 .hub_control
= ohci_hub_control
,
475 .bus_suspend
= ohci_bus_suspend
,
476 .bus_resume
= ohci_bus_resume
,
478 .start_port_reset
= ohci_start_port_reset
,
481 /*-------------------------------------------------------------------------*/
484 static const struct pci_device_id pci_ids
[] = { {
485 /* handle any USB OHCI controller */
486 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI
, ~0),
487 .driver_data
= (unsigned long) &ohci_pci_hc_driver
,
488 }, { /* end: all zeroes */ }
490 MODULE_DEVICE_TABLE (pci
, pci_ids
);
492 /* pci driver glue; this is a "new style" PCI driver module */
493 static struct pci_driver ohci_pci_driver
= {
494 .name
= (char *) hcd_name
,
497 .probe
= usb_hcd_pci_probe
,
498 .remove
= usb_hcd_pci_remove
,
499 .shutdown
= usb_hcd_pci_shutdown
,
501 #ifdef CONFIG_PM_SLEEP
503 .pm
= &usb_hcd_pci_pm_ops