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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / usb / gadget / pxa25x_udc.c
blob8c37a31e6217c987df4b704bef28f78382ecdb16
1 /*
2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3 *
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26 /* #define VERBOSE_DEBUG */
27
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/mm.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
48 #include <linux/io.h>
49
50 #include <asm/byteorder.h>
51 #include <asm/dma.h>
52 #include <asm/gpio.h>
53 #include <asm/system.h>
54 #include <asm/mach-types.h>
55 #include <asm/unaligned.h>
56
57 #include <linux/usb/ch9.h>
58 #include <linux/usb/gadget.h>
59 #include <linux/usb/otg.h>
60
61 /*
62 * This driver is PXA25x only. Grab the right register definitions.
63 */
64 #ifdef CONFIG_ARCH_PXA
65 #include <mach/pxa25x-udc.h>
66 #endif
67
68 #ifdef CONFIG_ARCH_LUBBOCK
69 #include <mach/lubbock.h>
70 #endif
71
72 #include <asm/mach/udc_pxa2xx.h>
73
74
75 /*
76 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
77 * series processors. The UDC for the IXP 4xx series is very similar.
78 * There are fifteen endpoints, in addition to ep0.
79 *
80 * Such controller drivers work with a gadget driver. The gadget driver
81 * returns descriptors, implements configuration and data protocols used
82 * by the host to interact with this device, and allocates endpoints to
83 * the different protocol interfaces. The controller driver virtualizes
84 * usb hardware so that the gadget drivers will be more portable.
85 *
86 * This UDC hardware wants to implement a bit too much USB protocol, so
87 * it constrains the sorts of USB configuration change events that work.
88 * The errata for these chips are misleading; some "fixed" bugs from
89 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
90 *
91 * Note that the UDC hardware supports DMA (except on IXP) but that's
92 * not used here. IN-DMA (to host) is simple enough, when the data is
93 * suitably aligned (16 bytes) ... the network stack doesn't do that,
94 * other software can. OUT-DMA is buggy in most chip versions, as well
95 * as poorly designed (data toggle not automatic). So this driver won't
96 * bother using DMA. (Mostly-working IN-DMA support was available in
97 * kernels before 2.6.23, but was never enabled or well tested.)
98 */
99
100 #define DRIVER_VERSION "30-June-2007"
101 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
102
103
104 static const char driver_name [] = "pxa25x_udc";
105
106 static const char ep0name [] = "ep0";
107
108
109 #ifdef CONFIG_ARCH_IXP4XX
110
111 /* cpu-specific register addresses are compiled in to this code */
112 #ifdef CONFIG_ARCH_PXA
113 #error "Can't configure both IXP and PXA"
114 #endif
115
116 /* IXP doesn't yet support <linux/clk.h> */
117 #define clk_get(dev,name) NULL
118 #define clk_enable(clk) do { } while (0)
119 #define clk_disable(clk) do { } while (0)
120 #define clk_put(clk) do { } while (0)
121
122 #endif
123
124 #include "pxa25x_udc.h"
125
126
127 #ifdef CONFIG_USB_PXA25X_SMALL
128 #define SIZE_STR " (small)"
129 #else
130 #define SIZE_STR ""
131 #endif
132
133 /* ---------------------------------------------------------------------------
134 * endpoint related parts of the api to the usb controller hardware,
135 * used by gadget driver; and the inner talker-to-hardware core.
136 * ---------------------------------------------------------------------------
137 */
138
139 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
140 static void nuke (struct pxa25x_ep *, int status);
141
142 /* one GPIO should be used to detect VBUS from the host */
143 static int is_vbus_present(void)
144 {
145 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
146
147 if (gpio_is_valid(mach->gpio_vbus)) {
148 int value = gpio_get_value(mach->gpio_vbus);
149
150 if (mach->gpio_vbus_inverted)
151 return !value;
152 else
153 return !!value;
154 }
155 if (mach->udc_is_connected)
156 return mach->udc_is_connected();
157 return 1;
158 }
159
160 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
161 static void pullup_off(void)
162 {
163 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
164 int off_level = mach->gpio_pullup_inverted;
165
166 if (gpio_is_valid(mach->gpio_pullup))
167 gpio_set_value(mach->gpio_pullup, off_level);
168 else if (mach->udc_command)
169 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
170 }
171
172 static void pullup_on(void)
173 {
174 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
175 int on_level = !mach->gpio_pullup_inverted;
176
177 if (gpio_is_valid(mach->gpio_pullup))
178 gpio_set_value(mach->gpio_pullup, on_level);
179 else if (mach->udc_command)
180 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
181 }
182
183 static void pio_irq_enable(int bEndpointAddress)
184 {
185 bEndpointAddress &= 0xf;
186 if (bEndpointAddress < 8)
187 UICR0 &= ~(1 << bEndpointAddress);
188 else {
189 bEndpointAddress -= 8;
190 UICR1 &= ~(1 << bEndpointAddress);
191 }
192 }
193
194 static void pio_irq_disable(int bEndpointAddress)
195 {
196 bEndpointAddress &= 0xf;
197 if (bEndpointAddress < 8)
198 UICR0 |= 1 << bEndpointAddress;
199 else {
200 bEndpointAddress -= 8;
201 UICR1 |= 1 << bEndpointAddress;
202 }
203 }
204
205 /* The UDCCR reg contains mask and interrupt status bits,
206 * so using '|=' isn't safe as it may ack an interrupt.
207 */
208 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
209
210 static inline void udc_set_mask_UDCCR(int mask)
211 {
212 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
213 }
214
215 static inline void udc_clear_mask_UDCCR(int mask)
216 {
217 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
218 }
219
220 static inline void udc_ack_int_UDCCR(int mask)
221 {
222 /* udccr contains the bits we dont want to change */
223 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
224
225 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
226 }
227
228 /*
229 * endpoint enable/disable
230 *
231 * we need to verify the descriptors used to enable endpoints. since pxa25x
232 * endpoint configurations are fixed, and are pretty much always enabled,
233 * there's not a lot to manage here.
234 *
235 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
236 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
237 * for a single interface (with only the default altsetting) and for gadget
238 * drivers that don't halt endpoints (not reset by set_interface). that also
239 * means that if you use ISO, you must violate the USB spec rule that all
240 * iso endpoints must be in non-default altsettings.
241 */
242 static int pxa25x_ep_enable (struct usb_ep *_ep,
243 const struct usb_endpoint_descriptor *desc)
244 {
245 struct pxa25x_ep *ep;
246 struct pxa25x_udc *dev;
247
248 ep = container_of (_ep, struct pxa25x_ep, ep);
249 if (!_ep || !desc || ep->desc || _ep->name == ep0name
250 || desc->bDescriptorType != USB_DT_ENDPOINT
251 || ep->bEndpointAddress != desc->bEndpointAddress
252 || ep->fifo_size < le16_to_cpu
253 (desc->wMaxPacketSize)) {
254 DMSG("%s, bad ep or descriptor\n", __func__);
255 return -EINVAL;
256 }
257
258 /* xfer types must match, except that interrupt ~= bulk */
259 if (ep->bmAttributes != desc->bmAttributes
260 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
261 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
262 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
263 return -EINVAL;
264 }
265
266 /* hardware _could_ do smaller, but driver doesn't */
267 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
268 && le16_to_cpu (desc->wMaxPacketSize)
269 != BULK_FIFO_SIZE)
270 || !desc->wMaxPacketSize) {
271 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
272 return -ERANGE;
273 }
274
275 dev = ep->dev;
276 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
277 DMSG("%s, bogus device state\n", __func__);
278 return -ESHUTDOWN;
279 }
280
281 ep->desc = desc;
282 ep->stopped = 0;
283 ep->pio_irqs = 0;
284 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
285
286 /* flush fifo (mostly for OUT buffers) */
287 pxa25x_ep_fifo_flush (_ep);
288
289 /* ... reset halt state too, if we could ... */
290
291 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
292 return 0;
293 }
294
295 static int pxa25x_ep_disable (struct usb_ep *_ep)
296 {
297 struct pxa25x_ep *ep;
298 unsigned long flags;
299
300 ep = container_of (_ep, struct pxa25x_ep, ep);
301 if (!_ep || !ep->desc) {
302 DMSG("%s, %s not enabled\n", __func__,
303 _ep ? ep->ep.name : NULL);
304 return -EINVAL;
305 }
306 local_irq_save(flags);
307
308 nuke (ep, -ESHUTDOWN);
309
310 /* flush fifo (mostly for IN buffers) */
311 pxa25x_ep_fifo_flush (_ep);
312
313 ep->desc = NULL;
314 ep->stopped = 1;
315
316 local_irq_restore(flags);
317 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
318 return 0;
319 }
320
321 /*-------------------------------------------------------------------------*/
322
323 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
324 * must still pass correctly initialized endpoints, since other controller
325 * drivers may care about how it's currently set up (dma issues etc).
326 */
327
328 /*
329 * pxa25x_ep_alloc_request - allocate a request data structure
330 */
331 static struct usb_request *
332 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
333 {
334 struct pxa25x_request *req;
335
336 req = kzalloc(sizeof(*req), gfp_flags);
337 if (!req)
338 return NULL;
339
340 INIT_LIST_HEAD (&req->queue);
341 return &req->req;
342 }
343
344
345 /*
346 * pxa25x_ep_free_request - deallocate a request data structure
347 */
348 static void
349 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
350 {
351 struct pxa25x_request *req;
352
353 req = container_of (_req, struct pxa25x_request, req);
354 WARN_ON(!list_empty (&req->queue));
355 kfree(req);
356 }
357
358 /*-------------------------------------------------------------------------*/
359
360 /*
361 * done - retire a request; caller blocked irqs
362 */
363 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
364 {
365 unsigned stopped = ep->stopped;
366
367 list_del_init(&req->queue);
368
369 if (likely (req->req.status == -EINPROGRESS))
370 req->req.status = status;
371 else
372 status = req->req.status;
373
374 if (status && status != -ESHUTDOWN)
375 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
376 ep->ep.name, &req->req, status,
377 req->req.actual, req->req.length);
378
379 /* don't modify queue heads during completion callback */
380 ep->stopped = 1;
381 req->req.complete(&ep->ep, &req->req);
382 ep->stopped = stopped;
383 }
384
385
386 static inline void ep0_idle (struct pxa25x_udc *dev)
387 {
388 dev->ep0state = EP0_IDLE;
389 }
390
391 static int
392 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
393 {
394 u8 *buf;
395 unsigned length, count;
396
397 buf = req->req.buf + req->req.actual;
398 prefetch(buf);
399
400 /* how big will this packet be? */
401 length = min(req->req.length - req->req.actual, max);
402 req->req.actual += length;
403
404 count = length;
405 while (likely(count--))
406 *uddr = *buf++;
407
408 return length;
409 }
410
411 /*
412 * write to an IN endpoint fifo, as many packets as possible.
413 * irqs will use this to write the rest later.
414 * caller guarantees at least one packet buffer is ready (or a zlp).
415 */
416 static int
417 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
418 {
419 unsigned max;
420
421 max = le16_to_cpu(ep->desc->wMaxPacketSize);
422 do {
423 unsigned count;
424 int is_last, is_short;
425
426 count = write_packet(ep->reg_uddr, req, max);
427
428 /* last packet is usually short (or a zlp) */
429 if (unlikely (count != max))
430 is_last = is_short = 1;
431 else {
432 if (likely(req->req.length != req->req.actual)
433 || req->req.zero)
434 is_last = 0;
435 else
436 is_last = 1;
437 /* interrupt/iso maxpacket may not fill the fifo */
438 is_short = unlikely (max < ep->fifo_size);
439 }
440
441 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
442 ep->ep.name, count,
443 is_last ? "/L" : "", is_short ? "/S" : "",
444 req->req.length - req->req.actual, req);
445
446 /* let loose that packet. maybe try writing another one,
447 * double buffering might work. TSP, TPC, and TFS
448 * bit values are the same for all normal IN endpoints.
449 */
450 *ep->reg_udccs = UDCCS_BI_TPC;
451 if (is_short)
452 *ep->reg_udccs = UDCCS_BI_TSP;
453
454 /* requests complete when all IN data is in the FIFO */
455 if (is_last) {
456 done (ep, req, 0);
457 if (list_empty(&ep->queue))
458 pio_irq_disable (ep->bEndpointAddress);
459 return 1;
460 }
461
462 // TODO experiment: how robust can fifo mode tweaking be?
463 // double buffering is off in the default fifo mode, which
464 // prevents TFS from being set here.
465
466 } while (*ep->reg_udccs & UDCCS_BI_TFS);
467 return 0;
468 }
469
470 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
471 * ep0 data stage. these chips want very simple state transitions.
472 */
473 static inline
474 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
475 {
476 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
477 USIR0 = USIR0_IR0;
478 dev->req_pending = 0;
479 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
480 __func__, tag, UDCCS0, flags);
481 }
482
483 static int
484 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
485 {
486 unsigned count;
487 int is_short;
488
489 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
490 ep->dev->stats.write.bytes += count;
491
492 /* last packet "must be" short (or a zlp) */
493 is_short = (count != EP0_FIFO_SIZE);
494
495 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
496 req->req.length - req->req.actual, req);
497
498 if (unlikely (is_short)) {
499 if (ep->dev->req_pending)
500 ep0start(ep->dev, UDCCS0_IPR, "short IN");
501 else
502 UDCCS0 = UDCCS0_IPR;
503
504 count = req->req.length;
505 done (ep, req, 0);
506 ep0_idle(ep->dev);
507 #ifndef CONFIG_ARCH_IXP4XX
508 if (count >= EP0_FIFO_SIZE) {
509 count = 100;
510 do {
511 if ((UDCCS0 & UDCCS0_OPR) != 0) {
512 /* clear OPR, generate ack */
513 UDCCS0 = UDCCS0_OPR;
514 break;
515 }
516 count--;
517 udelay(1);
518 } while (count);
519 }
520 #endif
521 } else if (ep->dev->req_pending)
522 ep0start(ep->dev, 0, "IN");
523 return is_short;
524 }
525
526
527 /*
528 * read_fifo - unload packet(s) from the fifo we use for usb OUT
529 * transfers and put them into the request. caller should have made
530 * sure there's at least one packet ready.
531 *
532 * returns true if the request completed because of short packet or the
533 * request buffer having filled (and maybe overran till end-of-packet).
534 */
535 static int
536 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
537 {
538 for (;;) {
539 u32 udccs;
540 u8 *buf;
541 unsigned bufferspace, count, is_short;
542
543 /* make sure there's a packet in the FIFO.
544 * UDCCS_{BO,IO}_RPC are all the same bit value.
545 * UDCCS_{BO,IO}_RNE are all the same bit value.
546 */
547 udccs = *ep->reg_udccs;
548 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
549 break;
550 buf = req->req.buf + req->req.actual;
551 prefetchw(buf);
552 bufferspace = req->req.length - req->req.actual;
553
554 /* read all bytes from this packet */
555 if (likely (udccs & UDCCS_BO_RNE)) {
556 count = 1 + (0x0ff & *ep->reg_ubcr);
557 req->req.actual += min (count, bufferspace);
558 } else /* zlp */
559 count = 0;
560 is_short = (count < ep->ep.maxpacket);
561 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
562 ep->ep.name, udccs, count,
563 is_short ? "/S" : "",
564 req, req->req.actual, req->req.length);
565 while (likely (count-- != 0)) {
566 u8 byte = (u8) *ep->reg_uddr;
567
568 if (unlikely (bufferspace == 0)) {
569 /* this happens when the driver's buffer
570 * is smaller than what the host sent.
571 * discard the extra data.
572 */
573 if (req->req.status != -EOVERFLOW)
574 DMSG("%s overflow %d\n",
575 ep->ep.name, count);
576 req->req.status = -EOVERFLOW;
577 } else {
578 *buf++ = byte;
579 bufferspace--;
580 }
581 }
582 *ep->reg_udccs = UDCCS_BO_RPC;
583 /* RPC/RSP/RNE could now reflect the other packet buffer */
584
585 /* iso is one request per packet */
586 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
587 if (udccs & UDCCS_IO_ROF)
588 req->req.status = -EHOSTUNREACH;
589 /* more like "is_done" */
590 is_short = 1;
591 }
592
593 /* completion */
594 if (is_short || req->req.actual == req->req.length) {
595 done (ep, req, 0);
596 if (list_empty(&ep->queue))
597 pio_irq_disable (ep->bEndpointAddress);
598 return 1;
599 }
600
601 /* finished that packet. the next one may be waiting... */
602 }
603 return 0;
604 }
605
606 /*
607 * special ep0 version of the above. no UBCR0 or double buffering; status
608 * handshaking is magic. most device protocols don't need control-OUT.
609 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
610 * protocols do use them.
611 */
612 static int
613 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
614 {
615 u8 *buf, byte;
616 unsigned bufferspace;
617
618 buf = req->req.buf + req->req.actual;
619 bufferspace = req->req.length - req->req.actual;
620
621 while (UDCCS0 & UDCCS0_RNE) {
622 byte = (u8) UDDR0;
623
624 if (unlikely (bufferspace == 0)) {
625 /* this happens when the driver's buffer
626 * is smaller than what the host sent.
627 * discard the extra data.
628 */
629 if (req->req.status != -EOVERFLOW)
630 DMSG("%s overflow\n", ep->ep.name);
631 req->req.status = -EOVERFLOW;
632 } else {
633 *buf++ = byte;
634 req->req.actual++;
635 bufferspace--;
636 }
637 }
638
639 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
640
641 /* completion */
642 if (req->req.actual >= req->req.length)
643 return 1;
644
645 /* finished that packet. the next one may be waiting... */
646 return 0;
647 }
648
649 /*-------------------------------------------------------------------------*/
650
651 static int
652 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
653 {
654 struct pxa25x_request *req;
655 struct pxa25x_ep *ep;
656 struct pxa25x_udc *dev;
657 unsigned long flags;
658
659 req = container_of(_req, struct pxa25x_request, req);
660 if (unlikely (!_req || !_req->complete || !_req->buf
661 || !list_empty(&req->queue))) {
662 DMSG("%s, bad params\n", __func__);
663 return -EINVAL;
664 }
665
666 ep = container_of(_ep, struct pxa25x_ep, ep);
667 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
668 DMSG("%s, bad ep\n", __func__);
669 return -EINVAL;
670 }
671
672 dev = ep->dev;
673 if (unlikely (!dev->driver
674 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
675 DMSG("%s, bogus device state\n", __func__);
676 return -ESHUTDOWN;
677 }
678
679 /* iso is always one packet per request, that's the only way
680 * we can report per-packet status. that also helps with dma.
681 */
682 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
683 && req->req.length > le16_to_cpu
684 (ep->desc->wMaxPacketSize)))
685 return -EMSGSIZE;
686
687 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
688 _ep->name, _req, _req->length, _req->buf);
689
690 local_irq_save(flags);
691
692 _req->status = -EINPROGRESS;
693 _req->actual = 0;
694
695 /* kickstart this i/o queue? */
696 if (list_empty(&ep->queue) && !ep->stopped) {
697 if (ep->desc == NULL/* ep0 */) {
698 unsigned length = _req->length;
699
700 switch (dev->ep0state) {
701 case EP0_IN_DATA_PHASE:
702 dev->stats.write.ops++;
703 if (write_ep0_fifo(ep, req))
704 req = NULL;
705 break;
706
707 case EP0_OUT_DATA_PHASE:
708 dev->stats.read.ops++;
709 /* messy ... */
710 if (dev->req_config) {
711 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
712 dev->has_cfr ? "" : " raced");
713 if (dev->has_cfr)
714 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
715 |UDCCFR_MB1;
716 done(ep, req, 0);
717 dev->ep0state = EP0_END_XFER;
718 local_irq_restore (flags);
719 return 0;
720 }
721 if (dev->req_pending)
722 ep0start(dev, UDCCS0_IPR, "OUT");
723 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
724 && read_ep0_fifo(ep, req))) {
725 ep0_idle(dev);
726 done(ep, req, 0);
727 req = NULL;
728 }
729 break;
730
731 default:
732 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
733 local_irq_restore (flags);
734 return -EL2HLT;
735 }
736 /* can the FIFO can satisfy the request immediately? */
737 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
738 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
739 && write_fifo(ep, req))
740 req = NULL;
741 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
742 && read_fifo(ep, req)) {
743 req = NULL;
744 }
745
746 if (likely (req && ep->desc))
747 pio_irq_enable(ep->bEndpointAddress);
748 }
749
750 /* pio or dma irq handler advances the queue. */
751 if (likely(req != NULL))
752 list_add_tail(&req->queue, &ep->queue);
753 local_irq_restore(flags);
754
755 return 0;
756 }
757
758
759 /*
760 * nuke - dequeue ALL requests
761 */
762 static void nuke(struct pxa25x_ep *ep, int status)
763 {
764 struct pxa25x_request *req;
765
766 /* called with irqs blocked */
767 while (!list_empty(&ep->queue)) {
768 req = list_entry(ep->queue.next,
769 struct pxa25x_request,
770 queue);
771 done(ep, req, status);
772 }
773 if (ep->desc)
774 pio_irq_disable (ep->bEndpointAddress);
775 }
776
777
778 /* dequeue JUST ONE request */
779 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
780 {
781 struct pxa25x_ep *ep;
782 struct pxa25x_request *req;
783 unsigned long flags;
784
785 ep = container_of(_ep, struct pxa25x_ep, ep);
786 if (!_ep || ep->ep.name == ep0name)
787 return -EINVAL;
788
789 local_irq_save(flags);
790
791 /* make sure it's actually queued on this endpoint */
792 list_for_each_entry (req, &ep->queue, queue) {
793 if (&req->req == _req)
794 break;
795 }
796 if (&req->req != _req) {
797 local_irq_restore(flags);
798 return -EINVAL;
799 }
800
801 done(ep, req, -ECONNRESET);
802
803 local_irq_restore(flags);
804 return 0;
805 }
806
807 /*-------------------------------------------------------------------------*/
808
809 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
810 {
811 struct pxa25x_ep *ep;
812 unsigned long flags;
813
814 ep = container_of(_ep, struct pxa25x_ep, ep);
815 if (unlikely (!_ep
816 || (!ep->desc && ep->ep.name != ep0name))
817 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
818 DMSG("%s, bad ep\n", __func__);
819 return -EINVAL;
820 }
821 if (value == 0) {
822 /* this path (reset toggle+halt) is needed to implement
823 * SET_INTERFACE on normal hardware. but it can't be
824 * done from software on the PXA UDC, and the hardware
825 * forgets to do it as part of SET_INTERFACE automagic.
826 */
827 DMSG("only host can clear %s halt\n", _ep->name);
828 return -EROFS;
829 }
830
831 local_irq_save(flags);
832
833 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
834 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
835 || !list_empty(&ep->queue))) {
836 local_irq_restore(flags);
837 return -EAGAIN;
838 }
839
840 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
841 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
842
843 /* ep0 needs special care */
844 if (!ep->desc) {
845 start_watchdog(ep->dev);
846 ep->dev->req_pending = 0;
847 ep->dev->ep0state = EP0_STALL;
848
849 /* and bulk/intr endpoints like dropping stalls too */
850 } else {
851 unsigned i;
852 for (i = 0; i < 1000; i += 20) {
853 if (*ep->reg_udccs & UDCCS_BI_SST)
854 break;
855 udelay(20);
856 }
857 }
858 local_irq_restore(flags);
859
860 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
861 return 0;
862 }
863
864 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
865 {
866 struct pxa25x_ep *ep;
867
868 ep = container_of(_ep, struct pxa25x_ep, ep);
869 if (!_ep) {
870 DMSG("%s, bad ep\n", __func__);
871 return -ENODEV;
872 }
873 /* pxa can't report unclaimed bytes from IN fifos */
874 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
875 return -EOPNOTSUPP;
876 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
877 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
878 return 0;
879 else
880 return (*ep->reg_ubcr & 0xfff) + 1;
881 }
882
883 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
884 {
885 struct pxa25x_ep *ep;
886
887 ep = container_of(_ep, struct pxa25x_ep, ep);
888 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
889 DMSG("%s, bad ep\n", __func__);
890 return;
891 }
892
893 /* toggle and halt bits stay unchanged */
894
895 /* for OUT, just read and discard the FIFO contents. */
896 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
897 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
898 (void) *ep->reg_uddr;
899 return;
900 }
901
902 /* most IN status is the same, but ISO can't stall */
903 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
904 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
905 ? 0 : UDCCS_BI_SST);
906 }
907
908
909 static struct usb_ep_ops pxa25x_ep_ops = {
910 .enable = pxa25x_ep_enable,
911 .disable = pxa25x_ep_disable,
912
913 .alloc_request = pxa25x_ep_alloc_request,
914 .free_request = pxa25x_ep_free_request,
915
916 .queue = pxa25x_ep_queue,
917 .dequeue = pxa25x_ep_dequeue,
918
919 .set_halt = pxa25x_ep_set_halt,
920 .fifo_status = pxa25x_ep_fifo_status,
921 .fifo_flush = pxa25x_ep_fifo_flush,
922 };
923
924
925 /* ---------------------------------------------------------------------------
926 * device-scoped parts of the api to the usb controller hardware
927 * ---------------------------------------------------------------------------
928 */
929
930 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
931 {
932 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
933 }
934
935 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
936 {
937 /* host may not have enabled remote wakeup */
938 if ((UDCCS0 & UDCCS0_DRWF) == 0)
939 return -EHOSTUNREACH;
940 udc_set_mask_UDCCR(UDCCR_RSM);
941 return 0;
942 }
943
944 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
945 static void udc_enable (struct pxa25x_udc *);
946 static void udc_disable(struct pxa25x_udc *);
947
948 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
949 * in active use.
950 */
951 static int pullup(struct pxa25x_udc *udc)
952 {
953 int is_active = udc->vbus && udc->pullup && !udc->suspended;
954 DMSG("%s\n", is_active ? "active" : "inactive");
955 if (is_active) {
956 if (!udc->active) {
957 udc->active = 1;
958 /* Enable clock for USB device */
959 clk_enable(udc->clk);
960 udc_enable(udc);
961 }
962 } else {
963 if (udc->active) {
964 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
965 DMSG("disconnect %s\n", udc->driver
966 ? udc->driver->driver.name
967 : "(no driver)");
968 stop_activity(udc, udc->driver);
969 }
970 udc_disable(udc);
971 /* Disable clock for USB device */
972 clk_disable(udc->clk);
973 udc->active = 0;
974 }
975
976 }
977 return 0;
978 }
979
980 /* VBUS reporting logically comes from a transceiver */
981 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
982 {
983 struct pxa25x_udc *udc;
984
985 udc = container_of(_gadget, struct pxa25x_udc, gadget);
986 udc->vbus = is_active;
987 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
988 pullup(udc);
989 return 0;
990 }
991
992 /* drivers may have software control over D+ pullup */
993 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
994 {
995 struct pxa25x_udc *udc;
996
997 udc = container_of(_gadget, struct pxa25x_udc, gadget);
998
999 /* not all boards support pullup control */
1000 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1001 return -EOPNOTSUPP;
1002
1003 udc->pullup = (is_active != 0);
1004 pullup(udc);
1005 return 0;
1006 }
1007
1008 /* boards may consume current from VBUS, up to 100-500mA based on config.
1009 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
1010 * violate USB specs.
1011 */
1012 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1013 {
1014 struct pxa25x_udc *udc;
1015
1016 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1017
1018 if (udc->transceiver)
1019 return otg_set_power(udc->transceiver, mA);
1020 return -EOPNOTSUPP;
1021 }
1022
1023 static const struct usb_gadget_ops pxa25x_udc_ops = {
1024 .get_frame = pxa25x_udc_get_frame,
1025 .wakeup = pxa25x_udc_wakeup,
1026 .vbus_session = pxa25x_udc_vbus_session,
1027 .pullup = pxa25x_udc_pullup,
1028 .vbus_draw = pxa25x_udc_vbus_draw,
1029 };
1030
1031 /*-------------------------------------------------------------------------*/
1032
1033 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1034
1035 static int
1036 udc_seq_show(struct seq_file *m, void *_d)
1037 {
1038 struct pxa25x_udc *dev = m->private;
1039 unsigned long flags;
1040 int i;
1041 u32 tmp;
1042
1043 local_irq_save(flags);
1044
1045 /* basic device status */
1046 seq_printf(m, DRIVER_DESC "\n"
1047 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1048 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1049 dev->driver ? dev->driver->driver.name : "(none)",
1050 is_vbus_present() ? "full speed" : "disconnected");
1051
1052 /* registers for device and ep0 */
1053 seq_printf(m,
1054 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1055 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1056
1057 tmp = UDCCR;
1058 seq_printf(m,
1059 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1060 (tmp & UDCCR_REM) ? " rem" : "",
1061 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1062 (tmp & UDCCR_SRM) ? " srm" : "",
1063 (tmp & UDCCR_SUSIR) ? " susir" : "",
1064 (tmp & UDCCR_RESIR) ? " resir" : "",
1065 (tmp & UDCCR_RSM) ? " rsm" : "",
1066 (tmp & UDCCR_UDA) ? " uda" : "",
1067 (tmp & UDCCR_UDE) ? " ude" : "");
1068
1069 tmp = UDCCS0;
1070 seq_printf(m,
1071 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1072 (tmp & UDCCS0_SA) ? " sa" : "",
1073 (tmp & UDCCS0_RNE) ? " rne" : "",
1074 (tmp & UDCCS0_FST) ? " fst" : "",
1075 (tmp & UDCCS0_SST) ? " sst" : "",
1076 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1077 (tmp & UDCCS0_FTF) ? " ftf" : "",
1078 (tmp & UDCCS0_IPR) ? " ipr" : "",
1079 (tmp & UDCCS0_OPR) ? " opr" : "");
1080
1081 if (dev->has_cfr) {
1082 tmp = UDCCFR;
1083 seq_printf(m,
1084 "udccfr %02X =%s%s\n", tmp,
1085 (tmp & UDCCFR_AREN) ? " aren" : "",
1086 (tmp & UDCCFR_ACM) ? " acm" : "");
1087 }
1088
1089 if (!is_vbus_present() || !dev->driver)
1090 goto done;
1091
1092 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1093 dev->stats.write.bytes, dev->stats.write.ops,
1094 dev->stats.read.bytes, dev->stats.read.ops,
1095 dev->stats.irqs);
1096
1097 /* dump endpoint queues */
1098 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1099 struct pxa25x_ep *ep = &dev->ep [i];
1100 struct pxa25x_request *req;
1101
1102 if (i != 0) {
1103 const struct usb_endpoint_descriptor *desc;
1104
1105 desc = ep->desc;
1106 if (!desc)
1107 continue;
1108 tmp = *dev->ep [i].reg_udccs;
1109 seq_printf(m,
1110 "%s max %d %s udccs %02x irqs %lu\n",
1111 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1112 "pio", tmp, ep->pio_irqs);
1113 /* TODO translate all five groups of udccs bits! */
1114
1115 } else /* ep0 should only have one transfer queued */
1116 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1117 ep->pio_irqs);
1118
1119 if (list_empty(&ep->queue)) {
1120 seq_printf(m, "\t(nothing queued)\n");
1121 continue;
1122 }
1123 list_for_each_entry(req, &ep->queue, queue) {
1124 seq_printf(m,
1125 "\treq %p len %d/%d buf %p\n",
1126 &req->req, req->req.actual,
1127 req->req.length, req->req.buf);
1128 }
1129 }
1130
1131 done:
1132 local_irq_restore(flags);
1133 return 0;
1134 }
1135
1136 static int
1137 udc_debugfs_open(struct inode *inode, struct file *file)
1138 {
1139 return single_open(file, udc_seq_show, inode->i_private);
1140 }
1141
1142 static const struct file_operations debug_fops = {
1143 .open = udc_debugfs_open,
1144 .read = seq_read,
1145 .llseek = seq_lseek,
1146 .release = single_release,
1147 .owner = THIS_MODULE,
1148 };
1149
1150 #define create_debug_files(dev) \
1151 do { \
1152 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1153 S_IRUGO, NULL, dev, &debug_fops); \
1154 } while (0)
1155 #define remove_debug_files(dev) \
1156 do { \
1157 if (dev->debugfs_udc) \
1158 debugfs_remove(dev->debugfs_udc); \
1159 } while (0)
1160
1161 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1162
1163 #define create_debug_files(dev) do {} while (0)
1164 #define remove_debug_files(dev) do {} while (0)
1165
1166 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1167
1168 /*-------------------------------------------------------------------------*/
1169
1170 /*
1171 * udc_disable - disable USB device controller
1172 */
1173 static void udc_disable(struct pxa25x_udc *dev)
1174 {
1175 /* block all irqs */
1176 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1177 UICR0 = UICR1 = 0xff;
1178 UFNRH = UFNRH_SIM;
1179
1180 /* if hardware supports it, disconnect from usb */
1181 pullup_off();
1182
1183 udc_clear_mask_UDCCR(UDCCR_UDE);
1184
1185 ep0_idle (dev);
1186 dev->gadget.speed = USB_SPEED_UNKNOWN;
1187 }
1188
1189
1190 /*
1191 * udc_reinit - initialize software state
1192 */
1193 static void udc_reinit(struct pxa25x_udc *dev)
1194 {
1195 u32 i;
1196
1197 /* device/ep0 records init */
1198 INIT_LIST_HEAD (&dev->gadget.ep_list);
1199 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1200 dev->ep0state = EP0_IDLE;
1201
1202 /* basic endpoint records init */
1203 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1204 struct pxa25x_ep *ep = &dev->ep[i];
1205
1206 if (i != 0)
1207 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1208
1209 ep->desc = NULL;
1210 ep->stopped = 0;
1211 INIT_LIST_HEAD (&ep->queue);
1212 ep->pio_irqs = 0;
1213 }
1214
1215 /* the rest was statically initialized, and is read-only */
1216 }
1217
1218 /* until it's enabled, this UDC should be completely invisible
1219 * to any USB host.
1220 */
1221 static void udc_enable (struct pxa25x_udc *dev)
1222 {
1223 udc_clear_mask_UDCCR(UDCCR_UDE);
1224
1225 /* try to clear these bits before we enable the udc */
1226 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1227
1228 ep0_idle(dev);
1229 dev->gadget.speed = USB_SPEED_UNKNOWN;
1230 dev->stats.irqs = 0;
1231
1232 /*
1233 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1234 * - enable UDC
1235 * - if RESET is already in progress, ack interrupt
1236 * - unmask reset interrupt
1237 */
1238 udc_set_mask_UDCCR(UDCCR_UDE);
1239 if (!(UDCCR & UDCCR_UDA))
1240 udc_ack_int_UDCCR(UDCCR_RSTIR);
1241
1242 if (dev->has_cfr /* UDC_RES2 is defined */) {
1243 /* pxa255 (a0+) can avoid a set_config race that could
1244 * prevent gadget drivers from configuring correctly
1245 */
1246 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1247 } else {
1248 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1249 * which could result in missing packets and interrupts.
1250 * supposedly one bit per endpoint, controlling whether it
1251 * double buffers or not; ACM/AREN bits fit into the holes.
1252 * zero bits (like USIR0_IRx) disable double buffering.
1253 */
1254 UDC_RES1 = 0x00;
1255 UDC_RES2 = 0x00;
1256 }
1257
1258 /* enable suspend/resume and reset irqs */
1259 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1260
1261 /* enable ep0 irqs */
1262 UICR0 &= ~UICR0_IM0;
1263
1264 /* if hardware supports it, pullup D+ and wait for reset */
1265 pullup_on();
1266 }
1267
1268
1269 /* when a driver is successfully registered, it will receive
1270 * control requests including set_configuration(), which enables
1271 * non-control requests. then usb traffic follows until a
1272 * disconnect is reported. then a host may connect again, or
1273 * the driver might get unbound.
1274 */
1275 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1276 {
1277 struct pxa25x_udc *dev = the_controller;
1278 int retval;
1279
1280 if (!driver
1281 || driver->speed < USB_SPEED_FULL
1282 || !driver->bind
1283 || !driver->disconnect
1284 || !driver->setup)
1285 return -EINVAL;
1286 if (!dev)
1287 return -ENODEV;
1288 if (dev->driver)
1289 return -EBUSY;
1290
1291 /* first hook up the driver ... */
1292 dev->driver = driver;
1293 dev->gadget.dev.driver = &driver->driver;
1294 dev->pullup = 1;
1295
1296 retval = device_add (&dev->gadget.dev);
1297 if (retval) {
1298 fail:
1299 dev->driver = NULL;
1300 dev->gadget.dev.driver = NULL;
1301 return retval;
1302 }
1303 retval = driver->bind(&dev->gadget);
1304 if (retval) {
1305 DMSG("bind to driver %s --> error %d\n",
1306 driver->driver.name, retval);
1307 device_del (&dev->gadget.dev);
1308 goto fail;
1309 }
1310
1311 /* ... then enable host detection and ep0; and we're ready
1312 * for set_configuration as well as eventual disconnect.
1313 */
1314 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1315
1316 /* connect to bus through transceiver */
1317 if (dev->transceiver) {
1318 retval = otg_set_peripheral(dev->transceiver, &dev->gadget);
1319 if (retval) {
1320 DMSG("can't bind to transceiver\n");
1321 if (driver->unbind)
1322 driver->unbind(&dev->gadget);
1323 goto bind_fail;
1324 }
1325 }
1326
1327 pullup(dev);
1328 dump_state(dev);
1329 return 0;
1330 bind_fail:
1331 return retval;
1332 }
1333 EXPORT_SYMBOL(usb_gadget_register_driver);
1334
1335 static void
1336 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1337 {
1338 int i;
1339
1340 /* don't disconnect drivers more than once */
1341 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1342 driver = NULL;
1343 dev->gadget.speed = USB_SPEED_UNKNOWN;
1344
1345 /* prevent new request submissions, kill any outstanding requests */
1346 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1347 struct pxa25x_ep *ep = &dev->ep[i];
1348
1349 ep->stopped = 1;
1350 nuke(ep, -ESHUTDOWN);
1351 }
1352 del_timer_sync(&dev->timer);
1353
1354 /* report disconnect; the driver is already quiesced */
1355 if (driver)
1356 driver->disconnect(&dev->gadget);
1357
1358 /* re-init driver-visible data structures */
1359 udc_reinit(dev);
1360 }
1361
1362 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1363 {
1364 struct pxa25x_udc *dev = the_controller;
1365
1366 if (!dev)
1367 return -ENODEV;
1368 if (!driver || driver != dev->driver || !driver->unbind)
1369 return -EINVAL;
1370
1371 local_irq_disable();
1372 dev->pullup = 0;
1373 pullup(dev);
1374 stop_activity(dev, driver);
1375 local_irq_enable();
1376
1377 if (dev->transceiver)
1378 (void) otg_set_peripheral(dev->transceiver, NULL);
1379
1380 driver->unbind(&dev->gadget);
1381 dev->gadget.dev.driver = NULL;
1382 dev->driver = NULL;
1383
1384 device_del (&dev->gadget.dev);
1385
1386 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1387 dump_state(dev);
1388 return 0;
1389 }
1390 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1391
1392
1393 /*-------------------------------------------------------------------------*/
1394
1395 #ifdef CONFIG_ARCH_LUBBOCK
1396
1397 /* Lubbock has separate connect and disconnect irqs. More typical designs
1398 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1399 */
1400
1401 static irqreturn_t
1402 lubbock_vbus_irq(int irq, void *_dev)
1403 {
1404 struct pxa25x_udc *dev = _dev;
1405 int vbus;
1406
1407 dev->stats.irqs++;
1408 switch (irq) {
1409 case LUBBOCK_USB_IRQ:
1410 vbus = 1;
1411 disable_irq(LUBBOCK_USB_IRQ);
1412 enable_irq(LUBBOCK_USB_DISC_IRQ);
1413 break;
1414 case LUBBOCK_USB_DISC_IRQ:
1415 vbus = 0;
1416 disable_irq(LUBBOCK_USB_DISC_IRQ);
1417 enable_irq(LUBBOCK_USB_IRQ);
1418 break;
1419 default:
1420 return IRQ_NONE;
1421 }
1422
1423 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1424 return IRQ_HANDLED;
1425 }
1426
1427 #endif
1428
1429 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1430 {
1431 struct pxa25x_udc *dev = _dev;
1432
1433 pxa25x_udc_vbus_session(&dev->gadget, is_vbus_present());
1434 return IRQ_HANDLED;
1435 }
1436
1437
1438 /*-------------------------------------------------------------------------*/
1439
1440 static inline void clear_ep_state (struct pxa25x_udc *dev)
1441 {
1442 unsigned i;
1443
1444 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1445 * fifos, and pending transactions mustn't be continued in any case.
1446 */
1447 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1448 nuke(&dev->ep[i], -ECONNABORTED);
1449 }
1450
1451 static void udc_watchdog(unsigned long _dev)
1452 {
1453 struct pxa25x_udc *dev = (void *)_dev;
1454
1455 local_irq_disable();
1456 if (dev->ep0state == EP0_STALL
1457 && (UDCCS0 & UDCCS0_FST) == 0
1458 && (UDCCS0 & UDCCS0_SST) == 0) {
1459 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1460 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1461 start_watchdog(dev);
1462 }
1463 local_irq_enable();
1464 }
1465
1466 static void handle_ep0 (struct pxa25x_udc *dev)
1467 {
1468 u32 udccs0 = UDCCS0;
1469 struct pxa25x_ep *ep = &dev->ep [0];
1470 struct pxa25x_request *req;
1471 union {
1472 struct usb_ctrlrequest r;
1473 u8 raw [8];
1474 u32 word [2];
1475 } u;
1476
1477 if (list_empty(&ep->queue))
1478 req = NULL;
1479 else
1480 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1481
1482 /* clear stall status */
1483 if (udccs0 & UDCCS0_SST) {
1484 nuke(ep, -EPIPE);
1485 UDCCS0 = UDCCS0_SST;
1486 del_timer(&dev->timer);
1487 ep0_idle(dev);
1488 }
1489
1490 /* previous request unfinished? non-error iff back-to-back ... */
1491 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1492 nuke(ep, 0);
1493 del_timer(&dev->timer);
1494 ep0_idle(dev);
1495 }
1496
1497 switch (dev->ep0state) {
1498 case EP0_IDLE:
1499 /* late-breaking status? */
1500 udccs0 = UDCCS0;
1501
1502 /* start control request? */
1503 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1504 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1505 int i;
1506
1507 nuke (ep, -EPROTO);
1508
1509 /* read SETUP packet */
1510 for (i = 0; i < 8; i++) {
1511 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1512 bad_setup:
1513 DMSG("SETUP %d!\n", i);
1514 goto stall;
1515 }
1516 u.raw [i] = (u8) UDDR0;
1517 }
1518 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1519 goto bad_setup;
1520
1521 got_setup:
1522 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1523 u.r.bRequestType, u.r.bRequest,
1524 le16_to_cpu(u.r.wValue),
1525 le16_to_cpu(u.r.wIndex),
1526 le16_to_cpu(u.r.wLength));
1527
1528 /* cope with automagic for some standard requests. */
1529 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1530 == USB_TYPE_STANDARD;
1531 dev->req_config = 0;
1532 dev->req_pending = 1;
1533 switch (u.r.bRequest) {
1534 /* hardware restricts gadget drivers here! */
1535 case USB_REQ_SET_CONFIGURATION:
1536 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1537 /* reflect hardware's automagic
1538 * up to the gadget driver.
1539 */
1540 config_change:
1541 dev->req_config = 1;
1542 clear_ep_state(dev);
1543 /* if !has_cfr, there's no synch
1544 * else use AREN (later) not SA|OPR
1545 * USIR0_IR0 acts edge sensitive
1546 */
1547 }
1548 break;
1549 /* ... and here, even more ... */
1550 case USB_REQ_SET_INTERFACE:
1551 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1552 /* udc hardware is broken by design:
1553 * - altsetting may only be zero;
1554 * - hw resets all interfaces' eps;
1555 * - ep reset doesn't include halt(?).
1556 */
1557 DMSG("broken set_interface (%d/%d)\n",
1558 le16_to_cpu(u.r.wIndex),
1559 le16_to_cpu(u.r.wValue));
1560 goto config_change;
1561 }
1562 break;
1563 /* hardware was supposed to hide this */
1564 case USB_REQ_SET_ADDRESS:
1565 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1566 ep0start(dev, 0, "address");
1567 return;
1568 }
1569 break;
1570 }
1571
1572 if (u.r.bRequestType & USB_DIR_IN)
1573 dev->ep0state = EP0_IN_DATA_PHASE;
1574 else
1575 dev->ep0state = EP0_OUT_DATA_PHASE;
1576
1577 i = dev->driver->setup(&dev->gadget, &u.r);
1578 if (i < 0) {
1579 /* hardware automagic preventing STALL... */
1580 if (dev->req_config) {
1581 /* hardware sometimes neglects to tell
1582 * tell us about config change events,
1583 * so later ones may fail...
1584 */
1585 WARNING("config change %02x fail %d?\n",
1586 u.r.bRequest, i);
1587 return;
1588 /* TODO experiment: if has_cfr,
1589 * hardware didn't ACK; maybe we
1590 * could actually STALL!
1591 */
1592 }
1593 DBG(DBG_VERBOSE, "protocol STALL, "
1594 "%02x err %d\n", UDCCS0, i);
1595 stall:
1596 /* the watchdog timer helps deal with cases
1597 * where udc seems to clear FST wrongly, and
1598 * then NAKs instead of STALLing.
1599 */
1600 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1601 start_watchdog(dev);
1602 dev->ep0state = EP0_STALL;
1603
1604 /* deferred i/o == no response yet */
1605 } else if (dev->req_pending) {
1606 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1607 || dev->req_std || u.r.wLength))
1608 ep0start(dev, 0, "defer");
1609 else
1610 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1611 }
1612
1613 /* expect at least one data or status stage irq */
1614 return;
1615
1616 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1617 == (UDCCS0_OPR|UDCCS0_SA))) {
1618 unsigned i;
1619
1620 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1621 * still observed on a pxa255 a0.
1622 */
1623 DBG(DBG_VERBOSE, "e131\n");
1624 nuke(ep, -EPROTO);
1625
1626 /* read SETUP data, but don't trust it too much */
1627 for (i = 0; i < 8; i++)
1628 u.raw [i] = (u8) UDDR0;
1629 if ((u.r.bRequestType & USB_RECIP_MASK)
1630 > USB_RECIP_OTHER)
1631 goto stall;
1632 if (u.word [0] == 0 && u.word [1] == 0)
1633 goto stall;
1634 goto got_setup;
1635 } else {
1636 /* some random early IRQ:
1637 * - we acked FST
1638 * - IPR cleared
1639 * - OPR got set, without SA (likely status stage)
1640 */
1641 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1642 }
1643 break;
1644 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1645 if (udccs0 & UDCCS0_OPR) {
1646 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1647 DBG(DBG_VERBOSE, "ep0in premature status\n");
1648 if (req)
1649 done(ep, req, 0);
1650 ep0_idle(dev);
1651 } else /* irq was IPR clearing */ {
1652 if (req) {
1653 /* this IN packet might finish the request */
1654 (void) write_ep0_fifo(ep, req);
1655 } /* else IN token before response was written */
1656 }
1657 break;
1658 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1659 if (udccs0 & UDCCS0_OPR) {
1660 if (req) {
1661 /* this OUT packet might finish the request */
1662 if (read_ep0_fifo(ep, req))
1663 done(ep, req, 0);
1664 /* else more OUT packets expected */
1665 } /* else OUT token before read was issued */
1666 } else /* irq was IPR clearing */ {
1667 DBG(DBG_VERBOSE, "ep0out premature status\n");
1668 if (req)
1669 done(ep, req, 0);
1670 ep0_idle(dev);
1671 }
1672 break;
1673 case EP0_END_XFER:
1674 if (req)
1675 done(ep, req, 0);
1676 /* ack control-IN status (maybe in-zlp was skipped)
1677 * also appears after some config change events.
1678 */
1679 if (udccs0 & UDCCS0_OPR)
1680 UDCCS0 = UDCCS0_OPR;
1681 ep0_idle(dev);
1682 break;
1683 case EP0_STALL:
1684 UDCCS0 = UDCCS0_FST;
1685 break;
1686 }
1687 USIR0 = USIR0_IR0;
1688 }
1689
1690 static void handle_ep(struct pxa25x_ep *ep)
1691 {
1692 struct pxa25x_request *req;
1693 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1694 int completed;
1695 u32 udccs, tmp;
1696
1697 do {
1698 completed = 0;
1699 if (likely (!list_empty(&ep->queue)))
1700 req = list_entry(ep->queue.next,
1701 struct pxa25x_request, queue);
1702 else
1703 req = NULL;
1704
1705 // TODO check FST handling
1706
1707 udccs = *ep->reg_udccs;
1708 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1709 tmp = UDCCS_BI_TUR;
1710 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1711 tmp |= UDCCS_BI_SST;
1712 tmp &= udccs;
1713 if (likely (tmp))
1714 *ep->reg_udccs = tmp;
1715 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1716 completed = write_fifo(ep, req);
1717
1718 } else { /* irq from RPC (or for ISO, ROF) */
1719 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1720 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1721 else
1722 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1723 tmp &= udccs;
1724 if (likely(tmp))
1725 *ep->reg_udccs = tmp;
1726
1727 /* fifos can hold packets, ready for reading... */
1728 if (likely(req)) {
1729 completed = read_fifo(ep, req);
1730 } else
1731 pio_irq_disable (ep->bEndpointAddress);
1732 }
1733 ep->pio_irqs++;
1734 } while (completed);
1735 }
1736
1737 /*
1738 * pxa25x_udc_irq - interrupt handler
1739 *
1740 * avoid delays in ep0 processing. the control handshaking isn't always
1741 * under software control (pxa250c0 and the pxa255 are better), and delays
1742 * could cause usb protocol errors.
1743 */
1744 static irqreturn_t
1745 pxa25x_udc_irq(int irq, void *_dev)
1746 {
1747 struct pxa25x_udc *dev = _dev;
1748 int handled;
1749
1750 dev->stats.irqs++;
1751 do {
1752 u32 udccr = UDCCR;
1753
1754 handled = 0;
1755
1756 /* SUSpend Interrupt Request */
1757 if (unlikely(udccr & UDCCR_SUSIR)) {
1758 udc_ack_int_UDCCR(UDCCR_SUSIR);
1759 handled = 1;
1760 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1761 ? "" : "+disconnect");
1762
1763 if (!is_vbus_present())
1764 stop_activity(dev, dev->driver);
1765 else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1766 && dev->driver
1767 && dev->driver->suspend)
1768 dev->driver->suspend(&dev->gadget);
1769 ep0_idle (dev);
1770 }
1771
1772 /* RESume Interrupt Request */
1773 if (unlikely(udccr & UDCCR_RESIR)) {
1774 udc_ack_int_UDCCR(UDCCR_RESIR);
1775 handled = 1;
1776 DBG(DBG_VERBOSE, "USB resume\n");
1777
1778 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1779 && dev->driver
1780 && dev->driver->resume
1781 && is_vbus_present())
1782 dev->driver->resume(&dev->gadget);
1783 }
1784
1785 /* ReSeT Interrupt Request - USB reset */
1786 if (unlikely(udccr & UDCCR_RSTIR)) {
1787 udc_ack_int_UDCCR(UDCCR_RSTIR);
1788 handled = 1;
1789
1790 if ((UDCCR & UDCCR_UDA) == 0) {
1791 DBG(DBG_VERBOSE, "USB reset start\n");
1792
1793 /* reset driver and endpoints,
1794 * in case that's not yet done
1795 */
1796 stop_activity (dev, dev->driver);
1797
1798 } else {
1799 DBG(DBG_VERBOSE, "USB reset end\n");
1800 dev->gadget.speed = USB_SPEED_FULL;
1801 memset(&dev->stats, 0, sizeof dev->stats);
1802 /* driver and endpoints are still reset */
1803 }
1804
1805 } else {
1806 u32 usir0 = USIR0 & ~UICR0;
1807 u32 usir1 = USIR1 & ~UICR1;
1808 int i;
1809
1810 if (unlikely (!usir0 && !usir1))
1811 continue;
1812
1813 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1814
1815 /* control traffic */
1816 if (usir0 & USIR0_IR0) {
1817 dev->ep[0].pio_irqs++;
1818 handle_ep0(dev);
1819 handled = 1;
1820 }
1821
1822 /* endpoint data transfers */
1823 for (i = 0; i < 8; i++) {
1824 u32 tmp = 1 << i;
1825
1826 if (i && (usir0 & tmp)) {
1827 handle_ep(&dev->ep[i]);
1828 USIR0 |= tmp;
1829 handled = 1;
1830 }
1831 #ifndef CONFIG_USB_PXA25X_SMALL
1832 if (usir1 & tmp) {
1833 handle_ep(&dev->ep[i+8]);
1834 USIR1 |= tmp;
1835 handled = 1;
1836 }
1837 #endif
1838 }
1839 }
1840
1841 /* we could also ask for 1 msec SOF (SIR) interrupts */
1842
1843 } while (handled);
1844 return IRQ_HANDLED;
1845 }
1846
1847 /*-------------------------------------------------------------------------*/
1848
1849 static void nop_release (struct device *dev)
1850 {
1851 DMSG("%s %s\n", __func__, dev_name(dev));
1852 }
1853
1854 /* this uses load-time allocation and initialization (instead of
1855 * doing it at run-time) to save code, eliminate fault paths, and
1856 * be more obviously correct.
1857 */
1858 static struct pxa25x_udc memory = {
1859 .gadget = {
1860 .ops = &pxa25x_udc_ops,
1861 .ep0 = &memory.ep[0].ep,
1862 .name = driver_name,
1863 .dev = {
1864 .init_name = "gadget",
1865 .release = nop_release,
1866 },
1867 },
1868
1869 /* control endpoint */
1870 .ep[0] = {
1871 .ep = {
1872 .name = ep0name,
1873 .ops = &pxa25x_ep_ops,
1874 .maxpacket = EP0_FIFO_SIZE,
1875 },
1876 .dev = &memory,
1877 .reg_udccs = &UDCCS0,
1878 .reg_uddr = &UDDR0,
1879 },
1880
1881 /* first group of endpoints */
1882 .ep[1] = {
1883 .ep = {
1884 .name = "ep1in-bulk",
1885 .ops = &pxa25x_ep_ops,
1886 .maxpacket = BULK_FIFO_SIZE,
1887 },
1888 .dev = &memory,
1889 .fifo_size = BULK_FIFO_SIZE,
1890 .bEndpointAddress = USB_DIR_IN | 1,
1891 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1892 .reg_udccs = &UDCCS1,
1893 .reg_uddr = &UDDR1,
1894 },
1895 .ep[2] = {
1896 .ep = {
1897 .name = "ep2out-bulk",
1898 .ops = &pxa25x_ep_ops,
1899 .maxpacket = BULK_FIFO_SIZE,
1900 },
1901 .dev = &memory,
1902 .fifo_size = BULK_FIFO_SIZE,
1903 .bEndpointAddress = 2,
1904 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1905 .reg_udccs = &UDCCS2,
1906 .reg_ubcr = &UBCR2,
1907 .reg_uddr = &UDDR2,
1908 },
1909 #ifndef CONFIG_USB_PXA25X_SMALL
1910 .ep[3] = {
1911 .ep = {
1912 .name = "ep3in-iso",
1913 .ops = &pxa25x_ep_ops,
1914 .maxpacket = ISO_FIFO_SIZE,
1915 },
1916 .dev = &memory,
1917 .fifo_size = ISO_FIFO_SIZE,
1918 .bEndpointAddress = USB_DIR_IN | 3,
1919 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1920 .reg_udccs = &UDCCS3,
1921 .reg_uddr = &UDDR3,
1922 },
1923 .ep[4] = {
1924 .ep = {
1925 .name = "ep4out-iso",
1926 .ops = &pxa25x_ep_ops,
1927 .maxpacket = ISO_FIFO_SIZE,
1928 },
1929 .dev = &memory,
1930 .fifo_size = ISO_FIFO_SIZE,
1931 .bEndpointAddress = 4,
1932 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1933 .reg_udccs = &UDCCS4,
1934 .reg_ubcr = &UBCR4,
1935 .reg_uddr = &UDDR4,
1936 },
1937 .ep[5] = {
1938 .ep = {
1939 .name = "ep5in-int",
1940 .ops = &pxa25x_ep_ops,
1941 .maxpacket = INT_FIFO_SIZE,
1942 },
1943 .dev = &memory,
1944 .fifo_size = INT_FIFO_SIZE,
1945 .bEndpointAddress = USB_DIR_IN | 5,
1946 .bmAttributes = USB_ENDPOINT_XFER_INT,
1947 .reg_udccs = &UDCCS5,
1948 .reg_uddr = &UDDR5,
1949 },
1950
1951 /* second group of endpoints */
1952 .ep[6] = {
1953 .ep = {
1954 .name = "ep6in-bulk",
1955 .ops = &pxa25x_ep_ops,
1956 .maxpacket = BULK_FIFO_SIZE,
1957 },
1958 .dev = &memory,
1959 .fifo_size = BULK_FIFO_SIZE,
1960 .bEndpointAddress = USB_DIR_IN | 6,
1961 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1962 .reg_udccs = &UDCCS6,
1963 .reg_uddr = &UDDR6,
1964 },
1965 .ep[7] = {
1966 .ep = {
1967 .name = "ep7out-bulk",
1968 .ops = &pxa25x_ep_ops,
1969 .maxpacket = BULK_FIFO_SIZE,
1970 },
1971 .dev = &memory,
1972 .fifo_size = BULK_FIFO_SIZE,
1973 .bEndpointAddress = 7,
1974 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1975 .reg_udccs = &UDCCS7,
1976 .reg_ubcr = &UBCR7,
1977 .reg_uddr = &UDDR7,
1978 },
1979 .ep[8] = {
1980 .ep = {
1981 .name = "ep8in-iso",
1982 .ops = &pxa25x_ep_ops,
1983 .maxpacket = ISO_FIFO_SIZE,
1984 },
1985 .dev = &memory,
1986 .fifo_size = ISO_FIFO_SIZE,
1987 .bEndpointAddress = USB_DIR_IN | 8,
1988 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1989 .reg_udccs = &UDCCS8,
1990 .reg_uddr = &UDDR8,
1991 },
1992 .ep[9] = {
1993 .ep = {
1994 .name = "ep9out-iso",
1995 .ops = &pxa25x_ep_ops,
1996 .maxpacket = ISO_FIFO_SIZE,
1997 },
1998 .dev = &memory,
1999 .fifo_size = ISO_FIFO_SIZE,
2000 .bEndpointAddress = 9,
2001 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2002 .reg_udccs = &UDCCS9,
2003 .reg_ubcr = &UBCR9,
2004 .reg_uddr = &UDDR9,
2005 },
2006 .ep[10] = {
2007 .ep = {
2008 .name = "ep10in-int",
2009 .ops = &pxa25x_ep_ops,
2010 .maxpacket = INT_FIFO_SIZE,
2011 },
2012 .dev = &memory,
2013 .fifo_size = INT_FIFO_SIZE,
2014 .bEndpointAddress = USB_DIR_IN | 10,
2015 .bmAttributes = USB_ENDPOINT_XFER_INT,
2016 .reg_udccs = &UDCCS10,
2017 .reg_uddr = &UDDR10,
2018 },
2019
2020 /* third group of endpoints */
2021 .ep[11] = {
2022 .ep = {
2023 .name = "ep11in-bulk",
2024 .ops = &pxa25x_ep_ops,
2025 .maxpacket = BULK_FIFO_SIZE,
2026 },
2027 .dev = &memory,
2028 .fifo_size = BULK_FIFO_SIZE,
2029 .bEndpointAddress = USB_DIR_IN | 11,
2030 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2031 .reg_udccs = &UDCCS11,
2032 .reg_uddr = &UDDR11,
2033 },
2034 .ep[12] = {
2035 .ep = {
2036 .name = "ep12out-bulk",
2037 .ops = &pxa25x_ep_ops,
2038 .maxpacket = BULK_FIFO_SIZE,
2039 },
2040 .dev = &memory,
2041 .fifo_size = BULK_FIFO_SIZE,
2042 .bEndpointAddress = 12,
2043 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2044 .reg_udccs = &UDCCS12,
2045 .reg_ubcr = &UBCR12,
2046 .reg_uddr = &UDDR12,
2047 },
2048 .ep[13] = {
2049 .ep = {
2050 .name = "ep13in-iso",
2051 .ops = &pxa25x_ep_ops,
2052 .maxpacket = ISO_FIFO_SIZE,
2053 },
2054 .dev = &memory,
2055 .fifo_size = ISO_FIFO_SIZE,
2056 .bEndpointAddress = USB_DIR_IN | 13,
2057 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2058 .reg_udccs = &UDCCS13,
2059 .reg_uddr = &UDDR13,
2060 },
2061 .ep[14] = {
2062 .ep = {
2063 .name = "ep14out-iso",
2064 .ops = &pxa25x_ep_ops,
2065 .maxpacket = ISO_FIFO_SIZE,
2066 },
2067 .dev = &memory,
2068 .fifo_size = ISO_FIFO_SIZE,
2069 .bEndpointAddress = 14,
2070 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2071 .reg_udccs = &UDCCS14,
2072 .reg_ubcr = &UBCR14,
2073 .reg_uddr = &UDDR14,
2074 },
2075 .ep[15] = {
2076 .ep = {
2077 .name = "ep15in-int",
2078 .ops = &pxa25x_ep_ops,
2079 .maxpacket = INT_FIFO_SIZE,
2080 },
2081 .dev = &memory,
2082 .fifo_size = INT_FIFO_SIZE,
2083 .bEndpointAddress = USB_DIR_IN | 15,
2084 .bmAttributes = USB_ENDPOINT_XFER_INT,
2085 .reg_udccs = &UDCCS15,
2086 .reg_uddr = &UDDR15,
2087 },
2088 #endif /* !CONFIG_USB_PXA25X_SMALL */
2089 };
2090
2091 #define CP15R0_VENDOR_MASK 0xffffe000
2092
2093 #if defined(CONFIG_ARCH_PXA)
2094 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2095
2096 #elif defined(CONFIG_ARCH_IXP4XX)
2097 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2098
2099 #endif
2100
2101 #define CP15R0_PROD_MASK 0x000003f0
2102 #define PXA25x 0x00000100 /* and PXA26x */
2103 #define PXA210 0x00000120
2104
2105 #define CP15R0_REV_MASK 0x0000000f
2106
2107 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2108
2109 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2110 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2111 #define PXA250_B2 0x00000104
2112 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2113 #define PXA250_B0 0x00000102
2114 #define PXA250_A1 0x00000101
2115 #define PXA250_A0 0x00000100
2116
2117 #define PXA210_C0 0x00000125
2118 #define PXA210_B2 0x00000124
2119 #define PXA210_B1 0x00000123
2120 #define PXA210_B0 0x00000122
2121 #define IXP425_A0 0x000001c1
2122 #define IXP425_B0 0x000001f1
2123 #define IXP465_AD 0x00000200
2124
2125 /*
2126 * probe - binds to the platform device
2127 */
2128 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2129 {
2130 struct pxa25x_udc *dev = &memory;
2131 int retval, vbus_irq, irq;
2132 u32 chiprev;
2133
2134 /* insist on Intel/ARM/XScale */
2135 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2136 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2137 pr_err("%s: not XScale!\n", driver_name);
2138 return -ENODEV;
2139 }
2140
2141 /* trigger chiprev-specific logic */
2142 switch (chiprev & CP15R0_PRODREV_MASK) {
2143 #if defined(CONFIG_ARCH_PXA)
2144 case PXA255_A0:
2145 dev->has_cfr = 1;
2146 break;
2147 case PXA250_A0:
2148 case PXA250_A1:
2149 /* A0/A1 "not released"; ep 13, 15 unusable */
2150 /* fall through */
2151 case PXA250_B2: case PXA210_B2:
2152 case PXA250_B1: case PXA210_B1:
2153 case PXA250_B0: case PXA210_B0:
2154 /* OUT-DMA is broken ... */
2155 /* fall through */
2156 case PXA250_C0: case PXA210_C0:
2157 break;
2158 #elif defined(CONFIG_ARCH_IXP4XX)
2159 case IXP425_A0:
2160 case IXP425_B0:
2161 case IXP465_AD:
2162 dev->has_cfr = 1;
2163 break;
2164 #endif
2165 default:
2166 pr_err("%s: unrecognized processor: %08x\n",
2167 driver_name, chiprev);
2168 /* iop3xx, ixp4xx, ... */
2169 return -ENODEV;
2170 }
2171
2172 irq = platform_get_irq(pdev, 0);
2173 if (irq < 0)
2174 return -ENODEV;
2175
2176 dev->clk = clk_get(&pdev->dev, NULL);
2177 if (IS_ERR(dev->clk)) {
2178 retval = PTR_ERR(dev->clk);
2179 goto err_clk;
2180 }
2181
2182 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2183 dev->has_cfr ? "" : " (!cfr)",
2184 SIZE_STR "(pio)"
2185 );
2186
2187 /* other non-static parts of init */
2188 dev->dev = &pdev->dev;
2189 dev->mach = pdev->dev.platform_data;
2190
2191 dev->transceiver = otg_get_transceiver();
2192
2193 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2194 if ((retval = gpio_request(dev->mach->gpio_vbus,
2195 "pxa25x_udc GPIO VBUS"))) {
2196 dev_dbg(&pdev->dev,
2197 "can't get vbus gpio %d, err: %d\n",
2198 dev->mach->gpio_vbus, retval);
2199 goto err_gpio_vbus;
2200 }
2201 gpio_direction_input(dev->mach->gpio_vbus);
2202 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2203 } else
2204 vbus_irq = 0;
2205
2206 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2207 if ((retval = gpio_request(dev->mach->gpio_pullup,
2208 "pca25x_udc GPIO PULLUP"))) {
2209 dev_dbg(&pdev->dev,
2210 "can't get pullup gpio %d, err: %d\n",
2211 dev->mach->gpio_pullup, retval);
2212 goto err_gpio_pullup;
2213 }
2214 gpio_direction_output(dev->mach->gpio_pullup, 0);
2215 }
2216
2217 init_timer(&dev->timer);
2218 dev->timer.function = udc_watchdog;
2219 dev->timer.data = (unsigned long) dev;
2220
2221 device_initialize(&dev->gadget.dev);
2222 dev->gadget.dev.parent = &pdev->dev;
2223 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2224
2225 the_controller = dev;
2226 platform_set_drvdata(pdev, dev);
2227
2228 udc_disable(dev);
2229 udc_reinit(dev);
2230
2231 dev->vbus = !!is_vbus_present();
2232
2233 /* irq setup after old hardware state is cleaned up */
2234 retval = request_irq(irq, pxa25x_udc_irq,
2235 IRQF_DISABLED, driver_name, dev);
2236 if (retval != 0) {
2237 pr_err("%s: can't get irq %d, err %d\n",
2238 driver_name, irq, retval);
2239 goto err_irq1;
2240 }
2241 dev->got_irq = 1;
2242
2243 #ifdef CONFIG_ARCH_LUBBOCK
2244 if (machine_is_lubbock()) {
2245 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2246 lubbock_vbus_irq,
2247 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2248 driver_name, dev);
2249 if (retval != 0) {
2250 pr_err("%s: can't get irq %i, err %d\n",
2251 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2252 lubbock_fail0:
2253 goto err_irq_lub;
2254 }
2255 retval = request_irq(LUBBOCK_USB_IRQ,
2256 lubbock_vbus_irq,
2257 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2258 driver_name, dev);
2259 if (retval != 0) {
2260 pr_err("%s: can't get irq %i, err %d\n",
2261 driver_name, LUBBOCK_USB_IRQ, retval);
2262 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2263 goto lubbock_fail0;
2264 }
2265 } else
2266 #endif
2267 if (vbus_irq) {
2268 retval = request_irq(vbus_irq, udc_vbus_irq,
2269 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2270 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2271 driver_name, dev);
2272 if (retval != 0) {
2273 pr_err("%s: can't get irq %i, err %d\n",
2274 driver_name, vbus_irq, retval);
2275 goto err_vbus_irq;
2276 }
2277 }
2278 create_debug_files(dev);
2279
2280 return 0;
2281
2282 err_vbus_irq:
2283 #ifdef CONFIG_ARCH_LUBBOCK
2284 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2285 err_irq_lub:
2286 #endif
2287 free_irq(irq, dev);
2288 err_irq1:
2289 if (gpio_is_valid(dev->mach->gpio_pullup))
2290 gpio_free(dev->mach->gpio_pullup);
2291 err_gpio_pullup:
2292 if (gpio_is_valid(dev->mach->gpio_vbus))
2293 gpio_free(dev->mach->gpio_vbus);
2294 err_gpio_vbus:
2295 if (dev->transceiver) {
2296 otg_put_transceiver(dev->transceiver);
2297 dev->transceiver = NULL;
2298 }
2299 clk_put(dev->clk);
2300 err_clk:
2301 return retval;
2302 }
2303
2304 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2305 {
2306 pullup_off();
2307 }
2308
2309 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2310 {
2311 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2312
2313 if (dev->driver)
2314 return -EBUSY;
2315
2316 dev->pullup = 0;
2317 pullup(dev);
2318
2319 remove_debug_files(dev);
2320
2321 if (dev->got_irq) {
2322 free_irq(platform_get_irq(pdev, 0), dev);
2323 dev->got_irq = 0;
2324 }
2325 #ifdef CONFIG_ARCH_LUBBOCK
2326 if (machine_is_lubbock()) {
2327 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2328 free_irq(LUBBOCK_USB_IRQ, dev);
2329 }
2330 #endif
2331 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2332 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2333 gpio_free(dev->mach->gpio_vbus);
2334 }
2335 if (gpio_is_valid(dev->mach->gpio_pullup))
2336 gpio_free(dev->mach->gpio_pullup);
2337
2338 clk_put(dev->clk);
2339
2340 if (dev->transceiver) {
2341 otg_put_transceiver(dev->transceiver);
2342 dev->transceiver = NULL;
2343 }
2344
2345 platform_set_drvdata(pdev, NULL);
2346 the_controller = NULL;
2347 return 0;
2348 }
2349
2350 /*-------------------------------------------------------------------------*/
2351
2352 #ifdef CONFIG_PM
2353
2354 /* USB suspend (controlled by the host) and system suspend (controlled
2355 * by the PXA) don't necessarily work well together. If USB is active,
2356 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2357 * mode, or any deeper PM saving state.
2358 *
2359 * For now, we punt and forcibly disconnect from the USB host when PXA
2360 * enters any suspend state. While we're disconnected, we always disable
2361 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2362 * Boards without software pullup control shouldn't use those states.
2363 * VBUS IRQs should probably be ignored so that the PXA device just acts
2364 * "dead" to USB hosts until system resume.
2365 */
2366 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2367 {
2368 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2369 unsigned long flags;
2370
2371 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2372 WARNING("USB host won't detect disconnect!\n");
2373 udc->suspended = 1;
2374
2375 local_irq_save(flags);
2376 pullup(udc);
2377 local_irq_restore(flags);
2378
2379 return 0;
2380 }
2381
2382 static int pxa25x_udc_resume(struct platform_device *dev)
2383 {
2384 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2385 unsigned long flags;
2386
2387 udc->suspended = 0;
2388 local_irq_save(flags);
2389 pullup(udc);
2390 local_irq_restore(flags);
2391
2392 return 0;
2393 }
2394
2395 #else
2396 #define pxa25x_udc_suspend NULL
2397 #define pxa25x_udc_resume NULL
2398 #endif
2399
2400 /*-------------------------------------------------------------------------*/
2401
2402 static struct platform_driver udc_driver = {
2403 .shutdown = pxa25x_udc_shutdown,
2404 .remove = __exit_p(pxa25x_udc_remove),
2405 .suspend = pxa25x_udc_suspend,
2406 .resume = pxa25x_udc_resume,
2407 .driver = {
2408 .owner = THIS_MODULE,
2409 .name = "pxa25x-udc",
2410 },
2411 };
2412
2413 static int __init udc_init(void)
2414 {
2415 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2416 return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2417 }
2418 module_init(udc_init);
2419
2420 static void __exit udc_exit(void)
2421 {
2422 platform_driver_unregister(&udc_driver);
2423 }
2424 module_exit(udc_exit);
2425
2426 MODULE_DESCRIPTION(DRIVER_DESC);
2427 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2428 MODULE_LICENSE("GPL");
2429 MODULE_ALIAS("platform:pxa25x-udc");
Tomato firmware and modifications.