GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / xgifb / XGI_main.h
blobfd1152eb2c925edf7f4f27e524fb17686262f463
1 #ifndef _XGIFB_MAIN
2 #define _XGIFB_MAIN
5 /* ------------------- Constant Definitions ------------------------- */
8 #include "XGIfb.h"
9 #include "vb_struct.h"
10 #include "vb_def.h"
12 //#define LINUXBIOS /* turn this on when compiling for LINUXBIOS */
13 #define AGPOFF /* default is turn off AGP */
15 #define XGIFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
17 #define VER_MAJOR 0
18 #define VER_MINOR 8
19 #define VER_LEVEL 1
21 #define DRIVER_DESC "XGI Volari Frame Buffer Module Version 0.8.1"
23 #ifndef PCI_VENDOR_ID_XG
24 #define PCI_VENDOR_ID_XG 0x18CA
25 #endif
27 #ifndef PCI_DEVICE_ID_XG_40
28 #define PCI_DEVICE_ID_XG_40 0x040
29 #endif
30 #ifndef PCI_DEVICE_ID_XG_41
31 #define PCI_DEVICE_ID_XG_41 0x041
32 #endif
33 #ifndef PCI_DEVICE_ID_XG_42
34 #define PCI_DEVICE_ID_XG_42 0x042
35 #endif
36 #ifndef PCI_DEVICE_ID_XG_20
37 #define PCI_DEVICE_ID_XG_20 0x020
38 #endif
39 #ifndef PCI_DEVICE_ID_XG_27
40 #define PCI_DEVICE_ID_XG_27 0x027
41 #endif
45 #define XGI_IOTYPE1 void __iomem
46 #define XGI_IOTYPE2 __iomem
47 #define XGIINITSTATIC static
49 static struct pci_device_id __devinitdata xgifb_pci_table[] = {
51 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
52 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
53 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
54 { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
55 { 0 }
58 MODULE_DEVICE_TABLE(pci, xgifb_pci_table);
60 /* To be included in fb.h */
61 #ifndef FB_ACCEL_XGI_GLAMOUR_2
62 #define FB_ACCEL_XGI_GLAMOUR_2 40 /* XGI 315, 650, 740 */
63 #endif
64 #ifndef FB_ACCEL_XGI_XABRE
65 #define FB_ACCEL_XGI_XABRE 41 /* XGI 330 ("Xabre") */
66 #endif
68 #define MAX_ROM_SCAN 0x10000
70 #define HW_CURSOR_CAP 0x80
71 #define TURBO_QUEUE_CAP 0x40
72 #define AGP_CMD_QUEUE_CAP 0x20
73 #define VM_CMD_QUEUE_CAP 0x10
74 #define MMIO_CMD_QUEUE_CAP 0x08
78 /* For 315 series */
80 #define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */
81 #define COMMAND_QUEUE_THRESHOLD 0x1F
84 /* TW */
85 #define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */
86 #define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */
88 #define OH_ALLOC_SIZE 4000
89 #define SENTINEL 0x7fffffff
91 #define SEQ_ADR 0x14
92 #define SEQ_DATA 0x15
93 #define DAC_ADR 0x18
94 #define DAC_DATA 0x19
95 #define CRTC_ADR 0x24
96 #define CRTC_DATA 0x25
97 #define DAC2_ADR (0x16-0x30)
98 #define DAC2_DATA (0x17-0x30)
99 #define VB_PART1_ADR (0x04-0x30)
100 #define VB_PART1_DATA (0x05-0x30)
101 #define VB_PART2_ADR (0x10-0x30)
102 #define VB_PART2_DATA (0x11-0x30)
103 #define VB_PART3_ADR (0x12-0x30)
104 #define VB_PART3_DATA (0x13-0x30)
105 #define VB_PART4_ADR (0x14-0x30)
106 #define VB_PART4_DATA (0x15-0x30)
108 #define XGISR XGI_Pr.P3c4
109 #define XGICR XGI_Pr.P3d4
110 #define XGIDACA XGI_Pr.P3c8
111 #define XGIDACD XGI_Pr.P3c9
112 #define XGIPART1 XGI_Pr.Part1Port
113 #define XGIPART2 XGI_Pr.Part2Port
114 #define XGIPART3 XGI_Pr.Part3Port
115 #define XGIPART4 XGI_Pr.Part4Port
116 #define XGIPART5 XGI_Pr.Part5Port
117 #define XGIDAC2A XGIPART5
118 #define XGIDAC2D (XGIPART5 + 1)
119 #define XGIMISCR (XGI_Pr.RelIO + 0x1c)
120 #define XGIINPSTAT (XGI_Pr.RelIO + 0x2a)
122 #define IND_XGI_PASSWORD 0x05 /* SRs */
123 #define IND_XGI_COLOR_MODE 0x06
124 #define IND_XGI_RAMDAC_CONTROL 0x07
125 #define IND_XGI_DRAM_SIZE 0x14
126 #define IND_XGI_SCRATCH_REG_16 0x16
127 #define IND_XGI_SCRATCH_REG_17 0x17
128 #define IND_XGI_SCRATCH_REG_1A 0x1A
129 #define IND_XGI_MODULE_ENABLE 0x1E
130 #define IND_XGI_PCI_ADDRESS_SET 0x20
131 #define IND_XGI_TURBOQUEUE_ADR 0x26
132 #define IND_XGI_TURBOQUEUE_SET 0x27
133 #define IND_XGI_POWER_ON_TRAP 0x38
134 #define IND_XGI_POWER_ON_TRAP2 0x39
135 #define IND_XGI_CMDQUEUE_SET 0x26
136 #define IND_XGI_CMDQUEUE_THRESHOLD 0x27
138 #define IND_XGI_SCRATCH_REG_CR30 0x30 /* CRs */
139 #define IND_XGI_SCRATCH_REG_CR31 0x31
140 #define IND_XGI_SCRATCH_REG_CR32 0x32
141 #define IND_XGI_SCRATCH_REG_CR33 0x33
142 #define IND_XGI_LCD_PANEL 0x36
143 #define IND_XGI_SCRATCH_REG_CR37 0x37
144 #define IND_XGI_AGP_IO_PAD 0x48
146 #define IND_BRI_DRAM_STATUS 0x63 /* PCI config memory size offset */
148 #define MMIO_QUEUE_PHYBASE 0x85C0
149 #define MMIO_QUEUE_WRITEPORT 0x85C4
150 #define MMIO_QUEUE_READPORT 0x85C8
152 #define IND_XGI_CRT2_WRITE_ENABLE_300 0x24
153 #define IND_XGI_CRT2_WRITE_ENABLE_315 0x2F
155 #define XGI_PASSWORD 0x86 /* SR05 */
156 #define XGI_INTERLACED_MODE 0x20 /* SR06 */
157 #define XGI_8BPP_COLOR_MODE 0x0
158 #define XGI_15BPP_COLOR_MODE 0x1
159 #define XGI_16BPP_COLOR_MODE 0x2
160 #define XGI_32BPP_COLOR_MODE 0x4
162 #define XGI_DRAM_SIZE_MASK 0xF0 /*SR14 */
163 #define XGI_DRAM_SIZE_1MB 0x00
164 #define XGI_DRAM_SIZE_2MB 0x01
165 #define XGI_DRAM_SIZE_4MB 0x02
166 #define XGI_DRAM_SIZE_8MB 0x03
167 #define XGI_DRAM_SIZE_16MB 0x04
168 #define XGI_DRAM_SIZE_32MB 0x05
169 #define XGI_DRAM_SIZE_64MB 0x06
170 #define XGI_DRAM_SIZE_128MB 0x07
171 #define XGI_DRAM_SIZE_256MB 0x08
172 #define XGI_DATA_BUS_MASK 0x02
173 #define XGI_DATA_BUS_64 0x00
174 #define XGI_DATA_BUS_128 0x01
175 #define XGI_DUAL_CHANNEL_MASK 0x0C
176 #define XGI_SINGLE_CHANNEL_1_RANK 0x0
177 #define XGI_SINGLE_CHANNEL_2_RANK 0x1
178 #define XGI_ASYM_DDR 0x02
179 #define XGI_DUAL_CHANNEL_1_RANK 0x3
181 #define XGI550_DRAM_SIZE_MASK 0x3F /* 550/650/740 SR14 */
182 #define XGI550_DRAM_SIZE_4MB 0x00
183 #define XGI550_DRAM_SIZE_8MB 0x01
184 #define XGI550_DRAM_SIZE_16MB 0x03
185 #define XGI550_DRAM_SIZE_24MB 0x05
186 #define XGI550_DRAM_SIZE_32MB 0x07
187 #define XGI550_DRAM_SIZE_64MB 0x0F
188 #define XGI550_DRAM_SIZE_96MB 0x17
189 #define XGI550_DRAM_SIZE_128MB 0x1F
190 #define XGI550_DRAM_SIZE_256MB 0x3F
192 #define XGI_SCRATCH_REG_1A_MASK 0x10
194 #define XGI_ENABLE_2D 0x40 /* SR1E */
196 #define XGI_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
197 #define XGI_PCI_ADDR_ENABLE 0x80
199 #define XGI_AGP_CMDQUEUE_ENABLE 0x80 /* 315/650/740 SR26 */
200 #define XGI_VRAM_CMDQUEUE_ENABLE 0x40
201 #define XGI_MMIO_CMD_ENABLE 0x20
202 #define XGI_CMD_QUEUE_SIZE_512k 0x00
203 #define XGI_CMD_QUEUE_SIZE_1M 0x04
204 #define XGI_CMD_QUEUE_SIZE_2M 0x08
205 #define XGI_CMD_QUEUE_SIZE_4M 0x0C
206 #define XGI_CMD_QUEUE_RESET 0x01
207 #define XGI_CMD_AUTO_CORR 0x02
209 #define XGI_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
210 #define XGI_MODE_SELECT_CRT2 0x02
211 #define XGI_VB_OUTPUT_COMPOSITE 0x04
212 #define XGI_VB_OUTPUT_SVIDEO 0x08
213 #define XGI_VB_OUTPUT_SCART 0x10
214 #define XGI_VB_OUTPUT_LCD 0x20
215 #define XGI_VB_OUTPUT_CRT2 0x40
216 #define XGI_VB_OUTPUT_HIVISION 0x80
218 #define XGI_VB_OUTPUT_DISABLE 0x20 /* CR31 */
219 #define XGI_DRIVER_MODE 0x40
221 #define XGI_VB_COMPOSITE 0x01 /* CR32 */
222 #define XGI_VB_SVIDEO 0x02
223 #define XGI_VB_SCART 0x04
224 #define XGI_VB_LCD 0x08
225 #define XGI_VB_CRT2 0x10
226 #define XGI_CRT1 0x20
227 #define XGI_VB_HIVISION 0x40
228 #define XGI_VB_YPBPR 0x80
229 #define XGI_VB_TV (XGI_VB_COMPOSITE | XGI_VB_SVIDEO | \
230 XGI_VB_SCART | XGI_VB_HIVISION|XGI_VB_YPBPR)
232 #define XGI_EXTERNAL_CHIP_MASK 0x0E /* CR37 */
233 #define XGI_EXTERNAL_CHIP_XGI301 0x01 /* in CR37 << 1 ! */
234 #define XGI_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
235 #define XGI_EXTERNAL_CHIP_TRUMPION 0x03 /* in CR37 << 1 ! */
236 #define XGI_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 /* in CR37 << 1 ! */
237 #define XGI_EXTERNAL_CHIP_CHRONTEL 0x05 /* in CR37 << 1 ! */
238 #define XGI310_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
239 #define XGI310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 /* in CR37 << 1 ! */
241 #define XGI_AGP_2X 0x20 /* CR48 */
243 #define BRI_DRAM_SIZE_MASK 0x70 /* PCI bridge config data */
244 #define BRI_DRAM_SIZE_2MB 0x00
245 #define BRI_DRAM_SIZE_4MB 0x01
246 #define BRI_DRAM_SIZE_8MB 0x02
247 #define BRI_DRAM_SIZE_16MB 0x03
248 #define BRI_DRAM_SIZE_32MB 0x04
249 #define BRI_DRAM_SIZE_64MB 0x05
251 #define SR_BUFFER_SIZE 5
252 #define CR_BUFFER_SIZE 5
254 /* Useful macros */
255 #define inXGIREG(base) inb(base)
256 #define outXGIREG(base,val) outb(val,base)
257 #define orXGIREG(base,val) do { \
258 unsigned char __Temp = inb(base); \
259 outXGIREG(base, __Temp | (val)); \
260 } while (0)
261 #define andXGIREG(base,val) do { \
262 unsigned char __Temp = inb(base); \
263 outXGIREG(base, __Temp & (val)); \
264 } while (0)
265 #define inXGIIDXREG(base,idx,var) do { \
266 outb(idx,base); var=inb((base)+1); \
267 } while (0)
268 #define outXGIIDXREG(base,idx,val) do { \
269 outb(idx,base); outb((val),(base)+1); \
270 } while (0)
271 #define orXGIIDXREG(base,idx,val) do { \
272 unsigned char __Temp; \
273 outb(idx,base); \
274 __Temp = inb((base)+1)|(val); \
275 outXGIIDXREG(base,idx,__Temp); \
276 } while (0)
277 #define andXGIIDXREG(base,idx,and) do { \
278 unsigned char __Temp; \
279 outb(idx,base); \
280 __Temp = inb((base)+1)&(and); \
281 outXGIIDXREG(base,idx,__Temp); \
282 } while (0)
283 #define setXGIIDXREG(base,idx,and,or) do { \
284 unsigned char __Temp; \
285 outb(idx,base); \
286 __Temp = (inb((base)+1)&(and))|(or); \
287 outXGIIDXREG(base,idx,__Temp); \
288 } while (0)
290 /* ------------------- Global Variables ----------------------------- */
292 /* Fbcon variables */
293 static struct fb_info* fb_info;
296 static int video_type = FB_TYPE_PACKED_PIXELS;
298 static struct fb_var_screeninfo default_var = {
299 .xres = 0,
300 .yres = 0,
301 .xres_virtual = 0,
302 .yres_virtual = 0,
303 .xoffset = 0,
304 .yoffset = 0,
305 .bits_per_pixel = 0,
306 .grayscale = 0,
307 .red = {0, 8, 0},
308 .green = {0, 8, 0},
309 .blue = {0, 8, 0},
310 .transp = {0, 0, 0},
311 .nonstd = 0,
312 .activate = FB_ACTIVATE_NOW,
313 .height = -1,
314 .width = -1,
315 .accel_flags = 0,
316 .pixclock = 0,
317 .left_margin = 0,
318 .right_margin = 0,
319 .upper_margin = 0,
320 .lower_margin = 0,
321 .hsync_len = 0,
322 .vsync_len = 0,
323 .sync = 0,
324 .vmode = FB_VMODE_NONINTERLACED,
327 static struct fb_fix_screeninfo XGIfb_fix = {
328 .id = "XGI",
329 .type = FB_TYPE_PACKED_PIXELS,
330 .xpanstep = 1,
331 .ypanstep = 1,
333 static char myid[20];
334 static u32 pseudo_palette[17];
337 /* display status */
338 static int XGIfb_off = 0;
339 static int XGIfb_crt1off = 0;
340 static int XGIfb_forcecrt1 = -1;
341 static int XGIvga_enabled = 0;
342 static int XGIfb_userom = 0;
343 //static int XGIfb_useoem = -1;
345 /* global flags */
346 static int XGIfb_registered;
347 static int XGIfb_tvmode = 0;
348 static int XGIfb_mem = 0;
349 static int XGIfb_pdc = 0;
350 static int enable_dstn = 0;
351 static int XGIfb_ypan = -1;
354 int XGIfb_accel = 0;
357 static int XGIfb_hwcursor_size = 0;
358 static int XGIfb_CRT2_write_enable = 0;
360 int XGIfb_crt2type = -1; /* TW: CRT2 type (for overriding autodetection) */
361 int XGIfb_tvplug = -1; /* PR: Tv plug type (for overriding autodetection) */
363 int XGIfb_queuemode = -1; /* TW: Use MMIO queue mode by default (310/325 series only) */
365 unsigned char XGIfb_detectedpdc = 0;
367 unsigned char XGIfb_detectedlcda = 0xff;
372 /* TW: For ioctl XGIFB_GET_INFO */
373 /* XGIfb_info XGIfbinfo; */
375 /* TW: Hardware extension; contains data on hardware */
376 struct xgi_hw_device_info XGIhw_ext;
378 /* TW: XGI private structure */
379 struct vb_device_info XGI_Pr;
381 /* card parameters */
382 static unsigned long XGIfb_mmio_size = 0;
383 static u8 XGIfb_caps = 0;
385 typedef enum _XGI_CMDTYPE {
386 MMIO_CMD = 0,
387 AGP_CMD_QUEUE,
388 VM_CMD_QUEUE,
389 } XGI_CMDTYPE;
391 #define MD_XGI300 1
392 #define MD_XGI315 2
394 /* mode table */
395 /* NOT const - will be patched for 1280x960 mode number chaos reasons */
396 struct _XGIbios_mode {
397 char name[15];
398 u8 mode_no;
399 u16 vesa_mode_no_1; /* "XGI defined" VESA mode number */
400 u16 vesa_mode_no_2; /* Real VESA mode numbers */
401 u16 xres;
402 u16 yres;
403 u16 bpp;
404 u16 rate_idx;
405 u16 cols;
406 u16 rows;
407 u8 chipset;
408 } XGIbios_mode[] = {
409 #define MODE_INDEX_NONE 0 /* TW: index for mode=none */
410 {"none", 0xFF, 0x0000, 0x0000, 0, 0, 0, 0, 0, 0, MD_XGI300|MD_XGI315}, /* TW: for mode "none" */
411 {"320x240x16", 0x56, 0x0000, 0x0000, 320, 240, 16, 1, 40, 15, MD_XGI315},
412 {"320x480x8", 0x5A, 0x0000, 0x0000, 320, 480, 8, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
413 {"320x480x16", 0x5B, 0x0000, 0x0000, 320, 480, 16, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
414 {"640x480x8", 0x2E, 0x0101, 0x0101, 640, 480, 8, 1, 80, 30, MD_XGI300|MD_XGI315},
415 {"640x480x16", 0x44, 0x0111, 0x0111, 640, 480, 16, 1, 80, 30, MD_XGI300|MD_XGI315},
416 {"640x480x24", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315}, /* TW: That's for people who mix up color- and fb depth */
417 {"640x480x32", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315},
418 {"720x480x8", 0x31, 0x0000, 0x0000, 720, 480, 8, 1, 90, 30, MD_XGI300|MD_XGI315},
419 {"720x480x16", 0x33, 0x0000, 0x0000, 720, 480, 16, 1, 90, 30, MD_XGI300|MD_XGI315},
420 {"720x480x24", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
421 {"720x480x32", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
422 {"720x576x8", 0x32, 0x0000, 0x0000, 720, 576, 8, 1, 90, 36, MD_XGI300|MD_XGI315},
423 {"720x576x16", 0x34, 0x0000, 0x0000, 720, 576, 16, 1, 90, 36, MD_XGI300|MD_XGI315},
424 {"720x576x24", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
425 {"720x576x32", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
426 {"800x480x8", 0x70, 0x0000, 0x0000, 800, 480, 8, 1, 100, 30, MD_XGI300|MD_XGI315},
427 {"800x480x16", 0x7a, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_XGI300|MD_XGI315},
428 {"800x480x24", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
429 {"800x480x32", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
430 #define DEFAULT_MODE 21 /* TW: index for 800x600x8 */
431 #define DEFAULT_LCDMODE 21 /* TW: index for 800x600x8 */
432 #define DEFAULT_TVMODE 21 /* TW: index for 800x600x8 */
433 {"800x600x8", 0x30, 0x0103, 0x0103, 800, 600, 8, 1, 100, 37, MD_XGI300|MD_XGI315},
434 {"800x600x16", 0x47, 0x0114, 0x0114, 800, 600, 16, 1, 100, 37, MD_XGI300|MD_XGI315},
435 {"800x600x24", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
436 {"800x600x32", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
437 {"1024x576x8", 0x71, 0x0000, 0x0000, 1024, 576, 8, 1, 128, 36, MD_XGI300|MD_XGI315},
438 {"1024x576x16", 0x74, 0x0000, 0x0000, 1024, 576, 16, 1, 128, 36, MD_XGI300|MD_XGI315},
439 {"1024x576x24", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
440 {"1024x576x32", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
441 {"1024x600x8", 0x20, 0x0000, 0x0000, 1024, 600, 8, 1, 128, 37, MD_XGI300 }, /* TW: 300 series only */
442 {"1024x600x16", 0x21, 0x0000, 0x0000, 1024, 600, 16, 1, 128, 37, MD_XGI300 },
443 {"1024x600x24", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
444 {"1024x600x32", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
445 {"1024x768x8", 0x38, 0x0105, 0x0105, 1024, 768, 8, 1, 128, 48, MD_XGI300|MD_XGI315},
446 {"1024x768x16", 0x4A, 0x0117, 0x0117, 1024, 768, 16, 1, 128, 48, MD_XGI300|MD_XGI315},
447 {"1024x768x24", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
448 {"1024x768x32", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
449 {"1152x768x8", 0x23, 0x0000, 0x0000, 1152, 768, 8, 1, 144, 48, MD_XGI300 }, /* TW: 300 series only */
450 {"1152x768x16", 0x24, 0x0000, 0x0000, 1152, 768, 16, 1, 144, 48, MD_XGI300 },
451 {"1152x768x24", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
452 {"1152x768x32", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
453 {"1280x720x8", 0x79, 0x0000, 0x0000, 1280, 720, 8, 1, 160, 45, MD_XGI300|MD_XGI315},
454 {"1280x720x16", 0x75, 0x0000, 0x0000, 1280, 720, 16, 1, 160, 45, MD_XGI300|MD_XGI315},
455 {"1280x720x24", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
456 {"1280x720x32", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
457 {"1280x768x8", 0x23, 0x0000, 0x0000, 1280, 768, 8, 1, 160, 48, MD_XGI315}, /* TW: 310/325 series only */
458 {"1280x768x16", 0x24, 0x0000, 0x0000, 1280, 768, 16, 1, 160, 48, MD_XGI315},
459 {"1280x768x24", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
460 {"1280x768x32", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
461 #define MODEINDEX_1280x960 48
462 {"1280x960x8", 0x7C, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_XGI300|MD_XGI315}, /* TW: Modenumbers being patched */
463 {"1280x960x16", 0x7D, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_XGI300|MD_XGI315},
464 {"1280x960x24", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
465 {"1280x960x32", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
466 {"1280x1024x8", 0x3A, 0x0107, 0x0107, 1280, 1024, 8, 1, 160, 64, MD_XGI300|MD_XGI315},
467 {"1280x1024x16", 0x4D, 0x011a, 0x011a, 1280, 1024, 16, 1, 160, 64, MD_XGI300|MD_XGI315},
468 {"1280x1024x24", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
469 {"1280x1024x32", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
470 {"1400x1050x8", 0x26, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_XGI315}, /* TW: 310/325 series only */
471 {"1400x1050x16", 0x27, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_XGI315},
472 {"1400x1050x24", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
473 {"1400x1050x32", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
474 {"1600x1200x8", 0x3C, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_XGI300|MD_XGI315},
475 {"1600x1200x16", 0x3D, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_XGI300|MD_XGI315},
476 {"1600x1200x24", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
477 {"1600x1200x32", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
478 {"1920x1440x8", 0x68, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_XGI300|MD_XGI315},
479 {"1920x1440x16", 0x69, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_XGI300|MD_XGI315},
480 {"1920x1440x24", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
481 {"1920x1440x32", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
482 {"2048x1536x8", 0x6c, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_XGI315}, /* TW: 310/325 series only */
483 {"2048x1536x16", 0x6d, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_XGI315},
484 {"2048x1536x24", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
485 {"2048x1536x32", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
486 {"\0", 0x00, 0, 0, 0, 0, 0, 0, 0}
489 /* mode-related variables */
490 #ifdef MODULE
491 static int xgifb_mode_idx = 1;
492 #else
493 static int xgifb_mode_idx = -1; /* Use a default mode if we are inside the kernel */
494 #endif
495 u8 XGIfb_mode_no = 0;
496 u8 XGIfb_rate_idx = 0;
498 /* TW: CR36 evaluation */
499 const unsigned short XGI300paneltype[] =
500 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
501 LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
502 LCD_1024x768, LCD_1024x768, LCD_1024x768,
503 LCD_1024x768, LCD_1024x768, LCD_1024x768, LCD_1024x768 };
505 const unsigned short XGI310paneltype[] =
506 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
507 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
508 LCD_1152x768, LCD_1400x1050,LCD_1280x768, LCD_1600x1200,
509 LCD_1024x768, LCD_1024x768, LCD_1024x768 };
511 static const struct _XGI_crt2type {
512 char name[10];
513 int type_no;
514 int tvplug_no;
515 } XGI_crt2type[] = {
516 {"NONE", 0, -1},
517 {"LCD", DISPTYPE_LCD, -1},
518 {"TV", DISPTYPE_TV, -1},
519 {"VGA", DISPTYPE_CRT2, -1},
520 {"SVIDEO", DISPTYPE_TV, TVPLUG_SVIDEO},
521 {"COMPOSITE", DISPTYPE_TV, TVPLUG_COMPOSITE},
522 {"SCART", DISPTYPE_TV, TVPLUG_SCART},
523 {"none", 0, -1},
524 {"lcd", DISPTYPE_LCD, -1},
525 {"tv", DISPTYPE_TV, -1},
526 {"vga", DISPTYPE_CRT2, -1},
527 {"svideo", DISPTYPE_TV, TVPLUG_SVIDEO},
528 {"composite", DISPTYPE_TV, TVPLUG_COMPOSITE},
529 {"scart", DISPTYPE_TV, TVPLUG_SCART},
530 {"\0", -1, -1}
533 /* Queue mode selection for 310 series */
534 static const struct _XGI_queuemode {
535 char name[6];
536 int type_no;
537 } XGI_queuemode[] = {
538 {"AGP", AGP_CMD_QUEUE},
539 {"VRAM", VM_CMD_QUEUE},
540 {"MMIO", MMIO_CMD},
541 {"agp", AGP_CMD_QUEUE},
542 {"vram", VM_CMD_QUEUE},
543 {"mmio", MMIO_CMD},
544 {"\0", -1}
547 /* TV standard */
548 static const struct _XGI_tvtype {
549 char name[6];
550 int type_no;
551 } XGI_tvtype[] = {
552 {"PAL", 1},
553 {"NTSC", 2},
554 {"pal", 1},
555 {"ntsc", 2},
556 {"\0", -1}
559 static const struct _XGI_vrate {
560 u16 idx;
561 u16 xres;
562 u16 yres;
563 u16 refresh;
564 } XGIfb_vrate[] = {
565 {1, 640, 480, 60}, {2, 640, 480, 72}, {3, 640, 480, 75}, {4, 640, 480, 85},
566 {5, 640, 480,100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
567 {1, 720, 480, 60},
568 {1, 720, 576, 58},
569 {1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85},
570 {1, 800, 600, 60}, {2, 800, 600, 72}, {3, 800, 600, 75},
571 {4, 800, 600, 85}, {5, 800, 600, 100}, {6, 800, 600, 120}, {7, 800, 600, 160},
572 {1, 1024, 768, 60}, {2, 1024, 768, 70}, {3, 1024, 768, 75},
573 {4, 1024, 768, 85}, {5, 1024, 768, 100}, {6, 1024, 768, 120},
574 {1, 1024, 576, 60}, {2, 1024, 576, 75}, {3, 1024, 576, 85},
575 {1, 1024, 600, 60},
576 {1, 1152, 768, 60},
577 {1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85},
578 {1, 1280, 768, 60},
579 {1, 1280, 1024, 60}, {2, 1280, 1024, 75}, {3, 1280, 1024, 85},
580 {1, 1280, 960, 70},
581 {1, 1400, 1050, 60},
582 {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
583 {5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
584 {1, 1920, 1440, 60}, {2, 1920, 1440, 65}, {3, 1920, 1440, 70}, {4, 1920, 1440, 75},
585 {5, 1920, 1440, 85}, {6, 1920, 1440, 100},
586 {1, 2048, 1536, 60}, {2, 2048, 1536, 65}, {3, 2048, 1536, 70}, {4, 2048, 1536, 75},
587 {5, 2048, 1536, 85},
588 {0, 0, 0, 0}
591 static const struct _chswtable {
592 int subsysVendor;
593 int subsysCard;
594 char *vendorName;
595 char *cardName;
596 } mychswtable[] = {
597 { 0x1631, 0x1002, "Mitachi", "0x1002" },
598 { 0, 0, "" , "" }
601 typedef struct _XGI_OH {
602 struct _XGI_OH *poh_next;
603 struct _XGI_OH *poh_prev;
604 unsigned long offset;
605 unsigned long size;
606 } XGI_OH;
608 typedef struct _XGI_OHALLOC {
609 struct _XGI_OHALLOC *poha_next;
610 XGI_OH aoh[1];
611 } XGI_OHALLOC;
613 typedef struct _XGI_HEAP {
614 XGI_OH oh_free;
615 XGI_OH oh_used;
616 XGI_OH *poh_freelist;
617 XGI_OHALLOC *poha_chain;
618 unsigned long max_freesize;
619 } XGI_HEAP;
621 static unsigned long XGIfb_hwcursor_vbase;
623 static unsigned long XGIfb_heap_start;
624 static unsigned long XGIfb_heap_end;
625 static unsigned long XGIfb_heap_size;
626 static XGI_HEAP XGIfb_heap;
628 // Eden Chen
629 static const struct _XGI_TV_filter {
630 u8 filter[9][4];
631 } XGI_TV_filter[] = {
632 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
633 {0x00,0xE0,0x10,0x60},
634 {0x00,0xEE,0x10,0x44},
635 {0x00,0xF4,0x10,0x38},
636 {0xF8,0xF4,0x18,0x38},
637 {0xFC,0xFB,0x14,0x2A},
638 {0x00,0x00,0x10,0x20},
639 {0x00,0x04,0x10,0x18},
640 {0xFF,0xFF,0xFF,0xFF} }},
641 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_1 */
642 {0x00,0xE0,0x10,0x60},
643 {0x00,0xEE,0x10,0x44},
644 {0x00,0xF4,0x10,0x38},
645 {0xF8,0xF4,0x18,0x38},
646 {0xFC,0xFB,0x14,0x2A},
647 {0x00,0x00,0x10,0x20},
648 {0x00,0x04,0x10,0x18},
649 {0xFF,0xFF,0xFF,0xFF} }},
650 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_2 */
651 {0xF5,0xEE,0x1B,0x44},
652 {0xF8,0xF4,0x18,0x38},
653 {0xEB,0x04,0x25,0x18},
654 {0xF1,0x05,0x1F,0x16},
655 {0xF6,0x06,0x1A,0x14},
656 {0xFA,0x06,0x16,0x14},
657 {0x00,0x04,0x10,0x18},
658 {0xFF,0xFF,0xFF,0xFF} }},
659 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_3 */
660 {0xF1,0x04,0x1F,0x18},
661 {0xEE,0x0D,0x22,0x06},
662 {0xF7,0x06,0x19,0x14},
663 {0xF4,0x0B,0x1C,0x0A},
664 {0xFA,0x07,0x16,0x12},
665 {0xF9,0x0A,0x17,0x0C},
666 {0x00,0x07,0x10,0x12},
667 {0xFF,0xFF,0xFF,0xFF} }},
668 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_4 */
669 {0x00,0xE0,0x10,0x60},
670 {0x00,0xEE,0x10,0x44},
671 {0x00,0xF4,0x10,0x38},
672 {0xF8,0xF4,0x18,0x38},
673 {0xFC,0xFB,0x14,0x2A},
674 {0x00,0x00,0x10,0x20},
675 {0x00,0x04,0x10,0x18},
676 {0xFF,0xFF,0xFF,0xFF} }},
677 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_5 */
678 {0xF5,0xEE,0x1B,0x44},
679 {0xF8,0xF4,0x18,0x38},
680 {0xEB,0x04,0x25,0x18},
681 {0xF1,0x05,0x1F,0x16},
682 {0xF6,0x06,0x1A,0x14},
683 {0xFA,0x06,0x16,0x14},
684 {0x00,0x04,0x10,0x18},
685 {0xFF,0xFF,0xFF,0xFF} }},
686 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_6 */
687 {0xEB,0x04,0x25,0x18},
688 {0xE7,0x0E,0x29,0x04},
689 {0xEE,0x0C,0x22,0x08},
690 {0xF6,0x0B,0x1A,0x0A},
691 {0xF9,0x0A,0x17,0x0C},
692 {0xFC,0x0A,0x14,0x0C},
693 {0x00,0x08,0x10,0x10},
694 {0xFF,0xFF,0xFF,0xFF} }},
695 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_7 */
696 {0xEC,0x02,0x24,0x1C},
697 {0xF2,0x04,0x1E,0x18},
698 {0xEB,0x15,0x25,0xF6},
699 {0xF4,0x10,0x1C,0x00},
700 {0xF8,0x0F,0x18,0x02},
701 {0x00,0x04,0x10,0x18},
702 {0x01,0x06,0x0F,0x14},
703 {0xFF,0xFF,0xFF,0xFF} }},
704 { {{0x00,0x00,0x00,0x40}, /* PALFilter_0 */
705 {0x00,0xE0,0x10,0x60},
706 {0x00,0xEE,0x10,0x44},
707 {0x00,0xF4,0x10,0x38},
708 {0xF8,0xF4,0x18,0x38},
709 {0xFC,0xFB,0x14,0x2A},
710 {0x00,0x00,0x10,0x20},
711 {0x00,0x04,0x10,0x18},
712 {0xFF,0xFF,0xFF,0xFF} }},
713 { {{0x00,0x00,0x00,0x40}, /* PALFilter_1 */
714 {0x00,0xE0,0x10,0x60},
715 {0x00,0xEE,0x10,0x44},
716 {0x00,0xF4,0x10,0x38},
717 {0xF8,0xF4,0x18,0x38},
718 {0xFC,0xFB,0x14,0x2A},
719 {0x00,0x00,0x10,0x20},
720 {0x00,0x04,0x10,0x18},
721 {0xFF,0xFF,0xFF,0xFF} }},
722 { {{0x00,0x00,0x00,0x40}, /* PALFilter_2 */
723 {0xF5,0xEE,0x1B,0x44},
724 {0xF8,0xF4,0x18,0x38},
725 {0xF1,0xF7,0x01,0x32},
726 {0xF5,0xFB,0x1B,0x2A},
727 {0xF9,0xFF,0x17,0x22},
728 {0xFB,0x01,0x15,0x1E},
729 {0x00,0x04,0x10,0x18},
730 {0xFF,0xFF,0xFF,0xFF} }},
731 { {{0x00,0x00,0x00,0x40}, /* PALFilter_3 */
732 {0xF5,0xFB,0x1B,0x2A},
733 {0xEE,0xFE,0x22,0x24},
734 {0xF3,0x00,0x1D,0x20},
735 {0xF9,0x03,0x17,0x1A},
736 {0xFB,0x02,0x14,0x1E},
737 {0xFB,0x04,0x15,0x18},
738 {0x00,0x06,0x10,0x14},
739 {0xFF,0xFF,0xFF,0xFF} }},
740 { {{0x00,0x00,0x00,0x40}, /* PALFilter_4 */
741 {0x00,0xE0,0x10,0x60},
742 {0x00,0xEE,0x10,0x44},
743 {0x00,0xF4,0x10,0x38},
744 {0xF8,0xF4,0x18,0x38},
745 {0xFC,0xFB,0x14,0x2A},
746 {0x00,0x00,0x10,0x20},
747 {0x00,0x04,0x10,0x18},
748 {0xFF,0xFF,0xFF,0xFF} }},
749 { {{0x00,0x00,0x00,0x40}, /* PALFilter_5 */
750 {0xF5,0xEE,0x1B,0x44},
751 {0xF8,0xF4,0x18,0x38},
752 {0xF1,0xF7,0x1F,0x32},
753 {0xF5,0xFB,0x1B,0x2A},
754 {0xF9,0xFF,0x17,0x22},
755 {0xFB,0x01,0x15,0x1E},
756 {0x00,0x04,0x10,0x18},
757 {0xFF,0xFF,0xFF,0xFF} }},
758 { {{0x00,0x00,0x00,0x40}, /* PALFilter_6 */
759 {0xF5,0xEE,0x1B,0x2A},
760 {0xEE,0xFE,0x22,0x24},
761 {0xF3,0x00,0x1D,0x20},
762 {0xF9,0x03,0x17,0x1A},
763 {0xFB,0x02,0x14,0x1E},
764 {0xFB,0x04,0x15,0x18},
765 {0x00,0x06,0x10,0x14},
766 {0xFF,0xFF,0xFF,0xFF} }},
767 { {{0x00,0x00,0x00,0x40}, /* PALFilter_7 */
768 {0xF5,0xEE,0x1B,0x44},
769 {0xF8,0xF4,0x18,0x38},
770 {0xFC,0xFB,0x14,0x2A},
771 {0xEB,0x05,0x25,0x16},
772 {0xF1,0x05,0x1F,0x16},
773 {0xFA,0x07,0x16,0x12},
774 {0x00,0x07,0x10,0x12},
775 {0xFF,0xFF,0xFF,0xFF} }}
778 static int filter = -1;
779 static unsigned char filter_tb;
782 /* ---------------------- Routine prototypes ------------------------- */
784 /* Interface used by the world */
785 #ifndef MODULE
786 XGIINITSTATIC int __init XGIfb_setup(char *options);
787 #endif
789 /* Interface to the low level console driver */
793 /* fbdev routines */
794 XGIINITSTATIC int __init xgifb_init(void);
795 static int XGIfb_set_par(struct fb_info *info);
796 static int XGIfb_blank(int blank,
797 struct fb_info *info);
798 /*static int XGIfb_mmap(struct fb_info *info, struct file *file,
799 struct vm_area_struct *vma);
801 extern void fbcon_XGI_fillrect(struct fb_info *info,
802 const struct fb_fillrect *rect);
803 extern void fbcon_XGI_copyarea(struct fb_info *info,
804 const struct fb_copyarea *area);
805 extern int fbcon_XGI_sync(struct fb_info *info);
807 static int XGIfb_ioctl(struct fb_info *info, unsigned int cmd,
808 unsigned long arg);
811 extern int XGIfb_mode_rate_to_dclock(VB_DEVICE_INFO *XGI_Pr,
812 struct xgi_hw_device_info *HwDeviceExtension,
813 unsigned char modeno, unsigned char rateindex);
814 extern int XGIfb_mode_rate_to_ddata(VB_DEVICE_INFO *XGI_Pr, struct xgi_hw_device_info *HwDeviceExtension,
815 unsigned char modeno, unsigned char rateindex,
816 unsigned int *left_margin, unsigned int *right_margin,
817 unsigned int *upper_margin, unsigned int *lower_margin,
818 unsigned int *hsync_len, unsigned int *vsync_len,
819 unsigned int *sync, unsigned int *vmode);
821 extern unsigned char XGI_SearchModeID(unsigned short ModeNo,
822 unsigned short *ModeIdIndex,
823 struct vb_device_info *);
824 static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
825 struct fb_info *info);
827 /* Internal 2D accelerator functions */
828 extern int XGIfb_initaccel(void);
829 extern void XGIfb_syncaccel(void);
831 /* Internal general routines */
832 static void XGIfb_search_mode(const char *name);
833 static int XGIfb_validate_mode(int modeindex);
834 static u8 XGIfb_search_refresh_rate(unsigned int rate);
835 static int XGIfb_setcolreg(unsigned regno, unsigned red, unsigned green,
836 unsigned blue, unsigned transp,
837 struct fb_info *fb_info);
838 static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
839 struct fb_info *info);
840 static void XGIfb_pre_setmode(void);
841 static void XGIfb_post_setmode(void);
843 static unsigned char XGIfb_CheckVBRetrace(void);
844 static unsigned char XGIfbcheckvretracecrt2(void);
845 static unsigned char XGIfbcheckvretracecrt1(void);
846 static unsigned char XGIfb_bridgeisslave(void);
848 struct XGI_memreq {
849 unsigned long offset;
850 unsigned long size;
853 /* XGI-specific Export functions */
854 void XGI_dispinfo(struct ap_data *rec);
855 void XGI_malloc(struct XGI_memreq *req);
856 void XGI_free(unsigned long base);
858 /* Internal hardware access routines */
859 void XGIfb_set_reg4(u16 port, unsigned long data);
860 u32 XGIfb_get_reg3(u16 port);
862 /* Chipset-dependent internal routines */
865 static int XGIfb_get_dram_size(void);
866 static void XGIfb_detect_VB(void);
867 static void XGIfb_get_VB_type(void);
868 static int XGIfb_has_VB(void);
871 /* Internal heap routines */
872 static int XGIfb_heap_init(void);
873 static XGI_OH *XGIfb_poh_new_node(void);
874 static XGI_OH *XGIfb_poh_allocate(unsigned long size);
875 static void XGIfb_delete_node(XGI_OH *poh);
876 static void XGIfb_insert_node(XGI_OH *pohList, XGI_OH *poh);
877 static XGI_OH *XGIfb_poh_free(unsigned long base);
878 static void XGIfb_free_node(XGI_OH *poh);
880 /* Internal routines to access PCI configuration space */
881 unsigned char XGIfb_query_VGA_config_space(struct xgi_hw_device_info *pXGIhw_ext,
882 unsigned long offset,
883 unsigned long set,
884 unsigned long *value);
885 //BOOLEAN XGIfb_query_north_bridge_space(PXGI_HW_DEVICE_INFO pXGIhw_ext,
886 // unsigned long offset, unsigned long set, unsigned long *value);
889 /* Routines from init.c/init301.c */
890 extern void InitTo330Pointer(unsigned char, struct vb_device_info *pVBInfo);
891 extern unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension);
892 extern unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
893 unsigned short ModeNo);
894 //extern void XGI_SetEnableDstn(VB_DEVICE_INFO *XGI_Pr);
895 extern void XGI_LongWait(struct vb_device_info *XGI_Pr);
896 extern unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
897 unsigned short ModeNo,
898 unsigned short ModeIdIndex,
899 struct vb_device_info *pVBInfo);
900 /* TW: Chrontel TV functions */
901 extern unsigned short XGI_GetCH700x(struct vb_device_info *XGI_Pr,
902 unsigned short tempbx);
903 extern void XGI_SetCH700x(struct vb_device_info *XGI_Pr, unsigned short tempbx);
904 extern unsigned short XGI_GetCH701x(struct vb_device_info *XGI_Pr,
905 unsigned short tempbx);
906 extern void XGI_SetCH701x(struct vb_device_info *XGI_Pr, unsigned short tempbx);
907 extern void XGI_SetCH70xxANDOR(struct vb_device_info *XGI_Pr,
908 unsigned short tempax,
909 unsigned short tempbh);
910 extern void XGI_DDC2Delay(struct vb_device_info *XGI_Pr, unsigned short delaytime);
912 /* TW: Sensing routines */
913 void XGI_Sense30x(void);
914 int XGIDoSense(int tempbl, int tempbh, int tempcl, int tempch);
916 extern struct XGI21_LVDSCapStruct XGI21_LCDCapList[13];
917 #endif