GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / tidspbridge / include / dspbridge / clk.h
blobb239503234215abccb8f0ea4e12e7b249922c002
1 /*
2 * clk.h
4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
6 * Provides Clock functions.
8 * Copyright (C) 2005-2006 Texas Instruments, Inc.
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19 #ifndef _CLK_H
20 #define _CLK_H
22 enum dsp_clk_id {
23 DSP_CLK_IVA2 = 0,
24 DSP_CLK_GPT5,
25 DSP_CLK_GPT6,
26 DSP_CLK_GPT7,
27 DSP_CLK_GPT8,
28 DSP_CLK_WDT3,
29 DSP_CLK_MCBSP1,
30 DSP_CLK_MCBSP2,
31 DSP_CLK_MCBSP3,
32 DSP_CLK_MCBSP4,
33 DSP_CLK_MCBSP5,
34 DSP_CLK_SSI,
35 DSP_CLK_NOT_DEFINED
39 * ======== dsp_clk_exit ========
40 * Purpose:
41 * Discontinue usage of module; free resources when reference count
42 * reaches 0.
43 * Parameters:
44 * Returns:
45 * Requires:
46 * CLK initialized.
47 * Ensures:
48 * Resources used by module are freed when cRef reaches zero.
50 extern void dsp_clk_exit(void);
53 * ======== dsp_clk_init ========
54 * Purpose:
55 * Initializes private state of CLK module.
56 * Parameters:
57 * Returns:
58 * TRUE if initialized; FALSE if error occured.
59 * Requires:
60 * Ensures:
61 * CLK initialized.
63 extern void dsp_clk_init(void);
65 void dsp_gpt_wait_overflow(short int clk_id, unsigned int load);
68 * ======== dsp_clk_enable ========
69 * Purpose:
70 * Enables the clock requested.
71 * Parameters:
72 * Returns:
73 * 0: Success.
74 * -EPERM: Error occured while enabling the clock.
75 * Requires:
76 * Ensures:
78 extern int dsp_clk_enable(enum dsp_clk_id clk_id);
80 u32 dsp_clock_enable_all(u32 dsp_per_clocks);
83 * ======== dsp_clk_disable ========
84 * Purpose:
85 * Disables the clock requested.
86 * Parameters:
87 * Returns:
88 * 0: Success.
89 * -EPERM: Error occured while disabling the clock.
90 * Requires:
91 * Ensures:
93 extern int dsp_clk_disable(enum dsp_clk_id clk_id);
95 extern u32 dsp_clk_get_iva2_rate(void);
97 u32 dsp_clock_disable_all(u32 dsp_per_clocks);
99 extern void ssi_clk_prepare(bool FLAG);
101 #endif /* _SYNC_H */