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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / iio / adc / max1363_core.c
blob6435e509dd5637db38452219ad12c4d1b1450d5f
1 /*
2 * iio/adc/max1363.c
3 * Copyright (C) 2008-2010 Jonathan Cameron
4 *
5 * based on linux/drivers/i2c/chips/max123x
6 * Copyright (C) 2002-2004 Stefan Eletzhofer
7 *
8 * based on linux/drivers/acron/char/pcf8583.c
9 * Copyright (C) 2000 Russell King
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * max1363.c
16 *
17 * Partial support for max1363 and similar chips.
18 *
19 * Not currently implemented.
20 *
21 * - Control of internal reference.
22 */
23
24 #include <linux/interrupt.h>
25 #include <linux/workqueue.h>
26 #include <linux/device.h>
27 #include <linux/kernel.h>
28 #include <linux/sysfs.h>
29 #include <linux/list.h>
30 #include <linux/i2c.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/slab.h>
33 #include <linux/err.h>
34
35 #include "../iio.h"
36 #include "../sysfs.h"
37
38 #include "../ring_generic.h"
39 #include "adc.h"
40 #include "max1363.h"
41
42 /* Here we claim all are 16 bits. This currently does no harm and saves
43 * us a lot of scan element listings */
44
45 #define MAX1363_SCAN_EL(number) \
46 IIO_SCAN_EL_C(in##number, number, IIO_UNSIGNED(16), 0, NULL);
47 #define MAX1363_SCAN_EL_D(p, n, number) \
48 IIO_SCAN_NAMED_EL_C(in##p##m##in##n, in##p-in##n, \
49 number, IIO_SIGNED(16), 0, NULL);
50
51 static MAX1363_SCAN_EL(0);
52 static MAX1363_SCAN_EL(1);
53 static MAX1363_SCAN_EL(2);
54 static MAX1363_SCAN_EL(3);
55 static MAX1363_SCAN_EL(4);
56 static MAX1363_SCAN_EL(5);
57 static MAX1363_SCAN_EL(6);
58 static MAX1363_SCAN_EL(7);
59 static MAX1363_SCAN_EL(8);
60 static MAX1363_SCAN_EL(9);
61 static MAX1363_SCAN_EL(10);
62 static MAX1363_SCAN_EL(11);
63 static MAX1363_SCAN_EL_D(0, 1, 12);
64 static MAX1363_SCAN_EL_D(2, 3, 13);
65 static MAX1363_SCAN_EL_D(4, 5, 14);
66 static MAX1363_SCAN_EL_D(6, 7, 15);
67 static MAX1363_SCAN_EL_D(8, 9, 16);
68 static MAX1363_SCAN_EL_D(10, 11, 17);
69 static MAX1363_SCAN_EL_D(1, 0, 18);
70 static MAX1363_SCAN_EL_D(3, 2, 19);
71 static MAX1363_SCAN_EL_D(5, 4, 20);
72 static MAX1363_SCAN_EL_D(7, 6, 21);
73 static MAX1363_SCAN_EL_D(9, 8, 22);
74 static MAX1363_SCAN_EL_D(11, 10, 23);
75
76 static const struct max1363_mode max1363_mode_table[] = {
77 /* All of the single channel options first */
78 MAX1363_MODE_SINGLE(0, 1 << 0),
79 MAX1363_MODE_SINGLE(1, 1 << 1),
80 MAX1363_MODE_SINGLE(2, 1 << 2),
81 MAX1363_MODE_SINGLE(3, 1 << 3),
82 MAX1363_MODE_SINGLE(4, 1 << 4),
83 MAX1363_MODE_SINGLE(5, 1 << 5),
84 MAX1363_MODE_SINGLE(6, 1 << 6),
85 MAX1363_MODE_SINGLE(7, 1 << 7),
86 MAX1363_MODE_SINGLE(8, 1 << 8),
87 MAX1363_MODE_SINGLE(9, 1 << 9),
88 MAX1363_MODE_SINGLE(10, 1 << 10),
89 MAX1363_MODE_SINGLE(11, 1 << 11),
90
91 MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
92 MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
93 MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
94 MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
95 MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
96 MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
97 MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
98 MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
99 MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
100 MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
101 MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
102 MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
103
104 /* The multichannel scans next */
105 MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
106 MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
107 MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
108 MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
109 MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
110 MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
111 MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
112 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
113 MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
114 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
115 MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
116 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
117 MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
118 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
119 MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
120 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
121 MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
122
123 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
124 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
125 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
126 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
127 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
128 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
129 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
130 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
131 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
132 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
133 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
134 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
135 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
136 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
137 };
138
139 const struct max1363_mode
140 *max1363_match_mode(u32 mask, const struct max1363_chip_info *ci)
141 {
142 int i;
143 if (mask)
144 for (i = 0; i < ci->num_modes; i++)
145 if (!((~max1363_mode_table[ci->mode_list[i]].modemask) &
146 mask))
147 return &max1363_mode_table[ci->mode_list[i]];
148 return NULL;
149 }
150
151 static ssize_t max1363_show_precision(struct device *dev,
152 struct device_attribute *attr,
153 char *buf)
154 {
155 struct iio_dev *dev_info = dev_get_drvdata(dev);
156 struct max1363_state *st = iio_dev_get_devdata(dev_info);
157 return sprintf(buf, "%d\n", st->chip_info->bits);
158 }
159
160 static IIO_DEVICE_ATTR(in_precision, S_IRUGO, max1363_show_precision,
161 NULL, 0);
162
163 static int max1363_write_basic_config(struct i2c_client *client,
164 unsigned char d1,
165 unsigned char d2)
166 {
167 int ret;
168 u8 *tx_buf = kmalloc(2, GFP_KERNEL);
169
170 if (!tx_buf)
171 return -ENOMEM;
172 tx_buf[0] = d1;
173 tx_buf[1] = d2;
174
175 ret = i2c_master_send(client, tx_buf, 2);
176 kfree(tx_buf);
177
178 return (ret > 0) ? 0 : ret;
179 }
180
181 int max1363_set_scan_mode(struct max1363_state *st)
182 {
183 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
184 | MAX1363_SCAN_MASK
185 | MAX1363_SE_DE_MASK);
186 st->configbyte |= st->current_mode->conf;
187
188 return max1363_write_basic_config(st->client,
189 st->setupbyte,
190 st->configbyte);
191 }
192
193 static ssize_t max1363_read_single_channel(struct device *dev,
194 struct device_attribute *attr,
195 char *buf)
196 {
197 struct iio_dev *dev_info = dev_get_drvdata(dev);
198 struct max1363_state *st = iio_dev_get_devdata(dev_info);
199 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
200 struct i2c_client *client = st->client;
201 int ret = 0, len = 0;
202 s32 data ;
203 char rxbuf[2];
204 long mask;
205
206 mutex_lock(&dev_info->mlock);
207 /*
208 * If monitor mode is enabled, the method for reading a single
209 * channel will have to be rather different and has not yet
210 * been implemented.
211 */
212 if (st->monitor_on) {
213 ret = -EBUSY;
214 goto error_ret;
215 }
216
217 /* If ring buffer capture is occuring, query the buffer */
218 if (iio_ring_enabled(dev_info)) {
219 mask = max1363_mode_table[this_attr->address].modemask;
220 data = max1363_single_channel_from_ring(mask, st);
221 if (data < 0) {
222 ret = data;
223 goto error_ret;
224 }
225 } else {
226 /* Check to see if current scan mode is correct */
227 if (st->current_mode !=
228 &max1363_mode_table[this_attr->address]) {
229 /* Update scan mode if needed */
230 st->current_mode
231 = &max1363_mode_table[this_attr->address];
232 ret = max1363_set_scan_mode(st);
233 if (ret)
234 goto error_ret;
235 }
236 if (st->chip_info->bits != 8) {
237 /* Get reading */
238 data = i2c_master_recv(client, rxbuf, 2);
239 if (data < 0) {
240 ret = data;
241 goto error_ret;
242 }
243
244 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
245 } else {
246 /* Get reading */
247 data = i2c_master_recv(client, rxbuf, 1);
248 if (data < 0) {
249 ret = data;
250 goto error_ret;
251 }
252 data = rxbuf[0];
253 }
254 }
255 /* Pretty print the result */
256 len = sprintf(buf, "%u\n", data);
257
258 error_ret:
259 mutex_unlock(&dev_info->mlock);
260 return ret ? ret : len;
261 }
262
263 /* Direct read attribtues */
264 static IIO_DEV_ATTR_IN_RAW(0, max1363_read_single_channel, _s0);
265 static IIO_DEV_ATTR_IN_RAW(1, max1363_read_single_channel, _s1);
266 static IIO_DEV_ATTR_IN_RAW(2, max1363_read_single_channel, _s2);
267 static IIO_DEV_ATTR_IN_RAW(3, max1363_read_single_channel, _s3);
268 static IIO_DEV_ATTR_IN_RAW(4, max1363_read_single_channel, _s4);
269 static IIO_DEV_ATTR_IN_RAW(5, max1363_read_single_channel, _s5);
270 static IIO_DEV_ATTR_IN_RAW(6, max1363_read_single_channel, _s6);
271 static IIO_DEV_ATTR_IN_RAW(7, max1363_read_single_channel, _s7);
272 static IIO_DEV_ATTR_IN_RAW(8, max1363_read_single_channel, _s8);
273 static IIO_DEV_ATTR_IN_RAW(9, max1363_read_single_channel, _s9);
274 static IIO_DEV_ATTR_IN_RAW(10, max1363_read_single_channel, _s10);
275 static IIO_DEV_ATTR_IN_RAW(11, max1363_read_single_channel, _s11);
276
277 static IIO_DEV_ATTR_IN_DIFF_RAW(0, 1, max1363_read_single_channel, d0m1);
278 static IIO_DEV_ATTR_IN_DIFF_RAW(2, 3, max1363_read_single_channel, d2m3);
279 static IIO_DEV_ATTR_IN_DIFF_RAW(4, 5, max1363_read_single_channel, d4m5);
280 static IIO_DEV_ATTR_IN_DIFF_RAW(6, 7, max1363_read_single_channel, d6m7);
281 static IIO_DEV_ATTR_IN_DIFF_RAW(8, 9, max1363_read_single_channel, d8m9);
282 static IIO_DEV_ATTR_IN_DIFF_RAW(10, 11, max1363_read_single_channel, d10m11);
283 static IIO_DEV_ATTR_IN_DIFF_RAW(1, 0, max1363_read_single_channel, d1m0);
284 static IIO_DEV_ATTR_IN_DIFF_RAW(3, 2, max1363_read_single_channel, d3m2);
285 static IIO_DEV_ATTR_IN_DIFF_RAW(5, 4, max1363_read_single_channel, d5m4);
286 static IIO_DEV_ATTR_IN_DIFF_RAW(7, 6, max1363_read_single_channel, d7m6);
287 static IIO_DEV_ATTR_IN_DIFF_RAW(9, 8, max1363_read_single_channel, d9m8);
288 static IIO_DEV_ATTR_IN_DIFF_RAW(11, 10, max1363_read_single_channel, d11m10);
289
290
291 static ssize_t max1363_show_scale(struct device *dev,
292 struct device_attribute *attr,
293 char *buf)
294 {
295 /* Driver currently only support internal vref */
296 struct iio_dev *dev_info = dev_get_drvdata(dev);
297 struct max1363_state *st = iio_dev_get_devdata(dev_info);
298 /* Corresponds to Vref / 2^(bits) */
299
300 if ((1 << (st->chip_info->bits + 1))
301 > st->chip_info->int_vref_mv)
302 return sprintf(buf, "0.5\n");
303 else
304 return sprintf(buf, "%d\n",
305 st->chip_info->int_vref_mv >> st->chip_info->bits);
306 }
307
308 static IIO_DEVICE_ATTR(in_scale, S_IRUGO, max1363_show_scale, NULL, 0);
309
310 static ssize_t max1363_show_name(struct device *dev,
311 struct device_attribute *attr,
312 char *buf)
313 {
314 struct iio_dev *dev_info = dev_get_drvdata(dev);
315 struct max1363_state *st = iio_dev_get_devdata(dev_info);
316 return sprintf(buf, "%s\n", st->client->name);
317 }
318
319 static IIO_DEVICE_ATTR(name, S_IRUGO, max1363_show_name, NULL, 0);
320
321 /* Applies to max1363 */
322 static const enum max1363_modes max1363_mode_list[] = {
323 _s0, _s1, _s2, _s3,
324 s0to1, s0to2, s0to3,
325 d0m1, d2m3, d1m0, d3m2,
326 d0m1to2m3, d1m0to3m2,
327 };
328
329 static struct attribute *max1363_device_attrs[] = {
330 &iio_dev_attr_in0_raw.dev_attr.attr,
331 &iio_dev_attr_in1_raw.dev_attr.attr,
332 &iio_dev_attr_in2_raw.dev_attr.attr,
333 &iio_dev_attr_in3_raw.dev_attr.attr,
334 &iio_dev_attr_in0min1_raw.dev_attr.attr,
335 &iio_dev_attr_in2min3_raw.dev_attr.attr,
336 &iio_dev_attr_in1min0_raw.dev_attr.attr,
337 &iio_dev_attr_in3min2_raw.dev_attr.attr,
338 &iio_dev_attr_name.dev_attr.attr,
339 &iio_dev_attr_in_scale.dev_attr.attr,
340 NULL
341 };
342
343 static struct attribute_group max1363_dev_attr_group = {
344 .attrs = max1363_device_attrs,
345 };
346
347 static struct attribute *max1363_scan_el_attrs[] = {
348 &iio_scan_el_in0.dev_attr.attr,
349 &iio_scan_el_in1.dev_attr.attr,
350 &iio_scan_el_in2.dev_attr.attr,
351 &iio_scan_el_in3.dev_attr.attr,
352 &iio_scan_el_in0min1.dev_attr.attr,
353 &iio_scan_el_in2min3.dev_attr.attr,
354 &iio_scan_el_in1min0.dev_attr.attr,
355 &iio_scan_el_in3min2.dev_attr.attr,
356 &iio_dev_attr_in_precision.dev_attr.attr,
357 NULL,
358 };
359
360 static struct attribute_group max1363_scan_el_group = {
361 .name = "scan_elements",
362 .attrs = max1363_scan_el_attrs,
363 };
364
365 /* Appies to max1236, max1237 */
366 static const enum max1363_modes max1236_mode_list[] = {
367 _s0, _s1, _s2, _s3,
368 s0to1, s0to2, s0to3,
369 d0m1, d2m3, d1m0, d3m2,
370 d0m1to2m3, d1m0to3m2,
371 s2to3,
372 };
373
374 /* Applies to max1238, max1239 */
375 static const enum max1363_modes max1238_mode_list[] = {
376 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
377 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
378 s0to7, s0to8, s0to9, s0to10, s0to11,
379 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
380 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
381 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
382 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
383 s6to7, s6to8, s6to9, s6to10, s6to11,
384 d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
385 };
386
387 static struct attribute *max1238_device_attrs[] = {
388 &iio_dev_attr_in0_raw.dev_attr.attr,
389 &iio_dev_attr_in1_raw.dev_attr.attr,
390 &iio_dev_attr_in2_raw.dev_attr.attr,
391 &iio_dev_attr_in3_raw.dev_attr.attr,
392 &iio_dev_attr_in4_raw.dev_attr.attr,
393 &iio_dev_attr_in5_raw.dev_attr.attr,
394 &iio_dev_attr_in6_raw.dev_attr.attr,
395 &iio_dev_attr_in7_raw.dev_attr.attr,
396 &iio_dev_attr_in8_raw.dev_attr.attr,
397 &iio_dev_attr_in9_raw.dev_attr.attr,
398 &iio_dev_attr_in10_raw.dev_attr.attr,
399 &iio_dev_attr_in11_raw.dev_attr.attr,
400 &iio_dev_attr_in0min1_raw.dev_attr.attr,
401 &iio_dev_attr_in2min3_raw.dev_attr.attr,
402 &iio_dev_attr_in4min5_raw.dev_attr.attr,
403 &iio_dev_attr_in6min7_raw.dev_attr.attr,
404 &iio_dev_attr_in8min9_raw.dev_attr.attr,
405 &iio_dev_attr_in10min11_raw.dev_attr.attr,
406 &iio_dev_attr_in1min0_raw.dev_attr.attr,
407 &iio_dev_attr_in3min2_raw.dev_attr.attr,
408 &iio_dev_attr_in5min4_raw.dev_attr.attr,
409 &iio_dev_attr_in7min6_raw.dev_attr.attr,
410 &iio_dev_attr_in9min8_raw.dev_attr.attr,
411 &iio_dev_attr_in11min10_raw.dev_attr.attr,
412 &iio_dev_attr_name.dev_attr.attr,
413 &iio_dev_attr_in_scale.dev_attr.attr,
414 NULL
415 };
416
417 static struct attribute_group max1238_dev_attr_group = {
418 .attrs = max1238_device_attrs,
419 };
420
421 static struct attribute *max1238_scan_el_attrs[] = {
422 &iio_scan_el_in0.dev_attr.attr,
423 &iio_scan_el_in1.dev_attr.attr,
424 &iio_scan_el_in2.dev_attr.attr,
425 &iio_scan_el_in3.dev_attr.attr,
426 &iio_scan_el_in4.dev_attr.attr,
427 &iio_scan_el_in5.dev_attr.attr,
428 &iio_scan_el_in6.dev_attr.attr,
429 &iio_scan_el_in7.dev_attr.attr,
430 &iio_scan_el_in8.dev_attr.attr,
431 &iio_scan_el_in9.dev_attr.attr,
432 &iio_scan_el_in10.dev_attr.attr,
433 &iio_scan_el_in11.dev_attr.attr,
434 &iio_scan_el_in0min1.dev_attr.attr,
435 &iio_scan_el_in2min3.dev_attr.attr,
436 &iio_scan_el_in4min5.dev_attr.attr,
437 &iio_scan_el_in6min7.dev_attr.attr,
438 &iio_scan_el_in8min9.dev_attr.attr,
439 &iio_scan_el_in10min11.dev_attr.attr,
440 &iio_scan_el_in1min0.dev_attr.attr,
441 &iio_scan_el_in3min2.dev_attr.attr,
442 &iio_scan_el_in5min4.dev_attr.attr,
443 &iio_scan_el_in7min6.dev_attr.attr,
444 &iio_scan_el_in9min8.dev_attr.attr,
445 &iio_scan_el_in11min10.dev_attr.attr,
446 &iio_dev_attr_in_precision.dev_attr.attr,
447 NULL,
448 };
449
450 static struct attribute_group max1238_scan_el_group = {
451 .name = "scan_elements",
452 .attrs = max1238_scan_el_attrs,
453 };
454
455
456 static const enum max1363_modes max11607_mode_list[] = {
457 _s0, _s1, _s2, _s3,
458 s0to1, s0to2, s0to3,
459 s2to3,
460 d0m1, d2m3, d1m0, d3m2,
461 d0m1to2m3, d1m0to3m2,
462 };
463
464 static const enum max1363_modes max11608_mode_list[] = {
465 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
466 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
467 s6to7,
468 d0m1, d2m3, d4m5, d6m7,
469 d1m0, d3m2, d5m4, d7m6,
470 d0m1to2m3, d0m1to4m5, d0m1to6m7,
471 d1m0to3m2, d1m0to5m4, d1m0to7m6,
472 };
473
474 static struct attribute *max11608_device_attrs[] = {
475 &iio_dev_attr_in0_raw.dev_attr.attr,
476 &iio_dev_attr_in1_raw.dev_attr.attr,
477 &iio_dev_attr_in2_raw.dev_attr.attr,
478 &iio_dev_attr_in3_raw.dev_attr.attr,
479 &iio_dev_attr_in4_raw.dev_attr.attr,
480 &iio_dev_attr_in5_raw.dev_attr.attr,
481 &iio_dev_attr_in6_raw.dev_attr.attr,
482 &iio_dev_attr_in7_raw.dev_attr.attr,
483 &iio_dev_attr_in0min1_raw.dev_attr.attr,
484 &iio_dev_attr_in2min3_raw.dev_attr.attr,
485 &iio_dev_attr_in4min5_raw.dev_attr.attr,
486 &iio_dev_attr_in6min7_raw.dev_attr.attr,
487 &iio_dev_attr_in1min0_raw.dev_attr.attr,
488 &iio_dev_attr_in3min2_raw.dev_attr.attr,
489 &iio_dev_attr_in5min4_raw.dev_attr.attr,
490 &iio_dev_attr_in7min6_raw.dev_attr.attr,
491 &iio_dev_attr_name.dev_attr.attr,
492 &iio_dev_attr_in_scale.dev_attr.attr,
493 NULL
494 };
495
496 static struct attribute_group max11608_dev_attr_group = {
497 .attrs = max11608_device_attrs,
498 };
499
500 static struct attribute *max11608_scan_el_attrs[] = {
501 &iio_scan_el_in0.dev_attr.attr,
502 &iio_scan_el_in1.dev_attr.attr,
503 &iio_scan_el_in2.dev_attr.attr,
504 &iio_scan_el_in3.dev_attr.attr,
505 &iio_scan_el_in4.dev_attr.attr,
506 &iio_scan_el_in5.dev_attr.attr,
507 &iio_scan_el_in6.dev_attr.attr,
508 &iio_scan_el_in7.dev_attr.attr,
509 &iio_scan_el_in0min1.dev_attr.attr,
510 &iio_scan_el_in2min3.dev_attr.attr,
511 &iio_scan_el_in4min5.dev_attr.attr,
512 &iio_scan_el_in6min7.dev_attr.attr,
513 &iio_scan_el_in1min0.dev_attr.attr,
514 &iio_scan_el_in3min2.dev_attr.attr,
515 &iio_scan_el_in5min4.dev_attr.attr,
516 &iio_scan_el_in7min6.dev_attr.attr,
517 &iio_dev_attr_in_precision.dev_attr.attr,
518 };
519
520 static struct attribute_group max11608_scan_el_group = {
521 .name = "scan_elements",
522 .attrs = max11608_scan_el_attrs,
523 };
524
525 enum { max1361,
526 max1362,
527 max1363,
528 max1364,
529 max1036,
530 max1037,
531 max1038,
532 max1039,
533 max1136,
534 max1137,
535 max1138,
536 max1139,
537 max1236,
538 max1237,
539 max1238,
540 max1239,
541 max11600,
542 max11601,
543 max11602,
544 max11603,
545 max11604,
546 max11605,
547 max11606,
548 max11607,
549 max11608,
550 max11609,
551 max11610,
552 max11611,
553 max11612,
554 max11613,
555 max11614,
556 max11615,
557 max11616,
558 max11617,
559 };
560
561 /* max1363 and max1368 tested - rest from data sheet */
562 static const struct max1363_chip_info max1363_chip_info_tbl[] = {
563 [max1361] = {
564 .num_inputs = 4,
565 .bits = 10,
566 .int_vref_mv = 2048,
567 .monitor_mode = 1,
568 .mode_list = max1363_mode_list,
569 .num_modes = ARRAY_SIZE(max1363_mode_list),
570 .default_mode = s0to3,
571 .dev_attrs = &max1363_dev_attr_group,
572 .scan_attrs = &max1363_scan_el_group,
573 },
574 [max1362] = {
575 .num_inputs = 4,
576 .bits = 10,
577 .int_vref_mv = 4096,
578 .monitor_mode = 1,
579 .mode_list = max1363_mode_list,
580 .num_modes = ARRAY_SIZE(max1363_mode_list),
581 .default_mode = s0to3,
582 .dev_attrs = &max1363_dev_attr_group,
583 .scan_attrs = &max1363_scan_el_group,
584 },
585 [max1363] = {
586 .num_inputs = 4,
587 .bits = 12,
588 .int_vref_mv = 2048,
589 .monitor_mode = 1,
590 .mode_list = max1363_mode_list,
591 .num_modes = ARRAY_SIZE(max1363_mode_list),
592 .default_mode = s0to3,
593 .dev_attrs = &max1363_dev_attr_group,
594 .scan_attrs = &max1363_scan_el_group,
595 },
596 [max1364] = {
597 .num_inputs = 4,
598 .bits = 12,
599 .int_vref_mv = 4096,
600 .monitor_mode = 1,
601 .mode_list = max1363_mode_list,
602 .num_modes = ARRAY_SIZE(max1363_mode_list),
603 .default_mode = s0to3,
604 .dev_attrs = &max1363_dev_attr_group,
605 .scan_attrs = &max1363_scan_el_group,
606 },
607 [max1036] = {
608 .num_inputs = 4,
609 .bits = 8,
610 .int_vref_mv = 4096,
611 .mode_list = max1236_mode_list,
612 .num_modes = ARRAY_SIZE(max1236_mode_list),
613 .default_mode = s0to3,
614 .dev_attrs = &max1363_dev_attr_group,
615 .scan_attrs = &max1363_scan_el_group,
616 },
617 [max1037] = {
618 .num_inputs = 4,
619 .bits = 8,
620 .int_vref_mv = 2048,
621 .mode_list = max1236_mode_list,
622 .num_modes = ARRAY_SIZE(max1236_mode_list),
623 .default_mode = s0to3,
624 .dev_attrs = &max1363_dev_attr_group,
625 .scan_attrs = &max1363_scan_el_group,
626 },
627 [max1038] = {
628 .num_inputs = 12,
629 .bits = 8,
630 .int_vref_mv = 4096,
631 .mode_list = max1238_mode_list,
632 .num_modes = ARRAY_SIZE(max1238_mode_list),
633 .default_mode = s0to11,
634 .dev_attrs = &max1238_dev_attr_group,
635 .scan_attrs = &max1238_scan_el_group,
636 },
637 [max1039] = {
638 .num_inputs = 12,
639 .bits = 8,
640 .int_vref_mv = 2048,
641 .mode_list = max1238_mode_list,
642 .num_modes = ARRAY_SIZE(max1238_mode_list),
643 .default_mode = s0to11,
644 .dev_attrs = &max1238_dev_attr_group,
645 .scan_attrs = &max1238_scan_el_group,
646 },
647 [max1136] = {
648 .num_inputs = 4,
649 .bits = 10,
650 .int_vref_mv = 4096,
651 .mode_list = max1236_mode_list,
652 .num_modes = ARRAY_SIZE(max1236_mode_list),
653 .default_mode = s0to3,
654 .dev_attrs = &max1363_dev_attr_group,
655 .scan_attrs = &max1363_scan_el_group,
656 },
657 [max1137] = {
658 .num_inputs = 4,
659 .bits = 10,
660 .int_vref_mv = 2048,
661 .mode_list = max1236_mode_list,
662 .num_modes = ARRAY_SIZE(max1236_mode_list),
663 .default_mode = s0to3,
664 .dev_attrs = &max1363_dev_attr_group,
665 .scan_attrs = &max1363_scan_el_group,
666 },
667 [max1138] = {
668 .num_inputs = 12,
669 .bits = 10,
670 .int_vref_mv = 4096,
671 .mode_list = max1238_mode_list,
672 .num_modes = ARRAY_SIZE(max1238_mode_list),
673 .default_mode = s0to11,
674 .dev_attrs = &max1238_dev_attr_group,
675 .scan_attrs = &max1238_scan_el_group,
676 },
677 [max1139] = {
678 .num_inputs = 12,
679 .bits = 10,
680 .int_vref_mv = 2048,
681 .mode_list = max1238_mode_list,
682 .num_modes = ARRAY_SIZE(max1238_mode_list),
683 .default_mode = s0to11,
684 .dev_attrs = &max1238_dev_attr_group,
685 .scan_attrs = &max1238_scan_el_group,
686 },
687 [max1236] = {
688 .num_inputs = 4,
689 .bits = 12,
690 .int_vref_mv = 4096,
691 .mode_list = max1236_mode_list,
692 .num_modes = ARRAY_SIZE(max1236_mode_list),
693 .default_mode = s0to3,
694 .dev_attrs = &max1363_dev_attr_group,
695 .scan_attrs = &max1363_scan_el_group,
696 },
697 [max1237] = {
698 .num_inputs = 4,
699 .bits = 12,
700 .int_vref_mv = 2048,
701 .mode_list = max1236_mode_list,
702 .num_modes = ARRAY_SIZE(max1236_mode_list),
703 .default_mode = s0to3,
704 .dev_attrs = &max1363_dev_attr_group,
705 .scan_attrs = &max1363_scan_el_group,
706 },
707 [max1238] = {
708 .num_inputs = 12,
709 .bits = 12,
710 .int_vref_mv = 4096,
711 .mode_list = max1238_mode_list,
712 .num_modes = ARRAY_SIZE(max1238_mode_list),
713 .default_mode = s0to11,
714 .dev_attrs = &max1238_dev_attr_group,
715 .scan_attrs = &max1238_scan_el_group,
716 },
717 [max1239] = {
718 .num_inputs = 12,
719 .bits = 12,
720 .int_vref_mv = 2048,
721 .mode_list = max1238_mode_list,
722 .num_modes = ARRAY_SIZE(max1238_mode_list),
723 .default_mode = s0to11,
724 .dev_attrs = &max1238_dev_attr_group,
725 .scan_attrs = &max1238_scan_el_group,
726 },
727 [max11600] = {
728 .num_inputs = 4,
729 .bits = 8,
730 .int_vref_mv = 4096,
731 .mode_list = max11607_mode_list,
732 .num_modes = ARRAY_SIZE(max11607_mode_list),
733 .default_mode = s0to3,
734 .dev_attrs = &max1363_dev_attr_group,
735 .scan_attrs = &max1363_scan_el_group,
736 },
737 [max11601] = {
738 .num_inputs = 4,
739 .bits = 8,
740 .int_vref_mv = 2048,
741 .mode_list = max11607_mode_list,
742 .num_modes = ARRAY_SIZE(max11607_mode_list),
743 .default_mode = s0to3,
744 .dev_attrs = &max1363_dev_attr_group,
745 .scan_attrs = &max1363_scan_el_group,
746 },
747 [max11602] = {
748 .num_inputs = 8,
749 .bits = 8,
750 .int_vref_mv = 4096,
751 .mode_list = max11608_mode_list,
752 .num_modes = ARRAY_SIZE(max11608_mode_list),
753 .default_mode = s0to7,
754 .dev_attrs = &max11608_dev_attr_group,
755 .scan_attrs = &max11608_scan_el_group,
756 },
757 [max11603] = {
758 .num_inputs = 8,
759 .bits = 8,
760 .int_vref_mv = 2048,
761 .mode_list = max11608_mode_list,
762 .num_modes = ARRAY_SIZE(max11608_mode_list),
763 .default_mode = s0to7,
764 .dev_attrs = &max11608_dev_attr_group,
765 .scan_attrs = &max11608_scan_el_group,
766 },
767 [max11604] = {
768 .num_inputs = 12,
769 .bits = 8,
770 .int_vref_mv = 4098,
771 .mode_list = max1238_mode_list,
772 .num_modes = ARRAY_SIZE(max1238_mode_list),
773 .default_mode = s0to11,
774 .dev_attrs = &max1238_dev_attr_group,
775 .scan_attrs = &max1238_scan_el_group,
776 },
777 [max11605] = {
778 .num_inputs = 12,
779 .bits = 8,
780 .int_vref_mv = 2048,
781 .mode_list = max1238_mode_list,
782 .num_modes = ARRAY_SIZE(max1238_mode_list),
783 .default_mode = s0to11,
784 .dev_attrs = &max1238_dev_attr_group,
785 .scan_attrs = &max1238_scan_el_group,
786 },
787 [max11606] = {
788 .num_inputs = 4,
789 .bits = 10,
790 .int_vref_mv = 4096,
791 .mode_list = max11607_mode_list,
792 .num_modes = ARRAY_SIZE(max11607_mode_list),
793 .default_mode = s0to3,
794 .dev_attrs = &max1363_dev_attr_group,
795 .scan_attrs = &max1363_scan_el_group,
796 },
797 [max11607] = {
798 .num_inputs = 4,
799 .bits = 10,
800 .int_vref_mv = 2048,
801 .mode_list = max11607_mode_list,
802 .num_modes = ARRAY_SIZE(max11607_mode_list),
803 .default_mode = s0to3,
804 .dev_attrs = &max1363_dev_attr_group,
805 .scan_attrs = &max1363_scan_el_group,
806 },
807 [max11608] = {
808 .num_inputs = 8,
809 .bits = 10,
810 .int_vref_mv = 4096,
811 .mode_list = max11608_mode_list,
812 .num_modes = ARRAY_SIZE(max11608_mode_list),
813 .default_mode = s0to7,
814 .dev_attrs = &max11608_dev_attr_group,
815 .scan_attrs = &max11608_scan_el_group,
816 },
817 [max11609] = {
818 .num_inputs = 8,
819 .bits = 10,
820 .int_vref_mv = 2048,
821 .mode_list = max11608_mode_list,
822 .num_modes = ARRAY_SIZE(max11608_mode_list),
823 .default_mode = s0to7,
824 .dev_attrs = &max11608_dev_attr_group,
825 .scan_attrs = &max11608_scan_el_group,
826 },
827 [max11610] = {
828 .num_inputs = 12,
829 .bits = 10,
830 .int_vref_mv = 4098,
831 .mode_list = max1238_mode_list,
832 .num_modes = ARRAY_SIZE(max1238_mode_list),
833 .default_mode = s0to11,
834 .dev_attrs = &max1238_dev_attr_group,
835 .scan_attrs = &max1238_scan_el_group,
836 },
837 [max11611] = {
838 .num_inputs = 12,
839 .bits = 10,
840 .int_vref_mv = 2048,
841 .mode_list = max1238_mode_list,
842 .num_modes = ARRAY_SIZE(max1238_mode_list),
843 .default_mode = s0to11,
844 .dev_attrs = &max1238_dev_attr_group,
845 .scan_attrs = &max1238_scan_el_group,
846 },
847 [max11612] = {
848 .num_inputs = 4,
849 .bits = 12,
850 .int_vref_mv = 4096,
851 .mode_list = max11607_mode_list,
852 .num_modes = ARRAY_SIZE(max11607_mode_list),
853 .default_mode = s0to3,
854 .dev_attrs = &max1363_dev_attr_group,
855 .scan_attrs = &max1363_scan_el_group,
856 },
857 [max11613] = {
858 .num_inputs = 4,
859 .bits = 12,
860 .int_vref_mv = 2048,
861 .mode_list = max11607_mode_list,
862 .num_modes = ARRAY_SIZE(max11607_mode_list),
863 .default_mode = s0to3,
864 .dev_attrs = &max1363_dev_attr_group,
865 .scan_attrs = &max1363_scan_el_group,
866 },
867 [max11614] = {
868 .num_inputs = 8,
869 .bits = 12,
870 .int_vref_mv = 4096,
871 .mode_list = max11608_mode_list,
872 .num_modes = ARRAY_SIZE(max11608_mode_list),
873 .default_mode = s0to7,
874 .dev_attrs = &max11608_dev_attr_group,
875 .scan_attrs = &max11608_scan_el_group,
876 },
877 [max11615] = {
878 .num_inputs = 8,
879 .bits = 12,
880 .int_vref_mv = 2048,
881 .mode_list = max11608_mode_list,
882 .num_modes = ARRAY_SIZE(max11608_mode_list),
883 .default_mode = s0to7,
884 .dev_attrs = &max11608_dev_attr_group,
885 .scan_attrs = &max11608_scan_el_group,
886 },
887 [max11616] = {
888 .num_inputs = 12,
889 .bits = 12,
890 .int_vref_mv = 4098,
891 .mode_list = max1238_mode_list,
892 .num_modes = ARRAY_SIZE(max1238_mode_list),
893 .default_mode = s0to11,
894 .dev_attrs = &max1238_dev_attr_group,
895 .scan_attrs = &max1238_scan_el_group,
896 },
897 [max11617] = {
898 .num_inputs = 12,
899 .bits = 12,
900 .int_vref_mv = 2048,
901 .mode_list = max1238_mode_list,
902 .num_modes = ARRAY_SIZE(max1238_mode_list),
903 .default_mode = s0to11,
904 .dev_attrs = &max1238_dev_attr_group,
905 .scan_attrs = &max1238_scan_el_group,
906 }
907 };
908
909 static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
910 8300, 4200, 2000, 1000 };
911
912 static ssize_t max1363_monitor_show_freq(struct device *dev,
913 struct device_attribute *attr,
914 char *buf)
915 {
916 struct iio_dev *dev_info = dev_get_drvdata(dev);
917 struct max1363_state *st = iio_dev_get_devdata(dev_info);
918 return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
919 }
920
921 static ssize_t max1363_monitor_store_freq(struct device *dev,
922 struct device_attribute *attr,
923 const char *buf,
924 size_t len)
925 {
926 struct iio_dev *dev_info = dev_get_drvdata(dev);
927 struct max1363_state *st = iio_dev_get_devdata(dev_info);
928 int i, ret;
929 unsigned long val;
930 bool found = false;
931
932 ret = strict_strtoul(buf, 10, &val);
933 if (ret)
934 return -EINVAL;
935 for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
936 if (val == max1363_monitor_speeds[i]) {
937 found = true;
938 break;
939 }
940 if (!found)
941 return -EINVAL;
942
943 mutex_lock(&dev_info->mlock);
944 st->monitor_speed = i;
945 mutex_unlock(&dev_info->mlock);
946
947 return 0;
948 }
949
950 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
951 max1363_monitor_show_freq,
952 max1363_monitor_store_freq);
953
954 static IIO_CONST_ATTR(sampling_frequency_available,
955 "133000 665000 33300 16600 8300 4200 2000 1000");
956
957 static ssize_t max1363_show_thresh(struct device *dev,
958 struct device_attribute *attr,
959 char *buf,
960 bool high)
961 {
962 struct iio_dev *dev_info = dev_get_drvdata(dev);
963 struct max1363_state *st = iio_dev_get_devdata(dev_info);
964 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
965
966 if (high)
967 return sprintf(buf, "%d\n",
968 st->thresh_high[this_attr->address]);
969 else
970 return sprintf(buf, "%d\n",
971 st->thresh_low[this_attr->address & 0x7]);
972 }
973
974 static ssize_t max1363_show_thresh_low(struct device *dev,
975 struct device_attribute *attr,
976 char *buf)
977 {
978 return max1363_show_thresh(dev, attr, buf, false);
979 }
980
981 static ssize_t max1363_show_thresh_high(struct device *dev,
982 struct device_attribute *attr,
983 char *buf)
984 {
985 return max1363_show_thresh(dev, attr, buf, true);
986 }
987
988 static ssize_t max1363_store_thresh_unsigned(struct device *dev,
989 struct device_attribute *attr,
990 const char *buf,
991 size_t len,
992 bool high)
993 {
994 struct iio_dev *dev_info = dev_get_drvdata(dev);
995 struct max1363_state *st = iio_dev_get_devdata(dev_info);
996 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
997 unsigned long val;
998 int ret;
999
1000 ret = strict_strtoul(buf, 10, &val);
1001 if (ret)
1002 return -EINVAL;
1003 switch (st->chip_info->bits) {
1004 case 10:
1005 if (val > 0x3FF)
1006 return -EINVAL;
1007 break;
1008 case 12:
1009 if (val > 0xFFF)
1010 return -EINVAL;
1011 break;
1012 }
1013
1014 switch (high) {
1015 case 1:
1016 st->thresh_high[this_attr->address] = val;
1017 break;
1018 case 0:
1019 st->thresh_low[this_attr->address & 0x7] = val;
1020 break;
1021 }
1022
1023 return len;
1024 }
1025
1026 static ssize_t max1363_store_thresh_high_unsigned(struct device *dev,
1027 struct device_attribute *attr,
1028 const char *buf,
1029 size_t len)
1030 {
1031 return max1363_store_thresh_unsigned(dev, attr, buf, len, true);
1032 }
1033
1034 static ssize_t max1363_store_thresh_low_unsigned(struct device *dev,
1035 struct device_attribute *attr,
1036 const char *buf,
1037 size_t len)
1038 {
1039 return max1363_store_thresh_unsigned(dev, attr, buf, len, false);
1040 }
1041
1042 static ssize_t max1363_store_thresh_signed(struct device *dev,
1043 struct device_attribute *attr,
1044 const char *buf,
1045 size_t len,
1046 bool high)
1047 {
1048 struct iio_dev *dev_info = dev_get_drvdata(dev);
1049 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1050 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1051 long val;
1052 int ret;
1053
1054 ret = strict_strtol(buf, 10, &val);
1055 if (ret)
1056 return -EINVAL;
1057 switch (st->chip_info->bits) {
1058 case 10:
1059 if (val < -512 || val > 511)
1060 return -EINVAL;
1061 break;
1062 case 12:
1063 if (val < -2048 || val > 2047)
1064 return -EINVAL;
1065 break;
1066 }
1067
1068 switch (high) {
1069 case 1:
1070 st->thresh_high[this_attr->address] = val;
1071 break;
1072 case 0:
1073 st->thresh_low[this_attr->address & 0x7] = val;
1074 break;
1075 }
1076
1077 return len;
1078 }
1079
1080 static ssize_t max1363_store_thresh_high_signed(struct device *dev,
1081 struct device_attribute *attr,
1082 const char *buf,
1083 size_t len)
1084 {
1085 return max1363_store_thresh_signed(dev, attr, buf, len, true);
1086 }
1087
1088 static ssize_t max1363_store_thresh_low_signed(struct device *dev,
1089 struct device_attribute *attr,
1090 const char *buf,
1091 size_t len)
1092 {
1093 return max1363_store_thresh_signed(dev, attr, buf, len, false);
1094 }
1095
1096 static IIO_DEVICE_ATTR(in0_thresh_high_value, S_IRUGO | S_IWUSR,
1097 max1363_show_thresh_high,
1098 max1363_store_thresh_high_unsigned, 0);
1099 static IIO_DEVICE_ATTR(in0_thresh_low_value, S_IRUGO | S_IWUSR,
1100 max1363_show_thresh_low,
1101 max1363_store_thresh_low_unsigned, 0);
1102 static IIO_DEVICE_ATTR(in1_thresh_high_value, S_IRUGO | S_IWUSR,
1103 max1363_show_thresh_high,
1104 max1363_store_thresh_high_unsigned, 1);
1105 static IIO_DEVICE_ATTR(in1_thresh_low_value, S_IRUGO | S_IWUSR,
1106 max1363_show_thresh_low,
1107 max1363_store_thresh_low_unsigned, 1);
1108 static IIO_DEVICE_ATTR(in2_thresh_high_value, S_IRUGO | S_IWUSR,
1109 max1363_show_thresh_high,
1110 max1363_store_thresh_high_unsigned, 2);
1111 static IIO_DEVICE_ATTR(in2_thresh_low_value, S_IRUGO | S_IWUSR,
1112 max1363_show_thresh_low,
1113 max1363_store_thresh_low_unsigned, 2);
1114 static IIO_DEVICE_ATTR(in3_thresh_high_value, S_IRUGO | S_IWUSR,
1115 max1363_show_thresh_high,
1116 max1363_store_thresh_high_unsigned, 3);
1117 static IIO_DEVICE_ATTR(in3_thresh_low_value, S_IRUGO | S_IWUSR,
1118 max1363_show_thresh_low,
1119 max1363_store_thresh_low_unsigned, 3);
1120
1121 static IIO_DEVICE_ATTR_NAMED(in0min1_thresh_high_value,
1122 in0-in1_thresh_high_value,
1123 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1124 max1363_store_thresh_high_signed, 4);
1125 static IIO_DEVICE_ATTR_NAMED(in0min1_thresh_low_value,
1126 in0-in1_thresh_low_value,
1127 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1128 max1363_store_thresh_low_signed, 4);
1129 static IIO_DEVICE_ATTR_NAMED(in2min3_thresh_high_value,
1130 in2-in3_thresh_high_value,
1131 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1132 max1363_store_thresh_high_signed, 5);
1133 static IIO_DEVICE_ATTR_NAMED(in2min3_thresh_low_value,
1134 in2-in3_thresh_low_value,
1135 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1136 max1363_store_thresh_low_signed, 5);
1137 static IIO_DEVICE_ATTR_NAMED(in1min0_thresh_high_value,
1138 in1-in0_thresh_high_value,
1139 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1140 max1363_store_thresh_high_signed, 6);
1141 static IIO_DEVICE_ATTR_NAMED(in1min0_thresh_low_value,
1142 in1-in0_thresh_low_value,
1143 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1144 max1363_store_thresh_low_signed, 6);
1145 static IIO_DEVICE_ATTR_NAMED(in3min2_thresh_high_value,
1146 in3-in2_thresh_high_value,
1147 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1148 max1363_store_thresh_high_signed, 7);
1149 static IIO_DEVICE_ATTR_NAMED(in3min2_thresh_low_value,
1150 in3-in2_thresh_low_value,
1151 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1152 max1363_store_thresh_low_signed, 7);
1153
1154 static int max1363_int_th(struct iio_dev *dev_info,
1155 int index,
1156 s64 timestamp,
1157 int not_test)
1158 {
1159 struct max1363_state *st = dev_info->dev_data;
1160
1161 st->last_timestamp = timestamp;
1162 schedule_work(&st->thresh_work);
1163 return 0;
1164 }
1165
1166 static void max1363_thresh_handler_bh(struct work_struct *work_s)
1167 {
1168 struct max1363_state *st = container_of(work_s, struct max1363_state,
1169 thresh_work);
1170 u8 rx;
1171 u8 tx[2] = { st->setupbyte,
1172 MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
1173
1174 i2c_master_recv(st->client, &rx, 1);
1175 if (rx & (1 << 0))
1176 iio_push_event(st->indio_dev, 0,
1177 IIO_EVENT_CODE_IN_LOW_THRESH(3),
1178 st->last_timestamp);
1179 if (rx & (1 << 1))
1180 iio_push_event(st->indio_dev, 0,
1181 IIO_EVENT_CODE_IN_HIGH_THRESH(3),
1182 st->last_timestamp);
1183 if (rx & (1 << 2))
1184 iio_push_event(st->indio_dev, 0,
1185 IIO_EVENT_CODE_IN_LOW_THRESH(2),
1186 st->last_timestamp);
1187 if (rx & (1 << 3))
1188 iio_push_event(st->indio_dev, 0,
1189 IIO_EVENT_CODE_IN_HIGH_THRESH(2),
1190 st->last_timestamp);
1191 if (rx & (1 << 4))
1192 iio_push_event(st->indio_dev, 0,
1193 IIO_EVENT_CODE_IN_LOW_THRESH(1),
1194 st->last_timestamp);
1195 if (rx & (1 << 5))
1196 iio_push_event(st->indio_dev, 0,
1197 IIO_EVENT_CODE_IN_HIGH_THRESH(1),
1198 st->last_timestamp);
1199 if (rx & (1 << 6))
1200 iio_push_event(st->indio_dev, 0,
1201 IIO_EVENT_CODE_IN_LOW_THRESH(0),
1202 st->last_timestamp);
1203 if (rx & (1 << 7))
1204 iio_push_event(st->indio_dev, 0,
1205 IIO_EVENT_CODE_IN_HIGH_THRESH(0),
1206 st->last_timestamp);
1207 enable_irq(st->client->irq);
1208 i2c_master_send(st->client, tx, 2);
1209 }
1210
1211 static ssize_t max1363_read_interrupt_config(struct device *dev,
1212 struct device_attribute *attr,
1213 char *buf)
1214 {
1215 struct iio_dev *dev_info = dev_get_drvdata(dev);
1216 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1217 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1218 int val;
1219
1220 mutex_lock(&dev_info->mlock);
1221 if (this_attr->mask & 0x8)
1222 val = (1 << (this_attr->mask & 0x7)) & st->mask_low;
1223 else
1224 val = (1 << this_attr->mask) & st->mask_high;
1225 mutex_unlock(&dev_info->mlock);
1226
1227 return sprintf(buf, "%d\n", !!val);
1228 }
1229
1230 static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
1231 {
1232 u8 *tx_buf;
1233 int ret, i = 3, j;
1234 unsigned long numelements;
1235 int len;
1236 long modemask;
1237
1238 if (!enabled) {
1239 /* transition to ring capture is not currently supported */
1240 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
1241 st->configbyte &= ~MAX1363_SCAN_MASK;
1242 st->monitor_on = false;
1243 return max1363_write_basic_config(st->client,
1244 st->setupbyte,
1245 st->configbyte);
1246 }
1247
1248 /* Ensure we are in the relevant mode */
1249 st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
1250 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
1251 | MAX1363_SCAN_MASK
1252 | MAX1363_SE_DE_MASK);
1253 st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
1254 if ((st->mask_low | st->mask_high) & 0x0F) {
1255 st->configbyte |= max1363_mode_table[s0to3].conf;
1256 modemask = max1363_mode_table[s0to3].modemask;
1257 } else if ((st->mask_low | st->mask_high) & 0x30) {
1258 st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
1259 modemask = max1363_mode_table[d0m1to2m3].modemask;
1260 } else {
1261 st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
1262 modemask = max1363_mode_table[d1m0to3m2].modemask;
1263 }
1264 numelements = hweight_long(modemask);
1265 len = 3 * numelements + 3;
1266 tx_buf = kmalloc(len, GFP_KERNEL);
1267 if (!tx_buf) {
1268 ret = -ENOMEM;
1269 goto error_ret;
1270 }
1271 tx_buf[0] = st->configbyte;
1272 tx_buf[1] = st->setupbyte;
1273 tx_buf[2] = (st->monitor_speed << 1);
1274
1275 /*
1276 * So we need to do yet another bit of nefarious scan mode
1277 * setup to match what we need.
1278 */
1279 for (j = 0; j < 8; j++)
1280 if (modemask & (1 << j)) {
1281 /* Establish the mode is in the scan */
1282 if (st->mask_low & (1 << j)) {
1283 tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
1284 tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
1285 } else if (j < 4) {
1286 tx_buf[i] = 0;
1287 tx_buf[i + 1] = 0;
1288 } else {
1289 tx_buf[i] = 0x80;
1290 tx_buf[i + 1] = 0;
1291 }
1292 if (st->mask_high & (1 << j)) {
1293 tx_buf[i + 1] |=
1294 (st->thresh_high[j] >> 8) & 0x0F;
1295 tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
1296 } else if (j < 4) {
1297 tx_buf[i + 1] |= 0x0F;
1298 tx_buf[i + 2] = 0xFF;
1299 } else {
1300 tx_buf[i + 1] |= 0x07;
1301 tx_buf[i + 2] = 0xFF;
1302 }
1303 i += 3;
1304 }
1305
1306
1307 ret = i2c_master_send(st->client, tx_buf, len);
1308 if (ret < 0)
1309 goto error_ret;
1310 if (ret != len) {
1311 ret = -EIO;
1312 goto error_ret;
1313 }
1314
1315 /*
1316 * Now that we hopefully have sensible thresholds in place it is
1317 * time to turn the interrupts on.
1318 * It is unclear from the data sheet if this should be necessary
1319 * (i.e. whether monitor mode setup is atomic) but it appears to
1320 * be in practice.
1321 */
1322 tx_buf[0] = st->setupbyte;
1323 tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
1324 ret = i2c_master_send(st->client, tx_buf, 2);
1325 if (ret < 0)
1326 goto error_ret;
1327 if (ret != 2) {
1328 ret = -EIO;
1329 goto error_ret;
1330 }
1331 ret = 0;
1332 st->monitor_on = true;
1333 error_ret:
1334
1335 kfree(tx_buf);
1336
1337 return ret;
1338 }
1339
1340 /*
1341 * To keep this managable we always use one of 3 scan modes.
1342 * Scan 0...3, 0-1,2-3 and 1-0,3-2
1343 */
1344 static inline int __max1363_check_event_mask(int thismask, int checkmask)
1345 {
1346 int ret = 0;
1347 /* Is it unipolar */
1348 if (thismask < 4) {
1349 if (checkmask & ~0x0F) {
1350 ret = -EBUSY;
1351 goto error_ret;
1352 }
1353 } else if (thismask < 6) {
1354 if (checkmask & ~0x30) {
1355 ret = -EBUSY;
1356 goto error_ret;
1357 }
1358 } else if (checkmask & ~0xC0)
1359 ret = -EBUSY;
1360 error_ret:
1361 return ret;
1362 }
1363
1364 static ssize_t max1363_write_interrupt_config(struct device *dev,
1365 struct device_attribute *attr,
1366 const char *buf,
1367 size_t len)
1368 {
1369 struct iio_dev *dev_info = dev_get_drvdata(dev);
1370 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1371 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1372 unsigned long val;
1373 int ret;
1374 u16 unifiedmask;
1375 ret = strict_strtoul(buf, 10, &val);
1376 if (ret)
1377 return -EINVAL;
1378 mutex_lock(&st->indio_dev->mlock);
1379 unifiedmask = st->mask_low | st->mask_high;
1380 if (this_attr->mask & 0x08) {
1381 /* If we are disabling no need to test */
1382 if (val == 0)
1383 st->mask_low &= ~(1 << (this_attr->mask & 0x7));
1384 else {
1385 ret = __max1363_check_event_mask(this_attr->mask & 0x7,
1386 unifiedmask);
1387 if (ret)
1388 goto error_ret;
1389 st->mask_low |= (1 << (this_attr->mask & 0x7));
1390 }
1391 } else {
1392 if (val == 0)
1393 st->mask_high &= ~(1 << (this_attr->mask));
1394 else {
1395 ret = __max1363_check_event_mask(this_attr->mask,
1396 unifiedmask);
1397 if (ret)
1398 goto error_ret;
1399 st->mask_high |= (1 << this_attr->mask);
1400 }
1401 }
1402 if (st->monitor_on && !st->mask_high && !st->mask_low)
1403 iio_remove_event_from_list(this_attr->listel,
1404 &dev_info->interrupts[0]->ev_list);
1405 if (!st->monitor_on && val)
1406 iio_add_event_to_list(this_attr->listel,
1407 &dev_info->interrupts[0]->ev_list);
1408
1409 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
1410 error_ret:
1411 mutex_unlock(&st->indio_dev->mlock);
1412
1413 return len;
1414 }
1415
1416 IIO_EVENT_SH(max1363_thresh, max1363_int_th);
1417
1418 #define MAX1363_HIGH_THRESH(a) a
1419 #define MAX1363_LOW_THRESH(a) (a | 0x8)
1420
1421 IIO_EVENT_ATTR_SH(in0_thresh_high_en,
1422 iio_event_max1363_thresh,
1423 max1363_read_interrupt_config,
1424 max1363_write_interrupt_config,
1425 MAX1363_HIGH_THRESH(0));
1426
1427 IIO_EVENT_ATTR_SH(in0_thresh_low_en,
1428 iio_event_max1363_thresh,
1429 max1363_read_interrupt_config,
1430 max1363_write_interrupt_config,
1431 MAX1363_LOW_THRESH(0));
1432
1433 IIO_EVENT_ATTR_SH(in1_thresh_high_en,
1434 iio_event_max1363_thresh,
1435 max1363_read_interrupt_config,
1436 max1363_write_interrupt_config,
1437 MAX1363_HIGH_THRESH(1));
1438
1439 IIO_EVENT_ATTR_SH(in1_thresh_low_en,
1440 iio_event_max1363_thresh,
1441 max1363_read_interrupt_config,
1442 max1363_write_interrupt_config,
1443 MAX1363_LOW_THRESH(1));
1444
1445 IIO_EVENT_ATTR_SH(in2_thresh_high_en,
1446 iio_event_max1363_thresh,
1447 max1363_read_interrupt_config,
1448 max1363_write_interrupt_config,
1449 MAX1363_HIGH_THRESH(2));
1450
1451 IIO_EVENT_ATTR_SH(in2_thresh_low_en,
1452 iio_event_max1363_thresh,
1453 max1363_read_interrupt_config,
1454 max1363_write_interrupt_config,
1455 MAX1363_LOW_THRESH(2));
1456
1457 IIO_EVENT_ATTR_SH(in3_thresh_high_en,
1458 iio_event_max1363_thresh,
1459 max1363_read_interrupt_config,
1460 max1363_write_interrupt_config,
1461 MAX1363_HIGH_THRESH(3));
1462
1463 IIO_EVENT_ATTR_SH(in3_thresh_low_en,
1464 iio_event_max1363_thresh,
1465 max1363_read_interrupt_config,
1466 max1363_write_interrupt_config,
1467 MAX1363_LOW_THRESH(3));
1468
1469 IIO_EVENT_ATTR_NAMED_SH(in0min1_thresh_high_en,
1470 in0-in1_thresh_high_en,
1471 iio_event_max1363_thresh,
1472 max1363_read_interrupt_config,
1473 max1363_write_interrupt_config,
1474 MAX1363_HIGH_THRESH(4));
1475
1476 IIO_EVENT_ATTR_NAMED_SH(in0min1_thresh_low_en,
1477 in0-in1_thresh_low_en,
1478 iio_event_max1363_thresh,
1479 max1363_read_interrupt_config,
1480 max1363_write_interrupt_config,
1481 MAX1363_LOW_THRESH(4));
1482
1483 IIO_EVENT_ATTR_NAMED_SH(in3min2_thresh_high_en,
1484 in3-in2_thresh_high_en,
1485 iio_event_max1363_thresh,
1486 max1363_read_interrupt_config,
1487 max1363_write_interrupt_config,
1488 MAX1363_HIGH_THRESH(5));
1489
1490 IIO_EVENT_ATTR_NAMED_SH(in3min2_thresh_low_en,
1491 in3-in2_thresh_low_en,
1492 iio_event_max1363_thresh,
1493 max1363_read_interrupt_config,
1494 max1363_write_interrupt_config,
1495 MAX1363_LOW_THRESH(5));
1496
1497 IIO_EVENT_ATTR_NAMED_SH(in1min0_thresh_high_en,
1498 in1-in0_thresh_high_en,
1499 iio_event_max1363_thresh,
1500 max1363_read_interrupt_config,
1501 max1363_write_interrupt_config,
1502 MAX1363_HIGH_THRESH(6));
1503
1504 IIO_EVENT_ATTR_NAMED_SH(in1min0_thresh_low_en,
1505 in1-in0_thresh_low_en,
1506 iio_event_max1363_thresh,
1507 max1363_read_interrupt_config,
1508 max1363_write_interrupt_config,
1509 MAX1363_LOW_THRESH(6));
1510
1511 IIO_EVENT_ATTR_NAMED_SH(in2min3_thresh_high_en,
1512 in2-in3_thresh_high_en,
1513 iio_event_max1363_thresh,
1514 max1363_read_interrupt_config,
1515 max1363_write_interrupt_config,
1516 MAX1363_HIGH_THRESH(7));
1517
1518 IIO_EVENT_ATTR_NAMED_SH(in2min3_thresh_low_en,
1519 in2-in3_thresh_low_en,
1520 iio_event_max1363_thresh,
1521 max1363_read_interrupt_config,
1522 max1363_write_interrupt_config,
1523 MAX1363_LOW_THRESH(7));
1524
1525 /*
1526 * As with scan_elements, only certain sets of these can
1527 * be combined.
1528 */
1529 static struct attribute *max1363_event_attributes[] = {
1530 &iio_dev_attr_in0_thresh_high_value.dev_attr.attr,
1531 &iio_dev_attr_in0_thresh_low_value.dev_attr.attr,
1532 &iio_dev_attr_in1_thresh_high_value.dev_attr.attr,
1533 &iio_dev_attr_in1_thresh_low_value.dev_attr.attr,
1534 &iio_dev_attr_in2_thresh_high_value.dev_attr.attr,
1535 &iio_dev_attr_in2_thresh_low_value.dev_attr.attr,
1536 &iio_dev_attr_in3_thresh_high_value.dev_attr.attr,
1537 &iio_dev_attr_in3_thresh_low_value.dev_attr.attr,
1538 &iio_dev_attr_in0min1_thresh_high_value.dev_attr.attr,
1539 &iio_dev_attr_in0min1_thresh_low_value.dev_attr.attr,
1540 &iio_dev_attr_in2min3_thresh_high_value.dev_attr.attr,
1541 &iio_dev_attr_in2min3_thresh_low_value.dev_attr.attr,
1542 &iio_dev_attr_in1min0_thresh_high_value.dev_attr.attr,
1543 &iio_dev_attr_in1min0_thresh_low_value.dev_attr.attr,
1544 &iio_dev_attr_in3min2_thresh_high_value.dev_attr.attr,
1545 &iio_dev_attr_in3min2_thresh_low_value.dev_attr.attr,
1546 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1547 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1548 &iio_event_attr_in0_thresh_high_en.dev_attr.attr,
1549 &iio_event_attr_in0_thresh_low_en.dev_attr.attr,
1550 &iio_event_attr_in1_thresh_high_en.dev_attr.attr,
1551 &iio_event_attr_in1_thresh_low_en.dev_attr.attr,
1552 &iio_event_attr_in2_thresh_high_en.dev_attr.attr,
1553 &iio_event_attr_in2_thresh_low_en.dev_attr.attr,
1554 &iio_event_attr_in3_thresh_high_en.dev_attr.attr,
1555 &iio_event_attr_in3_thresh_low_en.dev_attr.attr,
1556 &iio_event_attr_in0min1_thresh_high_en.dev_attr.attr,
1557 &iio_event_attr_in0min1_thresh_low_en.dev_attr.attr,
1558 &iio_event_attr_in3min2_thresh_high_en.dev_attr.attr,
1559 &iio_event_attr_in3min2_thresh_low_en.dev_attr.attr,
1560 &iio_event_attr_in1min0_thresh_high_en.dev_attr.attr,
1561 &iio_event_attr_in1min0_thresh_low_en.dev_attr.attr,
1562 &iio_event_attr_in2min3_thresh_high_en.dev_attr.attr,
1563 &iio_event_attr_in2min3_thresh_low_en.dev_attr.attr,
1564 NULL,
1565 };
1566
1567 static struct attribute_group max1363_event_attribute_group = {
1568 .attrs = max1363_event_attributes,
1569 };
1570
1571 static int max1363_initial_setup(struct max1363_state *st)
1572 {
1573 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
1574 | MAX1363_SETUP_POWER_UP_INT_REF
1575 | MAX1363_SETUP_INT_CLOCK
1576 | MAX1363_SETUP_UNIPOLAR
1577 | MAX1363_SETUP_NORESET;
1578
1579 /* Set scan mode writes the config anyway so wait until then*/
1580 st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
1581 st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
1582 st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
1583
1584 return max1363_set_scan_mode(st);
1585 }
1586
1587 static int __devinit max1363_probe(struct i2c_client *client,
1588 const struct i2c_device_id *id)
1589 {
1590 int ret, i, regdone = 0;
1591 struct max1363_state *st = kzalloc(sizeof(*st), GFP_KERNEL);
1592 if (st == NULL) {
1593 ret = -ENOMEM;
1594 goto error_ret;
1595 }
1596
1597 /* this is only used for device removal purposes */
1598 i2c_set_clientdata(client, st);
1599
1600 atomic_set(&st->protect_ring, 0);
1601
1602 st->chip_info = &max1363_chip_info_tbl[id->driver_data];
1603 st->reg = regulator_get(&client->dev, "vcc");
1604 if (!IS_ERR(st->reg)) {
1605 ret = regulator_enable(st->reg);
1606 if (ret)
1607 goto error_put_reg;
1608 }
1609 st->client = client;
1610
1611 st->indio_dev = iio_allocate_device();
1612 if (st->indio_dev == NULL) {
1613 ret = -ENOMEM;
1614 goto error_disable_reg;
1615 }
1616
1617 st->indio_dev->available_scan_masks
1618 = kzalloc(sizeof(*st->indio_dev->available_scan_masks)*
1619 (st->chip_info->num_modes + 1), GFP_KERNEL);
1620 if (!st->indio_dev->available_scan_masks) {
1621 ret = -ENOMEM;
1622 goto error_free_device;
1623 }
1624
1625 for (i = 0; i < st->chip_info->num_modes; i++)
1626 st->indio_dev->available_scan_masks[i] =
1627 max1363_mode_table[st->chip_info->mode_list[i]]
1628 .modemask;
1629 /* Estabilish that the iio_dev is a child of the i2c device */
1630 st->indio_dev->dev.parent = &client->dev;
1631 st->indio_dev->attrs = st->chip_info->dev_attrs;
1632
1633 /* Todo: this shouldn't be here. */
1634 st->indio_dev->scan_el_attrs = st->chip_info->scan_attrs;
1635 st->indio_dev->dev_data = (void *)(st);
1636 st->indio_dev->driver_module = THIS_MODULE;
1637 st->indio_dev->modes = INDIO_DIRECT_MODE;
1638 if (st->chip_info->monitor_mode && client->irq) {
1639 st->indio_dev->num_interrupt_lines = 1;
1640 st->indio_dev->event_attrs
1641 = &max1363_event_attribute_group;
1642 }
1643
1644 ret = max1363_initial_setup(st);
1645 if (ret)
1646 goto error_free_available_scan_masks;
1647
1648 ret = max1363_register_ring_funcs_and_init(st->indio_dev);
1649 if (ret)
1650 goto error_free_available_scan_masks;
1651
1652 ret = iio_device_register(st->indio_dev);
1653 if (ret)
1654 goto error_cleanup_ring;
1655 regdone = 1;
1656 ret = iio_ring_buffer_register(st->indio_dev->ring, 0);
1657 if (ret)
1658 goto error_cleanup_ring;
1659
1660 if (st->chip_info->monitor_mode && client->irq) {
1661 ret = iio_register_interrupt_line(client->irq,
1662 st->indio_dev,
1663 0,
1664 IRQF_TRIGGER_RISING,
1665 client->name);
1666 if (ret)
1667 goto error_uninit_ring;
1668
1669 INIT_WORK(&st->thresh_work, max1363_thresh_handler_bh);
1670 }
1671
1672 return 0;
1673 error_uninit_ring:
1674 iio_ring_buffer_unregister(st->indio_dev->ring);
1675 error_cleanup_ring:
1676 max1363_ring_cleanup(st->indio_dev);
1677 error_free_available_scan_masks:
1678 kfree(st->indio_dev->available_scan_masks);
1679 error_free_device:
1680 if (!regdone)
1681 iio_free_device(st->indio_dev);
1682 else
1683 iio_device_unregister(st->indio_dev);
1684 error_disable_reg:
1685 if (!IS_ERR(st->reg))
1686 regulator_disable(st->reg);
1687 error_put_reg:
1688 if (!IS_ERR(st->reg))
1689 regulator_put(st->reg);
1690 kfree(st);
1691
1692 error_ret:
1693 return ret;
1694 }
1695
1696 static int max1363_remove(struct i2c_client *client)
1697 {
1698 struct max1363_state *st = i2c_get_clientdata(client);
1699 struct iio_dev *indio_dev = st->indio_dev;
1700
1701 if (st->chip_info->monitor_mode && client->irq)
1702 iio_unregister_interrupt_line(st->indio_dev, 0);
1703 iio_ring_buffer_unregister(indio_dev->ring);
1704 max1363_ring_cleanup(indio_dev);
1705 kfree(st->indio_dev->available_scan_masks);
1706 iio_device_unregister(indio_dev);
1707 if (!IS_ERR(st->reg)) {
1708 regulator_disable(st->reg);
1709 regulator_put(st->reg);
1710 }
1711 kfree(st);
1712
1713 return 0;
1714 }
1715
1716 static const struct i2c_device_id max1363_id[] = {
1717 { "max1361", max1361 },
1718 { "max1362", max1362 },
1719 { "max1363", max1363 },
1720 { "max1364", max1364 },
1721 { "max1036", max1036 },
1722 { "max1037", max1037 },
1723 { "max1038", max1038 },
1724 { "max1039", max1039 },
1725 { "max1136", max1136 },
1726 { "max1137", max1137 },
1727 { "max1138", max1138 },
1728 { "max1139", max1139 },
1729 { "max1236", max1236 },
1730 { "max1237", max1237 },
1731 { "max1238", max1238 },
1732 { "max1239", max1239 },
1733 { "max11600", max11600 },
1734 { "max11601", max11601 },
1735 { "max11602", max11602 },
1736 { "max11603", max11603 },
1737 { "max11604", max11604 },
1738 { "max11605", max11605 },
1739 { "max11606", max11606 },
1740 { "max11607", max11607 },
1741 { "max11608", max11608 },
1742 { "max11609", max11609 },
1743 { "max11610", max11610 },
1744 { "max11611", max11611 },
1745 { "max11612", max11612 },
1746 { "max11613", max11613 },
1747 { "max11614", max11614 },
1748 { "max11615", max11615 },
1749 { "max11616", max11616 },
1750 { "max11617", max11617 },
1751 {}
1752 };
1753
1754 MODULE_DEVICE_TABLE(i2c, max1363_id);
1755
1756 static struct i2c_driver max1363_driver = {
1757 .driver = {
1758 .name = "max1363",
1759 },
1760 .probe = max1363_probe,
1761 .remove = max1363_remove,
1762 .id_table = max1363_id,
1763 };
1764
1765 static __init int max1363_init(void)
1766 {
1767 return i2c_add_driver(&max1363_driver);
1768 }
1769
1770 static __exit void max1363_exit(void)
1771 {
1772 i2c_del_driver(&max1363_driver);
1773 }
1774
1775 MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
1776 MODULE_DESCRIPTION("Maxim 1363 ADC");
1777 MODULE_LICENSE("GPL v2");
1778
1779 module_init(max1363_init);
1780 module_exit(max1363_exit);
Tomato firmware and modifications.