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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / dt3155v4l / dt3155v4l.c
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1 /***************************************************************************
2 * Copyright (C) 2006-2010 by Marin Mitov *
3 * mitov@issp.bas.bg *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 #include <linux/version.h>
22 #include <linux/stringify.h>
23 #include <linux/delay.h>
24 #include <linux/kthread.h>
25 #include <media/v4l2-dev.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/videobuf-dma-contig.h>
29 #include "dt3155v4l.h"
31 #define DT3155_VENDOR_ID 0x8086
32 #define DT3155_DEVICE_ID 0x1223
34 /* DT3155_CHUNK_SIZE is 4M (2^22) 8 full size buffers */
35 #define DT3155_CHUNK_SIZE (1U << 22)
37 #define DT3155_COH_FLAGS (GFP_KERNEL | GFP_DMA32 | __GFP_COLD | __GFP_NOWARN)
39 #define DT3155_BUF_SIZE (768 * 576)
41 /* global initializers (for all boards) */
42 #ifdef CONFIG_DT3155_CCIR
43 static const u8 csr2_init = VT_50HZ;
44 #define DT3155_CURRENT_NORM V4L2_STD_625_50
45 static const unsigned int img_width = 768;
46 static const unsigned int img_height = 576;
47 static const unsigned int frames_per_sec = 25;
48 static const struct v4l2_fmtdesc frame_std[] = {
50 .index = 0,
51 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
52 .flags = 0,
53 .description = "CCIR/50Hz 8 bits gray",
54 .pixelformat = V4L2_PIX_FMT_GREY,
57 #else
58 static const u8 csr2_init = VT_60HZ;
59 #define DT3155_CURRENT_NORM V4L2_STD_525_60
60 static const unsigned int img_width = 640;
61 static const unsigned int img_height = 480;
62 static const unsigned int frames_per_sec = 30;
63 static const struct v4l2_fmtdesc frame_std[] = {
65 .index = 0,
66 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
67 .flags = 0,
68 .description = "RS-170/60Hz 8 bits gray",
69 .pixelformat = V4L2_PIX_FMT_GREY,
72 #endif
74 #define NUM_OF_FORMATS ARRAY_SIZE(frame_std)
76 static u8 config_init = ACQ_MODE_EVEN;
78 /**
79 * read_i2c_reg - reads an internal i2c register
81 * @addr: dt3155 mmio base address
82 * @index: index (internal address) of register to read
83 * @data: pointer to byte the read data will be placed in
85 * returns: zero on success or error code
87 * This function starts reading the specified (by index) register
88 * and busy waits for the process to finish. The result is placed
89 * in a byte pointed by data.
91 static int
92 read_i2c_reg(void __iomem *addr, u8 index, u8 *data)
94 u32 tmp = index;
96 iowrite32((tmp<<17) | IIC_READ, addr + IIC_CSR2);
97 mmiowb();
98 udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */
99 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
100 /* error: NEW_CYCLE not cleared */
101 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
102 return -EIO;
104 tmp = ioread32(addr + IIC_CSR1);
105 if (tmp & DIRECT_ABORT) {
106 /* error: DIRECT_ABORT set */
107 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
108 /* reset DIRECT_ABORT bit */
109 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
110 return -EIO;
112 *data = tmp>>24;
113 return 0;
117 * write_i2c_reg - writes to an internal i2c register
119 * @addr: dt3155 mmio base address
120 * @index: index (internal address) of register to read
121 * @data: data to be written
123 * returns: zero on success or error code
125 * This function starts writting the specified (by index) register
126 * and busy waits for the process to finish.
128 static int
129 write_i2c_reg(void __iomem *addr, u8 index, u8 data)
131 u32 tmp = index;
133 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
134 mmiowb();
135 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
136 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
137 /* error: NEW_CYCLE not cleared */
138 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
139 return -EIO;
141 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
142 /* error: DIRECT_ABORT set */
143 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
144 /* reset DIRECT_ABORT bit */
145 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
146 return -EIO;
148 return 0;
152 * write_i2c_reg_nowait - writes to an internal i2c register
154 * @addr: dt3155 mmio base address
155 * @index: index (internal address) of register to read
156 * @data: data to be written
158 * This function starts writting the specified (by index) register
159 * and then returns.
161 static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data)
163 u32 tmp = index;
165 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
166 mmiowb();
170 * wait_i2c_reg - waits the read/write to finish
172 * @addr: dt3155 mmio base address
174 * returns: zero on success or error code
176 * This function waits reading/writting to finish.
178 static int wait_i2c_reg(void __iomem *addr)
180 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE)
181 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
182 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
183 /* error: NEW_CYCLE not cleared */
184 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
185 return -EIO;
187 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
188 /* error: DIRECT_ABORT set */
189 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
190 /* reset DIRECT_ABORT bit */
191 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
192 return -EIO;
194 return 0;
197 static int
198 dt3155_start_acq(struct dt3155_priv *pd)
200 struct videobuf_buffer *vb = pd->curr_buf;
201 dma_addr_t dma_addr;
203 dma_addr = videobuf_to_dma_contig(vb);
204 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
205 iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START);
206 iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE);
207 iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE);
208 /* enable interrupts, clear all irq flags */
209 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
210 FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
211 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
212 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
213 pd->regs + CSR1);
214 wait_i2c_reg(pd->regs);
215 write_i2c_reg(pd->regs, CONFIG, pd->config);
216 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
217 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
219 /* start the board */
220 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD);
221 return 0; /* success */
224 static int
225 dt3155_stop_acq(struct dt3155_priv *pd)
227 int tmp;
229 /* stop the board */
230 wait_i2c_reg(pd->regs);
231 write_i2c_reg(pd->regs, CSR2, pd->csr2);
233 /* disable all irqs, clear all irq flags */
234 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
235 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
236 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
237 tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
238 if (tmp)
239 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
240 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
241 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
242 pd->regs + CSR1);
243 return 0;
246 /* Locking: Caller holds q->vb_lock */
247 static int
248 dt3155_buf_setup(struct videobuf_queue *q, unsigned int *count,
249 unsigned int *size)
251 *size = img_width * img_height;
252 return 0;
255 /* Locking: Caller holds q->vb_lock */
256 static int
257 dt3155_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
258 enum v4l2_field field)
260 int ret = 0;
262 vb->width = img_width;
263 vb->height = img_height;
264 vb->size = img_width * img_height;
265 vb->field = field;
266 if (vb->state == VIDEOBUF_NEEDS_INIT)
267 ret = videobuf_iolock(q, vb, NULL);
268 if (ret) {
269 vb->state = VIDEOBUF_ERROR;
270 printk(KERN_ERR "ERROR: videobuf_iolock() failed\n");
271 videobuf_dma_contig_free(q, vb);
272 } else
273 vb->state = VIDEOBUF_PREPARED;
274 return ret;
277 /* Locking: Caller holds q->vb_lock & q->irqlock */
278 static void
279 dt3155_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
281 struct dt3155_priv *pd = q->priv_data;
283 if (vb->state != VIDEOBUF_NEEDS_INIT) {
284 vb->state = VIDEOBUF_QUEUED;
285 list_add_tail(&vb->queue, &pd->dmaq);
286 wake_up_interruptible_sync(&pd->do_dma);
287 } else
288 vb->state = VIDEOBUF_ERROR;
291 /* Locking: Caller holds q->vb_lock */
292 static void
293 dt3155_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
295 if (vb->state == VIDEOBUF_ACTIVE)
296 videobuf_waiton(vb, 0, 0);
297 videobuf_dma_contig_free(q, vb);
298 vb->state = VIDEOBUF_NEEDS_INIT;
301 static struct videobuf_queue_ops vbq_ops = {
302 .buf_setup = dt3155_buf_setup,
303 .buf_prepare = dt3155_buf_prepare,
304 .buf_queue = dt3155_buf_queue,
305 .buf_release = dt3155_buf_release,
308 static irqreturn_t
309 dt3155_irq_handler_even(int irq, void *dev_id)
311 struct dt3155_priv *ipd = dev_id;
312 struct videobuf_buffer *ivb;
313 dma_addr_t dma_addr;
314 u32 tmp;
316 tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD);
317 if (!tmp)
318 return IRQ_NONE; /* not our irq */
319 if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) {
320 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,
321 ipd->regs + INT_CSR);
322 ipd->field_count++;
323 return IRQ_HANDLED; /* start of field irq */
325 if ((tmp & FLD_START) && (tmp & FLD_END_ODD)) {
326 if (!ipd->stats.start_before_end++)
327 printk(KERN_ERR "dt3155: irq: START before END\n");
329 /* check for corrupted fields */
330 /* write_i2c_reg(ipd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); */
331 /* write_i2c_reg(ipd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); */
332 tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
333 if (tmp) {
334 if (!ipd->stats.corrupted_fields++)
335 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
336 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
337 FLD_DN_ODD | FLD_DN_EVEN |
338 CAP_CONT_EVEN | CAP_CONT_ODD,
339 ipd->regs + CSR1);
340 mmiowb();
343 spin_lock(&ipd->lock);
344 if (ipd->curr_buf && ipd->curr_buf->state == VIDEOBUF_ACTIVE) {
345 if (waitqueue_active(&ipd->curr_buf->done)) {
346 do_gettimeofday(&ipd->curr_buf->ts);
347 ipd->curr_buf->field_count = ipd->field_count;
348 ipd->curr_buf->state = VIDEOBUF_DONE;
349 wake_up(&ipd->curr_buf->done);
350 } else {
351 ivb = ipd->curr_buf;
352 goto load_dma;
354 } else
355 goto stop_dma;
356 if (list_empty(&ipd->dmaq))
357 goto stop_dma;
358 ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), queue);
359 list_del(&ivb->queue);
360 if (ivb->state == VIDEOBUF_QUEUED) {
361 ivb->state = VIDEOBUF_ACTIVE;
362 ipd->curr_buf = ivb;
363 } else
364 goto stop_dma;
365 load_dma:
366 dma_addr = videobuf_to_dma_contig(ivb);
367 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);
368 iowrite32(dma_addr + ivb->width, ipd->regs + ODD_DMA_START);
369 iowrite32(ivb->width, ipd->regs + EVEN_DMA_STRIDE);
370 iowrite32(ivb->width, ipd->regs + ODD_DMA_STRIDE);
371 mmiowb();
372 /* enable interrupts, clear all irq flags */
373 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
374 FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
375 spin_unlock(&ipd->lock);
376 return IRQ_HANDLED;
378 stop_dma:
379 ipd->curr_buf = NULL;
380 /* stop the board */
381 write_i2c_reg_nowait(ipd->regs, CSR2, ipd->csr2);
382 /* disable interrupts, clear all irq flags */
383 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
384 spin_unlock(&ipd->lock);
385 return IRQ_HANDLED;
388 static int
389 dt3155_threadfn(void *arg)
391 struct dt3155_priv *pd = arg;
392 struct videobuf_buffer *vb;
393 unsigned long flags;
395 while (1) {
396 wait_event_interruptible(pd->do_dma,
397 kthread_should_stop() || !list_empty(&pd->dmaq));
398 if (kthread_should_stop())
399 break;
401 spin_lock_irqsave(&pd->lock, flags);
402 if (pd->curr_buf) /* dma is active */
403 goto done;
404 if (list_empty(&pd->dmaq)) /* no empty biffers */
405 goto done;
406 vb = list_first_entry(&pd->dmaq, typeof(*vb), queue);
407 list_del(&vb->queue);
408 if (vb->state == VIDEOBUF_QUEUED) {
409 vb->state = VIDEOBUF_ACTIVE;
410 pd->curr_buf = vb;
411 spin_unlock_irqrestore(&pd->lock, flags);
412 /* start dma */
413 dt3155_start_acq(pd);
414 continue;
415 } else
416 printk(KERN_DEBUG "%s(): This is a BUG\n", __func__);
417 done:
418 spin_unlock_irqrestore(&pd->lock, flags);
420 return 0;
423 static int
424 dt3155_open(struct file *filp)
426 int ret = 0;
427 struct dt3155_priv *pd = video_drvdata(filp);
429 printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor);
431 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
432 return -ERESTARTSYS;
433 if (!pd->users) {
434 pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL);
435 if (!pd->vidq) {
436 printk(KERN_ERR "dt3155: error: alloc queue\n");
437 ret = -ENOMEM;
438 goto err_alloc_queue;
440 videobuf_queue_dma_contig_init(pd->vidq, &vbq_ops,
441 &pd->pdev->dev, &pd->lock,
442 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE,
443 sizeof(struct videobuf_buffer), pd);
444 /* disable all irqs, clear all irq flags */
445 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,
446 pd->regs + INT_CSR);
447 pd->irq_handler = dt3155_irq_handler_even;
448 ret = request_irq(pd->pdev->irq, pd->irq_handler,
449 IRQF_SHARED, DT3155_NAME, pd);
450 if (ret) {
451 printk(KERN_ERR "dt3155: error: request_irq\n");
452 goto err_request_irq;
454 pd->curr_buf = NULL;
455 pd->thread = kthread_run(dt3155_threadfn, pd,
456 "dt3155_thread_%i", pd->vdev->minor);
457 if (IS_ERR(pd->thread)) {
458 printk(KERN_ERR "dt3155: kthread_run() failed\n");
459 ret = PTR_ERR(pd->thread);
460 goto err_thread;
462 pd->field_count = 0;
464 pd->users++;
465 goto done;
466 err_thread:
467 free_irq(pd->pdev->irq, pd);
468 err_request_irq:
469 kfree(pd->vidq);
470 pd->vidq = NULL;
471 err_alloc_queue:
472 done:
473 mutex_unlock(&pd->mux);
474 return ret;
477 static int
478 dt3155_release(struct file *filp)
480 struct dt3155_priv *pd = video_drvdata(filp);
481 struct videobuf_buffer *tmp;
482 unsigned long flags;
483 int ret = 0;
485 printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor);
487 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
488 return -ERESTARTSYS;
489 pd->users--;
490 BUG_ON(pd->users < 0);
491 if (pd->acq_fp == filp) {
492 spin_lock_irqsave(&pd->lock, flags);
493 INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */
494 tmp = pd->curr_buf;
495 spin_unlock_irqrestore(&pd->lock, flags);
496 if (tmp)
497 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
498 dt3155_stop_acq(pd);
499 videobuf_stop(pd->vidq);
500 pd->acq_fp = NULL;
501 pd->streaming = 0;
503 if (!pd->users) {
504 kthread_stop(pd->thread);
505 free_irq(pd->pdev->irq, pd);
506 kfree(pd->vidq);
507 pd->vidq = NULL;
509 mutex_unlock(&pd->mux);
510 return ret;
513 static ssize_t
514 dt3155_read(struct file *filp, char __user *user, size_t size, loff_t *loff)
516 struct dt3155_priv *pd = video_drvdata(filp);
517 int ret;
519 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
520 return -ERESTARTSYS;
521 if (!pd->acq_fp) {
522 pd->acq_fp = filp;
523 pd->streaming = 0;
524 } else if (pd->acq_fp != filp) {
525 ret = -EBUSY;
526 goto done;
527 } else if (pd->streaming == 1) {
528 ret = -EINVAL;
529 goto done;
531 ret = videobuf_read_stream(pd->vidq, user, size, loff, 0,
532 filp->f_flags & O_NONBLOCK);
533 done:
534 mutex_unlock(&pd->mux);
535 return ret;
538 static unsigned int
539 dt3155_poll(struct file *filp, struct poll_table_struct *polltbl)
541 struct dt3155_priv *pd = video_drvdata(filp);
543 return videobuf_poll_stream(filp, pd->vidq, polltbl);
546 static int
547 dt3155_mmap(struct file *filp, struct vm_area_struct *vma)
549 struct dt3155_priv *pd = video_drvdata(filp);
551 return videobuf_mmap_mapper(pd->vidq, vma);
554 static const struct v4l2_file_operations dt3155_fops = {
555 .owner = THIS_MODULE,
556 .open = dt3155_open,
557 .release = dt3155_release,
558 .read = dt3155_read,
559 .poll = dt3155_poll,
560 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
561 .mmap = dt3155_mmap,
564 static int
565 dt3155_ioc_streamon(struct file *filp, void *p, enum v4l2_buf_type type)
567 struct dt3155_priv *pd = video_drvdata(filp);
568 int ret = -ERESTARTSYS;
570 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
571 return ret;
572 if (!pd->acq_fp) {
573 ret = videobuf_streamon(pd->vidq);
574 if (ret)
575 goto unlock;
576 pd->acq_fp = filp;
577 pd->streaming = 1;
578 wake_up_interruptible_sync(&pd->do_dma);
579 } else if (pd->acq_fp == filp) {
580 pd->streaming = 1;
581 ret = videobuf_streamon(pd->vidq);
582 if (!ret)
583 wake_up_interruptible_sync(&pd->do_dma);
584 } else
585 ret = -EBUSY;
586 unlock:
587 mutex_unlock(&pd->mux);
588 return ret;
591 static int
592 dt3155_ioc_streamoff(struct file *filp, void *p, enum v4l2_buf_type type)
594 struct dt3155_priv *pd = video_drvdata(filp);
595 struct videobuf_buffer *tmp;
596 unsigned long flags;
597 int ret;
599 ret = videobuf_streamoff(pd->vidq);
600 if (ret)
601 return ret;
602 spin_lock_irqsave(&pd->lock, flags);
603 tmp = pd->curr_buf;
604 spin_unlock_irqrestore(&pd->lock, flags);
605 if (tmp)
606 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
607 return ret;
610 static int
611 dt3155_ioc_querycap(struct file *filp, void *p, struct v4l2_capability *cap)
613 struct dt3155_priv *pd = video_drvdata(filp);
615 strcpy(cap->driver, DT3155_NAME);
616 strcpy(cap->card, DT3155_NAME " frame grabber");
617 sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev));
618 cap->version =
619 KERNEL_VERSION(DT3155_VER_MAJ, DT3155_VER_MIN, DT3155_VER_EXT);
620 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
621 V4L2_CAP_STREAMING |
622 V4L2_CAP_READWRITE;
623 return 0;
626 static int
627 dt3155_ioc_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f)
629 if (f->index >= NUM_OF_FORMATS)
630 return -EINVAL;
631 *f = frame_std[f->index];
632 return 0;
635 static int
636 dt3155_ioc_g_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
638 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
639 return -EINVAL;
640 f->fmt.pix.width = img_width;
641 f->fmt.pix.height = img_height;
642 f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY;
643 f->fmt.pix.field = V4L2_FIELD_NONE;
644 f->fmt.pix.bytesperline = f->fmt.pix.width;
645 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height;
646 f->fmt.pix.colorspace = 0;
647 f->fmt.pix.priv = 0;
648 return 0;
651 static int
652 dt3155_ioc_try_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
654 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
655 return -EINVAL;
656 if (f->fmt.pix.width == img_width &&
657 f->fmt.pix.height == img_height &&
658 f->fmt.pix.pixelformat == V4L2_PIX_FMT_GREY &&
659 f->fmt.pix.field == V4L2_FIELD_NONE &&
660 f->fmt.pix.bytesperline == f->fmt.pix.width &&
661 f->fmt.pix.sizeimage == f->fmt.pix.width * f->fmt.pix.height)
662 return 0;
663 else
664 return -EINVAL;
667 static int
668 dt3155_ioc_s_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
670 struct dt3155_priv *pd = video_drvdata(filp);
671 int ret = -ERESTARTSYS;
673 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
674 return ret;
675 if (!pd->acq_fp) {
676 pd->acq_fp = filp;
677 pd->streaming = 0;
678 } else if (pd->acq_fp != filp) {
679 ret = -EBUSY;
680 goto done;
682 ret = dt3155_ioc_g_fmt_vid_cap(filp, p, f);
683 done:
684 mutex_unlock(&pd->mux);
685 return ret;
688 static int
689 dt3155_ioc_reqbufs(struct file *filp, void *p, struct v4l2_requestbuffers *b)
691 struct dt3155_priv *pd = video_drvdata(filp);
692 struct videobuf_queue *q = pd->vidq;
693 int ret = -ERESTARTSYS;
695 if (b->memory != V4L2_MEMORY_MMAP)
696 return -EINVAL;
697 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
698 return ret;
699 if (!pd->acq_fp)
700 pd->acq_fp = filp;
701 else if (pd->acq_fp != filp) {
702 ret = -EBUSY;
703 goto done;
705 pd->streaming = 1;
706 ret = 0;
707 done:
708 mutex_unlock(&pd->mux);
709 if (ret)
710 return ret;
711 if (b->count)
712 ret = videobuf_reqbufs(q, b);
713 else {
714 printk(KERN_DEBUG "dt3155: request to free buffers\n");
715 /* ret = videobuf_mmap_free(q); */
716 ret = dt3155_ioc_streamoff(filp, p,
717 V4L2_BUF_TYPE_VIDEO_CAPTURE);
719 return ret;
722 static int
723 dt3155_ioc_querybuf(struct file *filp, void *p, struct v4l2_buffer *b)
725 struct dt3155_priv *pd = video_drvdata(filp);
726 struct videobuf_queue *q = pd->vidq;
728 return videobuf_querybuf(q, b);
731 static int
732 dt3155_ioc_qbuf(struct file *filp, void *p, struct v4l2_buffer *b)
734 struct dt3155_priv *pd = video_drvdata(filp);
735 struct videobuf_queue *q = pd->vidq;
736 int ret;
738 ret = videobuf_qbuf(q, b);
739 if (ret)
740 return ret;
741 return videobuf_querybuf(q, b);
744 static int
745 dt3155_ioc_dqbuf(struct file *filp, void *p, struct v4l2_buffer *b)
747 struct dt3155_priv *pd = video_drvdata(filp);
748 struct videobuf_queue *q = pd->vidq;
750 return videobuf_dqbuf(q, b, filp->f_flags & O_NONBLOCK);
753 static int
754 dt3155_ioc_querystd(struct file *filp, void *p, v4l2_std_id *norm)
756 *norm = DT3155_CURRENT_NORM;
757 return 0;
760 static int
761 dt3155_ioc_g_std(struct file *filp, void *p, v4l2_std_id *norm)
763 *norm = DT3155_CURRENT_NORM;
764 return 0;
767 static int
768 dt3155_ioc_s_std(struct file *filp, void *p, v4l2_std_id *norm)
770 if (*norm & DT3155_CURRENT_NORM)
771 return 0;
772 return -EINVAL;
775 static int
776 dt3155_ioc_enum_input(struct file *filp, void *p, struct v4l2_input *input)
778 if (input->index)
779 return -EINVAL;
780 strcpy(input->name, "Coax in");
781 input->type = V4L2_INPUT_TYPE_CAMERA;
782 input->std = DT3155_CURRENT_NORM;
783 input->status = 0;
784 return 0;
787 static int
788 dt3155_ioc_g_input(struct file *filp, void *p, unsigned int *i)
790 *i = 0;
791 return 0;
794 static int
795 dt3155_ioc_s_input(struct file *filp, void *p, unsigned int i)
797 if (i)
798 return -EINVAL;
799 return 0;
802 static int
803 dt3155_ioc_g_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
805 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
806 return -EINVAL;
807 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
808 parms->parm.capture.capturemode = 0;
809 parms->parm.capture.timeperframe.numerator = 1001;
810 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
811 parms->parm.capture.extendedmode = 0;
812 parms->parm.capture.readbuffers = 1;
813 return 0;
816 static int
817 dt3155_ioc_s_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
819 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
820 return -EINVAL;
821 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
822 parms->parm.capture.capturemode = 0;
823 parms->parm.capture.timeperframe.numerator = 1001;
824 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
825 parms->parm.capture.extendedmode = 0;
826 parms->parm.capture.readbuffers = 1;
827 return 0;
830 static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
831 .vidioc_streamon = dt3155_ioc_streamon,
832 .vidioc_streamoff = dt3155_ioc_streamoff,
833 .vidioc_querycap = dt3155_ioc_querycap,
835 .vidioc_g_priority = dt3155_ioc_g_priority,
836 .vidioc_s_priority = dt3155_ioc_s_priority,
838 .vidioc_enum_fmt_vid_cap = dt3155_ioc_enum_fmt_vid_cap,
839 .vidioc_try_fmt_vid_cap = dt3155_ioc_try_fmt_vid_cap,
840 .vidioc_g_fmt_vid_cap = dt3155_ioc_g_fmt_vid_cap,
841 .vidioc_s_fmt_vid_cap = dt3155_ioc_s_fmt_vid_cap,
842 .vidioc_reqbufs = dt3155_ioc_reqbufs,
843 .vidioc_querybuf = dt3155_ioc_querybuf,
844 .vidioc_qbuf = dt3155_ioc_qbuf,
845 .vidioc_dqbuf = dt3155_ioc_dqbuf,
846 .vidioc_querystd = dt3155_ioc_querystd,
847 .vidioc_g_std = dt3155_ioc_g_std,
848 .vidioc_s_std = dt3155_ioc_s_std,
849 .vidioc_enum_input = dt3155_ioc_enum_input,
850 .vidioc_g_input = dt3155_ioc_g_input,
851 .vidioc_s_input = dt3155_ioc_s_input,
853 .vidioc_queryctrl = dt3155_ioc_queryctrl,
854 .vidioc_g_ctrl = dt3155_ioc_g_ctrl,
855 .vidioc_s_ctrl = dt3155_ioc_s_ctrl,
856 .vidioc_querymenu = dt3155_ioc_querymenu,
857 .vidioc_g_ext_ctrls = dt3155_ioc_g_ext_ctrls,
858 .vidioc_s_ext_ctrls = dt3155_ioc_s_ext_ctrls,
860 .vidioc_g_parm = dt3155_ioc_g_parm,
861 .vidioc_s_parm = dt3155_ioc_s_parm,
863 .vidioc_cropcap = dt3155_ioc_cropcap,
864 .vidioc_g_crop = dt3155_ioc_g_crop,
865 .vidioc_s_crop = dt3155_ioc_s_crop,
866 .vidioc_enum_framesizes = dt3155_ioc_enum_framesizes,
867 .vidioc_enum_frameintervals = dt3155_ioc_enum_frameintervals,
868 #ifdef CONFIG_VIDEO_V4L1_COMPAT
869 .vidiocgmbuf = iocgmbuf,
870 #endif
874 static int __devinit
875 dt3155_init_board(struct pci_dev *dev)
877 struct dt3155_priv *pd = pci_get_drvdata(dev);
878 void *buf_cpu;
879 dma_addr_t buf_dma;
880 int i;
881 u8 tmp;
883 pci_set_master(dev); /* dt3155 needs it */
885 /* resetting the adapter */
886 iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN,
887 pd->regs + CSR1);
888 mmiowb();
889 msleep(10);
891 /* initializing adaper registers */
892 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
893 mmiowb();
894 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
895 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
896 iowrite32(0x00000020, pd->regs + FIFO_TRIGER);
897 iowrite32(0x00000103, pd->regs + XFER_MODE);
898 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
899 iowrite32(0, pd->regs + INT_CSR);
900 iowrite32(1, pd->regs + EVEN_FLD_MASK);
901 iowrite32(1, pd->regs + ODD_FLD_MASK);
902 iowrite32(0, pd->regs + MASK_LENGTH);
903 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
904 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
905 mmiowb();
907 /* verifying that we have a DT3155 board (not just a SAA7116 chip) */
908 read_i2c_reg(pd->regs, DT_ID, &tmp);
909 if (tmp != DT3155_ID)
910 return -ENODEV;
912 /* initialize AD LUT */
913 write_i2c_reg(pd->regs, AD_ADDR, 0);
914 for (i = 0; i < 256; i++)
915 write_i2c_reg(pd->regs, AD_LUT, i);
917 /* initialize ADC references */
918 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
919 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
920 write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF);
921 write_i2c_reg(pd->regs, AD_CMD, 34);
922 write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF);
923 write_i2c_reg(pd->regs, AD_CMD, 0);
925 /* initialize PM LUT */
926 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM);
927 for (i = 0; i < 256; i++) {
928 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
929 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
931 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL);
932 for (i = 0; i < 256; i++) {
933 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
934 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
936 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */
938 /* select chanel 1 for input and set sync level */
939 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
940 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
942 /* allocate memory, and initialize the DMA machine */
943 buf_cpu = dma_alloc_coherent(&dev->dev, DT3155_BUF_SIZE, &buf_dma,
944 GFP_KERNEL);
945 if (!buf_cpu) {
946 printk(KERN_ERR "dt3155: dma_alloc_coherent "
947 "(in dt3155_init_board) failed\n");
948 return -ENOMEM;
950 iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
951 iowrite32(buf_dma, pd->regs + ODD_DMA_START);
952 iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
953 iowrite32(0, pd->regs + ODD_DMA_STRIDE);
955 /* Perform a pseudo even field acquire */
956 iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
957 write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
958 write_i2c_reg(pd->regs, CONFIG, pd->config);
959 write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
960 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
961 msleep(100);
962 read_i2c_reg(pd->regs, CSR2, &tmp);
963 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
964 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
965 write_i2c_reg(pd->regs, CSR2, pd->csr2);
966 iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
968 /* deallocate memory */
969 dma_free_coherent(&dev->dev, DT3155_BUF_SIZE, buf_cpu, buf_dma);
970 if (tmp & BUSY_EVEN) {
971 printk(KERN_ERR "dt3155: BUSY_EVEN not cleared\n");
972 return -EIO;
974 return 0;
977 static struct video_device dt3155_vdev = {
978 .name = DT3155_NAME,
979 .fops = &dt3155_fops,
980 .ioctl_ops = &dt3155_ioctl_ops,
981 .minor = -1,
982 .release = video_device_release,
983 .tvnorms = DT3155_CURRENT_NORM,
984 .current_norm = DT3155_CURRENT_NORM,
987 /* same as in drivers/base/dma-coherent.c */
988 struct dma_coherent_mem {
989 void *virt_base;
990 u32 device_base;
991 int size;
992 int flags;
993 unsigned long *bitmap;
996 static int __devinit
997 dt3155_alloc_coherent(struct device *dev, size_t size, int flags)
999 struct dma_coherent_mem *mem;
1000 dma_addr_t dev_base;
1001 int pages = size >> PAGE_SHIFT;
1002 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
1004 if ((flags & DMA_MEMORY_MAP) == 0)
1005 goto out;
1006 if (!size)
1007 goto out;
1008 if (dev->dma_mem)
1009 goto out;
1011 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
1012 if (!mem)
1013 goto out;
1014 mem->virt_base = dma_alloc_coherent(dev, size, &dev_base,
1015 DT3155_COH_FLAGS);
1016 if (!mem->virt_base)
1017 goto err_alloc_coherent;
1018 mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1019 if (!mem->bitmap)
1020 goto err_bitmap;
1022 /* coherent_dma_mask is already set to 32 bits */
1023 mem->device_base = dev_base;
1024 mem->size = pages;
1025 mem->flags = flags;
1026 dev->dma_mem = mem;
1027 return DMA_MEMORY_MAP;
1029 err_bitmap:
1030 dma_free_coherent(dev, size, mem->virt_base, dev_base);
1031 err_alloc_coherent:
1032 kfree(mem);
1033 out:
1034 return 0;
1037 static void __devexit
1038 dt3155_free_coherent(struct device *dev)
1040 struct dma_coherent_mem *mem = dev->dma_mem;
1042 if (!mem)
1043 return;
1044 dev->dma_mem = NULL;
1045 dma_free_coherent(dev, mem->size << PAGE_SHIFT,
1046 mem->virt_base, mem->device_base);
1047 kfree(mem->bitmap);
1048 kfree(mem);
1051 static int __devinit
1052 dt3155_probe(struct pci_dev *dev, const struct pci_device_id *id)
1054 int err;
1055 struct dt3155_priv *pd;
1057 printk(KERN_INFO "dt3155: probe()\n");
1058 err = dma_set_mask(&dev->dev, DMA_BIT_MASK(32));
1059 if (err) {
1060 printk(KERN_ERR "dt3155: cannot set dma_mask\n");
1061 return -ENODEV;
1063 err = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
1064 if (err) {
1065 printk(KERN_ERR "dt3155: cannot set dma_coherent_mask\n");
1066 return -ENODEV;
1068 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1069 if (!pd) {
1070 printk(KERN_ERR "dt3155: cannot allocate dt3155_priv\n");
1071 return -ENOMEM;
1073 pd->vdev = video_device_alloc();
1074 if (!pd->vdev) {
1075 printk(KERN_ERR "dt3155: cannot allocate vdev structure\n");
1076 goto err_video_device_alloc;
1078 *pd->vdev = dt3155_vdev;
1079 pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */
1080 video_set_drvdata(pd->vdev, pd); /* for use in video_fops */
1081 pd->users = 0;
1082 pd->acq_fp = NULL;
1083 pd->pdev = dev;
1084 INIT_LIST_HEAD(&pd->dmaq);
1085 init_waitqueue_head(&pd->do_dma);
1086 mutex_init(&pd->mux);
1087 pd->csr2 = csr2_init;
1088 pd->config = config_init;
1089 err = pci_enable_device(pd->pdev);
1090 if (err) {
1091 printk(KERN_ERR "dt3155: pci_dev not enabled\n");
1092 goto err_enable_dev;
1094 err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev));
1095 if (err)
1096 goto err_req_region;
1097 pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0));
1098 if (!pd->regs) {
1099 err = -ENOMEM;
1100 printk(KERN_ERR "dt3155: pci_iomap failed\n");
1101 goto err_pci_iomap;
1103 err = dt3155_init_board(pd->pdev);
1104 if (err) {
1105 printk(KERN_ERR "dt3155: dt3155_init_board failed\n");
1106 goto err_init_board;
1108 err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1);
1109 if (err) {
1110 printk(KERN_ERR "dt3155: Cannot register video device\n");
1111 goto err_init_board;
1113 err = dt3155_alloc_coherent(&dev->dev, DT3155_CHUNK_SIZE,
1114 DMA_MEMORY_MAP);
1115 if (err)
1116 printk(KERN_INFO "dt3155: preallocated 8 buffers\n");
1117 printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor);
1118 return 0; /* success */
1120 err_init_board:
1121 pci_iounmap(pd->pdev, pd->regs);
1122 err_pci_iomap:
1123 pci_release_region(pd->pdev, 0);
1124 err_req_region:
1125 pci_disable_device(pd->pdev);
1126 err_enable_dev:
1127 video_device_release(pd->vdev);
1128 err_video_device_alloc:
1129 kfree(pd);
1130 return err;
1133 static void __devexit
1134 dt3155_remove(struct pci_dev *dev)
1136 struct dt3155_priv *pd = pci_get_drvdata(dev);
1138 printk(KERN_INFO "dt3155: remove()\n");
1139 dt3155_free_coherent(&dev->dev);
1140 video_unregister_device(pd->vdev);
1141 pci_iounmap(dev, pd->regs);
1142 pci_release_region(pd->pdev, 0);
1143 pci_disable_device(pd->pdev);
1145 * video_device_release() is invoked automatically
1146 * see: struct video_device dt3155_vdev
1148 kfree(pd);
1151 static DEFINE_PCI_DEVICE_TABLE(pci_ids) = {
1152 { PCI_DEVICE(DT3155_VENDOR_ID, DT3155_DEVICE_ID) },
1153 { 0, /* zero marks the end */ },
1155 MODULE_DEVICE_TABLE(pci, pci_ids);
1157 static struct pci_driver pci_driver = {
1158 .name = DT3155_NAME,
1159 .id_table = pci_ids,
1160 .probe = dt3155_probe,
1161 .remove = __devexit_p(dt3155_remove),
1164 static int __init
1165 dt3155_init_module(void)
1167 int err;
1169 printk(KERN_INFO "dt3155: ==================\n");
1170 printk(KERN_INFO "dt3155: init()\n");
1171 err = pci_register_driver(&pci_driver);
1172 if (err) {
1173 printk(KERN_ERR "dt3155: cannot register pci_driver\n");
1174 return err;
1176 return 0; /* succes */
1179 static void __exit
1180 dt3155_exit_module(void)
1182 pci_unregister_driver(&pci_driver);
1183 printk(KERN_INFO "dt3155: exit()\n");
1184 printk(KERN_INFO "dt3155: ==================\n");
1187 module_init(dt3155_init_module);
1188 module_exit(dt3155_exit_module);
1190 MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber");
1191 MODULE_AUTHOR("Marin Mitov <mitov@issp.bas.bg>");
1192 MODULE_VERSION(DT3155_VERSION);
1193 MODULE_LICENSE("GPL");