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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / dream / qdsp5 / adsp.c
blobf1e9d81674e85be3ef31118f1dddc73ebfe8be49
1 /* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (c) 2008 QUALCOMM Incorporated
6 * Copyright (C) 2008 Google, Inc.
7 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20 /* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27 #include <linux/clk.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/kthread.h>
32 #include <linux/module.h>
33 #include <linux/slab.h>
34 #include <linux/uaccess.h>
35 #include <linux/wait.h>
36
37 static inline void prevent_suspend(void)
38 {
39 }
40 static inline void allow_suspend(void)
41 {
42 }
43
44 #include <linux/io.h>
45 #include <mach/msm_iomap.h>
46 #include "adsp.h"
47
48 #define INT_ADSP INT_ADSP_A9_A11
49
50 static struct adsp_info adsp_info;
51 static struct msm_rpc_endpoint *rpc_cb_server_client;
52 static struct msm_adsp_module *adsp_modules;
53 static int adsp_open_count;
54 static DEFINE_MUTEX(adsp_open_lock);
55
56 /* protect interactions with the ADSP command/message queue */
57 static spinlock_t adsp_cmd_lock;
58
59 static uint32_t current_image = -1;
60
61 void adsp_set_image(struct adsp_info *info, uint32_t image)
62 {
63 current_image = image;
64 }
65
66 /*
67 * Checks whether the module_id is available in the
68 * module_entries table.If module_id is available returns `0`.
69 * If module_id is not available returns `-ENXIO`.
70 */
71 #if CONFIG_MSM_AMSS_VERSION >= 6350
72 static int32_t adsp_validate_module(uint32_t module_id)
73 {
74 uint32_t *ptr;
75 uint32_t module_index;
76 uint32_t num_mod_entries;
77
78 ptr = adsp_info.init_info_ptr->module_entries;
79 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
80
81 for (module_index = 0; module_index < num_mod_entries; module_index++)
82 if (module_id == ptr[module_index])
83 return 0;
84
85 return -ENXIO;
86 }
87 #else
88 static inline int32_t adsp_validate_module(uint32_t module_id) { return 0; }
89 #endif
90
91 uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
92 {
93 BUG_ON(current_image == -1UL);
94 return info->task_to_module[current_image][task];
95 }
96
97 uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
98 {
99 BUG_ON(current_image == -1UL);
100 return info->queue_offset[current_image][queue_id];
101 }
102
103 static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
104 struct msm_adsp_module *adsp_module)
105 {
106 int rc;
107 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
108 struct rpc_reply_hdr *rpc_rsp;
109
110 msm_rpc_setup_req(&rpc_req.hdr,
111 RPC_ADSP_RTOS_ATOM_PROG,
112 msm_rpc_get_vers(adsp_module->rpc_client),
113 RPC_ADSP_RTOS_APP_TO_MODEM_PROC);
114
115 rpc_req.gotit = cpu_to_be32(1);
116 rpc_req.cmd = cpu_to_be32(cmd);
117 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
118 rpc_req.module = cpu_to_be32(module);
119 rc = msm_rpc_write(adsp_module->rpc_client, &rpc_req, sizeof(rpc_req));
120 if (rc < 0) {
121 pr_err("adsp: could not send RPC request: %d\n", rc);
122 return rc;
123 }
124
125 rc = msm_rpc_read(adsp_module->rpc_client,
126 (void **)&rpc_rsp, -1, (5*HZ));
127 if (rc < 0) {
128 pr_err("adsp: error receiving RPC reply: %d (%d)\n",
129 rc, -ERESTARTSYS);
130 return rc;
131 }
132
133 if (be32_to_cpu(rpc_rsp->reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
134 pr_err("adsp: RPC call was denied!\n");
135 kfree(rpc_rsp);
136 return -EPERM;
137 }
138
139 if (be32_to_cpu(rpc_rsp->data.acc_hdr.accept_stat) !=
140 RPC_ACCEPTSTAT_SUCCESS) {
141 pr_err("adsp error: RPC call was not successful (%d)\n",
142 be32_to_cpu(rpc_rsp->data.acc_hdr.accept_stat));
143 kfree(rpc_rsp);
144 return -EINVAL;
145 }
146
147 kfree(rpc_rsp);
148 return 0;
149 }
150
151 #if CONFIG_MSM_AMSS_VERSION >= 6350
152 static int get_module_index(uint32_t id)
153 {
154 int mod_idx;
155 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
156 if (adsp_info.module[mod_idx].id == id)
157 return mod_idx;
158
159 return -ENXIO;
160 }
161 #endif
162
163 static struct msm_adsp_module *find_adsp_module_by_id(
164 struct adsp_info *info, uint32_t id)
165 {
166 if (id > info->max_module_id) {
167 return NULL;
168 } else {
169 #if CONFIG_MSM_AMSS_VERSION >= 6350
170 id = get_module_index(id);
171 if (id < 0)
172 return NULL;
173 #endif
174 return info->id_to_module[id];
175 }
176 }
177
178 static struct msm_adsp_module *find_adsp_module_by_name(
179 struct adsp_info *info, const char *name)
180 {
181 unsigned n;
182 for (n = 0; n < info->module_count; n++)
183 if (!strcmp(name, adsp_modules[n].name))
184 return adsp_modules + n;
185 return NULL;
186 }
187
188 static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
189 {
190 /* remove the original connect once compatible support is complete */
191 adsp_module->rpc_client = msm_rpc_connect(
192 RPC_ADSP_RTOS_ATOM_PROG,
193 RPC_ADSP_RTOS_ATOM_VERS,
194 MSM_RPC_UNINTERRUPTIBLE);
195
196 if (IS_ERR(adsp_module->rpc_client)) {
197 int rc = PTR_ERR(adsp_module->rpc_client);
198 adsp_module->rpc_client = 0;
199 pr_err("adsp: could not open rpc client: %d\n", rc);
200 return rc;
201 }
202
203 return 0;
204 }
205
206 #if CONFIG_MSM_AMSS_VERSION >= 6350
207 /*
208 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
209 * queue offsets and module entries (init info) as part of the event.
210 */
211 static void msm_get_init_info(void)
212 {
213 int rc;
214 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
215
216 adsp_info.init_info_rpc_client = msm_rpc_connect(
217 RPC_ADSP_RTOS_ATOM_PROG,
218 RPC_ADSP_RTOS_ATOM_VERS,
219 MSM_RPC_UNINTERRUPTIBLE);
220 if (IS_ERR(adsp_info.init_info_rpc_client)) {
221 rc = PTR_ERR(adsp_info.init_info_rpc_client);
222 adsp_info.init_info_rpc_client = 0;
223 pr_err("adsp: could not open rpc client: %d\n", rc);
224 return;
225 }
226
227 msm_rpc_setup_req(&rpc_req.hdr,
228 RPC_ADSP_RTOS_ATOM_PROG,
229 msm_rpc_get_vers(adsp_info.init_info_rpc_client),
230 RPC_ADSP_RTOS_APP_TO_MODEM_PROC);
231
232 rpc_req.gotit = cpu_to_be32(1);
233 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
234 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
235 rpc_req.module = 0;
236
237 rc = msm_rpc_write(adsp_info.init_info_rpc_client,
238 &rpc_req, sizeof(rpc_req));
239 if (rc < 0)
240 pr_err("adsp: could not send RPC request: %d\n", rc);
241 }
242 #endif
243
244 int msm_adsp_get(const char *name, struct msm_adsp_module **out,
245 struct msm_adsp_ops *ops, void *driver_data)
246 {
247 struct msm_adsp_module *module;
248 int rc = 0;
249
250 #if CONFIG_MSM_AMSS_VERSION >= 6350
251 static uint32_t init_info_cmd_sent;
252 if (!init_info_cmd_sent) {
253 msm_get_init_info();
254 init_waitqueue_head(&adsp_info.init_info_wait);
255 rc = wait_event_timeout(adsp_info.init_info_wait,
256 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
257 5 * HZ);
258 if (!rc) {
259 pr_info("adsp: INIT_INFO failed\n");
260 return -ETIMEDOUT;
261 }
262 init_info_cmd_sent++;
263 }
264 #endif
265
266 module = find_adsp_module_by_name(&adsp_info, name);
267 if (!module)
268 return -ENODEV;
269
270 mutex_lock(&module->lock);
271 pr_info("adsp: opening module %s\n", module->name);
272 if (module->open_count++ == 0 && module->clk)
273 clk_enable(module->clk);
274
275 mutex_lock(&adsp_open_lock);
276 if (adsp_open_count++ == 0) {
277 enable_irq(INT_ADSP);
278 prevent_suspend();
279 }
280 mutex_unlock(&adsp_open_lock);
281
282 if (module->ops) {
283 rc = -EBUSY;
284 goto done;
285 }
286
287 rc = adsp_rpc_init(module);
288 if (rc)
289 goto done;
290
291 module->ops = ops;
292 module->driver_data = driver_data;
293 *out = module;
294 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
295 module->id, module);
296 if (rc) {
297 module->ops = NULL;
298 module->driver_data = NULL;
299 *out = NULL;
300 pr_err("adsp: REGISTER_APP failed\n");
301 goto done;
302 }
303
304 pr_info("adsp: module %s has been registered\n", module->name);
305
306 done:
307 mutex_lock(&adsp_open_lock);
308 if (rc && --adsp_open_count == 0) {
309 disable_irq(INT_ADSP);
310 allow_suspend();
311 }
312 if (rc && --module->open_count == 0 && module->clk)
313 clk_disable(module->clk);
314 mutex_unlock(&adsp_open_lock);
315 mutex_unlock(&module->lock);
316 return rc;
317 }
318 EXPORT_SYMBOL(msm_adsp_get);
319
320 static int msm_adsp_disable_locked(struct msm_adsp_module *module);
321
322 void msm_adsp_put(struct msm_adsp_module *module)
323 {
324 unsigned long flags;
325
326 mutex_lock(&module->lock);
327 if (--module->open_count == 0 && module->clk)
328 clk_disable(module->clk);
329 if (module->ops) {
330 pr_info("adsp: closing module %s\n", module->name);
331
332 /* lock to ensure a dsp event cannot be delivered
333 * during or after removal of the ops and driver_data
334 */
335 spin_lock_irqsave(&adsp_cmd_lock, flags);
336 module->ops = NULL;
337 module->driver_data = NULL;
338 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
339
340 if (module->state != ADSP_STATE_DISABLED) {
341 pr_info("adsp: disabling module %s\n", module->name);
342 msm_adsp_disable_locked(module);
343 }
344
345 msm_rpc_close(module->rpc_client);
346 module->rpc_client = 0;
347 if (--adsp_open_count == 0) {
348 disable_irq(INT_ADSP);
349 allow_suspend();
350 pr_info("adsp: disable interrupt\n");
351 }
352 } else {
353 pr_info("adsp: module %s is already closed\n", module->name);
354 }
355 mutex_unlock(&module->lock);
356 }
357 EXPORT_SYMBOL(msm_adsp_put);
358
359 /* this should be common code with rpc_servers.c */
360 static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
361 uint32_t xid, uint32_t accept_status)
362 {
363 int rc = 0;
364 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
365 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
366
367 reply->xid = cpu_to_be32(xid);
368 reply->type = cpu_to_be32(1); /* reply */
369 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
370
371 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
372 reply->data.acc_hdr.verf_flavor = 0;
373 reply->data.acc_hdr.verf_length = 0;
374
375 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
376 if (rc < 0)
377 pr_err("adsp: could not write RPC response: %d\n", rc);
378 return rc;
379 }
380
381 int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
382 void *cmd_buf, size_t cmd_size)
383 {
384 uint32_t ctrl_word;
385 uint32_t dsp_q_addr;
386 uint32_t dsp_addr;
387 uint32_t cmd_id = 0;
388 int cnt = 0;
389 int ret_status = 0;
390 unsigned long flags;
391 struct adsp_info *info = module->info;
392
393 spin_lock_irqsave(&adsp_cmd_lock, flags);
394
395 if (module->state != ADSP_STATE_ENABLED) {
396 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
397 pr_err("adsp: module %s not enabled before write\n",
398 module->name);
399 return -ENODEV;
400 }
401 if (adsp_validate_module(module->id)) {
402 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
403 pr_info("adsp: module id validation failed %s %d\n",
404 module->name, module->id);
405 return -ENXIO;
406 }
407 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
408 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
409
410 /* Poll until the ADSP is ready to accept a command.
411 * Wait for 100us, return error if it's not responding.
412 * If this returns an error, we need to disable ALL modules and
413 * then retry.
414 */
415 while (((ctrl_word = readl(info->write_ctrl)) &
416 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
417 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
418 if (cnt > 100) {
419 pr_err("adsp: timeout waiting for DSP write ready\n");
420 ret_status = -EIO;
421 goto fail;
422 }
423 pr_warning("adsp: waiting for DSP write ready\n");
424 udelay(1);
425 cnt++;
426 }
427
428 /* Set the mutex bits */
429 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
430 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
431
432 /* Clear the command bits */
433 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
434
435 /* Set the queue address bits */
436 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
437 ctrl_word |= dsp_q_addr;
438
439 writel(ctrl_word, info->write_ctrl);
440
441 /* Generate an interrupt to the DSP. This notifies the DSP that
442 * we are about to send a command on this particular queue. The
443 * DSP will in response change its state.
444 */
445 writel(1, info->send_irq);
446
447 /* Poll until the adsp responds to the interrupt; this does not
448 * generate an interrupt from the adsp. This should happen within
449 * 5ms.
450 */
451 cnt = 0;
452 while ((readl(info->write_ctrl) &
453 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
454 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
455 if (cnt > 5000) {
456 pr_err("adsp: timeout waiting for adsp ack\n");
457 ret_status = -EIO;
458 goto fail;
459 }
460 udelay(1);
461 cnt++;
462 }
463
464 /* Read the ctrl word */
465 ctrl_word = readl(info->write_ctrl);
466
467 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
468 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
469 ret_status = -EAGAIN;
470 goto fail;
471 }
472
473 /* Ctrl word status bits were 00, no error in the ctrl word */
474
475 /* Get the DSP buffer address */
476 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
477 (uint32_t)MSM_AD5_BASE;
478
479 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
480 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
481 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
482 cmd_size /= sizeof(uint16_t);
483
484 /* Save the command ID */
485 cmd_id = (uint32_t) buf_ptr[0];
486
487 /* Copy the command to DSP memory */
488 cmd_size++;
489 while (--cmd_size)
490 *dsp_addr16++ = *buf_ptr++;
491 } else {
492 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
493 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
494 cmd_size /= sizeof(uint32_t);
495
496 /* Save the command ID */
497 cmd_id = buf_ptr[0];
498
499 cmd_size++;
500 while (--cmd_size)
501 *dsp_addr32++ = *buf_ptr++;
502 }
503
504 /* Set the mutex bits */
505 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
506 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
507
508 /* Set the command bits to write done */
509 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
510 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
511
512 /* Set the queue address bits */
513 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
514 ctrl_word |= dsp_q_addr;
515
516 writel(ctrl_word, info->write_ctrl);
517
518 /* Generate an interrupt to the DSP. It does not respond with
519 * an interrupt, and we do not need to wait for it to
520 * acknowledge, because it will hold the mutex lock until it's
521 * ready to receive more commands again.
522 */
523 writel(1, info->send_irq);
524
525 module->num_commands++;
526
527 fail:
528 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
529 return ret_status;
530 }
531 EXPORT_SYMBOL(msm_adsp_write);
532
533 int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
534 void *cmd_buf, size_t cmd_size)
535 {
536 int rc, retries = 0;
537 do {
538 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf, cmd_size);
539 if (rc == -EAGAIN)
540 udelay(10);
541 } while(rc == -EAGAIN && retries++ < 100);
542 if (retries > 50)
543 pr_warning("adsp: %s command took %d attempts: rc %d\n",
544 module->name, retries, rc);
545 return rc;
546 }
547
548 #ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
549 static void *modem_event_addr;
550 #if CONFIG_MSM_AMSS_VERSION >= 6350
551 static void read_modem_event(void *buf, size_t len)
552 {
553 uint32_t *dptr = buf;
554 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
555 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
556
557 sptr = modem_event_addr;
558 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
559
560 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
561 dptr[1] = be32_to_cpu(pkt_ptr->module);
562 dptr[2] = be32_to_cpu(pkt_ptr->image);
563 }
564 #else
565 static void read_modem_event(void *buf, size_t len)
566 {
567 uint32_t *dptr = buf;
568 struct rpc_adsp_rtos_modem_to_app_args_t *sptr =
569 modem_event_addr;
570 dptr[0] = be32_to_cpu(sptr->event);
571 dptr[1] = be32_to_cpu(sptr->module);
572 dptr[2] = be32_to_cpu(sptr->image);
573 }
574 #endif /* CONFIG_MSM_AMSS_VERSION >= 6350 */
575 #endif /* CONFIG_MSM_ADSP_REPORT_EVENTS */
576
577 static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
578 {
579 struct rpc_adsp_rtos_modem_to_app_args_t *args =
580 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
581 uint32_t event;
582 uint32_t proc_id;
583 uint32_t module_id;
584 uint32_t image;
585 struct msm_adsp_module *module;
586 #if CONFIG_MSM_AMSS_VERSION >= 6350
587 struct adsp_rtos_mp_mtoa_type *pkt_ptr =
588 &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
589
590 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
591 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
592 module_id = be32_to_cpu(pkt_ptr->module);
593 image = be32_to_cpu(pkt_ptr->image);
594
595 if (be32_to_cpu(args->mtoa_pkt.desc_field) == RPC_ADSP_RTOS_INIT_INFO) {
596 struct queue_to_offset_type *qptr;
597 struct queue_to_offset_type *qtbl;
598 uint32_t *mptr;
599 uint32_t *mtbl;
600 uint32_t q_idx;
601 uint32_t num_entries;
602 uint32_t entries_per_image;
603 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
604 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
605 int32_t i_no, e_idx;
606
607 pr_info("adsp:INIT_INFO Event\n");
608 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.
609 mp_mtoa_init_packet;
610
611 iptr = adsp_info.init_info_ptr;
612 iptr->image_count = be32_to_cpu(sptr->image_count);
613 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
614 num_entries = iptr->num_queue_offsets;
615 qptr = &sptr->queue_offsets_tbl[0][0];
616 for (i_no = 0; i_no < iptr->image_count; i_no++) {
617 qtbl = &iptr->queue_offsets_tbl[i_no][0];
618 for (e_idx = 0; e_idx < num_entries; e_idx++) {
619 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
620 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
621 q_idx = be32_to_cpu(qptr->queue);
622 iptr->queue_offsets[i_no][q_idx] =
623 qtbl[e_idx].offset;
624 qptr++;
625 }
626 }
627
628 num_entries = be32_to_cpu(sptr->num_task_module_entries);
629 iptr->num_task_module_entries = num_entries;
630 entries_per_image = num_entries / iptr->image_count;
631 mptr = &sptr->task_to_module_tbl[0][0];
632 for (i_no = 0; i_no < iptr->image_count; i_no++) {
633 mtbl = &iptr->task_to_module_tbl[i_no][0];
634 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
635 mtbl[e_idx] = be32_to_cpu(*mptr);
636 mptr++;
637 }
638 }
639
640 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
641 mptr = &sptr->module_entries[0];
642 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
643 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
644 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
645 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
646 RPC_ACCEPTSTAT_SUCCESS);
647 wake_up(&adsp_info.init_info_wait);
648
649 return;
650 }
651 #else
652 event = be32_to_cpu(args->event);
653 proc_id = be32_to_cpu(args->proc_id);
654 module_id = be32_to_cpu(args->module);
655 image = be32_to_cpu(args->image);
656 #endif
657
658 pr_info("adsp: rpc event=%d, proc_id=%d, module=%d, image=%d\n",
659 event, proc_id, module_id, image);
660
661 module = find_adsp_module_by_id(&adsp_info, module_id);
662 if (!module) {
663 pr_err("adsp: module %d is not supported!\n", module_id);
664 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
665 RPC_ACCEPTSTAT_GARBAGE_ARGS);
666 return;
667 }
668
669 mutex_lock(&module->lock);
670 switch (event) {
671 case RPC_ADSP_RTOS_MOD_READY:
672 pr_info("adsp: module %s: READY\n", module->name);
673 module->state = ADSP_STATE_ENABLED;
674 wake_up(&module->state_wait);
675 adsp_set_image(module->info, image);
676 break;
677 case RPC_ADSP_RTOS_MOD_DISABLE:
678 pr_info("adsp: module %s: DISABLED\n", module->name);
679 module->state = ADSP_STATE_DISABLED;
680 wake_up(&module->state_wait);
681 break;
682 case RPC_ADSP_RTOS_SERVICE_RESET:
683 pr_info("adsp: module %s: SERVICE_RESET\n", module->name);
684 module->state = ADSP_STATE_DISABLED;
685 wake_up(&module->state_wait);
686 break;
687 case RPC_ADSP_RTOS_CMD_SUCCESS:
688 pr_info("adsp: module %s: CMD_SUCCESS\n", module->name);
689 break;
690 case RPC_ADSP_RTOS_CMD_FAIL:
691 pr_info("adsp: module %s: CMD_FAIL\n", module->name);
692 break;
693 #if CONFIG_MSM_AMSS_VERSION >= 6350
694 case RPC_ADSP_RTOS_DISABLE_FAIL:
695 pr_info("adsp: module %s: DISABLE_FAIL\n", module->name);
696 break;
697 #endif
698 default:
699 pr_info("adsp: unknown event %d\n", event);
700 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
701 RPC_ACCEPTSTAT_GARBAGE_ARGS);
702 mutex_unlock(&module->lock);
703 return;
704 }
705 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
706 RPC_ACCEPTSTAT_SUCCESS);
707 mutex_unlock(&module->lock);
708 #ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
709 modem_event_addr = (uint32_t *)req;
710 module->ops->event(module->driver_data, EVENT_MSG_ID,
711 EVENT_LEN, read_modem_event);
712 #endif
713 }
714
715 static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
716 {
717 switch (req->procedure) {
718 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
719 rpc_send_accepted_void_reply(rpc_cb_server_client,
720 req->xid,
721 RPC_ACCEPTSTAT_SUCCESS);
722 break;
723 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
724 handle_adsp_rtos_mtoa_app(req);
725 break;
726 default:
727 pr_err("adsp: unknowned proc %d\n", req->procedure);
728 rpc_send_accepted_void_reply(
729 rpc_cb_server_client, req->xid,
730 RPC_ACCEPTSTAT_PROC_UNAVAIL);
731 break;
732 }
733 return 0;
734 }
735
736 /* this should be common code with rpc_servers.c */
737 static int adsp_rpc_thread(void *data)
738 {
739 void *buffer;
740 struct rpc_request_hdr *req;
741 int rc;
742
743 do {
744 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
745 if (rc < 0) {
746 pr_err("adsp: could not read rpc: %d\n", rc);
747 break;
748 }
749 req = (struct rpc_request_hdr *)buffer;
750
751 req->type = be32_to_cpu(req->type);
752 req->xid = be32_to_cpu(req->xid);
753 req->rpc_vers = be32_to_cpu(req->rpc_vers);
754 req->prog = be32_to_cpu(req->prog);
755 req->vers = be32_to_cpu(req->vers);
756 req->procedure = be32_to_cpu(req->procedure);
757
758 if (req->type != 0)
759 goto bad_rpc;
760 if (req->rpc_vers != 2)
761 goto bad_rpc;
762 if (req->prog != RPC_ADSP_RTOS_MTOA_PROG)
763 goto bad_rpc;
764 if (req->vers != RPC_ADSP_RTOS_MTOA_VERS)
765 goto bad_rpc;
766
767 handle_adsp_rtos_mtoa(req);
768 kfree(buffer);
769 continue;
770
771 bad_rpc:
772 pr_err("adsp: bogus rpc from modem\n");
773 kfree(buffer);
774 } while (1);
775
776 do_exit(0);
777 }
778
779 static size_t read_event_size;
780 static void *read_event_addr;
781
782 static void read_event_16(void *buf, size_t len)
783 {
784 uint16_t *dst = buf;
785 uint16_t *src = read_event_addr;
786 len /= 2;
787 if (len > read_event_size)
788 len = read_event_size;
789 while (len--)
790 *dst++ = *src++;
791 }
792
793 static void read_event_32(void *buf, size_t len)
794 {
795 uint32_t *dst = buf;
796 uint32_t *src = read_event_addr;
797 len /= 2;
798 if (len > read_event_size)
799 len = read_event_size;
800 while (len--)
801 *dst++ = *src++;
802 }
803
804 static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
805 struct adsp_info *info, void *dsp_addr)
806 {
807 struct msm_adsp_module *module;
808 unsigned rtos_task_id;
809 unsigned msg_id;
810 unsigned msg_length;
811 void (*func)(void *, size_t);
812
813 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
814 uint32_t *dsp_addr32 = dsp_addr;
815 uint32_t tmp = *dsp_addr32++;
816 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
817 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
818 read_event_size = tmp >> 16;
819 read_event_addr = dsp_addr32;
820 msg_length = read_event_size * sizeof(uint32_t);
821 func = read_event_32;
822 } else {
823 uint16_t *dsp_addr16 = dsp_addr;
824 uint16_t tmp = *dsp_addr16++;
825 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
826 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
827 read_event_size = *dsp_addr16++;
828 read_event_addr = dsp_addr16;
829 msg_length = read_event_size * sizeof(uint16_t);
830 func = read_event_16;
831 }
832
833 if (rtos_task_id > info->max_task_id) {
834 pr_err("adsp: bogus task id %d\n", rtos_task_id);
835 return 0;
836 }
837 module = find_adsp_module_by_id(info,
838 adsp_get_module(info, rtos_task_id));
839
840 if (!module) {
841 pr_err("adsp: no module for task id %d\n", rtos_task_id);
842 return 0;
843 }
844
845 module->num_events++;
846
847 if (!module->ops) {
848 pr_err("adsp: module %s is not open\n", module->name);
849 return 0;
850 }
851
852 module->ops->event(module->driver_data, msg_id, msg_length, func);
853 return 0;
854 }
855
856 static int adsp_get_event(struct adsp_info *info)
857 {
858 uint32_t ctrl_word;
859 uint32_t ready;
860 void *dsp_addr;
861 uint32_t cmd_type;
862 int cnt;
863 unsigned long flags;
864 int rc = 0;
865
866 spin_lock_irqsave(&adsp_cmd_lock, flags);
867
868 /* Whenever the DSP has a message, it updates this control word
869 * and generates an interrupt. When we receive the interrupt, we
870 * read this register to find out what ADSP task the command is
871 * comming from.
872 *
873 * The ADSP should *always* be ready on the first call, but the
874 * irq handler calls us in a loop (to handle back-to-back command
875 * processing), so we give the DSP some time to return to the
876 * ready state. The DSP will not issue another IRQ for events
877 * pending between the first IRQ and the event queue being drained,
878 * unfortunately.
879 */
880
881 for (cnt = 0; cnt < 10; cnt++) {
882 ctrl_word = readl(info->read_ctrl);
883
884 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
885 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
886 goto ready;
887
888 udelay(10);
889 }
890 pr_warning("adsp: not ready after 100uS\n");
891 rc = -EBUSY;
892 goto done;
893
894 ready:
895 /* Here we check to see if there are pending messages. If there are
896 * none, we siply return -EAGAIN to indicate that there are no more
897 * messages pending.
898 */
899 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
900 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
901 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
902 rc = -EAGAIN;
903 goto done;
904 }
905
906 /* DSP says that there are messages waiting for the host to read */
907
908 /* Get the Command Type */
909 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
910
911 /* Get the DSP buffer address */
912 dsp_addr = (void *)((ctrl_word &
913 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
914 (uint32_t)MSM_AD5_BASE);
915
916 /* We can only handle Task-to-Host messages */
917 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
918 pr_err("adsp: unknown dsp cmd_type %d\n", cmd_type);
919 rc = -EIO;
920 goto done;
921 }
922
923 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
924
925 ctrl_word = readl(info->read_ctrl);
926 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
927
928 /* Write ctrl word to the DSP */
929 writel(ctrl_word, info->read_ctrl);
930
931 /* Generate an interrupt to the DSP */
932 writel(1, info->send_irq);
933
934 done:
935 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
936 return rc;
937 }
938
939 static irqreturn_t adsp_irq_handler(int irq, void *data)
940 {
941 struct adsp_info *info = &adsp_info;
942 int cnt = 0;
943 for (cnt = 0; cnt < 10; cnt++)
944 if (adsp_get_event(info) < 0)
945 break;
946 if (cnt > info->event_backlog_max)
947 info->event_backlog_max = cnt;
948 info->events_received += cnt;
949 if (cnt == 10)
950 pr_err("adsp: too many (%d) events for single irq!\n", cnt);
951 return IRQ_HANDLED;
952 }
953
954 int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
955 {
956 if (module->clk && clk_rate)
957 return clk_set_rate(module->clk, clk_rate);
958
959 return -EINVAL;
960 }
961
962 int msm_adsp_enable(struct msm_adsp_module *module)
963 {
964 int rc = 0;
965
966 pr_info("msm_adsp_enable() '%s'state[%d] id[%d]\n",
967 module->name, module->state, module->id);
968
969 mutex_lock(&module->lock);
970 switch (module->state) {
971 case ADSP_STATE_DISABLED:
972 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
973 module->id, module);
974 if (rc)
975 break;
976 module->state = ADSP_STATE_ENABLING;
977 mutex_unlock(&module->lock);
978 rc = wait_event_timeout(module->state_wait,
979 module->state != ADSP_STATE_ENABLING,
980 1 * HZ);
981 mutex_lock(&module->lock);
982 if (module->state == ADSP_STATE_ENABLED) {
983 rc = 0;
984 } else {
985 pr_err("adsp: module '%s' enable timed out\n",
986 module->name);
987 rc = -ETIMEDOUT;
988 }
989 break;
990 case ADSP_STATE_ENABLING:
991 pr_warning("adsp: module '%s' enable in progress\n",
992 module->name);
993 break;
994 case ADSP_STATE_ENABLED:
995 pr_warning("adsp: module '%s' already enabled\n",
996 module->name);
997 break;
998 case ADSP_STATE_DISABLING:
999 pr_err("adsp: module '%s' disable in progress\n",
1000 module->name);
1001 rc = -EBUSY;
1002 break;
1003 }
1004 mutex_unlock(&module->lock);
1005 return rc;
1006 }
1007 EXPORT_SYMBOL(msm_adsp_enable);
1008
1009 static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1010 {
1011 int rc = 0;
1012
1013 switch (module->state) {
1014 case ADSP_STATE_DISABLED:
1015 pr_warning("adsp: module '%s' already disabled\n",
1016 module->name);
1017 break;
1018 case ADSP_STATE_ENABLING:
1019 case ADSP_STATE_ENABLED:
1020 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1021 module->id, module);
1022 module->state = ADSP_STATE_DISABLED;
1023 }
1024 return rc;
1025 }
1026
1027 int msm_adsp_disable(struct msm_adsp_module *module)
1028 {
1029 int rc;
1030 pr_info("msm_adsp_disable() '%s'\n", module->name);
1031 mutex_lock(&module->lock);
1032 rc = msm_adsp_disable_locked(module);
1033 mutex_unlock(&module->lock);
1034 return rc;
1035 }
1036 EXPORT_SYMBOL(msm_adsp_disable);
1037
1038 static int msm_adsp_probe(struct platform_device *pdev)
1039 {
1040 unsigned count;
1041 int rc, i;
1042 int max_module_id;
1043
1044 pr_info("adsp: probe\n");
1045
1046 #if CONFIG_MSM_AMSS_VERSION >= 6350
1047 adsp_info.init_info_ptr = kzalloc(
1048 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1049 if (!adsp_info.init_info_ptr)
1050 return -ENOMEM;
1051 #endif
1052
1053 rc = adsp_init_info(&adsp_info);
1054 if (rc)
1055 return rc;
1056 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1057 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1058 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1059 count = adsp_info.module_count;
1060
1061 #if CONFIG_MSM_AMSS_VERSION >= 6350
1062 max_module_id = count;
1063 #else
1064 max_module_id = adsp_info.max_module_id + 1;
1065 #endif
1066
1067 adsp_modules = kzalloc(
1068 sizeof(struct msm_adsp_module) * count +
1069 sizeof(void *) * max_module_id, GFP_KERNEL);
1070 if (!adsp_modules)
1071 return -ENOMEM;
1072
1073 adsp_info.id_to_module = (void *) (adsp_modules + count);
1074
1075 spin_lock_init(&adsp_cmd_lock);
1076
1077 rc = request_irq(INT_ADSP, adsp_irq_handler, IRQF_TRIGGER_RISING,
1078 "adsp", 0);
1079 if (rc < 0)
1080 goto fail_request_irq;
1081 disable_irq(INT_ADSP);
1082
1083 rpc_cb_server_client = msm_rpc_open();
1084 if (IS_ERR(rpc_cb_server_client)) {
1085 rpc_cb_server_client = NULL;
1086 rc = PTR_ERR(rpc_cb_server_client);
1087 pr_err("adsp: could not create rpc server (%d)\n", rc);
1088 goto fail_rpc_open;
1089 }
1090
1091 rc = msm_rpc_register_server(rpc_cb_server_client,
1092 RPC_ADSP_RTOS_MTOA_PROG,
1093 RPC_ADSP_RTOS_MTOA_VERS);
1094 if (rc) {
1095 pr_err("adsp: could not register callback server (%d)\n", rc);
1096 goto fail_rpc_register;
1097 }
1098
1099 /* start the kernel thread to process the callbacks */
1100 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1101
1102 for (i = 0; i < count; i++) {
1103 struct msm_adsp_module *mod = adsp_modules + i;
1104 mutex_init(&mod->lock);
1105 init_waitqueue_head(&mod->state_wait);
1106 mod->info = &adsp_info;
1107 mod->name = adsp_info.module[i].name;
1108 mod->id = adsp_info.module[i].id;
1109 if (adsp_info.module[i].clk_name)
1110 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1111 else
1112 mod->clk = NULL;
1113 if (mod->clk && adsp_info.module[i].clk_rate)
1114 clk_set_rate(mod->clk, adsp_info.module[i].clk_rate);
1115 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1116 mod->patch_event = adsp_info.module[i].patch_event;
1117 INIT_HLIST_HEAD(&mod->pmem_regions);
1118 mod->pdev.name = adsp_info.module[i].pdev_name;
1119 mod->pdev.id = -1;
1120 #if CONFIG_MSM_AMSS_VERSION >= 6350
1121 adsp_info.id_to_module[i] = mod;
1122 #else
1123 adsp_info.id_to_module[mod->id] = mod;
1124 #endif
1125 platform_device_register(&mod->pdev);
1126 }
1127
1128 msm_adsp_publish_cdevs(adsp_modules, count);
1129
1130 return 0;
1131
1132 fail_rpc_register:
1133 msm_rpc_close(rpc_cb_server_client);
1134 rpc_cb_server_client = NULL;
1135 fail_rpc_open:
1136 enable_irq(INT_ADSP);
1137 free_irq(INT_ADSP, 0);
1138 fail_request_irq:
1139 kfree(adsp_modules);
1140 #if CONFIG_MSM_AMSS_VERSION >= 6350
1141 kfree(adsp_info.init_info_ptr);
1142 #endif
1143 return rc;
1144 }
1145
1146 static struct platform_driver msm_adsp_driver = {
1147 .probe = msm_adsp_probe,
1148 .driver = {
1149 .name = MSM_ADSP_DRIVER_NAME,
1150 .owner = THIS_MODULE,
1151 },
1152 };
1153
1154 static int __init adsp_init(void)
1155 {
1156 return platform_driver_register(&msm_adsp_driver);
1157 }
1158
1159 device_initcall(adsp_init);
Tomato firmware and modifications.