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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / comedi / drivers / cb_pcidas.c
blob106ad750b7a0ff8b1e212335ee843e2fe0770e62
1 /*
2 comedi/drivers/cb_pcidas.c
3
4 Developed by Ivan Martinez and Frank Mori Hess, with valuable help from
5 David Schleef and the rest of the Comedi developers comunity.
6
7 Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk>
8 Copyright (C) 2001,2002 Frank Mori Hess <fmhess@users.sourceforge.net>
9
10 COMEDI - Linux Control and Measurement Device Interface
11 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26
27 ************************************************************************
28 */
29 /*
30 Driver: cb_pcidas
31 Description: MeasurementComputing PCI-DAS series with the AMCC S5933 PCI controller
32 Author: Ivan Martinez <imr@oersted.dtu.dk>,
33 Frank Mori Hess <fmhess@users.sourceforge.net>
34 Updated: 2003-3-11
35 Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas),
36 PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr,
37 PCI-DAS1000, PCI-DAS1001, PCI_DAS1002
38
39 Status:
40 There are many reports of the driver being used with most of the
41 supported cards. Despite no detailed log is maintained, it can
42 be said that the driver is quite tested and stable.
43
44 The boards may be autocalibrated using the comedi_calibrate
45 utility.
46
47 Configuration options:
48 [0] - PCI bus of device (optional)
49 [1] - PCI slot of device (optional)
50 If bus/slot is not specified, the first supported
51 PCI device found will be used.
52
53 For commands, the scanned channels must be consecutive
54 (i.e. 4-5-6-7, 2-3-4,...), and must all have the same
55 range and aref.
56 */
57 /*
58
59 TODO:
60
61 analog triggering on 1602 series
62 */
63
64 #include "../comedidev.h"
65 #include <linux/delay.h>
66 #include <linux/interrupt.h>
67
68 #include "8253.h"
69 #include "8255.h"
70 #include "amcc_s5933.h"
71 #include "comedi_pci.h"
72 #include "comedi_fc.h"
73
74 #undef CB_PCIDAS_DEBUG /* disable debugging code */
75 /* #define CB_PCIDAS_DEBUG enable debugging code */
76
77 /* PCI vendor number of ComputerBoards/MeasurementComputing */
78 #define PCI_VENDOR_ID_CB 0x1307
79 #define TIMER_BASE 100 /* 10MHz master clock */
80 #define AI_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */
81 #define AO_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */
82 #define NUM_CHANNELS_8800 8
83 #define NUM_CHANNELS_7376 1
84 #define NUM_CHANNELS_8402 2
85 #define NUM_CHANNELS_DAC08 1
86
87 /* PCI-DAS base addresses */
88
89 /* indices of base address regions */
90 #define S5933_BADRINDEX 0
91 #define CONT_STAT_BADRINDEX 1
92 #define ADC_FIFO_BADRINDEX 2
93 #define PACER_BADRINDEX 3
94 #define AO_BADRINDEX 4
95 /* sizes of io regions */
96 #define CONT_STAT_SIZE 10
97 #define ADC_FIFO_SIZE 4
98 #define PACER_SIZE 12
99 #define AO_SIZE 4
100
101 /* Control/Status registers */
102 #define INT_ADCFIFO 0 /* INTERRUPT / ADC FIFO register */
103 #define INT_EOS 0x1 /* interrupt end of scan */
104 #define INT_FHF 0x2 /* interrupt fifo half full */
105 #define INT_FNE 0x3 /* interrupt fifo not empty */
106 #define INT_MASK 0x3 /* mask of interrupt select bits */
107 #define INTE 0x4 /* interrupt enable */
108 #define DAHFIE 0x8 /* dac half full interrupt enable */
109 #define EOAIE 0x10 /* end of aquisition interrupt enable */
110 #define DAHFI 0x20 /* dac half full read status / write interrupt clear */
111 #define EOAI 0x40 /* read end of acq. interrupt status / write clear */
112 #define INT 0x80 /* read interrupt status / write clear */
113 #define EOBI 0x200 /* read end of burst interrupt status */
114 #define ADHFI 0x400 /* read half-full interrupt status */
115 #define ADNEI 0x800 /* read fifo not empty interrupt latch status */
116 #define ADNE 0x1000 /* read, fifo not empty (realtime, not latched) status */
117 #define DAEMIE 0x1000 /* write, dac empty interrupt enable */
118 #define LADFUL 0x2000 /* read fifo overflow / write clear */
119 #define DAEMI 0x4000 /* dac fifo empty interrupt status / write clear */
120
121 #define ADCMUX_CONT 2 /* ADC CHANNEL MUX AND CONTROL register */
122 #define BEGIN_SCAN(x) ((x) & 0xf)
123 #define END_SCAN(x) (((x) & 0xf) << 4)
124 #define GAIN_BITS(x) (((x) & 0x3) << 8)
125 #define UNIP 0x800 /* Analog front-end unipolar for range */
126 #define SE 0x400 /* Inputs in single-ended mode */
127 #define PACER_MASK 0x3000 /* pacer source bits */
128 #define PACER_INT 0x1000 /* internal pacer */
129 #define PACER_EXT_FALL 0x2000 /* external falling edge */
130 #define PACER_EXT_RISE 0x3000 /* external rising edge */
131 #define EOC 0x4000 /* adc not busy */
132
133 #define TRIG_CONTSTAT 4 /* TRIGGER CONTROL/STATUS register */
134 #define SW_TRIGGER 0x1 /* software start trigger */
135 #define EXT_TRIGGER 0x2 /* external start trigger */
136 #define ANALOG_TRIGGER 0x3 /* external analog trigger */
137 #define TRIGGER_MASK 0x3 /* mask of bits that determine start trigger */
138 #define TGEN 0x10 /* enable external start trigger */
139 #define BURSTE 0x20 /* burst mode enable */
140 #define XTRCL 0x80 /* clear external trigger */
141
142 #define CALIBRATION_REG 6 /* CALIBRATION register */
143 #define SELECT_8800_BIT 0x100 /* select 8800 caldac */
144 #define SELECT_TRIMPOT_BIT 0x200 /* select ad7376 trim pot */
145 #define SELECT_DAC08_BIT 0x400 /* select dac08 caldac */
146 #define CAL_SRC_BITS(x) (((x) & 0x7) << 11)
147 #define CAL_EN_BIT 0x4000 /* read calibration source instead of analog input channel 0 */
148 #define SERIAL_DATA_IN_BIT 0x8000 /* serial data stream going to 8800 and 7376 */
149
150 #define DAC_CSR 0x8 /* dac control and status register */
151 enum dac_csr_bits {
152 DACEN = 0x2, /* dac enable */
153 DAC_MODE_UPDATE_BOTH = 0x80, /* update both dacs when dac0 is written */
154 };
155 static inline unsigned int DAC_RANGE(unsigned int channel, unsigned int range)
156 {
157 return (range & 0x3) << (8 + 2 * (channel & 0x1));
158 }
159
160 static inline unsigned int DAC_RANGE_MASK(unsigned int channel)
161 {
162 return 0x3 << (8 + 2 * (channel & 0x1));
163 };
164
165 /* bits for 1602 series only */
166 enum dac_csr_bits_1602 {
167 DAC_EMPTY = 0x1, /* dac fifo empty, read, write clear */
168 DAC_START = 0x4, /* start/arm dac fifo operations */
169 DAC_PACER_MASK = 0x18, /* bits that set dac pacer source */
170 DAC_PACER_INT = 0x8, /* dac internal pacing */
171 DAC_PACER_EXT_FALL = 0x10, /* dac external pacing, falling edge */
172 DAC_PACER_EXT_RISE = 0x18, /* dac external pacing, rising edge */
173 };
174 static inline unsigned int DAC_CHAN_EN(unsigned int channel)
175 {
176 return 1 << (5 + (channel & 0x1)); /* enable channel 0 or 1 */
177 };
178
179 /* analog input fifo */
180 #define ADCDATA 0 /* ADC DATA register */
181 #define ADCFIFOCLR 2 /* ADC FIFO CLEAR */
182
183 /* pacer, counter, dio registers */
184 #define ADC8254 0
185 #define DIO_8255 4
186 #define DAC8254 8
187
188 /* analog output registers for 100x, 1200 series */
189 static inline unsigned int DAC_DATA_REG(unsigned int channel)
190 {
191 return 2 * (channel & 0x1);
192 }
193
194 /* analog output registers for 1602 series*/
195 #define DACDATA 0 /* DAC DATA register */
196 #define DACFIFOCLR 2 /* DAC FIFO CLEAR */
197
198 /* bit in hexadecimal representation of range index that indicates unipolar input range */
199 #define IS_UNIPOLAR 0x4
200 /* analog input ranges for most boards */
201 static const struct comedi_lrange cb_pcidas_ranges = {
202 8,
203 {
204 BIP_RANGE(10),
205 BIP_RANGE(5),
206 BIP_RANGE(2.5),
207 BIP_RANGE(1.25),
208 UNI_RANGE(10),
209 UNI_RANGE(5),
210 UNI_RANGE(2.5),
211 UNI_RANGE(1.25)
212 }
213 };
214
215 /* pci-das1001 input ranges */
216 static const struct comedi_lrange cb_pcidas_alt_ranges = {
217 8,
218 {
219 BIP_RANGE(10),
220 BIP_RANGE(1),
221 BIP_RANGE(0.1),
222 BIP_RANGE(0.01),
223 UNI_RANGE(10),
224 UNI_RANGE(1),
225 UNI_RANGE(0.1),
226 UNI_RANGE(0.01)
227 }
228 };
229
230 /* analog output ranges */
231 static const struct comedi_lrange cb_pcidas_ao_ranges = {
232 4,
233 {
234 BIP_RANGE(5),
235 BIP_RANGE(10),
236 UNI_RANGE(5),
237 UNI_RANGE(10),
238 }
239 };
240
241 enum trimpot_model {
242 AD7376,
243 AD8402,
244 };
245
246 struct cb_pcidas_board {
247 const char *name;
248 unsigned short device_id;
249 int ai_se_chans; /* Inputs in single-ended mode */
250 int ai_diff_chans; /* Inputs in differential mode */
251 int ai_bits; /* analog input resolution */
252 int ai_speed; /* fastest conversion period in ns */
253 int ao_nchan; /* number of analog out channels */
254 int has_ao_fifo; /* analog output has fifo */
255 int ao_scan_speed; /* analog output speed for 1602 series (for a scan, not conversion) */
256 int fifo_size; /* number of samples fifo can hold */
257 const struct comedi_lrange *ranges;
258 enum trimpot_model trimpot;
259 unsigned has_dac08:1;
260 };
261
262 static const struct cb_pcidas_board cb_pcidas_boards[] = {
263 {
264 .name = "pci-das1602/16",
265 .device_id = 0x1,
266 .ai_se_chans = 16,
267 .ai_diff_chans = 8,
268 .ai_bits = 16,
269 .ai_speed = 5000,
270 .ao_nchan = 2,
271 .has_ao_fifo = 1,
272 .ao_scan_speed = 10000,
273 .fifo_size = 512,
274 .ranges = &cb_pcidas_ranges,
275 .trimpot = AD8402,
276 .has_dac08 = 1,
277 },
278 {
279 .name = "pci-das1200",
280 .device_id = 0xF,
281 .ai_se_chans = 16,
282 .ai_diff_chans = 8,
283 .ai_bits = 12,
284 .ai_speed = 3200,
285 .ao_nchan = 2,
286 .has_ao_fifo = 0,
287 .fifo_size = 1024,
288 .ranges = &cb_pcidas_ranges,
289 .trimpot = AD7376,
290 .has_dac08 = 0,
291 },
292 {
293 .name = "pci-das1602/12",
294 .device_id = 0x10,
295 .ai_se_chans = 16,
296 .ai_diff_chans = 8,
297 .ai_bits = 12,
298 .ai_speed = 3200,
299 .ao_nchan = 2,
300 .has_ao_fifo = 1,
301 .ao_scan_speed = 4000,
302 .fifo_size = 1024,
303 .ranges = &cb_pcidas_ranges,
304 .trimpot = AD7376,
305 .has_dac08 = 0,
306 },
307 {
308 .name = "pci-das1200/jr",
309 .device_id = 0x19,
310 .ai_se_chans = 16,
311 .ai_diff_chans = 8,
312 .ai_bits = 12,
313 .ai_speed = 3200,
314 .ao_nchan = 0,
315 .has_ao_fifo = 0,
316 .fifo_size = 1024,
317 .ranges = &cb_pcidas_ranges,
318 .trimpot = AD7376,
319 .has_dac08 = 0,
320 },
321 {
322 .name = "pci-das1602/16/jr",
323 .device_id = 0x1C,
324 .ai_se_chans = 16,
325 .ai_diff_chans = 8,
326 .ai_bits = 16,
327 .ai_speed = 5000,
328 .ao_nchan = 0,
329 .has_ao_fifo = 0,
330 .fifo_size = 512,
331 .ranges = &cb_pcidas_ranges,
332 .trimpot = AD8402,
333 .has_dac08 = 1,
334 },
335 {
336 .name = "pci-das1000",
337 .device_id = 0x4C,
338 .ai_se_chans = 16,
339 .ai_diff_chans = 8,
340 .ai_bits = 12,
341 .ai_speed = 4000,
342 .ao_nchan = 0,
343 .has_ao_fifo = 0,
344 .fifo_size = 1024,
345 .ranges = &cb_pcidas_ranges,
346 .trimpot = AD7376,
347 .has_dac08 = 0,
348 },
349 {
350 .name = "pci-das1001",
351 .device_id = 0x1a,
352 .ai_se_chans = 16,
353 .ai_diff_chans = 8,
354 .ai_bits = 12,
355 .ai_speed = 6800,
356 .ao_nchan = 2,
357 .has_ao_fifo = 0,
358 .fifo_size = 1024,
359 .ranges = &cb_pcidas_alt_ranges,
360 .trimpot = AD7376,
361 .has_dac08 = 0,
362 },
363 {
364 .name = "pci-das1002",
365 .device_id = 0x1b,
366 .ai_se_chans = 16,
367 .ai_diff_chans = 8,
368 .ai_bits = 12,
369 .ai_speed = 6800,
370 .ao_nchan = 2,
371 .has_ao_fifo = 0,
372 .fifo_size = 1024,
373 .ranges = &cb_pcidas_ranges,
374 .trimpot = AD7376,
375 .has_dac08 = 0,
376 },
377 };
378
379 static DEFINE_PCI_DEVICE_TABLE(cb_pcidas_pci_table) = {
380 {
381 PCI_VENDOR_ID_CB, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
382 PCI_VENDOR_ID_CB, 0x000f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
383 PCI_VENDOR_ID_CB, 0x0010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
384 PCI_VENDOR_ID_CB, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
385 PCI_VENDOR_ID_CB, 0x001c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
386 PCI_VENDOR_ID_CB, 0x004c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
387 PCI_VENDOR_ID_CB, 0x001a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
388 PCI_VENDOR_ID_CB, 0x001b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
389 0}
390 };
391
392 MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table);
393
394 /*
395 * Useful for shorthand access to the particular board structure
396 */
397 #define thisboard ((const struct cb_pcidas_board *)dev->board_ptr)
398
399 /* this structure is for data unique to this hardware driver. If
400 several hardware drivers keep similar information in this structure,
401 feel free to suggest moving the variable to the struct comedi_device struct. */
402 struct cb_pcidas_private {
403 /* would be useful for a PCI device */
404 struct pci_dev *pci_dev;
405 /* base addresses */
406 unsigned long s5933_config;
407 unsigned long control_status;
408 unsigned long adc_fifo;
409 unsigned long pacer_counter_dio;
410 unsigned long ao_registers;
411 /* divisors of master clock for analog input pacing */
412 unsigned int divisor1;
413 unsigned int divisor2;
414 volatile unsigned int count; /* number of analog input samples remaining */
415 volatile unsigned int adc_fifo_bits; /* bits to write to interupt/adcfifo register */
416 volatile unsigned int s5933_intcsr_bits; /* bits to write to amcc s5933 interrupt control/status register */
417 volatile unsigned int ao_control_bits; /* bits to write to ao control and status register */
418 short ai_buffer[AI_BUFFER_SIZE];
419 short ao_buffer[AO_BUFFER_SIZE];
420 /* divisors of master clock for analog output pacing */
421 unsigned int ao_divisor1;
422 unsigned int ao_divisor2;
423 volatile unsigned int ao_count; /* number of analog output samples remaining */
424 int ao_value[2]; /* remember what the analog outputs are set to, to allow readback */
425 unsigned int caldac_value[NUM_CHANNELS_8800]; /* for readback of caldac */
426 unsigned int trimpot_value[NUM_CHANNELS_8402]; /* for readback of trimpot */
427 unsigned int dac08_value;
428 unsigned int calibration_source;
429 };
430
431 /*
432 * most drivers define the following macro to make it easy to
433 * access the private structure.
434 */
435 #define devpriv ((struct cb_pcidas_private *)dev->private)
436
437 /*
438 * The struct comedi_driver structure tells the Comedi core module
439 * which functions to call to configure/deconfigure (attach/detach)
440 * the board, and also about the kernel module that contains
441 * the device code.
442 */
443 static int cb_pcidas_attach(struct comedi_device *dev,
444 struct comedi_devconfig *it);
445 static int cb_pcidas_detach(struct comedi_device *dev);
446 static struct comedi_driver driver_cb_pcidas = {
447 .driver_name = "cb_pcidas",
448 .module = THIS_MODULE,
449 .attach = cb_pcidas_attach,
450 .detach = cb_pcidas_detach,
451 };
452
453 static int cb_pcidas_ai_rinsn(struct comedi_device *dev,
454 struct comedi_subdevice *s,
455 struct comedi_insn *insn, unsigned int *data);
456 static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
457 struct comedi_insn *insn, unsigned int *data);
458 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device *dev,
459 struct comedi_subdevice *s,
460 struct comedi_insn *insn,
461 unsigned int *data);
462 static int cb_pcidas_ao_fifo_winsn(struct comedi_device *dev,
463 struct comedi_subdevice *s,
464 struct comedi_insn *insn,
465 unsigned int *data);
466 static int cb_pcidas_ao_readback_insn(struct comedi_device *dev,
467 struct comedi_subdevice *s,
468 struct comedi_insn *insn,
469 unsigned int *data);
470 static int cb_pcidas_ai_cmd(struct comedi_device *dev,
471 struct comedi_subdevice *s);
472 static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
473 struct comedi_subdevice *s,
474 struct comedi_cmd *cmd);
475 static int cb_pcidas_ao_cmd(struct comedi_device *dev,
476 struct comedi_subdevice *s);
477 static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
478 struct comedi_subdevice *subdev,
479 unsigned int trig_num);
480 static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
481 struct comedi_subdevice *s,
482 struct comedi_cmd *cmd);
483 static irqreturn_t cb_pcidas_interrupt(int irq, void *d);
484 static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status);
485 static int cb_pcidas_cancel(struct comedi_device *dev,
486 struct comedi_subdevice *s);
487 static int cb_pcidas_ao_cancel(struct comedi_device *dev,
488 struct comedi_subdevice *s);
489 static void cb_pcidas_load_counters(struct comedi_device *dev, unsigned int *ns,
490 int round_flags);
491 static int eeprom_read_insn(struct comedi_device *dev,
492 struct comedi_subdevice *s,
493 struct comedi_insn *insn, unsigned int *data);
494 static int caldac_read_insn(struct comedi_device *dev,
495 struct comedi_subdevice *s,
496 struct comedi_insn *insn, unsigned int *data);
497 static int caldac_write_insn(struct comedi_device *dev,
498 struct comedi_subdevice *s,
499 struct comedi_insn *insn, unsigned int *data);
500 static int trimpot_read_insn(struct comedi_device *dev,
501 struct comedi_subdevice *s,
502 struct comedi_insn *insn, unsigned int *data);
503 static int cb_pcidas_trimpot_write(struct comedi_device *dev,
504 unsigned int channel, unsigned int value);
505 static int trimpot_write_insn(struct comedi_device *dev,
506 struct comedi_subdevice *s,
507 struct comedi_insn *insn, unsigned int *data);
508 static int dac08_read_insn(struct comedi_device *dev,
509 struct comedi_subdevice *s, struct comedi_insn *insn,
510 unsigned int *data);
511 static int dac08_write(struct comedi_device *dev, unsigned int value);
512 static int dac08_write_insn(struct comedi_device *dev,
513 struct comedi_subdevice *s,
514 struct comedi_insn *insn, unsigned int *data);
515 static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
516 uint8_t value);
517 static int trimpot_7376_write(struct comedi_device *dev, uint8_t value);
518 static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel,
519 uint8_t value);
520 static int nvram_read(struct comedi_device *dev, unsigned int address,
521 uint8_t *data);
522
523 static inline unsigned int cal_enable_bits(struct comedi_device *dev)
524 {
525 return CAL_EN_BIT | CAL_SRC_BITS(devpriv->calibration_source);
526 }
527
528 /*
529 * Attach is called by the Comedi core to configure the driver
530 * for a particular board.
531 */
532 static int cb_pcidas_attach(struct comedi_device *dev,
533 struct comedi_devconfig *it)
534 {
535 struct comedi_subdevice *s;
536 struct pci_dev *pcidev = NULL;
537 int index;
538 int i;
539
540 printk("comedi%d: cb_pcidas: ", dev->minor);
541
542 /*
543 * Allocate the private structure area.
544 */
545 if (alloc_private(dev, sizeof(struct cb_pcidas_private)) < 0)
546 return -ENOMEM;
547
548 /*
549 * Probe the device to determine what device in the series it is.
550 */
551 printk("\n");
552
553 for_each_pci_dev(pcidev) {
554 /* is it not a computer boards card? */
555 if (pcidev->vendor != PCI_VENDOR_ID_CB)
556 continue;
557 /* loop through cards supported by this driver */
558 for (index = 0; index < ARRAY_SIZE(cb_pcidas_boards); index++) {
559 if (cb_pcidas_boards[index].device_id != pcidev->device)
560 continue;
561 /* was a particular bus/slot requested? */
562 if (it->options[0] || it->options[1]) {
563 /* are we on the wrong bus/slot? */
564 if (pcidev->bus->number != it->options[0] ||
565 PCI_SLOT(pcidev->devfn) != it->options[1]) {
566 continue;
567 }
568 }
569 devpriv->pci_dev = pcidev;
570 dev->board_ptr = cb_pcidas_boards + index;
571 goto found;
572 }
573 }
574
575 printk("No supported ComputerBoards/MeasurementComputing card found on "
576 "requested position\n");
577 return -EIO;
578
579 found:
580
581 printk("Found %s on bus %i, slot %i\n", cb_pcidas_boards[index].name,
582 pcidev->bus->number, PCI_SLOT(pcidev->devfn));
583
584 /*
585 * Enable PCI device and reserve I/O ports.
586 */
587 if (comedi_pci_enable(pcidev, "cb_pcidas")) {
588 printk(" Failed to enable PCI device and request regions\n");
589 return -EIO;
590 }
591 /*
592 * Initialize devpriv->control_status and devpriv->adc_fifo to point to
593 * their base address.
594 */
595 devpriv->s5933_config =
596 pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX);
597 devpriv->control_status =
598 pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX);
599 devpriv->adc_fifo =
600 pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX);
601 devpriv->pacer_counter_dio =
602 pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX);
603 if (thisboard->ao_nchan) {
604 devpriv->ao_registers =
605 pci_resource_start(devpriv->pci_dev, AO_BADRINDEX);
606 }
607 /* disable and clear interrupts on amcc s5933 */
608 outl(INTCSR_INBOX_INTR_STATUS,
609 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
610
611 /* get irq */
612 if (request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt,
613 IRQF_SHARED, "cb_pcidas", dev)) {
614 printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq);
615 return -EINVAL;
616 }
617 dev->irq = devpriv->pci_dev->irq;
618
619 /* Initialize dev->board_name */
620 dev->board_name = thisboard->name;
621
622 /*
623 * Allocate the subdevice structures.
624 */
625 if (alloc_subdevices(dev, 7) < 0)
626 return -ENOMEM;
627
628 s = dev->subdevices + 0;
629 /* analog input subdevice */
630 dev->read_subdev = s;
631 s->type = COMEDI_SUBD_AI;
632 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
633 /* WARNING: Number of inputs in differential mode is ignored */
634 s->n_chan = thisboard->ai_se_chans;
635 s->len_chanlist = thisboard->ai_se_chans;
636 s->maxdata = (1 << thisboard->ai_bits) - 1;
637 s->range_table = thisboard->ranges;
638 s->insn_read = cb_pcidas_ai_rinsn;
639 s->insn_config = ai_config_insn;
640 s->do_cmd = cb_pcidas_ai_cmd;
641 s->do_cmdtest = cb_pcidas_ai_cmdtest;
642 s->cancel = cb_pcidas_cancel;
643
644 /* analog output subdevice */
645 s = dev->subdevices + 1;
646 if (thisboard->ao_nchan) {
647 s->type = COMEDI_SUBD_AO;
648 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
649 s->n_chan = thisboard->ao_nchan;
650 /* analog out resolution is the same as analog input resolution, so use ai_bits */
651 s->maxdata = (1 << thisboard->ai_bits) - 1;
652 s->range_table = &cb_pcidas_ao_ranges;
653 s->insn_read = cb_pcidas_ao_readback_insn;
654 if (thisboard->has_ao_fifo) {
655 dev->write_subdev = s;
656 s->subdev_flags |= SDF_CMD_WRITE;
657 s->insn_write = cb_pcidas_ao_fifo_winsn;
658 s->do_cmdtest = cb_pcidas_ao_cmdtest;
659 s->do_cmd = cb_pcidas_ao_cmd;
660 s->cancel = cb_pcidas_ao_cancel;
661 } else {
662 s->insn_write = cb_pcidas_ao_nofifo_winsn;
663 }
664 } else {
665 s->type = COMEDI_SUBD_UNUSED;
666 }
667
668 /* 8255 */
669 s = dev->subdevices + 2;
670 subdev_8255_init(dev, s, NULL, devpriv->pacer_counter_dio + DIO_8255);
671
672 /* serial EEPROM, */
673 s = dev->subdevices + 3;
674 s->type = COMEDI_SUBD_MEMORY;
675 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
676 s->n_chan = 256;
677 s->maxdata = 0xff;
678 s->insn_read = eeprom_read_insn;
679
680 /* 8800 caldac */
681 s = dev->subdevices + 4;
682 s->type = COMEDI_SUBD_CALIB;
683 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
684 s->n_chan = NUM_CHANNELS_8800;
685 s->maxdata = 0xff;
686 s->insn_read = caldac_read_insn;
687 s->insn_write = caldac_write_insn;
688 for (i = 0; i < s->n_chan; i++)
689 caldac_8800_write(dev, i, s->maxdata / 2);
690
691 /* trim potentiometer */
692 s = dev->subdevices + 5;
693 s->type = COMEDI_SUBD_CALIB;
694 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
695 if (thisboard->trimpot == AD7376) {
696 s->n_chan = NUM_CHANNELS_7376;
697 s->maxdata = 0x7f;
698 } else {
699 s->n_chan = NUM_CHANNELS_8402;
700 s->maxdata = 0xff;
701 }
702 s->insn_read = trimpot_read_insn;
703 s->insn_write = trimpot_write_insn;
704 for (i = 0; i < s->n_chan; i++)
705 cb_pcidas_trimpot_write(dev, i, s->maxdata / 2);
706
707 /* dac08 caldac */
708 s = dev->subdevices + 6;
709 if (thisboard->has_dac08) {
710 s->type = COMEDI_SUBD_CALIB;
711 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
712 s->n_chan = NUM_CHANNELS_DAC08;
713 s->insn_read = dac08_read_insn;
714 s->insn_write = dac08_write_insn;
715 s->maxdata = 0xff;
716 dac08_write(dev, s->maxdata / 2);
717 } else
718 s->type = COMEDI_SUBD_UNUSED;
719
720 /* make sure mailbox 4 is empty */
721 inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
722 /* Set bits to enable incoming mailbox interrupts on amcc s5933. */
723 devpriv->s5933_intcsr_bits =
724 INTCSR_INBOX_BYTE(3) | INTCSR_INBOX_SELECT(3) |
725 INTCSR_INBOX_FULL_INT;
726 /* clear and enable interrupt on amcc s5933 */
727 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
728 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
729
730 return 1;
731 }
732
733 /*
734 * cb_pcidas_detach is called to deconfigure a device. It should deallocate
735 * resources.
736 * This function is also called when _attach() fails, so it should be
737 * careful not to release resources that were not necessarily
738 * allocated by _attach(). dev->private and dev->subdevices are
739 * deallocated automatically by the core.
740 */
741 static int cb_pcidas_detach(struct comedi_device *dev)
742 {
743 printk("comedi%d: cb_pcidas: remove\n", dev->minor);
744
745 if (devpriv) {
746 if (devpriv->s5933_config) {
747 /* disable and clear interrupts on amcc s5933 */
748 outl(INTCSR_INBOX_INTR_STATUS,
749 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
750 #ifdef CB_PCIDAS_DEBUG
751 printk("detaching, incsr is 0x%x\n",
752 inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR));
753 #endif
754 }
755 }
756 if (dev->irq)
757 free_irq(dev->irq, dev);
758 if (dev->subdevices)
759 subdev_8255_cleanup(dev, dev->subdevices + 2);
760 if (devpriv && devpriv->pci_dev) {
761 if (devpriv->s5933_config)
762 comedi_pci_disable(devpriv->pci_dev);
763 pci_dev_put(devpriv->pci_dev);
764 }
765
766 return 0;
767 }
768
769 /*
770 * "instructions" read/write data in "one-shot" or "software-triggered"
771 * mode.
772 */
773 static int cb_pcidas_ai_rinsn(struct comedi_device *dev,
774 struct comedi_subdevice *s,
775 struct comedi_insn *insn, unsigned int *data)
776 {
777 int n, i;
778 unsigned int bits;
779 static const int timeout = 10000;
780 int channel;
781 /* enable calibration input if appropriate */
782 if (insn->chanspec & CR_ALT_SOURCE) {
783 outw(cal_enable_bits(dev),
784 devpriv->control_status + CALIBRATION_REG);
785 channel = 0;
786 } else {
787 outw(0, devpriv->control_status + CALIBRATION_REG);
788 channel = CR_CHAN(insn->chanspec);
789 }
790 /* set mux limits and gain */
791 bits = BEGIN_SCAN(channel) |
792 END_SCAN(channel) | GAIN_BITS(CR_RANGE(insn->chanspec));
793 /* set unipolar/bipolar */
794 if (CR_RANGE(insn->chanspec) & IS_UNIPOLAR)
795 bits |= UNIP;
796 /* set singleended/differential */
797 if (CR_AREF(insn->chanspec) != AREF_DIFF)
798 bits |= SE;
799 outw(bits, devpriv->control_status + ADCMUX_CONT);
800
801 /* clear fifo */
802 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
803
804 /* convert n samples */
805 for (n = 0; n < insn->n; n++) {
806 /* trigger conversion */
807 outw(0, devpriv->adc_fifo + ADCDATA);
808
809 /* wait for conversion to end */
810 /* return -ETIMEDOUT if there is a timeout */
811 for (i = 0; i < timeout; i++) {
812 if (inw(devpriv->control_status + ADCMUX_CONT) & EOC)
813 break;
814 }
815 if (i == timeout)
816 return -ETIMEDOUT;
817
818 /* read data */
819 data[n] = inw(devpriv->adc_fifo + ADCDATA);
820 }
821
822 /* return the number of samples read/written */
823 return n;
824 }
825
826 static int ai_config_calibration_source(struct comedi_device *dev,
827 unsigned int *data)
828 {
829 static const int num_calibration_sources = 8;
830 unsigned int source = data[1];
831
832 if (source >= num_calibration_sources) {
833 printk("invalid calibration source: %i\n", source);
834 return -EINVAL;
835 }
836
837 devpriv->calibration_source = source;
838
839 return 2;
840 }
841
842 static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
843 struct comedi_insn *insn, unsigned int *data)
844 {
845 int id = data[0];
846
847 switch (id) {
848 case INSN_CONFIG_ALT_SOURCE:
849 return ai_config_calibration_source(dev, data);
850 break;
851 default:
852 return -EINVAL;
853 break;
854 }
855 return -EINVAL;
856 }
857
858 /* analog output insn for pcidas-1000 and 1200 series */
859 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device *dev,
860 struct comedi_subdevice *s,
861 struct comedi_insn *insn,
862 unsigned int *data)
863 {
864 int channel;
865 unsigned long flags;
866
867 /* set channel and range */
868 channel = CR_CHAN(insn->chanspec);
869 spin_lock_irqsave(&dev->spinlock, flags);
870 devpriv->ao_control_bits &=
871 ~DAC_MODE_UPDATE_BOTH & ~DAC_RANGE_MASK(channel);
872 devpriv->ao_control_bits |=
873 DACEN | DAC_RANGE(channel, CR_RANGE(insn->chanspec));
874 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
875 spin_unlock_irqrestore(&dev->spinlock, flags);
876
877 /* remember value for readback */
878 devpriv->ao_value[channel] = data[0];
879 /* send data */
880 outw(data[0], devpriv->ao_registers + DAC_DATA_REG(channel));
881
882 return 1;
883 }
884
885 /* analog output insn for pcidas-1602 series */
886 static int cb_pcidas_ao_fifo_winsn(struct comedi_device *dev,
887 struct comedi_subdevice *s,
888 struct comedi_insn *insn, unsigned int *data)
889 {
890 int channel;
891 unsigned long flags;
892
893 /* clear dac fifo */
894 outw(0, devpriv->ao_registers + DACFIFOCLR);
895
896 /* set channel and range */
897 channel = CR_CHAN(insn->chanspec);
898 spin_lock_irqsave(&dev->spinlock, flags);
899 devpriv->ao_control_bits &=
900 ~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) & ~DAC_RANGE_MASK(channel) &
901 ~DAC_PACER_MASK;
902 devpriv->ao_control_bits |=
903 DACEN | DAC_RANGE(channel,
904 CR_RANGE(insn->
905 chanspec)) | DAC_CHAN_EN(channel) |
906 DAC_START;
907 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
908 spin_unlock_irqrestore(&dev->spinlock, flags);
909
910 /* remember value for readback */
911 devpriv->ao_value[channel] = data[0];
912 /* send data */
913 outw(data[0], devpriv->ao_registers + DACDATA);
914
915 return 1;
916 }
917
918 /* analog output readback insn */
919 static int cb_pcidas_ao_readback_insn(struct comedi_device *dev,
920 struct comedi_subdevice *s,
921 struct comedi_insn *insn,
922 unsigned int *data)
923 {
924 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
925
926 return 1;
927 }
928
929 static int eeprom_read_insn(struct comedi_device *dev,
930 struct comedi_subdevice *s,
931 struct comedi_insn *insn, unsigned int *data)
932 {
933 uint8_t nvram_data;
934 int retval;
935
936 retval = nvram_read(dev, CR_CHAN(insn->chanspec), &nvram_data);
937 if (retval < 0)
938 return retval;
939
940 data[0] = nvram_data;
941
942 return 1;
943 }
944
945 static int caldac_write_insn(struct comedi_device *dev,
946 struct comedi_subdevice *s,
947 struct comedi_insn *insn, unsigned int *data)
948 {
949 const unsigned int channel = CR_CHAN(insn->chanspec);
950
951 return caldac_8800_write(dev, channel, data[0]);
952 }
953
954 static int caldac_read_insn(struct comedi_device *dev,
955 struct comedi_subdevice *s,
956 struct comedi_insn *insn, unsigned int *data)
957 {
958 data[0] = devpriv->caldac_value[CR_CHAN(insn->chanspec)];
959
960 return 1;
961 }
962
963 /* 1602/16 pregain offset */
964 static int dac08_write(struct comedi_device *dev, unsigned int value)
965 {
966 if (devpriv->dac08_value == value)
967 return 1;
968
969 devpriv->dac08_value = value;
970
971 outw(cal_enable_bits(dev) | (value & 0xff),
972 devpriv->control_status + CALIBRATION_REG);
973 udelay(1);
974 outw(cal_enable_bits(dev) | SELECT_DAC08_BIT | (value & 0xff),
975 devpriv->control_status + CALIBRATION_REG);
976 udelay(1);
977 outw(cal_enable_bits(dev) | (value & 0xff),
978 devpriv->control_status + CALIBRATION_REG);
979 udelay(1);
980
981 return 1;
982 }
983
984 static int dac08_write_insn(struct comedi_device *dev,
985 struct comedi_subdevice *s,
986 struct comedi_insn *insn, unsigned int *data)
987 {
988 return dac08_write(dev, data[0]);
989 }
990
991 static int dac08_read_insn(struct comedi_device *dev,
992 struct comedi_subdevice *s, struct comedi_insn *insn,
993 unsigned int *data)
994 {
995 data[0] = devpriv->dac08_value;
996
997 return 1;
998 }
999
1000 static int cb_pcidas_trimpot_write(struct comedi_device *dev,
1001 unsigned int channel, unsigned int value)
1002 {
1003 if (devpriv->trimpot_value[channel] == value)
1004 return 1;
1005
1006 devpriv->trimpot_value[channel] = value;
1007 switch (thisboard->trimpot) {
1008 case AD7376:
1009 trimpot_7376_write(dev, value);
1010 break;
1011 case AD8402:
1012 trimpot_8402_write(dev, channel, value);
1013 break;
1014 default:
1015 comedi_error(dev, "driver bug?");
1016 return -1;
1017 break;
1018 }
1019
1020 return 1;
1021 }
1022
1023 static int trimpot_write_insn(struct comedi_device *dev,
1024 struct comedi_subdevice *s,
1025 struct comedi_insn *insn, unsigned int *data)
1026 {
1027 unsigned int channel = CR_CHAN(insn->chanspec);
1028
1029 return cb_pcidas_trimpot_write(dev, channel, data[0]);
1030 }
1031
1032 static int trimpot_read_insn(struct comedi_device *dev,
1033 struct comedi_subdevice *s,
1034 struct comedi_insn *insn, unsigned int *data)
1035 {
1036 unsigned int channel = CR_CHAN(insn->chanspec);
1037
1038 data[0] = devpriv->trimpot_value[channel];
1039
1040 return 1;
1041 }
1042
1043 static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
1044 struct comedi_subdevice *s,
1045 struct comedi_cmd *cmd)
1046 {
1047 int err = 0;
1048 int tmp;
1049 int i, gain, start_chan;
1050
1051 /* cmdtest tests a particular command to see if it is valid.
1052 * Using the cmdtest ioctl, a user can create a valid cmd
1053 * and then have it executes by the cmd ioctl.
1054 *
1055 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1056 * the command passes. */
1057
1058 /* step 1: make sure trigger sources are trivially valid */
1059
1060 tmp = cmd->start_src;
1061 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1062 if (!cmd->start_src || tmp != cmd->start_src)
1063 err++;
1064
1065 tmp = cmd->scan_begin_src;
1066 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT;
1067 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1068 err++;
1069
1070 tmp = cmd->convert_src;
1071 cmd->convert_src &= TRIG_TIMER | TRIG_NOW | TRIG_EXT;
1072 if (!cmd->convert_src || tmp != cmd->convert_src)
1073 err++;
1074
1075 tmp = cmd->scan_end_src;
1076 cmd->scan_end_src &= TRIG_COUNT;
1077 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1078 err++;
1079
1080 tmp = cmd->stop_src;
1081 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1082 if (!cmd->stop_src || tmp != cmd->stop_src)
1083 err++;
1084
1085 if (err)
1086 return 1;
1087
1088 /* step 2: make sure trigger sources are unique and mutually compatible */
1089
1090 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1091 err++;
1092 if (cmd->scan_begin_src != TRIG_FOLLOW &&
1093 cmd->scan_begin_src != TRIG_TIMER &&
1094 cmd->scan_begin_src != TRIG_EXT)
1095 err++;
1096 if (cmd->convert_src != TRIG_TIMER &&
1097 cmd->convert_src != TRIG_EXT && cmd->convert_src != TRIG_NOW)
1098 err++;
1099 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1100 err++;
1101
1102 /* make sure trigger sources are compatible with each other */
1103 if (cmd->scan_begin_src == TRIG_FOLLOW && cmd->convert_src == TRIG_NOW)
1104 err++;
1105 if (cmd->scan_begin_src != TRIG_FOLLOW && cmd->convert_src != TRIG_NOW)
1106 err++;
1107 if (cmd->start_src == TRIG_EXT &&
1108 (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT))
1109 err++;
1110
1111 if (err)
1112 return 2;
1113
1114 /* step 3: make sure arguments are trivially compatible */
1115
1116 if (cmd->start_arg != 0) {
1117 cmd->start_arg = 0;
1118 err++;
1119 }
1120
1121 if (cmd->scan_begin_src == TRIG_TIMER) {
1122 if (cmd->scan_begin_arg <
1123 thisboard->ai_speed * cmd->chanlist_len) {
1124 cmd->scan_begin_arg =
1125 thisboard->ai_speed * cmd->chanlist_len;
1126 err++;
1127 }
1128 }
1129 if (cmd->convert_src == TRIG_TIMER) {
1130 if (cmd->convert_arg < thisboard->ai_speed) {
1131 cmd->convert_arg = thisboard->ai_speed;
1132 err++;
1133 }
1134 }
1135
1136 if (cmd->scan_end_arg != cmd->chanlist_len) {
1137 cmd->scan_end_arg = cmd->chanlist_len;
1138 err++;
1139 }
1140 if (cmd->stop_src == TRIG_NONE) {
1141 /* TRIG_NONE */
1142 if (cmd->stop_arg != 0) {
1143 cmd->stop_arg = 0;
1144 err++;
1145 }
1146 }
1147
1148 if (err)
1149 return 3;
1150
1151 /* step 4: fix up any arguments */
1152
1153 if (cmd->scan_begin_src == TRIG_TIMER) {
1154 tmp = cmd->scan_begin_arg;
1155 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1156 &(devpriv->divisor1),
1157 &(devpriv->divisor2),
1158 &(cmd->scan_begin_arg),
1159 cmd->flags & TRIG_ROUND_MASK);
1160 if (tmp != cmd->scan_begin_arg)
1161 err++;
1162 }
1163 if (cmd->convert_src == TRIG_TIMER) {
1164 tmp = cmd->convert_arg;
1165 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1166 &(devpriv->divisor1),
1167 &(devpriv->divisor2),
1168 &(cmd->convert_arg),
1169 cmd->flags & TRIG_ROUND_MASK);
1170 if (tmp != cmd->convert_arg)
1171 err++;
1172 }
1173
1174 if (err)
1175 return 4;
1176
1177 /* check channel/gain list against card's limitations */
1178 if (cmd->chanlist) {
1179 gain = CR_RANGE(cmd->chanlist[0]);
1180 start_chan = CR_CHAN(cmd->chanlist[0]);
1181 for (i = 1; i < cmd->chanlist_len; i++) {
1182 if (CR_CHAN(cmd->chanlist[i]) !=
1183 (start_chan + i) % s->n_chan) {
1184 comedi_error(dev,
1185 "entries in chanlist must be consecutive channels, counting upwards\n");
1186 err++;
1187 }
1188 if (CR_RANGE(cmd->chanlist[i]) != gain) {
1189 comedi_error(dev,
1190 "entries in chanlist must all have the same gain\n");
1191 err++;
1192 }
1193 }
1194 }
1195
1196 if (err)
1197 return 5;
1198
1199 return 0;
1200 }
1201
1202 static int cb_pcidas_ai_cmd(struct comedi_device *dev,
1203 struct comedi_subdevice *s)
1204 {
1205 struct comedi_async *async = s->async;
1206 struct comedi_cmd *cmd = &async->cmd;
1207 unsigned int bits;
1208 unsigned long flags;
1209
1210 /* make sure CAL_EN_BIT is disabled */
1211 outw(0, devpriv->control_status + CALIBRATION_REG);
1212 /* initialize before settings pacer source and count values */
1213 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1214 /* clear fifo */
1215 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
1216
1217 /* set mux limits, gain and pacer source */
1218 bits = BEGIN_SCAN(CR_CHAN(cmd->chanlist[0])) |
1219 END_SCAN(CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])) |
1220 GAIN_BITS(CR_RANGE(cmd->chanlist[0]));
1221 /* set unipolar/bipolar */
1222 if (CR_RANGE(cmd->chanlist[0]) & IS_UNIPOLAR)
1223 bits |= UNIP;
1224 /* set singleended/differential */
1225 if (CR_AREF(cmd->chanlist[0]) != AREF_DIFF)
1226 bits |= SE;
1227 /* set pacer source */
1228 if (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT)
1229 bits |= PACER_EXT_RISE;
1230 else
1231 bits |= PACER_INT;
1232 outw(bits, devpriv->control_status + ADCMUX_CONT);
1233
1234 #ifdef CB_PCIDAS_DEBUG
1235 printk("comedi: sent 0x%x to adcmux control\n", bits);
1236 #endif
1237
1238 /* load counters */
1239 if (cmd->convert_src == TRIG_TIMER)
1240 cb_pcidas_load_counters(dev, &cmd->convert_arg,
1241 cmd->flags & TRIG_ROUND_MASK);
1242 else if (cmd->scan_begin_src == TRIG_TIMER)
1243 cb_pcidas_load_counters(dev, &cmd->scan_begin_arg,
1244 cmd->flags & TRIG_ROUND_MASK);
1245
1246 /* set number of conversions */
1247 if (cmd->stop_src == TRIG_COUNT)
1248 devpriv->count = cmd->chanlist_len * cmd->stop_arg;
1249 /* enable interrupts */
1250 spin_lock_irqsave(&dev->spinlock, flags);
1251 devpriv->adc_fifo_bits |= INTE;
1252 devpriv->adc_fifo_bits &= ~INT_MASK;
1253 if (cmd->flags & TRIG_WAKE_EOS) {
1254 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1255 devpriv->adc_fifo_bits |= INT_EOS; /* interrupt end of burst */
1256 else
1257 devpriv->adc_fifo_bits |= INT_FNE; /* interrupt fifo not empty */
1258 } else {
1259 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */
1260 }
1261 #ifdef CB_PCIDAS_DEBUG
1262 printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits);
1263 #endif
1264 /* enable (and clear) interrupts */
1265 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
1266 devpriv->control_status + INT_ADCFIFO);
1267 spin_unlock_irqrestore(&dev->spinlock, flags);
1268
1269 /* set start trigger and burst mode */
1270 bits = 0;
1271 if (cmd->start_src == TRIG_NOW)
1272 bits |= SW_TRIGGER;
1273 else if (cmd->start_src == TRIG_EXT)
1274 bits |= EXT_TRIGGER | TGEN | XTRCL;
1275 else {
1276 comedi_error(dev, "bug!");
1277 return -1;
1278 }
1279 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1280 bits |= BURSTE;
1281 outw(bits, devpriv->control_status + TRIG_CONTSTAT);
1282 #ifdef CB_PCIDAS_DEBUG
1283 printk("comedi: sent 0x%x to trig control\n", bits);
1284 #endif
1285
1286 return 0;
1287 }
1288
1289 static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
1290 struct comedi_subdevice *s,
1291 struct comedi_cmd *cmd)
1292 {
1293 int err = 0;
1294 int tmp;
1295
1296 /* cmdtest tests a particular command to see if it is valid.
1297 * Using the cmdtest ioctl, a user can create a valid cmd
1298 * and then have it executes by the cmd ioctl.
1299 *
1300 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1301 * the command passes. */
1302
1303 /* step 1: make sure trigger sources are trivially valid */
1304
1305 tmp = cmd->start_src;
1306 cmd->start_src &= TRIG_INT;
1307 if (!cmd->start_src || tmp != cmd->start_src)
1308 err++;
1309
1310 tmp = cmd->scan_begin_src;
1311 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT;
1312 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1313 err++;
1314
1315 tmp = cmd->convert_src;
1316 cmd->convert_src &= TRIG_NOW;
1317 if (!cmd->convert_src || tmp != cmd->convert_src)
1318 err++;
1319
1320 tmp = cmd->scan_end_src;
1321 cmd->scan_end_src &= TRIG_COUNT;
1322 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1323 err++;
1324
1325 tmp = cmd->stop_src;
1326 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1327 if (!cmd->stop_src || tmp != cmd->stop_src)
1328 err++;
1329
1330 if (err)
1331 return 1;
1332
1333 /* step 2: make sure trigger sources are unique and mutually compatible */
1334
1335 if (cmd->scan_begin_src != TRIG_TIMER &&
1336 cmd->scan_begin_src != TRIG_EXT)
1337 err++;
1338 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1339 err++;
1340
1341 if (err)
1342 return 2;
1343
1344 /* step 3: make sure arguments are trivially compatible */
1345
1346 if (cmd->start_arg != 0) {
1347 cmd->start_arg = 0;
1348 err++;
1349 }
1350
1351 if (cmd->scan_begin_src == TRIG_TIMER) {
1352 if (cmd->scan_begin_arg < thisboard->ao_scan_speed) {
1353 cmd->scan_begin_arg = thisboard->ao_scan_speed;
1354 err++;
1355 }
1356 }
1357
1358 if (cmd->scan_end_arg != cmd->chanlist_len) {
1359 cmd->scan_end_arg = cmd->chanlist_len;
1360 err++;
1361 }
1362 if (cmd->stop_src == TRIG_NONE) {
1363 /* TRIG_NONE */
1364 if (cmd->stop_arg != 0) {
1365 cmd->stop_arg = 0;
1366 err++;
1367 }
1368 }
1369
1370 if (err)
1371 return 3;
1372
1373 /* step 4: fix up any arguments */
1374
1375 if (cmd->scan_begin_src == TRIG_TIMER) {
1376 tmp = cmd->scan_begin_arg;
1377 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1378 &(devpriv->ao_divisor1),
1379 &(devpriv->ao_divisor2),
1380 &(cmd->scan_begin_arg),
1381 cmd->flags & TRIG_ROUND_MASK);
1382 if (tmp != cmd->scan_begin_arg)
1383 err++;
1384 }
1385
1386 if (err)
1387 return 4;
1388
1389 /* check channel/gain list against card's limitations */
1390 if (cmd->chanlist && cmd->chanlist_len > 1) {
1391 if (CR_CHAN(cmd->chanlist[0]) != 0 ||
1392 CR_CHAN(cmd->chanlist[1]) != 1) {
1393 comedi_error(dev,
1394 "channels must be ordered channel 0, channel 1 in chanlist\n");
1395 err++;
1396 }
1397 }
1398
1399 if (err)
1400 return 5;
1401
1402 return 0;
1403 }
1404
1405 static int cb_pcidas_ao_cmd(struct comedi_device *dev,
1406 struct comedi_subdevice *s)
1407 {
1408 struct comedi_async *async = s->async;
1409 struct comedi_cmd *cmd = &async->cmd;
1410 unsigned int i;
1411 unsigned long flags;
1412
1413 /* set channel limits, gain */
1414 spin_lock_irqsave(&dev->spinlock, flags);
1415 for (i = 0; i < cmd->chanlist_len; i++) {
1416 /* enable channel */
1417 devpriv->ao_control_bits |=
1418 DAC_CHAN_EN(CR_CHAN(cmd->chanlist[i]));
1419 /* set range */
1420 devpriv->ao_control_bits |= DAC_RANGE(CR_CHAN(cmd->chanlist[i]),
1421 CR_RANGE(cmd->
1422 chanlist[i]));
1423 }
1424
1425 /* disable analog out before settings pacer source and count values */
1426 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1427 spin_unlock_irqrestore(&dev->spinlock, flags);
1428
1429 /* clear fifo */
1430 outw(0, devpriv->ao_registers + DACFIFOCLR);
1431
1432 /* load counters */
1433 if (cmd->scan_begin_src == TRIG_TIMER) {
1434 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1435 &(devpriv->ao_divisor1),
1436 &(devpriv->ao_divisor2),
1437 &(cmd->scan_begin_arg),
1438 cmd->flags);
1439
1440 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1441 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1,
1442 devpriv->ao_divisor1, 2);
1443 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 2,
1444 devpriv->ao_divisor2, 2);
1445 }
1446 /* set number of conversions */
1447 if (cmd->stop_src == TRIG_COUNT)
1448 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg;
1449 /* set pacer source */
1450 spin_lock_irqsave(&dev->spinlock, flags);
1451 switch (cmd->scan_begin_src) {
1452 case TRIG_TIMER:
1453 devpriv->ao_control_bits |= DAC_PACER_INT;
1454 break;
1455 case TRIG_EXT:
1456 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE;
1457 break;
1458 default:
1459 spin_unlock_irqrestore(&dev->spinlock, flags);
1460 comedi_error(dev, "error setting dac pacer source");
1461 return -1;
1462 break;
1463 }
1464 spin_unlock_irqrestore(&dev->spinlock, flags);
1465
1466 async->inttrig = cb_pcidas_ao_inttrig;
1467
1468 return 0;
1469 }
1470
1471 static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
1472 struct comedi_subdevice *s,
1473 unsigned int trig_num)
1474 {
1475 unsigned int num_bytes, num_points = thisboard->fifo_size;
1476 struct comedi_async *async = s->async;
1477 struct comedi_cmd *cmd = &s->async->cmd;
1478 unsigned long flags;
1479
1480 if (trig_num != 0)
1481 return -EINVAL;
1482
1483 /* load up fifo */
1484 if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count < num_points)
1485 num_points = devpriv->ao_count;
1486
1487 num_bytes = cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1488 num_points * sizeof(short));
1489 num_points = num_bytes / sizeof(short);
1490
1491 if (cmd->stop_src == TRIG_COUNT)
1492 devpriv->ao_count -= num_points;
1493 /* write data to board's fifo */
1494 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes);
1495
1496 /* enable dac half-full and empty interrupts */
1497 spin_lock_irqsave(&dev->spinlock, flags);
1498 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE;
1499 #ifdef CB_PCIDAS_DEBUG
1500 printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits);
1501 #endif
1502 /* enable and clear interrupts */
1503 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI,
1504 devpriv->control_status + INT_ADCFIFO);
1505
1506 /* start dac */
1507 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY;
1508 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1509 #ifdef CB_PCIDAS_DEBUG
1510 printk("comedi: sent 0x%x to dac control\n", devpriv->ao_control_bits);
1511 #endif
1512 spin_unlock_irqrestore(&dev->spinlock, flags);
1513
1514 async->inttrig = NULL;
1515
1516 return 0;
1517 }
1518
1519 static irqreturn_t cb_pcidas_interrupt(int irq, void *d)
1520 {
1521 struct comedi_device *dev = (struct comedi_device *)d;
1522 struct comedi_subdevice *s = dev->read_subdev;
1523 struct comedi_async *async;
1524 int status, s5933_status;
1525 int half_fifo = thisboard->fifo_size / 2;
1526 unsigned int num_samples, i;
1527 static const int timeout = 10000;
1528 unsigned long flags;
1529
1530 if (dev->attached == 0)
1531 return IRQ_NONE;
1532
1533 async = s->async;
1534 async->events = 0;
1535
1536 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1537 #ifdef CB_PCIDAS_DEBUG
1538 printk("intcsr 0x%x\n", s5933_status);
1539 printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF));
1540 #endif
1541
1542 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0)
1543 return IRQ_NONE;
1544
1545 /* make sure mailbox 4 is empty */
1546 inl_p(devpriv->s5933_config + AMCC_OP_REG_IMB4);
1547 /* clear interrupt on amcc s5933 */
1548 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
1549 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1550
1551 status = inw(devpriv->control_status + INT_ADCFIFO);
1552 #ifdef CB_PCIDAS_DEBUG
1553 if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0)
1554 comedi_error(dev, "spurious interrupt");
1555 #endif
1556
1557 /* check for analog output interrupt */
1558 if (status & (DAHFI | DAEMI))
1559 handle_ao_interrupt(dev, status);
1560 /* check for analog input interrupts */
1561 /* if fifo half-full */
1562 if (status & ADHFI) {
1563 /* read data */
1564 num_samples = half_fifo;
1565 if (async->cmd.stop_src == TRIG_COUNT &&
1566 num_samples > devpriv->count) {
1567 num_samples = devpriv->count;
1568 }
1569 insw(devpriv->adc_fifo + ADCDATA, devpriv->ai_buffer,
1570 num_samples);
1571 cfc_write_array_to_buffer(s, devpriv->ai_buffer,
1572 num_samples * sizeof(short));
1573 devpriv->count -= num_samples;
1574 if (async->cmd.stop_src == TRIG_COUNT && devpriv->count == 0) {
1575 async->events |= COMEDI_CB_EOA;
1576 cb_pcidas_cancel(dev, s);
1577 }
1578 /* clear half-full interrupt latch */
1579 spin_lock_irqsave(&dev->spinlock, flags);
1580 outw(devpriv->adc_fifo_bits | INT,
1581 devpriv->control_status + INT_ADCFIFO);
1582 spin_unlock_irqrestore(&dev->spinlock, flags);
1583 /* else if fifo not empty */
1584 } else if (status & (ADNEI | EOBI)) {
1585 for (i = 0; i < timeout; i++) {
1586 /* break if fifo is empty */
1587 if ((ADNE & inw(devpriv->control_status +
1588 INT_ADCFIFO)) == 0)
1589 break;
1590 cfc_write_to_buffer(s, inw(devpriv->adc_fifo));
1591 if (async->cmd.stop_src == TRIG_COUNT && --devpriv->count == 0) { /* end of acquisition */
1592 cb_pcidas_cancel(dev, s);
1593 async->events |= COMEDI_CB_EOA;
1594 break;
1595 }
1596 }
1597 /* clear not-empty interrupt latch */
1598 spin_lock_irqsave(&dev->spinlock, flags);
1599 outw(devpriv->adc_fifo_bits | INT,
1600 devpriv->control_status + INT_ADCFIFO);
1601 spin_unlock_irqrestore(&dev->spinlock, flags);
1602 } else if (status & EOAI) {
1603 comedi_error(dev,
1604 "bug! encountered end of aquisition interrupt?");
1605 /* clear EOA interrupt latch */
1606 spin_lock_irqsave(&dev->spinlock, flags);
1607 outw(devpriv->adc_fifo_bits | EOAI,
1608 devpriv->control_status + INT_ADCFIFO);
1609 spin_unlock_irqrestore(&dev->spinlock, flags);
1610 }
1611 /* check for fifo overflow */
1612 if (status & LADFUL) {
1613 comedi_error(dev, "fifo overflow");
1614 /* clear overflow interrupt latch */
1615 spin_lock_irqsave(&dev->spinlock, flags);
1616 outw(devpriv->adc_fifo_bits | LADFUL,
1617 devpriv->control_status + INT_ADCFIFO);
1618 spin_unlock_irqrestore(&dev->spinlock, flags);
1619 cb_pcidas_cancel(dev, s);
1620 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1621 }
1622
1623 comedi_event(dev, s);
1624
1625 return IRQ_HANDLED;
1626 }
1627
1628 static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status)
1629 {
1630 struct comedi_subdevice *s = dev->write_subdev;
1631 struct comedi_async *async = s->async;
1632 struct comedi_cmd *cmd = &async->cmd;
1633 unsigned int half_fifo = thisboard->fifo_size / 2;
1634 unsigned int num_points;
1635 unsigned long flags;
1636
1637 async->events = 0;
1638
1639 if (status & DAEMI) {
1640 /* clear dac empty interrupt latch */
1641 spin_lock_irqsave(&dev->spinlock, flags);
1642 outw(devpriv->adc_fifo_bits | DAEMI,
1643 devpriv->control_status + INT_ADCFIFO);
1644 spin_unlock_irqrestore(&dev->spinlock, flags);
1645 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) {
1646 if (cmd->stop_src == TRIG_NONE ||
1647 (cmd->stop_src == TRIG_COUNT
1648 && devpriv->ao_count)) {
1649 comedi_error(dev, "dac fifo underflow");
1650 cb_pcidas_ao_cancel(dev, s);
1651 async->events |= COMEDI_CB_ERROR;
1652 }
1653 async->events |= COMEDI_CB_EOA;
1654 }
1655 } else if (status & DAHFI) {
1656 unsigned int num_bytes;
1657
1658 /* figure out how many points we are writing to fifo */
1659 num_points = half_fifo;
1660 if (cmd->stop_src == TRIG_COUNT &&
1661 devpriv->ao_count < num_points)
1662 num_points = devpriv->ao_count;
1663 num_bytes =
1664 cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1665 num_points * sizeof(short));
1666 num_points = num_bytes / sizeof(short);
1667
1668 if (async->cmd.stop_src == TRIG_COUNT)
1669 devpriv->ao_count -= num_points;
1670 /* write data to board's fifo */
1671 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer,
1672 num_points);
1673 /* clear half-full interrupt latch */
1674 spin_lock_irqsave(&dev->spinlock, flags);
1675 outw(devpriv->adc_fifo_bits | DAHFI,
1676 devpriv->control_status + INT_ADCFIFO);
1677 spin_unlock_irqrestore(&dev->spinlock, flags);
1678 }
1679
1680 comedi_event(dev, s);
1681 }
1682
1683 /* cancel analog input command */
1684 static int cb_pcidas_cancel(struct comedi_device *dev,
1685 struct comedi_subdevice *s)
1686 {
1687 unsigned long flags;
1688
1689 spin_lock_irqsave(&dev->spinlock, flags);
1690 /* disable interrupts */
1691 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE;
1692 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1693 spin_unlock_irqrestore(&dev->spinlock, flags);
1694
1695 /* disable start trigger source and burst mode */
1696 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1697 /* software pacer source */
1698 outw(0, devpriv->control_status + ADCMUX_CONT);
1699
1700 return 0;
1701 }
1702
1703 /* cancel analog output command */
1704 static int cb_pcidas_ao_cancel(struct comedi_device *dev,
1705 struct comedi_subdevice *s)
1706 {
1707 unsigned long flags;
1708
1709 spin_lock_irqsave(&dev->spinlock, flags);
1710 /* disable interrupts */
1711 devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE;
1712 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1713
1714 /* disable output */
1715 devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK;
1716 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1717 spin_unlock_irqrestore(&dev->spinlock, flags);
1718
1719 return 0;
1720 }
1721
1722 static void cb_pcidas_load_counters(struct comedi_device *dev, unsigned int *ns,
1723 int rounding_flags)
1724 {
1725 i8253_cascade_ns_to_timer_2div(TIMER_BASE, &(devpriv->divisor1),
1726 &(devpriv->divisor2), ns,
1727 rounding_flags & TRIG_ROUND_MASK);
1728
1729 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1730 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1,
1731 devpriv->divisor1, 2);
1732 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 2,
1733 devpriv->divisor2, 2);
1734 }
1735
1736 static void write_calibration_bitstream(struct comedi_device *dev,
1737 unsigned int register_bits,
1738 unsigned int bitstream,
1739 unsigned int bitstream_length)
1740 {
1741 static const int write_delay = 1;
1742 unsigned int bit;
1743
1744 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
1745 if (bitstream & bit)
1746 register_bits |= SERIAL_DATA_IN_BIT;
1747 else
1748 register_bits &= ~SERIAL_DATA_IN_BIT;
1749 udelay(write_delay);
1750 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1751 }
1752 }
1753
1754 static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
1755 uint8_t value)
1756 {
1757 static const int num_caldac_channels = 8;
1758 static const int bitstream_length = 11;
1759 unsigned int bitstream = ((address & 0x7) << 8) | value;
1760 static const int caldac_8800_udelay = 1;
1761
1762 if (address >= num_caldac_channels) {
1763 comedi_error(dev, "illegal caldac channel");
1764 return -1;
1765 }
1766
1767 if (value == devpriv->caldac_value[address])
1768 return 1;
1769
1770 devpriv->caldac_value[address] = value;
1771
1772 write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream,
1773 bitstream_length);
1774
1775 udelay(caldac_8800_udelay);
1776 outw(cal_enable_bits(dev) | SELECT_8800_BIT,
1777 devpriv->control_status + CALIBRATION_REG);
1778 udelay(caldac_8800_udelay);
1779 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1780
1781 return 1;
1782 }
1783
1784 static int trimpot_7376_write(struct comedi_device *dev, uint8_t value)
1785 {
1786 static const int bitstream_length = 7;
1787 unsigned int bitstream = value & 0x7f;
1788 unsigned int register_bits;
1789 static const int ad7376_udelay = 1;
1790
1791 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1792 udelay(ad7376_udelay);
1793 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1794
1795 write_calibration_bitstream(dev, register_bits, bitstream,
1796 bitstream_length);
1797
1798 udelay(ad7376_udelay);
1799 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1800
1801 return 0;
1802 }
1803
1804 /* For 1602/16 only
1805 * ch 0 : adc gain
1806 * ch 1 : adc postgain offset */
1807 static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel,
1808 uint8_t value)
1809 {
1810 static const int bitstream_length = 10;
1811 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff);
1812 unsigned int register_bits;
1813 static const int ad8402_udelay = 1;
1814
1815 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1816 udelay(ad8402_udelay);
1817 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1818
1819 write_calibration_bitstream(dev, register_bits, bitstream,
1820 bitstream_length);
1821
1822 udelay(ad8402_udelay);
1823 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1824
1825 return 0;
1826 }
1827
1828 static int wait_for_nvram_ready(unsigned long s5933_base_addr)
1829 {
1830 static const int timeout = 1000;
1831 unsigned int i;
1832
1833 for (i = 0; i < timeout; i++) {
1834 if ((inb(s5933_base_addr +
1835 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY)
1836 == 0)
1837 return 0;
1838 udelay(1);
1839 }
1840 return -1;
1841 }
1842
1843 static int nvram_read(struct comedi_device *dev, unsigned int address,
1844 uint8_t *data)
1845 {
1846 unsigned long iobase = devpriv->s5933_config;
1847
1848 if (wait_for_nvram_ready(iobase) < 0)
1849 return -ETIMEDOUT;
1850
1851 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_LOW_ADDR,
1852 iobase + AMCC_OP_REG_MCSR_NVCMD);
1853 outb(address & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1854 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_HIGH_ADDR,
1855 iobase + AMCC_OP_REG_MCSR_NVCMD);
1856 outb((address >> 8) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1857 outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD);
1858
1859 if (wait_for_nvram_ready(iobase) < 0)
1860 return -ETIMEDOUT;
1861
1862 *data = inb(iobase + AMCC_OP_REG_MCSR_NVDATA);
1863
1864 return 0;
1865 }
1866
1867 /*
1868 * A convenient macro that defines init_module() and cleanup_module(),
1869 * as necessary.
1870 */
1871 static int __devinit driver_cb_pcidas_pci_probe(struct pci_dev *dev,
1872 const struct pci_device_id *ent)
1873 {
1874 return comedi_pci_auto_config(dev, driver_cb_pcidas.driver_name);
1875 }
1876
1877 static void __devexit driver_cb_pcidas_pci_remove(struct pci_dev *dev)
1878 {
1879 comedi_pci_auto_unconfig(dev);
1880 }
1881
1882 static struct pci_driver driver_cb_pcidas_pci_driver = {
1883 .id_table = cb_pcidas_pci_table,
1884 .probe = &driver_cb_pcidas_pci_probe,
1885 .remove = __devexit_p(&driver_cb_pcidas_pci_remove)
1886 };
1887
1888 static int __init driver_cb_pcidas_init_module(void)
1889 {
1890 int retval;
1891
1892 retval = comedi_driver_register(&driver_cb_pcidas);
1893 if (retval < 0)
1894 return retval;
1895
1896 driver_cb_pcidas_pci_driver.name = (char *)driver_cb_pcidas.driver_name;
1897 return pci_register_driver(&driver_cb_pcidas_pci_driver);
1898 }
1899
1900 static void __exit driver_cb_pcidas_cleanup_module(void)
1901 {
1902 pci_unregister_driver(&driver_cb_pcidas_pci_driver);
1903 comedi_driver_unregister(&driver_cb_pcidas);
1904 }
1905
1906 module_init(driver_cb_pcidas_init_module);
1907 module_exit(driver_cb_pcidas_cleanup_module);
1908
1909 MODULE_AUTHOR("Comedi http://www.comedi.org");
1910 MODULE_DESCRIPTION("Comedi low-level driver");
1911 MODULE_LICENSE("GPL");
Tomato firmware and modifications.