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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / serial / pxa.c
blob749c3bebe7b6f64b902113b017fd555f80cb8ed4
1 /*
2 * linux/drivers/serial/pxa.c
3 *
4 * Based on drivers/serial/8250.c by Russell King.
5 *
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
18 *
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
25 */
26
27
28 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
29 #define SUPPORT_SYSRQ
30 #endif
31
32 #include <linux/module.h>
33 #include <linux/ioport.h>
34 #include <linux/init.h>
35 #include <linux/console.h>
36 #include <linux/sysrq.h>
37 #include <linux/serial_reg.h>
38 #include <linux/circ_buf.h>
39 #include <linux/delay.h>
40 #include <linux/interrupt.h>
41 #include <linux/platform_device.h>
42 #include <linux/tty.h>
43 #include <linux/tty_flip.h>
44 #include <linux/serial_core.h>
45 #include <linux/clk.h>
46 #include <linux/io.h>
47 #include <linux/slab.h>
48
49 struct uart_pxa_port {
50 struct uart_port port;
51 unsigned char ier;
52 unsigned char lcr;
53 unsigned char mcr;
54 unsigned int lsr_break_flag;
55 struct clk *clk;
56 char *name;
57 };
58
59 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
60 {
61 offset <<= 2;
62 return readl(up->port.membase + offset);
63 }
64
65 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
66 {
67 offset <<= 2;
68 writel(value, up->port.membase + offset);
69 }
70
71 static void serial_pxa_enable_ms(struct uart_port *port)
72 {
73 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
74
75 up->ier |= UART_IER_MSI;
76 serial_out(up, UART_IER, up->ier);
77 }
78
79 static void serial_pxa_stop_tx(struct uart_port *port)
80 {
81 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
82
83 if (up->ier & UART_IER_THRI) {
84 up->ier &= ~UART_IER_THRI;
85 serial_out(up, UART_IER, up->ier);
86 }
87 }
88
89 static void serial_pxa_stop_rx(struct uart_port *port)
90 {
91 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
92
93 up->ier &= ~UART_IER_RLSI;
94 up->port.read_status_mask &= ~UART_LSR_DR;
95 serial_out(up, UART_IER, up->ier);
96 }
97
98 static inline void receive_chars(struct uart_pxa_port *up, int *status)
99 {
100 struct tty_struct *tty = up->port.state->port.tty;
101 unsigned int ch, flag;
102 int max_count = 256;
103
104 do {
105 ch = serial_in(up, UART_RX);
106 flag = TTY_NORMAL;
107 up->port.icount.rx++;
108
109 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
110 UART_LSR_FE | UART_LSR_OE))) {
111 /*
112 * For statistics only
113 */
114 if (*status & UART_LSR_BI) {
115 *status &= ~(UART_LSR_FE | UART_LSR_PE);
116 up->port.icount.brk++;
117 /*
118 * We do the SysRQ and SAK checking
119 * here because otherwise the break
120 * may get masked by ignore_status_mask
121 * or read_status_mask.
122 */
123 if (uart_handle_break(&up->port))
124 goto ignore_char;
125 } else if (*status & UART_LSR_PE)
126 up->port.icount.parity++;
127 else if (*status & UART_LSR_FE)
128 up->port.icount.frame++;
129 if (*status & UART_LSR_OE)
130 up->port.icount.overrun++;
131
132 /*
133 * Mask off conditions which should be ignored.
134 */
135 *status &= up->port.read_status_mask;
136
137 #ifdef CONFIG_SERIAL_PXA_CONSOLE
138 if (up->port.line == up->port.cons->index) {
139 /* Recover the break flag from console xmit */
140 *status |= up->lsr_break_flag;
141 up->lsr_break_flag = 0;
142 }
143 #endif
144 if (*status & UART_LSR_BI) {
145 flag = TTY_BREAK;
146 } else if (*status & UART_LSR_PE)
147 flag = TTY_PARITY;
148 else if (*status & UART_LSR_FE)
149 flag = TTY_FRAME;
150 }
151
152 if (uart_handle_sysrq_char(&up->port, ch))
153 goto ignore_char;
154
155 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
156
157 ignore_char:
158 *status = serial_in(up, UART_LSR);
159 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
160 tty_flip_buffer_push(tty);
161 }
162
163 static void transmit_chars(struct uart_pxa_port *up)
164 {
165 struct circ_buf *xmit = &up->port.state->xmit;
166 int count;
167
168 if (up->port.x_char) {
169 serial_out(up, UART_TX, up->port.x_char);
170 up->port.icount.tx++;
171 up->port.x_char = 0;
172 return;
173 }
174 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
175 serial_pxa_stop_tx(&up->port);
176 return;
177 }
178
179 count = up->port.fifosize / 2;
180 do {
181 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
182 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
183 up->port.icount.tx++;
184 if (uart_circ_empty(xmit))
185 break;
186 } while (--count > 0);
187
188 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
189 uart_write_wakeup(&up->port);
190
191
192 if (uart_circ_empty(xmit))
193 serial_pxa_stop_tx(&up->port);
194 }
195
196 static void serial_pxa_start_tx(struct uart_port *port)
197 {
198 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
199
200 if (!(up->ier & UART_IER_THRI)) {
201 up->ier |= UART_IER_THRI;
202 serial_out(up, UART_IER, up->ier);
203 }
204 }
205
206 static inline void check_modem_status(struct uart_pxa_port *up)
207 {
208 int status;
209
210 status = serial_in(up, UART_MSR);
211
212 if ((status & UART_MSR_ANY_DELTA) == 0)
213 return;
214
215 if (status & UART_MSR_TERI)
216 up->port.icount.rng++;
217 if (status & UART_MSR_DDSR)
218 up->port.icount.dsr++;
219 if (status & UART_MSR_DDCD)
220 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
221 if (status & UART_MSR_DCTS)
222 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
223
224 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
225 }
226
227 /*
228 * This handles the interrupt from one port.
229 */
230 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
231 {
232 struct uart_pxa_port *up = dev_id;
233 unsigned int iir, lsr;
234
235 iir = serial_in(up, UART_IIR);
236 if (iir & UART_IIR_NO_INT)
237 return IRQ_NONE;
238 lsr = serial_in(up, UART_LSR);
239 if (lsr & UART_LSR_DR)
240 receive_chars(up, &lsr);
241 check_modem_status(up);
242 if (lsr & UART_LSR_THRE)
243 transmit_chars(up);
244 return IRQ_HANDLED;
245 }
246
247 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
248 {
249 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
250 unsigned long flags;
251 unsigned int ret;
252
253 spin_lock_irqsave(&up->port.lock, flags);
254 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
255 spin_unlock_irqrestore(&up->port.lock, flags);
256
257 return ret;
258 }
259
260 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
261 {
262 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
263 unsigned char status;
264 unsigned int ret;
265
266 status = serial_in(up, UART_MSR);
267
268 ret = 0;
269 if (status & UART_MSR_DCD)
270 ret |= TIOCM_CAR;
271 if (status & UART_MSR_RI)
272 ret |= TIOCM_RNG;
273 if (status & UART_MSR_DSR)
274 ret |= TIOCM_DSR;
275 if (status & UART_MSR_CTS)
276 ret |= TIOCM_CTS;
277 return ret;
278 }
279
280 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
281 {
282 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
283 unsigned char mcr = 0;
284
285 if (mctrl & TIOCM_RTS)
286 mcr |= UART_MCR_RTS;
287 if (mctrl & TIOCM_DTR)
288 mcr |= UART_MCR_DTR;
289 if (mctrl & TIOCM_OUT1)
290 mcr |= UART_MCR_OUT1;
291 if (mctrl & TIOCM_OUT2)
292 mcr |= UART_MCR_OUT2;
293 if (mctrl & TIOCM_LOOP)
294 mcr |= UART_MCR_LOOP;
295
296 mcr |= up->mcr;
297
298 serial_out(up, UART_MCR, mcr);
299 }
300
301 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
302 {
303 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
304 unsigned long flags;
305
306 spin_lock_irqsave(&up->port.lock, flags);
307 if (break_state == -1)
308 up->lcr |= UART_LCR_SBC;
309 else
310 up->lcr &= ~UART_LCR_SBC;
311 serial_out(up, UART_LCR, up->lcr);
312 spin_unlock_irqrestore(&up->port.lock, flags);
313 }
314
315
316 static int serial_pxa_startup(struct uart_port *port)
317 {
318 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
319 unsigned long flags;
320 int retval;
321
322 if (port->line == 3) /* HWUART */
323 up->mcr |= UART_MCR_AFE;
324 else
325 up->mcr = 0;
326
327 up->port.uartclk = clk_get_rate(up->clk);
328
329 /*
330 * Allocate the IRQ
331 */
332 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
333 if (retval)
334 return retval;
335
336 /*
337 * Clear the FIFO buffers and disable them.
338 * (they will be reenabled in set_termios())
339 */
340 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
341 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
342 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
343 serial_out(up, UART_FCR, 0);
344
345 /*
346 * Clear the interrupt registers.
347 */
348 (void) serial_in(up, UART_LSR);
349 (void) serial_in(up, UART_RX);
350 (void) serial_in(up, UART_IIR);
351 (void) serial_in(up, UART_MSR);
352
353 /*
354 * Now, initialize the UART
355 */
356 serial_out(up, UART_LCR, UART_LCR_WLEN8);
357
358 spin_lock_irqsave(&up->port.lock, flags);
359 up->port.mctrl |= TIOCM_OUT2;
360 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
361 spin_unlock_irqrestore(&up->port.lock, flags);
362
363 /*
364 * Finally, enable interrupts. Note: Modem status interrupts
365 * are set via set_termios(), which will be occurring imminently
366 * anyway, so we don't enable them here.
367 */
368 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
369 serial_out(up, UART_IER, up->ier);
370
371 /*
372 * And clear the interrupt registers again for luck.
373 */
374 (void) serial_in(up, UART_LSR);
375 (void) serial_in(up, UART_RX);
376 (void) serial_in(up, UART_IIR);
377 (void) serial_in(up, UART_MSR);
378
379 return 0;
380 }
381
382 static void serial_pxa_shutdown(struct uart_port *port)
383 {
384 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
385 unsigned long flags;
386
387 free_irq(up->port.irq, up);
388
389 /*
390 * Disable interrupts from this port
391 */
392 up->ier = 0;
393 serial_out(up, UART_IER, 0);
394
395 spin_lock_irqsave(&up->port.lock, flags);
396 up->port.mctrl &= ~TIOCM_OUT2;
397 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
398 spin_unlock_irqrestore(&up->port.lock, flags);
399
400 /*
401 * Disable break condition and FIFOs
402 */
403 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
404 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
405 UART_FCR_CLEAR_RCVR |
406 UART_FCR_CLEAR_XMIT);
407 serial_out(up, UART_FCR, 0);
408 }
409
410 static void
411 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
412 struct ktermios *old)
413 {
414 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
415 unsigned char cval, fcr = 0;
416 unsigned long flags;
417 unsigned int baud, quot;
418 unsigned int dll;
419
420 switch (termios->c_cflag & CSIZE) {
421 case CS5:
422 cval = UART_LCR_WLEN5;
423 break;
424 case CS6:
425 cval = UART_LCR_WLEN6;
426 break;
427 case CS7:
428 cval = UART_LCR_WLEN7;
429 break;
430 default:
431 case CS8:
432 cval = UART_LCR_WLEN8;
433 break;
434 }
435
436 if (termios->c_cflag & CSTOPB)
437 cval |= UART_LCR_STOP;
438 if (termios->c_cflag & PARENB)
439 cval |= UART_LCR_PARITY;
440 if (!(termios->c_cflag & PARODD))
441 cval |= UART_LCR_EPAR;
442
443 /*
444 * Ask the core to calculate the divisor for us.
445 */
446 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
447 quot = uart_get_divisor(port, baud);
448
449 if ((up->port.uartclk / quot) < (2400 * 16))
450 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
451 else if ((up->port.uartclk / quot) < (230400 * 16))
452 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
453 else
454 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
455
456 /*
457 * Ok, we're now changing the port state. Do it with
458 * interrupts disabled.
459 */
460 spin_lock_irqsave(&up->port.lock, flags);
461
462 /*
463 * Ensure the port will be enabled.
464 * This is required especially for serial console.
465 */
466 up->ier |= UART_IER_UUE;
467
468 /*
469 * Update the per-port timeout.
470 */
471 uart_update_timeout(port, termios->c_cflag, baud);
472
473 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
474 if (termios->c_iflag & INPCK)
475 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
476 if (termios->c_iflag & (BRKINT | PARMRK))
477 up->port.read_status_mask |= UART_LSR_BI;
478
479 /*
480 * Characters to ignore
481 */
482 up->port.ignore_status_mask = 0;
483 if (termios->c_iflag & IGNPAR)
484 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
485 if (termios->c_iflag & IGNBRK) {
486 up->port.ignore_status_mask |= UART_LSR_BI;
487 /*
488 * If we're ignoring parity and break indicators,
489 * ignore overruns too (for real raw support).
490 */
491 if (termios->c_iflag & IGNPAR)
492 up->port.ignore_status_mask |= UART_LSR_OE;
493 }
494
495 /*
496 * ignore all characters if CREAD is not set
497 */
498 if ((termios->c_cflag & CREAD) == 0)
499 up->port.ignore_status_mask |= UART_LSR_DR;
500
501 /*
502 * CTS flow control flag and modem status interrupts
503 */
504 up->ier &= ~UART_IER_MSI;
505 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
506 up->ier |= UART_IER_MSI;
507
508 serial_out(up, UART_IER, up->ier);
509
510 if (termios->c_cflag & CRTSCTS)
511 up->mcr |= UART_MCR_AFE;
512 else
513 up->mcr &= ~UART_MCR_AFE;
514
515 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
516 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
517
518 dll = serial_in(up, UART_DLL);
519 WARN_ON(dll != (quot & 0xff));
520
521 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
522 serial_out(up, UART_LCR, cval); /* reset DLAB */
523 up->lcr = cval; /* Save LCR */
524 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
525 serial_out(up, UART_FCR, fcr);
526 spin_unlock_irqrestore(&up->port.lock, flags);
527 }
528
529 static void
530 serial_pxa_pm(struct uart_port *port, unsigned int state,
531 unsigned int oldstate)
532 {
533 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
534
535 if (!state)
536 clk_enable(up->clk);
537 else
538 clk_disable(up->clk);
539 }
540
541 static void serial_pxa_release_port(struct uart_port *port)
542 {
543 }
544
545 static int serial_pxa_request_port(struct uart_port *port)
546 {
547 return 0;
548 }
549
550 static void serial_pxa_config_port(struct uart_port *port, int flags)
551 {
552 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
553 up->port.type = PORT_PXA;
554 }
555
556 static int
557 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
558 {
559 /* we don't want the core code to modify any port params */
560 return -EINVAL;
561 }
562
563 static const char *
564 serial_pxa_type(struct uart_port *port)
565 {
566 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
567 return up->name;
568 }
569
570 static struct uart_pxa_port *serial_pxa_ports[4];
571 static struct uart_driver serial_pxa_reg;
572
573 #ifdef CONFIG_SERIAL_PXA_CONSOLE
574
575 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
576
577 /*
578 * Wait for transmitter & holding register to empty
579 */
580 static inline void wait_for_xmitr(struct uart_pxa_port *up)
581 {
582 unsigned int status, tmout = 10000;
583
584 /* Wait up to 10ms for the character(s) to be sent. */
585 do {
586 status = serial_in(up, UART_LSR);
587
588 if (status & UART_LSR_BI)
589 up->lsr_break_flag = UART_LSR_BI;
590
591 if (--tmout == 0)
592 break;
593 udelay(1);
594 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
595
596 /* Wait up to 1s for flow control if necessary */
597 if (up->port.flags & UPF_CONS_FLOW) {
598 tmout = 1000000;
599 while (--tmout &&
600 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
601 udelay(1);
602 }
603 }
604
605 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
606 {
607 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
608
609 wait_for_xmitr(up);
610 serial_out(up, UART_TX, ch);
611 }
612
613 /*
614 * Print a string to the serial port trying not to disturb
615 * any possible real use of the port...
616 *
617 * The console_lock must be held when we get here.
618 */
619 static void
620 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
621 {
622 struct uart_pxa_port *up = serial_pxa_ports[co->index];
623 unsigned int ier;
624
625 clk_enable(up->clk);
626
627 /*
628 * First save the IER then disable the interrupts
629 */
630 ier = serial_in(up, UART_IER);
631 serial_out(up, UART_IER, UART_IER_UUE);
632
633 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
634
635 /*
636 * Finally, wait for transmitter to become empty
637 * and restore the IER
638 */
639 wait_for_xmitr(up);
640 serial_out(up, UART_IER, ier);
641
642 clk_disable(up->clk);
643 }
644
645 static int __init
646 serial_pxa_console_setup(struct console *co, char *options)
647 {
648 struct uart_pxa_port *up;
649 int baud = 9600;
650 int bits = 8;
651 int parity = 'n';
652 int flow = 'n';
653
654 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
655 co->index = 0;
656 up = serial_pxa_ports[co->index];
657 if (!up)
658 return -ENODEV;
659
660 if (options)
661 uart_parse_options(options, &baud, &parity, &bits, &flow);
662
663 return uart_set_options(&up->port, co, baud, parity, bits, flow);
664 }
665
666 static struct console serial_pxa_console = {
667 .name = "ttyS",
668 .write = serial_pxa_console_write,
669 .device = uart_console_device,
670 .setup = serial_pxa_console_setup,
671 .flags = CON_PRINTBUFFER,
672 .index = -1,
673 .data = &serial_pxa_reg,
674 };
675
676 #define PXA_CONSOLE &serial_pxa_console
677 #else
678 #define PXA_CONSOLE NULL
679 #endif
680
681 struct uart_ops serial_pxa_pops = {
682 .tx_empty = serial_pxa_tx_empty,
683 .set_mctrl = serial_pxa_set_mctrl,
684 .get_mctrl = serial_pxa_get_mctrl,
685 .stop_tx = serial_pxa_stop_tx,
686 .start_tx = serial_pxa_start_tx,
687 .stop_rx = serial_pxa_stop_rx,
688 .enable_ms = serial_pxa_enable_ms,
689 .break_ctl = serial_pxa_break_ctl,
690 .startup = serial_pxa_startup,
691 .shutdown = serial_pxa_shutdown,
692 .set_termios = serial_pxa_set_termios,
693 .pm = serial_pxa_pm,
694 .type = serial_pxa_type,
695 .release_port = serial_pxa_release_port,
696 .request_port = serial_pxa_request_port,
697 .config_port = serial_pxa_config_port,
698 .verify_port = serial_pxa_verify_port,
699 };
700
701 static struct uart_driver serial_pxa_reg = {
702 .owner = THIS_MODULE,
703 .driver_name = "PXA serial",
704 .dev_name = "ttyS",
705 .major = TTY_MAJOR,
706 .minor = 64,
707 .nr = 4,
708 .cons = PXA_CONSOLE,
709 };
710
711 #ifdef CONFIG_PM
712 static int serial_pxa_suspend(struct device *dev)
713 {
714 struct uart_pxa_port *sport = dev_get_drvdata(dev);
715
716 if (sport)
717 uart_suspend_port(&serial_pxa_reg, &sport->port);
718
719 return 0;
720 }
721
722 static int serial_pxa_resume(struct device *dev)
723 {
724 struct uart_pxa_port *sport = dev_get_drvdata(dev);
725
726 if (sport)
727 uart_resume_port(&serial_pxa_reg, &sport->port);
728
729 return 0;
730 }
731
732 static const struct dev_pm_ops serial_pxa_pm_ops = {
733 .suspend = serial_pxa_suspend,
734 .resume = serial_pxa_resume,
735 };
736 #endif
737
738 static int serial_pxa_probe(struct platform_device *dev)
739 {
740 struct uart_pxa_port *sport;
741 struct resource *mmres, *irqres;
742 int ret;
743
744 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
745 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
746 if (!mmres || !irqres)
747 return -ENODEV;
748
749 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
750 if (!sport)
751 return -ENOMEM;
752
753 sport->clk = clk_get(&dev->dev, NULL);
754 if (IS_ERR(sport->clk)) {
755 ret = PTR_ERR(sport->clk);
756 goto err_free;
757 }
758
759 sport->port.type = PORT_PXA;
760 sport->port.iotype = UPIO_MEM;
761 sport->port.mapbase = mmres->start;
762 sport->port.irq = irqres->start;
763 sport->port.fifosize = 64;
764 sport->port.ops = &serial_pxa_pops;
765 sport->port.line = dev->id;
766 sport->port.dev = &dev->dev;
767 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
768 sport->port.uartclk = clk_get_rate(sport->clk);
769
770 switch (dev->id) {
771 case 0: sport->name = "FFUART"; break;
772 case 1: sport->name = "BTUART"; break;
773 case 2: sport->name = "STUART"; break;
774 case 3: sport->name = "HWUART"; break;
775 default:
776 sport->name = "???";
777 break;
778 }
779
780 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
781 if (!sport->port.membase) {
782 ret = -ENOMEM;
783 goto err_clk;
784 }
785
786 serial_pxa_ports[dev->id] = sport;
787
788 uart_add_one_port(&serial_pxa_reg, &sport->port);
789 platform_set_drvdata(dev, sport);
790
791 return 0;
792
793 err_clk:
794 clk_put(sport->clk);
795 err_free:
796 kfree(sport);
797 return ret;
798 }
799
800 static int serial_pxa_remove(struct platform_device *dev)
801 {
802 struct uart_pxa_port *sport = platform_get_drvdata(dev);
803
804 platform_set_drvdata(dev, NULL);
805
806 uart_remove_one_port(&serial_pxa_reg, &sport->port);
807 clk_put(sport->clk);
808 kfree(sport);
809
810 return 0;
811 }
812
813 static struct platform_driver serial_pxa_driver = {
814 .probe = serial_pxa_probe,
815 .remove = serial_pxa_remove,
816
817 .driver = {
818 .name = "pxa2xx-uart",
819 .owner = THIS_MODULE,
820 #ifdef CONFIG_PM
821 .pm = &serial_pxa_pm_ops,
822 #endif
823 },
824 };
825
826 int __init serial_pxa_init(void)
827 {
828 int ret;
829
830 ret = uart_register_driver(&serial_pxa_reg);
831 if (ret != 0)
832 return ret;
833
834 ret = platform_driver_register(&serial_pxa_driver);
835 if (ret != 0)
836 uart_unregister_driver(&serial_pxa_reg);
837
838 return ret;
839 }
840
841 void __exit serial_pxa_exit(void)
842 {
843 platform_driver_unregister(&serial_pxa_driver);
844 uart_unregister_driver(&serial_pxa_reg);
845 }
846
847 module_init(serial_pxa_init);
848 module_exit(serial_pxa_exit);
849
850 MODULE_LICENSE("GPL");
851 MODULE_ALIAS("platform:pxa2xx-uart");
Tomato firmware and modifications.