4 * Driver for M32R serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * A note about mapbase / membase
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/serial.h>
40 #include <linux/serialP.h>
41 #include <linux/delay.h>
47 #define PORT_M32R_BASE PORT_M32R_SIO
48 #define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
49 #define BAUD_RATE 115200
51 #include <linux/serial_core.h>
53 #include "m32r_sio_reg.h"
58 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
60 #define DEBUG_INTR(fmt...) do { } while (0)
62 #define PASS_LIMIT 256
65 * We default to IRQ0 for the "no irq" hack. Some
66 * machine types want others as well - they're free
67 * to redefine this in their header file.
69 #define is_real_interrupt(irq) ((irq) != 0)
71 #define BASE_BAUD 115200
73 /* Standard COM flags */
74 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
77 * SERIAL_PORT_DFNS tells us about built-in ports that have no
78 * standard enumeration mechanism. Platforms that can find all
79 * serial ports via mechanisms like ACPI or PCI need not supply it.
81 #if defined(CONFIG_PLAT_USRV)
83 #define SERIAL_PORT_DFNS \
84 /* UART CLK PORT IRQ FLAGS */ \
85 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
86 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
88 #else /* !CONFIG_PLAT_USRV */
90 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
91 #define SERIAL_PORT_DFNS \
92 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
93 STD_COM_FLAGS }, /* ttyS0 */
95 #define SERIAL_PORT_DFNS \
96 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
97 STD_COM_FLAGS }, /* ttyS0 */
100 #endif /* !CONFIG_PLAT_USRV */
102 static struct old_serial_port old_serial_port
[] = {
106 #define UART_NR ARRAY_SIZE(old_serial_port)
108 struct uart_sio_port
{
109 struct uart_port port
;
110 struct timer_list timer
; /* "no irq" timer */
111 struct list_head list
; /* ports on this IRQ */
116 unsigned char mcr_mask
; /* mask of user bits */
117 unsigned char mcr_force
; /* mask of forced bits */
118 unsigned char lsr_break_flag
;
121 * We provide a per-port pm hook.
123 void (*pm
)(struct uart_port
*port
,
124 unsigned int state
, unsigned int old
);
129 struct list_head
*head
;
132 static struct irq_info irq_lists
[NR_IRQS
];
135 * Here we define the default xmit fifo size used for each type of UART.
137 static const struct serial_uart_config uart_config
[] = {
140 .dfl_xmit_fifo_size
= 1,
143 [PORT_INDEX(PORT_M32R_SIO
)] = {
145 .dfl_xmit_fifo_size
= 1,
150 #ifdef CONFIG_SERIAL_M32R_PLDSIO
152 #define __sio_in(x) inw((unsigned long)(x))
153 #define __sio_out(v,x) outw((v),(unsigned long)(x))
155 static inline void sio_set_baud_rate(unsigned long baud
)
157 unsigned short sbaud
;
158 sbaud
= (boot_cpu_data
.bus_clock
/ (baud
* 4))-1;
159 __sio_out(sbaud
, PLD_ESIO0BAUR
);
162 static void sio_reset(void)
166 tmp
= __sio_in(PLD_ESIO0RXB
);
167 tmp
= __sio_in(PLD_ESIO0RXB
);
168 tmp
= __sio_in(PLD_ESIO0CR
);
169 sio_set_baud_rate(BAUD_RATE
);
170 __sio_out(0x0300, PLD_ESIO0CR
);
171 __sio_out(0x0003, PLD_ESIO0CR
);
174 static void sio_init(void)
178 tmp
= __sio_in(PLD_ESIO0RXB
);
179 tmp
= __sio_in(PLD_ESIO0RXB
);
180 tmp
= __sio_in(PLD_ESIO0CR
);
181 __sio_out(0x0300, PLD_ESIO0CR
);
182 __sio_out(0x0003, PLD_ESIO0CR
);
185 static void sio_error(int *status
)
187 printk("SIO0 error[%04x]\n", *status
);
190 } while ((*status
= __sio_in(PLD_ESIO0CR
)) != 3);
193 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
195 #define __sio_in(x) inl(x)
196 #define __sio_out(v,x) outl((v),(x))
198 static inline void sio_set_baud_rate(unsigned long baud
)
202 i
= boot_cpu_data
.bus_clock
/ (baud
* 16);
203 j
= (boot_cpu_data
.bus_clock
- (i
* baud
* 16)) / baud
;
207 __sio_out(i
, M32R_SIO0_BAUR_PORTL
);
208 __sio_out(j
, M32R_SIO0_RBAUR_PORTL
);
211 static void sio_reset(void)
213 __sio_out(0x00000300, M32R_SIO0_CR_PORTL
); /* init status */
214 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL
); /* 8bit */
215 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL
); /* 1stop non */
216 sio_set_baud_rate(BAUD_RATE
);
217 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL
);
218 __sio_out(0x00000003, M32R_SIO0_CR_PORTL
); /* RXCEN */
221 static void sio_init(void)
225 tmp
= __sio_in(M32R_SIO0_RXB_PORTL
);
226 tmp
= __sio_in(M32R_SIO0_RXB_PORTL
);
227 tmp
= __sio_in(M32R_SIO0_STS_PORTL
);
228 __sio_out(0x00000003, M32R_SIO0_CR_PORTL
);
231 static void sio_error(int *status
)
233 printk("SIO0 error[%04x]\n", *status
);
236 } while ((*status
= __sio_in(M32R_SIO0_CR_PORTL
)) != 3);
239 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
241 static unsigned int sio_in(struct uart_sio_port
*up
, int offset
)
243 return __sio_in(up
->port
.iobase
+ offset
);
246 static void sio_out(struct uart_sio_port
*up
, int offset
, int value
)
248 __sio_out(value
, up
->port
.iobase
+ offset
);
251 static unsigned int serial_in(struct uart_sio_port
*up
, int offset
)
256 return __sio_in(offset
);
259 static void serial_out(struct uart_sio_port
*up
, int offset
, int value
)
264 __sio_out(value
, offset
);
267 static void m32r_sio_stop_tx(struct uart_port
*port
)
269 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
271 if (up
->ier
& UART_IER_THRI
) {
272 up
->ier
&= ~UART_IER_THRI
;
273 serial_out(up
, UART_IER
, up
->ier
);
277 static void m32r_sio_start_tx(struct uart_port
*port
)
279 #ifdef CONFIG_SERIAL_M32R_PLDSIO
280 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
281 struct circ_buf
*xmit
= &up
->port
.state
->xmit
;
283 if (!(up
->ier
& UART_IER_THRI
)) {
284 up
->ier
|= UART_IER_THRI
;
285 serial_out(up
, UART_IER
, up
->ier
);
286 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
287 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
288 up
->port
.icount
.tx
++;
290 while((serial_in(up
, UART_LSR
) & UART_EMPTY
) != UART_EMPTY
);
292 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
294 if (!(up
->ier
& UART_IER_THRI
)) {
295 up
->ier
|= UART_IER_THRI
;
296 serial_out(up
, UART_IER
, up
->ier
);
301 static void m32r_sio_stop_rx(struct uart_port
*port
)
303 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
305 up
->ier
&= ~UART_IER_RLSI
;
306 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
307 serial_out(up
, UART_IER
, up
->ier
);
310 static void m32r_sio_enable_ms(struct uart_port
*port
)
312 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
314 up
->ier
|= UART_IER_MSI
;
315 serial_out(up
, UART_IER
, up
->ier
);
318 static void receive_chars(struct uart_sio_port
*up
, int *status
)
320 struct tty_struct
*tty
= up
->port
.state
->port
.tty
;
326 ch
= sio_in(up
, SIORXB
);
328 up
->port
.icount
.rx
++;
330 if (unlikely(*status
& (UART_LSR_BI
| UART_LSR_PE
|
331 UART_LSR_FE
| UART_LSR_OE
))) {
333 * For statistics only
335 if (*status
& UART_LSR_BI
) {
336 *status
&= ~(UART_LSR_FE
| UART_LSR_PE
);
337 up
->port
.icount
.brk
++;
339 * We do the SysRQ and SAK checking
340 * here because otherwise the break
341 * may get masked by ignore_status_mask
342 * or read_status_mask.
344 if (uart_handle_break(&up
->port
))
346 } else if (*status
& UART_LSR_PE
)
347 up
->port
.icount
.parity
++;
348 else if (*status
& UART_LSR_FE
)
349 up
->port
.icount
.frame
++;
350 if (*status
& UART_LSR_OE
)
351 up
->port
.icount
.overrun
++;
354 * Mask off conditions which should be ingored.
356 *status
&= up
->port
.read_status_mask
;
358 if (up
->port
.line
== up
->port
.cons
->index
) {
359 /* Recover the break flag from console xmit */
360 *status
|= up
->lsr_break_flag
;
361 up
->lsr_break_flag
= 0;
364 if (*status
& UART_LSR_BI
) {
365 DEBUG_INTR("handling break....");
367 } else if (*status
& UART_LSR_PE
)
369 else if (*status
& UART_LSR_FE
)
372 if (uart_handle_sysrq_char(&up
->port
, ch
))
374 if ((*status
& up
->port
.ignore_status_mask
) == 0)
375 tty_insert_flip_char(tty
, ch
, flag
);
377 if (*status
& UART_LSR_OE
) {
379 * Overrun is special, since it's reported
380 * immediately, and doesn't affect the current
383 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
386 *status
= serial_in(up
, UART_LSR
);
387 } while ((*status
& UART_LSR_DR
) && (max_count
-- > 0));
388 tty_flip_buffer_push(tty
);
391 static void transmit_chars(struct uart_sio_port
*up
)
393 struct circ_buf
*xmit
= &up
->port
.state
->xmit
;
396 if (up
->port
.x_char
) {
397 #ifndef CONFIG_SERIAL_M32R_PLDSIO
398 serial_out(up
, UART_TX
, up
->port
.x_char
);
400 up
->port
.icount
.tx
++;
404 if (uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
)) {
405 m32r_sio_stop_tx(&up
->port
);
409 count
= up
->port
.fifosize
;
411 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
412 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
413 up
->port
.icount
.tx
++;
414 if (uart_circ_empty(xmit
))
416 while (!(serial_in(up
, UART_LSR
) & UART_LSR_THRE
));
418 } while (--count
> 0);
420 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
421 uart_write_wakeup(&up
->port
);
423 DEBUG_INTR("THRE...");
425 if (uart_circ_empty(xmit
))
426 m32r_sio_stop_tx(&up
->port
);
430 * This handles the interrupt from one port.
432 static inline void m32r_sio_handle_port(struct uart_sio_port
*up
,
435 DEBUG_INTR("status = %x...", status
);
438 receive_chars(up
, &status
);
444 * This is the serial driver's interrupt routine.
446 * Arjan thinks the old way was overly complex, so it got simplified.
447 * Alan disagrees, saying that need the complexity to handle the weird
448 * nature of ISA shared interrupts. (This is a special exception.)
450 * In order to handle ISA shared interrupts properly, we need to check
451 * that all ports have been serviced, and therefore the ISA interrupt
452 * line has been de-asserted.
454 * This means we need to loop through all ports. checking that they
455 * don't have an interrupt pending.
457 static irqreturn_t
m32r_sio_interrupt(int irq
, void *dev_id
)
459 struct irq_info
*i
= dev_id
;
460 struct list_head
*l
, *end
= NULL
;
461 int pass_counter
= 0;
463 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq
);
465 #ifdef CONFIG_SERIAL_M32R_PLDSIO
466 // if (irq == PLD_IRQ_SIO0_SND)
467 // irq = PLD_IRQ_SIO0_RCV;
469 if (irq
== M32R_IRQ_SIO0_S
)
470 irq
= M32R_IRQ_SIO0_R
;
477 struct uart_sio_port
*up
;
480 up
= list_entry(l
, struct uart_sio_port
, list
);
482 sts
= sio_in(up
, SIOSTS
);
484 spin_lock(&up
->port
.lock
);
485 m32r_sio_handle_port(up
, sts
);
486 spin_unlock(&up
->port
.lock
);
489 } else if (end
== NULL
)
494 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
501 spin_unlock(&i
->lock
);
503 DEBUG_INTR("end.\n");
509 * To support ISA shared interrupts, we need to have one interrupt
510 * handler that ensures that the IRQ line has been deasserted
511 * before returning. Failing to do this will result in the IRQ
512 * line being stuck active, and, since ISA irqs are edge triggered,
513 * no more IRQs will be seen.
515 static void serial_do_unlink(struct irq_info
*i
, struct uart_sio_port
*up
)
517 spin_lock_irq(&i
->lock
);
519 if (!list_empty(i
->head
)) {
520 if (i
->head
== &up
->list
)
521 i
->head
= i
->head
->next
;
524 BUG_ON(i
->head
!= &up
->list
);
528 spin_unlock_irq(&i
->lock
);
531 static int serial_link_irq_chain(struct uart_sio_port
*up
)
533 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
534 int ret
, irq_flags
= 0;
536 spin_lock_irq(&i
->lock
);
539 list_add(&up
->list
, i
->head
);
540 spin_unlock_irq(&i
->lock
);
544 INIT_LIST_HEAD(&up
->list
);
546 spin_unlock_irq(&i
->lock
);
548 ret
= request_irq(up
->port
.irq
, m32r_sio_interrupt
,
549 irq_flags
, "SIO0-RX", i
);
550 ret
|= request_irq(up
->port
.irq
+ 1, m32r_sio_interrupt
,
551 irq_flags
, "SIO0-TX", i
);
553 serial_do_unlink(i
, up
);
559 static void serial_unlink_irq_chain(struct uart_sio_port
*up
)
561 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
563 BUG_ON(i
->head
== NULL
);
565 if (list_empty(i
->head
)) {
566 free_irq(up
->port
.irq
, i
);
567 free_irq(up
->port
.irq
+ 1, i
);
570 serial_do_unlink(i
, up
);
574 * This function is used to handle ports that do not have an interrupt.
576 static void m32r_sio_timeout(unsigned long data
)
578 struct uart_sio_port
*up
= (struct uart_sio_port
*)data
;
579 unsigned int timeout
;
582 sts
= sio_in(up
, SIOSTS
);
584 spin_lock(&up
->port
.lock
);
585 m32r_sio_handle_port(up
, sts
);
586 spin_unlock(&up
->port
.lock
);
589 timeout
= up
->port
.timeout
;
590 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
591 mod_timer(&up
->timer
, jiffies
+ timeout
);
594 static unsigned int m32r_sio_tx_empty(struct uart_port
*port
)
596 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
600 spin_lock_irqsave(&up
->port
.lock
, flags
);
601 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
602 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
607 static unsigned int m32r_sio_get_mctrl(struct uart_port
*port
)
612 static void m32r_sio_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
617 static void m32r_sio_break_ctl(struct uart_port
*port
, int break_state
)
622 static int m32r_sio_startup(struct uart_port
*port
)
624 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
630 * If the "interrupt" for this port doesn't correspond with any
631 * hardware interrupt, we use a timer-based system. The original
632 * driver used to do this with IRQ0.
634 if (!is_real_interrupt(up
->port
.irq
)) {
635 unsigned int timeout
= up
->port
.timeout
;
637 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
639 up
->timer
.data
= (unsigned long)up
;
640 mod_timer(&up
->timer
, jiffies
+ timeout
);
642 retval
= serial_link_irq_chain(up
);
648 * Finally, enable interrupts. Note: Modem status interrupts
649 * are set via set_termios(), which will be occurring imminently
650 * anyway, so we don't enable them here.
652 * - M32R_PLDSIO: 0x04
654 up
->ier
= UART_IER_MSI
| UART_IER_RLSI
| UART_IER_RDI
;
655 sio_out(up
, SIOTRCR
, up
->ier
);
658 * And clear the interrupt registers again for luck.
665 static void m32r_sio_shutdown(struct uart_port
*port
)
667 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
670 * Disable interrupts from this port
673 sio_out(up
, SIOTRCR
, 0);
676 * Disable break condition and FIFOs
681 if (!is_real_interrupt(up
->port
.irq
))
682 del_timer_sync(&up
->timer
);
684 serial_unlink_irq_chain(up
);
687 static unsigned int m32r_sio_get_divisor(struct uart_port
*port
,
690 return uart_get_divisor(port
, baud
);
693 static void m32r_sio_set_termios(struct uart_port
*port
,
694 struct ktermios
*termios
, struct ktermios
*old
)
696 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
697 unsigned char cval
= 0;
699 unsigned int baud
, quot
;
701 switch (termios
->c_cflag
& CSIZE
) {
703 cval
= UART_LCR_WLEN5
;
706 cval
= UART_LCR_WLEN6
;
709 cval
= UART_LCR_WLEN7
;
713 cval
= UART_LCR_WLEN8
;
717 if (termios
->c_cflag
& CSTOPB
)
718 cval
|= UART_LCR_STOP
;
719 if (termios
->c_cflag
& PARENB
)
720 cval
|= UART_LCR_PARITY
;
721 if (!(termios
->c_cflag
& PARODD
))
722 cval
|= UART_LCR_EPAR
;
724 if (termios
->c_cflag
& CMSPAR
)
725 cval
|= UART_LCR_SPAR
;
729 * Ask the core to calculate the divisor for us.
731 #ifdef CONFIG_SERIAL_M32R_PLDSIO
732 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/4);
734 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
736 quot
= m32r_sio_get_divisor(port
, baud
);
739 * Ok, we're now changing the port state. Do it with
740 * interrupts disabled.
742 spin_lock_irqsave(&up
->port
.lock
, flags
);
744 sio_set_baud_rate(baud
);
747 * Update the per-port timeout.
749 uart_update_timeout(port
, termios
->c_cflag
, baud
);
751 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
752 if (termios
->c_iflag
& INPCK
)
753 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
754 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
755 up
->port
.read_status_mask
|= UART_LSR_BI
;
758 * Characteres to ignore
760 up
->port
.ignore_status_mask
= 0;
761 if (termios
->c_iflag
& IGNPAR
)
762 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
763 if (termios
->c_iflag
& IGNBRK
) {
764 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
766 * If we're ignoring parity and break indicators,
767 * ignore overruns too (for real raw support).
769 if (termios
->c_iflag
& IGNPAR
)
770 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
774 * ignore all characters if CREAD is not set
776 if ((termios
->c_cflag
& CREAD
) == 0)
777 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
780 * CTS flow control flag and modem status interrupts
782 up
->ier
&= ~UART_IER_MSI
;
783 if (UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
784 up
->ier
|= UART_IER_MSI
;
786 serial_out(up
, UART_IER
, up
->ier
);
788 up
->lcr
= cval
; /* Save LCR */
789 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
792 static void m32r_sio_pm(struct uart_port
*port
, unsigned int state
,
793 unsigned int oldstate
)
795 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
798 up
->pm(port
, state
, oldstate
);
802 * Resource handling. This is complicated by the fact that resources
803 * depend on the port type. Maybe we should be claiming the standard
804 * 8250 ports, and then trying to get other resources as necessary?
807 m32r_sio_request_std_resource(struct uart_sio_port
*up
, struct resource
**res
)
809 unsigned int size
= 8 << up
->port
.regshift
;
810 #ifndef CONFIG_SERIAL_M32R_PLDSIO
815 switch (up
->port
.iotype
) {
817 if (up
->port
.mapbase
) {
818 #ifdef CONFIG_SERIAL_M32R_PLDSIO
819 *res
= request_mem_region(up
->port
.mapbase
, size
, "serial");
821 start
= up
->port
.mapbase
;
822 *res
= request_mem_region(start
, size
, "serial");
830 *res
= request_region(up
->port
.iobase
, size
, "serial");
838 static void m32r_sio_release_port(struct uart_port
*port
)
840 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
841 unsigned long start
, offset
= 0, size
= 0;
843 size
<<= up
->port
.regshift
;
845 switch (up
->port
.iotype
) {
847 if (up
->port
.mapbase
) {
851 iounmap(up
->port
.membase
);
852 up
->port
.membase
= NULL
;
854 start
= up
->port
.mapbase
;
857 release_mem_region(start
+ offset
, size
);
858 release_mem_region(start
, 8 << up
->port
.regshift
);
863 start
= up
->port
.iobase
;
866 release_region(start
+ offset
, size
);
867 release_region(start
+ offset
, 8 << up
->port
.regshift
);
875 static int m32r_sio_request_port(struct uart_port
*port
)
877 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
878 struct resource
*res
= NULL
;
881 ret
= m32r_sio_request_std_resource(up
, &res
);
884 * If we have a mapbase, then request that as well.
886 if (ret
== 0 && up
->port
.flags
& UPF_IOREMAP
) {
887 int size
= res
->end
- res
->start
+ 1;
889 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
890 if (!up
->port
.membase
)
896 release_resource(res
);
902 static void m32r_sio_config_port(struct uart_port
*port
, int flags
)
904 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
906 spin_lock_irqsave(&up
->port
.lock
, flags
);
908 up
->port
.type
= (PORT_M32R_SIO
- PORT_M32R_BASE
+ 1);
909 up
->port
.fifosize
= uart_config
[up
->port
.type
].dfl_xmit_fifo_size
;
911 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
915 m32r_sio_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
917 if (ser
->irq
>= nr_irqs
|| ser
->irq
< 0 ||
918 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
919 ser
->type
>= ARRAY_SIZE(uart_config
))
925 m32r_sio_type(struct uart_port
*port
)
927 int type
= port
->type
;
929 if (type
>= ARRAY_SIZE(uart_config
))
931 return uart_config
[type
].name
;
934 static struct uart_ops m32r_sio_pops
= {
935 .tx_empty
= m32r_sio_tx_empty
,
936 .set_mctrl
= m32r_sio_set_mctrl
,
937 .get_mctrl
= m32r_sio_get_mctrl
,
938 .stop_tx
= m32r_sio_stop_tx
,
939 .start_tx
= m32r_sio_start_tx
,
940 .stop_rx
= m32r_sio_stop_rx
,
941 .enable_ms
= m32r_sio_enable_ms
,
942 .break_ctl
= m32r_sio_break_ctl
,
943 .startup
= m32r_sio_startup
,
944 .shutdown
= m32r_sio_shutdown
,
945 .set_termios
= m32r_sio_set_termios
,
947 .type
= m32r_sio_type
,
948 .release_port
= m32r_sio_release_port
,
949 .request_port
= m32r_sio_request_port
,
950 .config_port
= m32r_sio_config_port
,
951 .verify_port
= m32r_sio_verify_port
,
954 static struct uart_sio_port m32r_sio_ports
[UART_NR
];
956 static void __init
m32r_sio_init_ports(void)
958 struct uart_sio_port
*up
;
959 static int first
= 1;
966 for (i
= 0, up
= m32r_sio_ports
; i
< ARRAY_SIZE(old_serial_port
);
968 up
->port
.iobase
= old_serial_port
[i
].port
;
969 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
970 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
971 up
->port
.flags
= old_serial_port
[i
].flags
;
972 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
973 up
->port
.iotype
= old_serial_port
[i
].io_type
;
974 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
975 up
->port
.ops
= &m32r_sio_pops
;
979 static void __init
m32r_sio_register_ports(struct uart_driver
*drv
)
983 m32r_sio_init_ports();
985 for (i
= 0; i
< UART_NR
; i
++) {
986 struct uart_sio_port
*up
= &m32r_sio_ports
[i
];
989 up
->port
.ops
= &m32r_sio_pops
;
990 init_timer(&up
->timer
);
991 up
->timer
.function
= m32r_sio_timeout
;
994 * ALPHA_KLUDGE_MCR needs to be killed.
996 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
997 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
999 uart_add_one_port(drv
, &up
->port
);
1003 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1006 * Wait for transmitter & holding register to empty
1008 static inline void wait_for_xmitr(struct uart_sio_port
*up
)
1010 unsigned int status
, tmout
= 10000;
1012 /* Wait up to 10ms for the character(s) to be sent. */
1014 status
= sio_in(up
, SIOSTS
);
1019 } while ((status
& UART_EMPTY
) != UART_EMPTY
);
1021 /* Wait up to 1s for flow control if necessary */
1022 if (up
->port
.flags
& UPF_CONS_FLOW
) {
1029 static void m32r_sio_console_putchar(struct uart_port
*port
, int ch
)
1031 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
1034 sio_out(up
, SIOTXB
, ch
);
1038 * Print a string to the serial port trying not to disturb
1039 * any possible real use of the port...
1041 * The console_lock must be held when we get here.
1043 static void m32r_sio_console_write(struct console
*co
, const char *s
,
1046 struct uart_sio_port
*up
= &m32r_sio_ports
[co
->index
];
1050 * First save the UER then disable the interrupts
1052 ier
= sio_in(up
, SIOTRCR
);
1053 sio_out(up
, SIOTRCR
, 0);
1055 uart_console_write(&up
->port
, s
, count
, m32r_sio_console_putchar
);
1058 * Finally, wait for transmitter to become empty
1059 * and restore the IER
1062 sio_out(up
, SIOTRCR
, ier
);
1065 static int __init
m32r_sio_console_setup(struct console
*co
, char *options
)
1067 struct uart_port
*port
;
1074 * Check whether an invalid uart number has been specified, and
1075 * if so, search for the first available port that does have
1078 if (co
->index
>= UART_NR
)
1080 port
= &m32r_sio_ports
[co
->index
].port
;
1085 spin_lock_init(&port
->lock
);
1088 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1090 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1093 static struct uart_driver m32r_sio_reg
;
1094 static struct console m32r_sio_console
= {
1096 .write
= m32r_sio_console_write
,
1097 .device
= uart_console_device
,
1098 .setup
= m32r_sio_console_setup
,
1099 .flags
= CON_PRINTBUFFER
,
1101 .data
= &m32r_sio_reg
,
1104 static int __init
m32r_sio_console_init(void)
1108 m32r_sio_init_ports();
1109 register_console(&m32r_sio_console
);
1112 console_initcall(m32r_sio_console_init
);
1114 #define M32R_SIO_CONSOLE &m32r_sio_console
1116 #define M32R_SIO_CONSOLE NULL
1119 static struct uart_driver m32r_sio_reg
= {
1120 .owner
= THIS_MODULE
,
1121 .driver_name
= "sio",
1126 .cons
= M32R_SIO_CONSOLE
,
1130 * m32r_sio_suspend_port - suspend one serial port
1131 * @line: serial line number
1133 * Suspend one serial port.
1135 void m32r_sio_suspend_port(int line
)
1137 uart_suspend_port(&m32r_sio_reg
, &m32r_sio_ports
[line
].port
);
1141 * m32r_sio_resume_port - resume one serial port
1142 * @line: serial line number
1144 * Resume one serial port.
1146 void m32r_sio_resume_port(int line
)
1148 uart_resume_port(&m32r_sio_reg
, &m32r_sio_ports
[line
].port
);
1151 static int __init
m32r_sio_init(void)
1155 printk(KERN_INFO
"Serial: M32R SIO driver\n");
1157 for (i
= 0; i
< nr_irqs
; i
++)
1158 spin_lock_init(&irq_lists
[i
].lock
);
1160 ret
= uart_register_driver(&m32r_sio_reg
);
1162 m32r_sio_register_ports(&m32r_sio_reg
);
1167 static void __exit
m32r_sio_exit(void)
1171 for (i
= 0; i
< UART_NR
; i
++)
1172 uart_remove_one_port(&m32r_sio_reg
, &m32r_sio_ports
[i
].port
);
1174 uart_unregister_driver(&m32r_sio_reg
);
1177 module_init(m32r_sio_init
);
1178 module_exit(m32r_sio_exit
);
1180 EXPORT_SYMBOL(m32r_sio_suspend_port
);
1181 EXPORT_SYMBOL(m32r_sio_resume_port
);
1183 MODULE_LICENSE("GPL");
1184 MODULE_DESCRIPTION("Generic M32R SIO serial driver");