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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / serial / 68360serial.c
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1 /*
2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
18 * This module exports the following rs232 io functions:
20 * int rs_360_init(void);
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/mm.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/irq.h>
41 #include <asm/m68360.h>
42 #include <asm/commproc.h>
45 #ifdef CONFIG_KGDB
46 extern void breakpoint(void);
47 extern void set_debug_traps(void);
48 extern int kgdb_output_string (const char* s, unsigned int count);
49 #endif
52 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
53 #include <linux/console.h>
54 #include <linux/jiffies.h>
56 /* this defines the index into rs_table for the port to use
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
65 #define TX_WAKEUP ASYNC_SHARE_IRQ
67 static char *serial_name = "CPM UART driver";
68 static char *serial_version = "0.03";
70 static struct tty_driver *serial_driver;
71 int serial_console_setup(struct console *co, char *options);
74 * Serial driver configuration section. Here are the various options:
76 #define SERIAL_PARANOIA_CHECK
77 #define CONFIG_SERIAL_NOPAUSE_IO
78 #define SERIAL_DO_RESTART
80 /* Set of debugging defines */
82 #undef SERIAL_DEBUG_INTR
83 #undef SERIAL_DEBUG_OPEN
84 #undef SERIAL_DEBUG_FLOW
85 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
87 #define _INLINE_ inline
89 #define DBG_CNT(s)
91 /* We overload some of the items in the data structure to meet our
92 * needs. For example, the port address is the CPM parameter ram
93 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
94 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
95 * a flag indicating SCC or SMC, and the number is used as an index into
96 * the CPM parameter area for this device.
97 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
98 * not currently used. I should probably use it to indicate the port
99 * type of SMC or SCC.
100 * The SMCs do not support any modem control signals.
102 #define smc_scc_num hub6
103 #define NUM_IS_SCC ((int)0x00010000)
104 #define PORT_NUM(P) ((P) & 0x0000ffff)
107 #if defined(CONFIG_UCQUICC)
109 volatile extern void *_periph_base;
110 /* sipex transceiver
111 * mode bits for are on pins
113 * SCC2 d16..19
114 * SCC3 d20..23
115 * SCC4 d24..27
117 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
119 static uint sipex_mode_bits = 0x00000000;
121 #endif
123 /* There is no `serial_state' defined back here in 2.0.
124 * Try to get by with serial_struct
126 /* #define serial_state serial_struct */
128 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
129 * extras: */
133 #define SSTATE_MAGIC 0x5302
137 /* SMC2 is sometimes used for low performance TDM interfaces. Define
138 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
139 * Define this as 0 if you wish to use SMC2 for something else.
141 #define USE_SMC2 1
145 /* Processors other than the 860 only get SMCs configured by default.
146 * Either they don't have SCCs or they are allocated somewhere else.
147 * Of course, there are now 860s without some SCCs, so we will need to
148 * address that someday.
149 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
150 * stereo codec parts, and we use SMC2 to help support that.
152 static struct serial_state rs_table[] = {
153 /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
154 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
155 #if USE_SMC2
156 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
157 #endif
159 #if defined(CONFIG_SERIAL_68360_SCC)
160 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
161 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
162 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
163 #endif
166 #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
168 /* The number of buffer descriptors and their sizes.
170 #define RX_NUM_FIFO 4
171 #define RX_BUF_SIZE 32
172 #define TX_NUM_FIFO 4
173 #define TX_BUF_SIZE 32
175 #define CONSOLE_NUM_FIFO 2
176 #define CONSOLE_BUF_SIZE 4
178 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
180 /* The async_struct in serial.h does not really give us what we
181 * need, so define our own here.
183 typedef struct serial_info {
184 int magic;
185 int flags;
187 struct serial_state *state;
188 /* struct serial_struct *state; */
189 /* struct async_struct *state; */
191 struct tty_struct *tty;
192 int read_status_mask;
193 int ignore_status_mask;
194 int timeout;
195 int line;
196 int x_char; /* xon/xoff character */
197 int close_delay;
198 unsigned short closing_wait;
199 unsigned short closing_wait2;
200 unsigned long event;
201 unsigned long last_active;
202 int blocked_open; /* # of blocked opens */
203 struct work_struct tqueue;
204 struct work_struct tqueue_hangup;
205 wait_queue_head_t open_wait;
206 wait_queue_head_t close_wait;
209 /* CPM Buffer Descriptor pointers.
211 QUICC_BD *rx_bd_base;
212 QUICC_BD *rx_cur;
213 QUICC_BD *tx_bd_base;
214 QUICC_BD *tx_cur;
215 } ser_info_t;
218 /* since kmalloc_init() does not get called until much after this initialization: */
219 static ser_info_t quicc_ser_info[NR_PORTS];
220 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
221 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
223 static void change_speed(ser_info_t *info);
224 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
226 static inline int serial_paranoia_check(ser_info_t *info,
227 char *name, const char *routine)
229 #ifdef SERIAL_PARANOIA_CHECK
230 static const char *badmagic =
231 "Warning: bad magic number for serial struct (%s) in %s\n";
232 static const char *badinfo =
233 "Warning: null async_struct for (%s) in %s\n";
235 if (!info) {
236 printk(badinfo, name, routine);
237 return 1;
239 if (info->magic != SERIAL_MAGIC) {
240 printk(badmagic, name, routine);
241 return 1;
243 #endif
244 return 0;
248 * This is used to figure out the divisor speeds and the timeouts,
249 * indexed by the termio value. The generic CPM functions are responsible
250 * for setting and assigning baud rate generators for us.
252 static int baud_table[] = {
253 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
254 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
256 /* This sucks. There is a better way: */
257 #if defined(CONFIG_CONSOLE_9600)
258 #define CONSOLE_BAUDRATE 9600
259 #elif defined(CONFIG_CONSOLE_19200)
260 #define CONSOLE_BAUDRATE 19200
261 #elif defined(CONFIG_CONSOLE_115200)
262 #define CONSOLE_BAUDRATE 115200
263 #else
264 #warning "console baud rate undefined"
265 #define CONSOLE_BAUDRATE 9600
266 #endif
269 * ------------------------------------------------------------
270 * rs_stop() and rs_start()
272 * This routines are called before setting or resetting tty->stopped.
273 * They enable or disable transmitter interrupts, as necessary.
274 * ------------------------------------------------------------
276 static void rs_360_stop(struct tty_struct *tty)
278 ser_info_t *info = (ser_info_t *)tty->driver_data;
279 int idx;
280 unsigned long flags;
281 volatile struct scc_regs *sccp;
282 volatile struct smc_regs *smcp;
284 if (serial_paranoia_check(info, tty->name, "rs_stop"))
285 return;
287 local_irq_save(flags);
288 idx = PORT_NUM(info->state->smc_scc_num);
289 if (info->state->smc_scc_num & NUM_IS_SCC) {
290 sccp = &pquicc->scc_regs[idx];
291 sccp->scc_sccm &= ~UART_SCCM_TX;
292 } else {
293 /* smcp = &cpmp->cp_smc[idx]; */
294 smcp = &pquicc->smc_regs[idx];
295 smcp->smc_smcm &= ~SMCM_TX;
297 local_irq_restore(flags);
301 static void rs_360_start(struct tty_struct *tty)
303 ser_info_t *info = (ser_info_t *)tty->driver_data;
304 int idx;
305 unsigned long flags;
306 volatile struct scc_regs *sccp;
307 volatile struct smc_regs *smcp;
309 if (serial_paranoia_check(info, tty->name, "rs_stop"))
310 return;
312 local_irq_save(flags);
313 idx = PORT_NUM(info->state->smc_scc_num);
314 if (info->state->smc_scc_num & NUM_IS_SCC) {
315 sccp = &pquicc->scc_regs[idx];
316 sccp->scc_sccm |= UART_SCCM_TX;
317 } else {
318 smcp = &pquicc->smc_regs[idx];
319 smcp->smc_smcm |= SMCM_TX;
321 local_irq_restore(flags);
325 * ----------------------------------------------------------------------
327 * Here starts the interrupt handling routines. All of the following
328 * subroutines are declared as inline and are folded into
329 * rs_interrupt(). They were separated out for readability's sake.
331 * Note: rs_interrupt() is a "fast" interrupt, which means that it
332 * runs with interrupts turned off. People who may want to modify
333 * rs_interrupt() should try to keep the interrupt handler as fast as
334 * possible. After you are done making modifications, it is not a bad
335 * idea to do:
337 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
339 * and look at the resulting assemble code in serial.s.
341 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
342 * -----------------------------------------------------------------------
345 static _INLINE_ void receive_chars(ser_info_t *info)
347 struct tty_struct *tty = info->port.tty;
348 unsigned char ch, flag, *cp;
349 /*int ignored = 0;*/
350 int i;
351 ushort status;
352 struct async_icount *icount;
353 /* struct async_icount_24 *icount; */
354 volatile QUICC_BD *bdp;
356 icount = &info->state->icount;
358 /* Just loop through the closed BDs and copy the characters into
359 * the buffer.
361 bdp = info->rx_cur;
362 for (;;) {
363 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
364 break; /* we are all done */
366 /* The read status mask tell us what we should do with
367 * incoming characters, especially if errors occur.
368 * One special case is the use of BD_SC_EMPTY. If
369 * this is not set, we are supposed to be ignoring
370 * inputs. In this case, just mark the buffer empty and
371 * continue.
373 if (!(info->read_status_mask & BD_SC_EMPTY)) {
374 bdp->status |= BD_SC_EMPTY;
375 bdp->status &=
376 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
378 if (bdp->status & BD_SC_WRAP)
379 bdp = info->rx_bd_base;
380 else
381 bdp++;
382 continue;
385 /* Get the number of characters and the buffer pointer.
387 i = bdp->length;
388 /* cp = (unsigned char *)__va(bdp->buf); */
389 cp = (char *)bdp->buf;
390 status = bdp->status;
392 while (i-- > 0) {
393 ch = *cp++;
394 icount->rx++;
396 #ifdef SERIAL_DEBUG_INTR
397 printk("DR%02x:%02x...", ch, status);
398 #endif
399 flag = TTY_NORMAL;
401 if (status & (BD_SC_BR | BD_SC_FR |
402 BD_SC_PR | BD_SC_OV)) {
404 * For statistics only
406 if (status & BD_SC_BR)
407 icount->brk++;
408 else if (status & BD_SC_PR)
409 icount->parity++;
410 else if (status & BD_SC_FR)
411 icount->frame++;
412 if (status & BD_SC_OV)
413 icount->overrun++;
416 * Now check to see if character should be
417 * ignored, and mask off conditions which
418 * should be ignored.
419 if (status & info->ignore_status_mask) {
420 if (++ignored > 100)
421 break;
422 continue;
425 status &= info->read_status_mask;
427 if (status & (BD_SC_BR)) {
428 #ifdef SERIAL_DEBUG_INTR
429 printk("handling break....");
430 #endif
431 *tty->flip.flag_buf_ptr = TTY_BREAK;
432 if (info->flags & ASYNC_SAK)
433 do_SAK(tty);
434 } else if (status & BD_SC_PR)
435 flag = TTY_PARITY;
436 else if (status & BD_SC_FR)
437 flag = TTY_FRAME;
439 tty_insert_flip_char(tty, ch, flag);
440 if (status & BD_SC_OV)
442 * Overrun is special, since it's
443 * reported immediately, and doesn't
444 * affect the current character
446 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
449 /* This BD is ready to be used again. Clear status.
450 * Get next BD.
452 bdp->status |= BD_SC_EMPTY;
453 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
455 if (bdp->status & BD_SC_WRAP)
456 bdp = info->rx_bd_base;
457 else
458 bdp++;
461 info->rx_cur = (QUICC_BD *)bdp;
463 tty_schedule_flip(tty);
466 static _INLINE_ void receive_break(ser_info_t *info)
468 struct tty_struct *tty = info->port.tty;
470 info->state->icount.brk++;
471 tty_insert_flip_char(tty, 0, TTY_BREAK);
472 tty_schedule_flip(tty);
475 static _INLINE_ void transmit_chars(ser_info_t *info)
478 if ((info->flags & TX_WAKEUP) ||
479 (info->port.tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
480 schedule_work(&info->tqueue);
483 #ifdef SERIAL_DEBUG_INTR
484 printk("THRE...");
485 #endif
488 #ifdef notdef
489 /* I need to do this for the SCCs, so it is left as a reminder.
491 static _INLINE_ void check_modem_status(struct async_struct *info)
493 int status;
494 /* struct async_icount *icount; */
495 struct async_icount_24 *icount;
497 status = serial_in(info, UART_MSR);
499 if (status & UART_MSR_ANY_DELTA) {
500 icount = &info->state->icount;
501 /* update input line counters */
502 if (status & UART_MSR_TERI)
503 icount->rng++;
504 if (status & UART_MSR_DDSR)
505 icount->dsr++;
506 if (status & UART_MSR_DDCD) {
507 icount->dcd++;
508 #ifdef CONFIG_HARD_PPS
509 if ((info->flags & ASYNC_HARDPPS_CD) &&
510 (status & UART_MSR_DCD))
511 hardpps();
512 #endif
514 if (status & UART_MSR_DCTS)
515 icount->cts++;
516 wake_up_interruptible(&info->delta_msr_wait);
519 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
520 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
521 printk("ttys%d CD now %s...", info->line,
522 (status & UART_MSR_DCD) ? "on" : "off");
523 #endif
524 if (status & UART_MSR_DCD)
525 wake_up_interruptible(&info->open_wait);
526 else {
527 #ifdef SERIAL_DEBUG_OPEN
528 printk("scheduling hangup...");
529 #endif
530 queue_task(&info->tqueue_hangup,
531 &tq_scheduler);
534 if (info->flags & ASYNC_CTS_FLOW) {
535 if (info->port.tty->hw_stopped) {
536 if (status & UART_MSR_CTS) {
537 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
538 printk("CTS tx start...");
539 #endif
540 info->port.tty->hw_stopped = 0;
541 info->IER |= UART_IER_THRI;
542 serial_out(info, UART_IER, info->IER);
543 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
544 return;
546 } else {
547 if (!(status & UART_MSR_CTS)) {
548 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
549 printk("CTS tx stop...");
550 #endif
551 info->port.tty->hw_stopped = 1;
552 info->IER &= ~UART_IER_THRI;
553 serial_out(info, UART_IER, info->IER);
558 #endif
561 * This is the serial driver's interrupt routine for a single port
563 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
564 static void rs_360_interrupt(int vec, void *dev_id)
566 u_char events;
567 int idx;
568 ser_info_t *info;
569 volatile struct smc_regs *smcp;
570 volatile struct scc_regs *sccp;
572 info = dev_id;
574 idx = PORT_NUM(info->state->smc_scc_num);
575 if (info->state->smc_scc_num & NUM_IS_SCC) {
576 sccp = &pquicc->scc_regs[idx];
577 events = sccp->scc_scce;
578 if (events & SCCM_RX)
579 receive_chars(info);
580 if (events & SCCM_TX)
581 transmit_chars(info);
582 sccp->scc_scce = events;
583 } else {
584 smcp = &pquicc->smc_regs[idx];
585 events = smcp->smc_smce;
586 if (events & SMCM_BRKE)
587 receive_break(info);
588 if (events & SMCM_RX)
589 receive_chars(info);
590 if (events & SMCM_TX)
591 transmit_chars(info);
592 smcp->smc_smce = events;
595 #ifdef SERIAL_DEBUG_INTR
596 printk("rs_interrupt_single(%d, %x)...",
597 info->state->smc_scc_num, events);
598 #endif
599 #ifdef modem_control
600 check_modem_status(info);
601 #endif
602 info->last_active = jiffies;
603 #ifdef SERIAL_DEBUG_INTR
604 printk("end.\n");
605 #endif
610 * -------------------------------------------------------------------
611 * Here ends the serial interrupt routines.
612 * -------------------------------------------------------------------
616 static void do_softint(void *private_)
618 ser_info_t *info = (ser_info_t *) private_;
619 struct tty_struct *tty;
621 tty = info->port.tty;
622 if (!tty)
623 return;
625 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
626 tty_wakeup(tty);
631 * This routine is called from the scheduler tqueue when the interrupt
632 * routine has signalled that a hangup has occurred. The path of
633 * hangup processing is:
635 * serial interrupt routine -> (scheduler tqueue) ->
636 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
639 static void do_serial_hangup(void *private_)
641 struct async_struct *info = (struct async_struct *) private_;
642 struct tty_struct *tty;
644 tty = info->port.tty;
645 if (!tty)
646 return;
648 tty_hangup(tty);
652 static int startup(ser_info_t *info)
654 unsigned long flags;
655 int retval=0;
656 int idx;
657 /*struct serial_state *state = info->state;*/
658 volatile struct smc_regs *smcp;
659 volatile struct scc_regs *sccp;
660 volatile struct smc_uart_pram *up;
661 volatile struct uart_pram *scup;
664 local_irq_save(flags);
666 if (info->flags & ASYNC_INITIALIZED) {
667 goto errout;
670 #ifdef maybe
671 if (!state->port || !state->type) {
672 if (info->port.tty)
673 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
674 goto errout;
676 #endif
678 #ifdef SERIAL_DEBUG_OPEN
679 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
680 #endif
683 #ifdef modem_control
684 info->MCR = 0;
685 if (info->port.tty->termios->c_cflag & CBAUD)
686 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
687 #endif
689 if (info->port.tty)
690 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
693 * and set the speed of the serial port
695 change_speed(info);
697 idx = PORT_NUM(info->state->smc_scc_num);
698 if (info->state->smc_scc_num & NUM_IS_SCC) {
699 sccp = &pquicc->scc_regs[idx];
700 scup = &pquicc->pram[info->state->port].scc.pscc.u;
702 scup->mrblr = RX_BUF_SIZE;
703 scup->max_idl = RX_BUF_SIZE;
705 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
706 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
708 } else {
709 smcp = &pquicc->smc_regs[idx];
711 /* Enable interrupts and I/O.
713 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
714 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
716 /* We can tune the buffer length and idle characters
717 * to take advantage of the entire incoming buffer size.
718 * If mrblr is something other than 1, maxidl has to be
719 * non-zero or we never get an interrupt. The maxidl
720 * is the number of character times we wait after reception
721 * of the last character before we decide no more characters
722 * are coming.
724 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
725 /* holy unionized structures, Batman: */
726 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
728 up->mrblr = RX_BUF_SIZE;
729 up->max_idl = RX_BUF_SIZE;
731 up->brkcr = 1; /* number of break chars */
734 info->flags |= ASYNC_INITIALIZED;
735 local_irq_restore(flags);
736 return 0;
738 errout:
739 local_irq_restore(flags);
740 return retval;
744 * This routine will shutdown a serial port; interrupts are disabled, and
745 * DTR is dropped if the hangup on close termio flag is on.
747 static void shutdown(ser_info_t *info)
749 unsigned long flags;
750 struct serial_state *state;
751 int idx;
752 volatile struct smc_regs *smcp;
753 volatile struct scc_regs *sccp;
755 if (!(info->flags & ASYNC_INITIALIZED))
756 return;
758 state = info->state;
760 #ifdef SERIAL_DEBUG_OPEN
761 printk("Shutting down serial port %d (irq %d)....", info->line,
762 state->irq);
763 #endif
765 local_irq_save(flags);
767 idx = PORT_NUM(state->smc_scc_num);
768 if (state->smc_scc_num & NUM_IS_SCC) {
769 sccp = &pquicc->scc_regs[idx];
770 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
771 #ifdef CONFIG_SERIAL_CONSOLE
772 /* We can't disable the transmitter if this is the
773 * system console.
775 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
776 #endif
777 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
778 } else {
779 smcp = &pquicc->smc_regs[idx];
781 /* Disable interrupts and I/O.
783 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
784 #ifdef CONFIG_SERIAL_CONSOLE
785 /* We can't disable the transmitter if this is the
786 * system console.
788 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
789 #endif
790 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
793 if (info->port.tty)
794 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
796 info->flags &= ~ASYNC_INITIALIZED;
797 local_irq_restore(flags);
801 * This routine is called to set the UART divisor registers to match
802 * the specified baud rate for a serial port.
804 static void change_speed(ser_info_t *info)
806 int baud_rate;
807 unsigned cflag, cval, scval, prev_mode;
808 int i, bits, sbits, idx;
809 unsigned long flags;
810 struct serial_state *state;
811 volatile struct smc_regs *smcp;
812 volatile struct scc_regs *sccp;
814 if (!info->port.tty || !info->port.tty->termios)
815 return;
816 cflag = info->port.tty->termios->c_cflag;
818 state = info->state;
820 /* Character length programmed into the mode register is the
821 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
822 * 1 or 2 stop bits, minus 1.
823 * The value 'bits' counts this for us.
825 cval = 0;
826 scval = 0;
828 /* byte size and parity */
829 switch (cflag & CSIZE) {
830 case CS5: bits = 5; break;
831 case CS6: bits = 6; break;
832 case CS7: bits = 7; break;
833 case CS8: bits = 8; break;
834 /* Never happens, but GCC is too dumb to figure it out */
835 default: bits = 8; break;
837 sbits = bits - 5;
839 if (cflag & CSTOPB) {
840 cval |= SMCMR_SL; /* Two stops */
841 scval |= SCU_PMSR_SL;
842 bits++;
844 if (cflag & PARENB) {
845 cval |= SMCMR_PEN;
846 scval |= SCU_PMSR_PEN;
847 bits++;
849 if (!(cflag & PARODD)) {
850 cval |= SMCMR_PM_EVEN;
851 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
854 /* Determine divisor based on baud rate */
855 i = cflag & CBAUD;
856 if (i >= (sizeof(baud_table)/sizeof(int)))
857 baud_rate = 9600;
858 else
859 baud_rate = baud_table[i];
861 info->timeout = (TX_BUF_SIZE*HZ*bits);
862 info->timeout += HZ/50; /* Add .02 seconds of slop */
864 #ifdef modem_control
865 /* CTS flow control flag and modem status interrupts */
866 info->IER &= ~UART_IER_MSI;
867 if (info->flags & ASYNC_HARDPPS_CD)
868 info->IER |= UART_IER_MSI;
869 if (cflag & CRTSCTS) {
870 info->flags |= ASYNC_CTS_FLOW;
871 info->IER |= UART_IER_MSI;
872 } else
873 info->flags &= ~ASYNC_CTS_FLOW;
874 if (cflag & CLOCAL)
875 info->flags &= ~ASYNC_CHECK_CD;
876 else {
877 info->flags |= ASYNC_CHECK_CD;
878 info->IER |= UART_IER_MSI;
880 serial_out(info, UART_IER, info->IER);
881 #endif
884 * Set up parity check flag
886 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
887 if (I_INPCK(info->port.tty))
888 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
889 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
890 info->read_status_mask |= BD_SC_BR;
893 * Characters to ignore
895 info->ignore_status_mask = 0;
896 if (I_IGNPAR(info->port.tty))
897 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
898 if (I_IGNBRK(info->port.tty)) {
899 info->ignore_status_mask |= BD_SC_BR;
901 * If we're ignore parity and break indicators, ignore
902 * overruns too. (For real raw support).
904 if (I_IGNPAR(info->port.tty))
905 info->ignore_status_mask |= BD_SC_OV;
908 * !!! ignore all characters if CREAD is not set
910 if ((cflag & CREAD) == 0)
911 info->read_status_mask &= ~BD_SC_EMPTY;
912 local_irq_save(flags);
914 /* Start bit has not been added (so don't, because we would just
915 * subtract it later), and we need to add one for the number of
916 * stops bits (there is always at least one).
918 bits++;
919 idx = PORT_NUM(state->smc_scc_num);
920 if (state->smc_scc_num & NUM_IS_SCC) {
921 sccp = &pquicc->scc_regs[idx];
922 sccp->scc_psmr = (sbits << 12) | scval;
923 } else {
924 smcp = &pquicc->smc_regs[idx];
926 /* Set the mode register. We want to keep a copy of the
927 * enables, because we want to put them back if they were
928 * present.
930 prev_mode = smcp->smc_smcmr;
931 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
932 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
935 m360_cpm_setbrg((state - rs_table), baud_rate);
937 local_irq_restore(flags);
940 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
942 ser_info_t *info = (ser_info_t *)tty->driver_data;
943 volatile QUICC_BD *bdp;
945 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
946 return 0;
948 if (!tty)
949 return 0;
951 bdp = info->tx_cur;
952 while (bdp->status & BD_SC_READY);
954 /* *((char *)__va(bdp->buf)) = ch; */
955 *((char *)bdp->buf) = ch;
956 bdp->length = 1;
957 bdp->status |= BD_SC_READY;
959 /* Get next BD.
961 if (bdp->status & BD_SC_WRAP)
962 bdp = info->tx_bd_base;
963 else
964 bdp++;
966 info->tx_cur = (QUICC_BD *)bdp;
967 return 1;
971 static int rs_360_write(struct tty_struct * tty,
972 const unsigned char *buf, int count)
974 int c, ret = 0;
975 ser_info_t *info = (ser_info_t *)tty->driver_data;
976 volatile QUICC_BD *bdp;
978 #ifdef CONFIG_KGDB
979 /* Try to let stub handle output. Returns true if it did. */
980 if (kgdb_output_string(buf, count))
981 return ret;
982 #endif
984 if (serial_paranoia_check(info, tty->name, "rs_write"))
985 return 0;
987 if (!tty)
988 return 0;
990 bdp = info->tx_cur;
992 while (1) {
993 c = min(count, TX_BUF_SIZE);
995 if (c <= 0)
996 break;
998 if (bdp->status & BD_SC_READY) {
999 info->flags |= TX_WAKEUP;
1000 break;
1003 /* memcpy(__va(bdp->buf), buf, c); */
1004 memcpy((void *)bdp->buf, buf, c);
1006 bdp->length = c;
1007 bdp->status |= BD_SC_READY;
1009 buf += c;
1010 count -= c;
1011 ret += c;
1013 /* Get next BD.
1015 if (bdp->status & BD_SC_WRAP)
1016 bdp = info->tx_bd_base;
1017 else
1018 bdp++;
1019 info->tx_cur = (QUICC_BD *)bdp;
1021 return ret;
1024 static int rs_360_write_room(struct tty_struct *tty)
1026 ser_info_t *info = (ser_info_t *)tty->driver_data;
1027 int ret;
1029 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1030 return 0;
1032 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1033 info->flags &= ~TX_WAKEUP;
1034 ret = TX_BUF_SIZE;
1036 else {
1037 info->flags |= TX_WAKEUP;
1038 ret = 0;
1040 return ret;
1043 /* I could track this with transmit counters....maybe later.
1045 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1047 ser_info_t *info = (ser_info_t *)tty->driver_data;
1049 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1050 return 0;
1051 return 0;
1054 static void rs_360_flush_buffer(struct tty_struct *tty)
1056 ser_info_t *info = (ser_info_t *)tty->driver_data;
1058 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1059 return;
1061 /* There is nothing to "flush", whatever we gave the CPM
1062 * is on its way out.
1064 tty_wakeup(tty);
1065 info->flags &= ~TX_WAKEUP;
1069 * This function is used to send a high-priority XON/XOFF character to
1070 * the device
1072 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1074 volatile QUICC_BD *bdp;
1076 ser_info_t *info = (ser_info_t *)tty->driver_data;
1078 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1079 return;
1081 bdp = info->tx_cur;
1082 while (bdp->status & BD_SC_READY);
1084 /* *((char *)__va(bdp->buf)) = ch; */
1085 *((char *)bdp->buf) = ch;
1086 bdp->length = 1;
1087 bdp->status |= BD_SC_READY;
1089 /* Get next BD.
1091 if (bdp->status & BD_SC_WRAP)
1092 bdp = info->tx_bd_base;
1093 else
1094 bdp++;
1096 info->tx_cur = (QUICC_BD *)bdp;
1100 * ------------------------------------------------------------
1101 * rs_throttle()
1103 * This routine is called by the upper-layer tty layer to signal that
1104 * incoming characters should be throttled.
1105 * ------------------------------------------------------------
1107 static void rs_360_throttle(struct tty_struct * tty)
1109 ser_info_t *info = (ser_info_t *)tty->driver_data;
1110 #ifdef SERIAL_DEBUG_THROTTLE
1111 char buf[64];
1113 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1114 tty->ldisc.chars_in_buffer(tty));
1115 #endif
1117 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1118 return;
1120 if (I_IXOFF(tty))
1121 rs_360_send_xchar(tty, STOP_CHAR(tty));
1123 #ifdef modem_control
1124 if (tty->termios->c_cflag & CRTSCTS)
1125 info->MCR &= ~UART_MCR_RTS;
1127 local_irq_disable();
1128 serial_out(info, UART_MCR, info->MCR);
1129 local_irq_enable();
1130 #endif
1133 static void rs_360_unthrottle(struct tty_struct * tty)
1135 ser_info_t *info = (ser_info_t *)tty->driver_data;
1136 #ifdef SERIAL_DEBUG_THROTTLE
1137 char buf[64];
1139 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1140 tty->ldisc.chars_in_buffer(tty));
1141 #endif
1143 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1144 return;
1146 if (I_IXOFF(tty)) {
1147 if (info->x_char)
1148 info->x_char = 0;
1149 else
1150 rs_360_send_xchar(tty, START_CHAR(tty));
1152 #ifdef modem_control
1153 if (tty->termios->c_cflag & CRTSCTS)
1154 info->MCR |= UART_MCR_RTS;
1155 local_irq_disable();
1156 serial_out(info, UART_MCR, info->MCR);
1157 local_irq_enable();
1158 #endif
1162 * ------------------------------------------------------------
1163 * rs_ioctl() and friends
1164 * ------------------------------------------------------------
1167 #ifdef maybe
1169 * get_lsr_info - get line status register info
1171 * Purpose: Let user call ioctl() to get info when the UART physically
1172 * is emptied. On bus types like RS485, the transmitter must
1173 * release the bus after transmitting. This must be done when
1174 * the transmit shift register is empty, not be done when the
1175 * transmit holding register is empty. This functionality
1176 * allows an RS485 driver to be written in user space.
1178 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1180 unsigned char status;
1181 unsigned int result;
1183 local_irq_disable();
1184 status = serial_in(info, UART_LSR);
1185 local_irq_enable();
1186 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1187 return put_user(result,value);
1189 #endif
1191 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1193 ser_info_t *info = (ser_info_t *)tty->driver_data;
1194 unsigned int result = 0;
1195 #ifdef modem_control
1196 unsigned char control, status;
1198 if (serial_paranoia_check(info, tty->name, __func__))
1199 return -ENODEV;
1201 if (tty->flags & (1 << TTY_IO_ERROR))
1202 return -EIO;
1204 control = info->MCR;
1205 local_irq_disable();
1206 status = serial_in(info, UART_MSR);
1207 local_irq_enable();
1208 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1209 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1210 #ifdef TIOCM_OUT1
1211 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1212 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1213 #endif
1214 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1215 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1216 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1217 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1218 #endif
1219 return result;
1222 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1223 unsigned int set, unsigned int clear)
1225 #ifdef modem_control
1226 ser_info_t *info = (ser_info_t *)tty->driver_data;
1227 unsigned int arg;
1229 if (serial_paranoia_check(info, tty->name, __func__))
1230 return -ENODEV;
1232 if (tty->flags & (1 << TTY_IO_ERROR))
1233 return -EIO;
1234 if (set & TIOCM_RTS)
1235 info->mcr |= UART_MCR_RTS;
1236 if (set & TIOCM_DTR)
1237 info->mcr |= UART_MCR_DTR;
1238 if (clear & TIOCM_RTS)
1239 info->MCR &= ~UART_MCR_RTS;
1240 if (clear & TIOCM_DTR)
1241 info->MCR &= ~UART_MCR_DTR;
1243 #ifdef TIOCM_OUT1
1244 if (set & TIOCM_OUT1)
1245 info->MCR |= UART_MCR_OUT1;
1246 if (set & TIOCM_OUT2)
1247 info->MCR |= UART_MCR_OUT2;
1248 if (clear & TIOCM_OUT1)
1249 info->MCR &= ~UART_MCR_OUT1;
1250 if (clear & TIOCM_OUT2)
1251 info->MCR &= ~UART_MCR_OUT2;
1252 #endif
1254 local_irq_disable();
1255 serial_out(info, UART_MCR, info->MCR);
1256 local_irq_enable();
1257 #endif
1258 return 0;
1261 /* Sending a break is a two step process on the SMC/SCC. It is accomplished
1262 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1263 * command. We take advantage of the begin/end functions to make this
1264 * happen.
1266 static ushort smc_chan_map[] = {
1267 CPM_CR_CH_SMC1,
1268 CPM_CR_CH_SMC2
1271 static ushort scc_chan_map[] = {
1272 CPM_CR_CH_SCC1,
1273 CPM_CR_CH_SCC2,
1274 CPM_CR_CH_SCC3,
1275 CPM_CR_CH_SCC4
1278 static void begin_break(ser_info_t *info)
1280 volatile QUICC *cp;
1281 ushort chan;
1282 int idx;
1284 cp = pquicc;
1286 idx = PORT_NUM(info->state->smc_scc_num);
1287 if (info->state->smc_scc_num & NUM_IS_SCC)
1288 chan = scc_chan_map[idx];
1289 else
1290 chan = smc_chan_map[idx];
1292 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1293 while (cp->cp_cr & CPM_CR_FLG);
1296 static void end_break(ser_info_t *info)
1298 volatile QUICC *cp;
1299 ushort chan;
1300 int idx;
1302 cp = pquicc;
1304 idx = PORT_NUM(info->state->smc_scc_num);
1305 if (info->state->smc_scc_num & NUM_IS_SCC)
1306 chan = scc_chan_map[idx];
1307 else
1308 chan = smc_chan_map[idx];
1310 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1311 while (cp->cp_cr & CPM_CR_FLG);
1315 * This routine sends a break character out the serial port.
1317 static void send_break(ser_info_t *info, unsigned int duration)
1319 #ifdef SERIAL_DEBUG_SEND_BREAK
1320 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1321 #endif
1322 begin_break(info);
1323 msleep_interruptible(duration);
1324 end_break(info);
1325 #ifdef SERIAL_DEBUG_SEND_BREAK
1326 printk("done jiffies=%lu\n", jiffies);
1327 #endif
1331 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1332 unsigned int cmd, unsigned long arg)
1334 int error;
1335 ser_info_t *info = (ser_info_t *)tty->driver_data;
1336 int retval;
1337 struct async_icount cnow;
1338 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1339 struct serial_icounter_struct *p_cuser; /* user space */
1341 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1342 return -ENODEV;
1344 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1345 if (tty->flags & (1 << TTY_IO_ERROR))
1346 return -EIO;
1349 switch (cmd) {
1350 case TCSBRK: /* SVID version: non-zero arg --> no break */
1351 retval = tty_check_change(tty);
1352 if (retval)
1353 return retval;
1354 tty_wait_until_sent(tty, 0);
1355 if (signal_pending(current))
1356 return -EINTR;
1357 if (!arg) {
1358 send_break(info, 250); /* 1/4 second */
1359 if (signal_pending(current))
1360 return -EINTR;
1362 return 0;
1363 case TCSBRKP: /* support for POSIX tcsendbreak() */
1364 retval = tty_check_change(tty);
1365 if (retval)
1366 return retval;
1367 tty_wait_until_sent(tty, 0);
1368 if (signal_pending(current))
1369 return -EINTR;
1370 send_break(info, arg ? arg*100 : 250);
1371 if (signal_pending(current))
1372 return -EINTR;
1373 return 0;
1374 case TIOCSBRK:
1375 retval = tty_check_change(tty);
1376 if (retval)
1377 return retval;
1378 tty_wait_until_sent(tty, 0);
1379 begin_break(info);
1380 return 0;
1381 case TIOCCBRK:
1382 retval = tty_check_change(tty);
1383 if (retval)
1384 return retval;
1385 end_break(info);
1386 return 0;
1387 #ifdef maybe
1388 case TIOCSERGETLSR: /* Get line status register */
1389 return get_lsr_info(info, (unsigned int *) arg);
1390 #endif
1392 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1393 * - mask passed in arg for lines of interest
1394 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1395 * Caller should use TIOCGICOUNT to see which one it was
1397 case TIOCMIWAIT:
1398 #ifdef modem_control
1399 local_irq_disable();
1400 /* note the counters on entry */
1401 cprev = info->state->icount;
1402 local_irq_enable();
1403 while (1) {
1404 interruptible_sleep_on(&info->delta_msr_wait);
1405 /* see if a signal did it */
1406 if (signal_pending(current))
1407 return -ERESTARTSYS;
1408 local_irq_disable();
1409 cnow = info->state->icount; /* atomic copy */
1410 local_irq_enable();
1411 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1412 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1413 return -EIO; /* no change => error */
1414 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1415 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1416 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1417 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1418 return 0;
1420 cprev = cnow;
1422 /* NOTREACHED */
1423 #else
1424 return 0;
1425 #endif
1428 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1429 * Return: write counters to the user passed counter struct
1430 * NB: both 1->0 and 0->1 transitions are counted except for
1431 * RI where only 0->1 is counted.
1433 case TIOCGICOUNT:
1434 local_irq_disable();
1435 cnow = info->state->icount;
1436 local_irq_enable();
1437 p_cuser = (struct serial_icounter_struct *) arg;
1438 /* error = put_user(cnow.cts, &p_cuser->cts); */
1439 /* if (error) return error; */
1440 /* error = put_user(cnow.dsr, &p_cuser->dsr); */
1441 /* if (error) return error; */
1442 /* error = put_user(cnow.rng, &p_cuser->rng); */
1443 /* if (error) return error; */
1444 /* error = put_user(cnow.dcd, &p_cuser->dcd); */
1445 /* if (error) return error; */
1447 put_user(cnow.cts, &p_cuser->cts);
1448 put_user(cnow.dsr, &p_cuser->dsr);
1449 put_user(cnow.rng, &p_cuser->rng);
1450 put_user(cnow.dcd, &p_cuser->dcd);
1451 return 0;
1453 default:
1454 return -ENOIOCTLCMD;
1456 return 0;
1459 /* FIX UP modem control here someday......
1461 static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1463 ser_info_t *info = (ser_info_t *)tty->driver_data;
1465 change_speed(info);
1467 #ifdef modem_control
1468 /* Handle transition to B0 status */
1469 if ((old_termios->c_cflag & CBAUD) &&
1470 !(tty->termios->c_cflag & CBAUD)) {
1471 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1472 local_irq_disable();
1473 serial_out(info, UART_MCR, info->MCR);
1474 local_irq_enable();
1477 /* Handle transition away from B0 status */
1478 if (!(old_termios->c_cflag & CBAUD) &&
1479 (tty->termios->c_cflag & CBAUD)) {
1480 info->MCR |= UART_MCR_DTR;
1481 if (!tty->hw_stopped ||
1482 !(tty->termios->c_cflag & CRTSCTS)) {
1483 info->MCR |= UART_MCR_RTS;
1485 local_irq_disable();
1486 serial_out(info, UART_MCR, info->MCR);
1487 local_irq_enable();
1490 /* Handle turning off CRTSCTS */
1491 if ((old_termios->c_cflag & CRTSCTS) &&
1492 !(tty->termios->c_cflag & CRTSCTS)) {
1493 tty->hw_stopped = 0;
1494 rs_360_start(tty);
1496 #endif
1501 * ------------------------------------------------------------
1502 * rs_close()
1504 * This routine is called when the serial port gets closed. First, we
1505 * wait for the last remaining data to be sent. Then, we unlink its
1506 * async structure from the interrupt chain if necessary, and we free
1507 * that IRQ if nothing is left in the chain.
1508 * ------------------------------------------------------------
1510 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1512 ser_info_t *info = (ser_info_t *)tty->driver_data;
1513 /* struct async_state *state; */
1514 struct serial_state *state;
1515 unsigned long flags;
1516 int idx;
1517 volatile struct smc_regs *smcp;
1518 volatile struct scc_regs *sccp;
1520 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1521 return;
1523 state = info->state;
1525 local_irq_save(flags);
1527 if (tty_hung_up_p(filp)) {
1528 DBG_CNT("before DEC-hung");
1529 local_irq_restore(flags);
1530 return;
1533 #ifdef SERIAL_DEBUG_OPEN
1534 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1535 #endif
1536 if ((tty->count == 1) && (state->count != 1)) {
1538 * Uh, oh. tty->count is 1, which means that the tty
1539 * structure will be freed. state->count should always
1540 * be one in these conditions. If it's greater than
1541 * one, we've got real problems, since it means the
1542 * serial port won't be shutdown.
1544 printk("rs_close: bad serial port count; tty->count is 1, "
1545 "state->count is %d\n", state->count);
1546 state->count = 1;
1548 if (--state->count < 0) {
1549 printk("rs_close: bad serial port count for ttys%d: %d\n",
1550 info->line, state->count);
1551 state->count = 0;
1553 if (state->count) {
1554 DBG_CNT("before DEC-2");
1555 local_irq_restore(flags);
1556 return;
1558 info->flags |= ASYNC_CLOSING;
1560 * Now we wait for the transmit buffer to clear; and we notify
1561 * the line discipline to only process XON/XOFF characters.
1563 tty->closing = 1;
1564 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1565 tty_wait_until_sent(tty, info->closing_wait);
1567 * At this point we stop accepting input. To do this, we
1568 * disable the receive line status interrupts, and tell the
1569 * interrupt driver to stop checking the data ready bit in the
1570 * line status register.
1572 info->read_status_mask &= ~BD_SC_EMPTY;
1573 if (info->flags & ASYNC_INITIALIZED) {
1575 idx = PORT_NUM(info->state->smc_scc_num);
1576 if (info->state->smc_scc_num & NUM_IS_SCC) {
1577 sccp = &pquicc->scc_regs[idx];
1578 sccp->scc_sccm &= ~UART_SCCM_RX;
1579 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1580 } else {
1581 smcp = &pquicc->smc_regs[idx];
1582 smcp->smc_smcm &= ~SMCM_RX;
1583 smcp->smc_smcmr &= ~SMCMR_REN;
1586 * Before we drop DTR, make sure the UART transmitter
1587 * has completely drained; this is especially
1588 * important if there is a transmit FIFO!
1590 rs_360_wait_until_sent(tty, info->timeout);
1592 shutdown(info);
1593 rs_360_flush_buffer(tty);
1594 tty_ldisc_flush(tty);
1595 tty->closing = 0;
1596 info->event = 0;
1597 info->port.tty = NULL;
1598 if (info->blocked_open) {
1599 if (info->close_delay) {
1600 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1602 wake_up_interruptible(&info->open_wait);
1604 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1605 wake_up_interruptible(&info->close_wait);
1606 local_irq_restore(flags);
1610 * rs_wait_until_sent() --- wait until the transmitter is empty
1612 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1614 ser_info_t *info = (ser_info_t *)tty->driver_data;
1615 unsigned long orig_jiffies, char_time;
1616 /*int lsr;*/
1617 volatile QUICC_BD *bdp;
1619 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1620 return;
1622 #ifdef maybe
1623 if (info->state->type == PORT_UNKNOWN)
1624 return;
1625 #endif
1627 orig_jiffies = jiffies;
1629 * Set the check interval to be 1/5 of the estimated time to
1630 * send a single character, and make it at least 1. The check
1631 * interval should also be less than the timeout.
1633 * Note: we have to use pretty tight timings here to satisfy
1634 * the NIST-PCTS.
1636 char_time = 1;
1637 if (timeout)
1638 char_time = min(char_time, (unsigned long)timeout);
1639 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1640 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1641 printk("jiff=%lu...", jiffies);
1642 #endif
1644 /* We go through the loop at least once because we can't tell
1645 * exactly when the last character exits the shifter. There can
1646 * be at least two characters waiting to be sent after the buffers
1647 * are empty.
1649 do {
1650 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1651 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1652 #endif
1653 /* current->counter = 0; make us low-priority */
1654 msleep_interruptible(jiffies_to_msecs(char_time));
1655 if (signal_pending(current))
1656 break;
1657 if (timeout && (time_after(jiffies, orig_jiffies + timeout)))
1658 break;
1659 /* The 'tx_cur' is really the next buffer to send. We
1660 * have to back up to the previous BD and wait for it
1661 * to go. This isn't perfect, because all this indicates
1662 * is the buffer is available. There are still characters
1663 * in the CPM FIFO.
1665 bdp = info->tx_cur;
1666 if (bdp == info->tx_bd_base)
1667 bdp += (TX_NUM_FIFO-1);
1668 else
1669 bdp--;
1670 } while (bdp->status & BD_SC_READY);
1671 current->state = TASK_RUNNING;
1672 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1673 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1674 #endif
1678 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1680 static void rs_360_hangup(struct tty_struct *tty)
1682 ser_info_t *info = (ser_info_t *)tty->driver_data;
1683 struct serial_state *state = info->state;
1685 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1686 return;
1688 state = info->state;
1690 rs_360_flush_buffer(tty);
1691 shutdown(info);
1692 info->event = 0;
1693 state->count = 0;
1694 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1695 info->port.tty = NULL;
1696 wake_up_interruptible(&info->open_wait);
1700 * ------------------------------------------------------------
1701 * rs_open() and friends
1702 * ------------------------------------------------------------
1704 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1705 ser_info_t *info)
1707 #ifdef DO_THIS_LATER
1708 DECLARE_WAITQUEUE(wait, current);
1709 #endif
1710 struct serial_state *state = info->state;
1711 int retval;
1712 int do_clocal = 0;
1715 * If the device is in the middle of being closed, then block
1716 * until it's done, and then try again.
1718 if (tty_hung_up_p(filp) ||
1719 (info->flags & ASYNC_CLOSING)) {
1720 if (info->flags & ASYNC_CLOSING)
1721 interruptible_sleep_on(&info->close_wait);
1722 #ifdef SERIAL_DO_RESTART
1723 if (info->flags & ASYNC_HUP_NOTIFY)
1724 return -EAGAIN;
1725 else
1726 return -ERESTARTSYS;
1727 #else
1728 return -EAGAIN;
1729 #endif
1733 * If non-blocking mode is set, or the port is not enabled,
1734 * then make the check up front and then exit.
1735 * If this is an SMC port, we don't have modem control to wait
1736 * for, so just get out here.
1738 if ((filp->f_flags & O_NONBLOCK) ||
1739 (tty->flags & (1 << TTY_IO_ERROR)) ||
1740 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1741 info->flags |= ASYNC_NORMAL_ACTIVE;
1742 return 0;
1745 if (tty->termios->c_cflag & CLOCAL)
1746 do_clocal = 1;
1749 * Block waiting for the carrier detect and the line to become
1750 * free (i.e., not in use by the callout). While we are in
1751 * this loop, state->count is dropped by one, so that
1752 * rs_close() knows when to free things. We restore it upon
1753 * exit, either normal or abnormal.
1755 retval = 0;
1756 #ifdef DO_THIS_LATER
1757 add_wait_queue(&info->open_wait, &wait);
1758 #ifdef SERIAL_DEBUG_OPEN
1759 printk("block_til_ready before block: ttys%d, count = %d\n",
1760 state->line, state->count);
1761 #endif
1762 local_irq_disable();
1763 if (!tty_hung_up_p(filp))
1764 state->count--;
1765 local_irq_enable();
1766 info->blocked_open++;
1767 while (1) {
1768 local_irq_disable();
1769 if (tty->termios->c_cflag & CBAUD)
1770 serial_out(info, UART_MCR,
1771 serial_inp(info, UART_MCR) |
1772 (UART_MCR_DTR | UART_MCR_RTS));
1773 local_irq_enable();
1774 set_current_state(TASK_INTERRUPTIBLE);
1775 if (tty_hung_up_p(filp) ||
1776 !(info->flags & ASYNC_INITIALIZED)) {
1777 #ifdef SERIAL_DO_RESTART
1778 if (info->flags & ASYNC_HUP_NOTIFY)
1779 retval = -EAGAIN;
1780 else
1781 retval = -ERESTARTSYS;
1782 #else
1783 retval = -EAGAIN;
1784 #endif
1785 break;
1787 if (!(info->flags & ASYNC_CLOSING) &&
1788 (do_clocal || (serial_in(info, UART_MSR) &
1789 UART_MSR_DCD)))
1790 break;
1791 if (signal_pending(current)) {
1792 retval = -ERESTARTSYS;
1793 break;
1795 #ifdef SERIAL_DEBUG_OPEN
1796 printk("block_til_ready blocking: ttys%d, count = %d\n",
1797 info->line, state->count);
1798 #endif
1799 tty_unlock();
1800 schedule();
1801 tty_lock();
1803 current->state = TASK_RUNNING;
1804 remove_wait_queue(&info->open_wait, &wait);
1805 if (!tty_hung_up_p(filp))
1806 state->count++;
1807 info->blocked_open--;
1808 #ifdef SERIAL_DEBUG_OPEN
1809 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1810 info->line, state->count);
1811 #endif
1812 #endif /* DO_THIS_LATER */
1813 if (retval)
1814 return retval;
1815 info->flags |= ASYNC_NORMAL_ACTIVE;
1816 return 0;
1819 static int get_async_struct(int line, ser_info_t **ret_info)
1821 struct serial_state *sstate;
1823 sstate = rs_table + line;
1824 if (sstate->info) {
1825 sstate->count++;
1826 *ret_info = (ser_info_t *)sstate->info;
1827 return 0;
1829 else {
1830 return -ENOMEM;
1835 * This routine is called whenever a serial port is opened. It
1836 * enables interrupts for a serial port, linking in its async structure into
1837 * the IRQ chain. It also performs the serial-specific
1838 * initialization for the tty structure.
1840 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1842 ser_info_t *info;
1843 int retval, line;
1845 line = tty->index;
1846 if ((line < 0) || (line >= NR_PORTS))
1847 return -ENODEV;
1848 retval = get_async_struct(line, &info);
1849 if (retval)
1850 return retval;
1851 if (serial_paranoia_check(info, tty->name, "rs_open"))
1852 return -ENODEV;
1854 #ifdef SERIAL_DEBUG_OPEN
1855 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1856 #endif
1857 tty->driver_data = info;
1858 info->port.tty = tty;
1861 * Start up serial port
1863 retval = startup(info);
1864 if (retval)
1865 return retval;
1867 retval = block_til_ready(tty, filp, info);
1868 if (retval) {
1869 #ifdef SERIAL_DEBUG_OPEN
1870 printk("rs_open returning after block_til_ready with %d\n",
1871 retval);
1872 #endif
1873 return retval;
1876 #ifdef SERIAL_DEBUG_OPEN
1877 printk("rs_open %s successful...", tty->name);
1878 #endif
1879 return 0;
1883 * /proc fs routines....
1886 static inline int line_info(char *buf, struct serial_state *state)
1888 #ifdef notdef
1889 struct async_struct *info = state->info, scr_info;
1890 char stat_buf[30], control, status;
1891 #endif
1892 int ret;
1894 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1895 state->line,
1896 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1897 (unsigned int)(state->port), state->irq);
1899 if (!state->port || (state->type == PORT_UNKNOWN)) {
1900 ret += sprintf(buf+ret, "\n");
1901 return ret;
1904 #ifdef notdef
1906 * Figure out the current RS-232 lines
1908 if (!info) {
1909 info = &scr_info; /* This is just for serial_{in,out} */
1911 info->magic = SERIAL_MAGIC;
1912 info->port = state->port;
1913 info->flags = state->flags;
1914 info->quot = 0;
1915 info->port.tty = NULL;
1917 local_irq_disable();
1918 status = serial_in(info, UART_MSR);
1919 control = info ? info->MCR : serial_in(info, UART_MCR);
1920 local_irq_enable();
1922 stat_buf[0] = 0;
1923 stat_buf[1] = 0;
1924 if (control & UART_MCR_RTS)
1925 strcat(stat_buf, "|RTS");
1926 if (status & UART_MSR_CTS)
1927 strcat(stat_buf, "|CTS");
1928 if (control & UART_MCR_DTR)
1929 strcat(stat_buf, "|DTR");
1930 if (status & UART_MSR_DSR)
1931 strcat(stat_buf, "|DSR");
1932 if (status & UART_MSR_DCD)
1933 strcat(stat_buf, "|CD");
1934 if (status & UART_MSR_RI)
1935 strcat(stat_buf, "|RI");
1937 if (info->quot) {
1938 ret += sprintf(buf+ret, " baud:%d",
1939 state->baud_base / info->quot);
1942 ret += sprintf(buf+ret, " tx:%d rx:%d",
1943 state->icount.tx, state->icount.rx);
1945 if (state->icount.frame)
1946 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
1948 if (state->icount.parity)
1949 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
1951 if (state->icount.brk)
1952 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
1954 if (state->icount.overrun)
1955 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
1958 * Last thing is the RS-232 status lines
1960 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
1961 #endif
1962 return ret;
1965 int rs_360_read_proc(char *page, char **start, off_t off, int count,
1966 int *eof, void *data)
1968 int i, len = 0;
1969 off_t begin = 0;
1971 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
1972 for (i = 0; i < NR_PORTS && len < 4000; i++) {
1973 len += line_info(page + len, &rs_table[i]);
1974 if (len+begin > off+count)
1975 goto done;
1976 if (len+begin < off) {
1977 begin += len;
1978 len = 0;
1981 *eof = 1;
1982 done:
1983 if (off >= len+begin)
1984 return 0;
1985 *start = page + (begin-off);
1986 return ((count < begin+len-off) ? count : begin+len-off);
1990 * ---------------------------------------------------------------------
1991 * rs_init() and friends
1993 * rs_init() is called at boot-time to initialize the serial driver.
1994 * ---------------------------------------------------------------------
1998 * This routine prints out the appropriate serial driver version
1999 * number, and identifies which options were configured into this
2000 * driver.
2002 static _INLINE_ void show_serial_version(void)
2004 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2009 * The serial console driver used during boot. Note that these names
2010 * clash with those found in "serial.c", so we currently can't support
2011 * the 16xxx uarts and these at the same time. I will fix this to become
2012 * an indirect function call from tty_io.c (or something).
2015 #ifdef CONFIG_SERIAL_CONSOLE
2018 * Print a string to the serial port trying not to disturb any possible
2019 * real use of the port...
2021 static void my_console_write(int idx, const char *s,
2022 unsigned count)
2024 struct serial_state *ser;
2025 ser_info_t *info;
2026 unsigned i;
2027 QUICC_BD *bdp, *bdbase;
2028 volatile struct smc_uart_pram *up;
2029 volatile u_char *cp;
2031 ser = rs_table + idx;
2034 /* If the port has been initialized for general use, we have
2035 * to use the buffer descriptors allocated there. Otherwise,
2036 * we simply use the single buffer allocated.
2038 if ((info = (ser_info_t *)ser->info) != NULL) {
2039 bdp = info->tx_cur;
2040 bdbase = info->tx_bd_base;
2042 else {
2043 /* Pointer to UART in parameter ram.
2045 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2046 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2048 /* Get the address of the host memory buffer.
2050 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2054 * We need to gracefully shut down the transmitter, disable
2055 * interrupts, then send our bytes out.
2059 * Now, do each character. This is not as bad as it looks
2060 * since this is a holding FIFO and not a transmitting FIFO.
2061 * We could add the complexity of filling the entire transmit
2062 * buffer, but we would just wait longer between accesses......
2064 for (i = 0; i < count; i++, s++) {
2065 /* Wait for transmitter fifo to empty.
2066 * Ready indicates output is ready, and xmt is doing
2067 * that, not that it is ready for us to send.
2069 while (bdp->status & BD_SC_READY);
2071 /* Send the character out.
2073 cp = bdp->buf;
2074 *cp = *s;
2076 bdp->length = 1;
2077 bdp->status |= BD_SC_READY;
2079 if (bdp->status & BD_SC_WRAP)
2080 bdp = bdbase;
2081 else
2082 bdp++;
2084 /* if a LF, also do CR... */
2085 if (*s == 10) {
2086 while (bdp->status & BD_SC_READY);
2087 /* cp = __va(bdp->buf); */
2088 cp = bdp->buf;
2089 *cp = 13;
2090 bdp->length = 1;
2091 bdp->status |= BD_SC_READY;
2093 if (bdp->status & BD_SC_WRAP) {
2094 bdp = bdbase;
2096 else {
2097 bdp++;
2103 * Finally, Wait for transmitter & holding register to empty
2104 * and restore the IER
2106 while (bdp->status & BD_SC_READY);
2108 if (info)
2109 info->tx_cur = (QUICC_BD *)bdp;
2112 static void serial_console_write(struct console *c, const char *s,
2113 unsigned count)
2115 #ifdef CONFIG_KGDB
2116 /* Try to let stub handle output. Returns true if it did. */
2117 if (kgdb_output_string(s, count))
2118 return;
2119 #endif
2120 my_console_write(c->index, s, count);
2125 /*void console_print_68360(const char *p)
2127 const char *cp = p;
2128 int i;
2130 for (i=0;cp[i]!=0;i++);
2132 serial_console_write (p, i);
2134 //Comment this if you want to have a strict interrupt-driven output
2135 //rs_fair_output();
2137 return;
2145 #ifdef CONFIG_XMON
2147 xmon_360_write(const char *s, unsigned count)
2149 my_console_write(0, s, count);
2150 return(count);
2152 #endif
2154 #ifdef CONFIG_KGDB
2155 void
2156 putDebugChar(char ch)
2158 my_console_write(0, &ch, 1);
2160 #endif
2163 * Receive character from the serial port. This only works well
2164 * before the port is initialized for real use.
2166 static int my_console_wait_key(int idx, int xmon, char *obuf)
2168 struct serial_state *ser;
2169 u_char c, *cp;
2170 ser_info_t *info;
2171 QUICC_BD *bdp;
2172 volatile struct smc_uart_pram *up;
2173 int i;
2175 ser = rs_table + idx;
2177 /* Get the address of the host memory buffer.
2178 * If the port has been initialized for general use, we must
2179 * use information from the port structure.
2181 if ((info = (ser_info_t *)ser->info))
2182 bdp = info->rx_cur;
2183 else
2184 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2185 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2187 /* Pointer to UART in parameter ram.
2189 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2190 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2193 * We need to gracefully shut down the receiver, disable
2194 * interrupts, then read the input.
2195 * XMON just wants a poll. If no character, return -1, else
2196 * return the character.
2198 if (!xmon) {
2199 while (bdp->status & BD_SC_EMPTY);
2201 else {
2202 if (bdp->status & BD_SC_EMPTY)
2203 return -1;
2206 cp = (char *)bdp->buf;
2208 if (obuf) {
2209 i = c = bdp->length;
2210 while (i-- > 0)
2211 *obuf++ = *cp++;
2213 else {
2214 c = *cp;
2216 bdp->status |= BD_SC_EMPTY;
2218 if (info) {
2219 if (bdp->status & BD_SC_WRAP) {
2220 bdp = info->rx_bd_base;
2222 else {
2223 bdp++;
2225 info->rx_cur = (QUICC_BD *)bdp;
2228 return((int)c);
2231 static int serial_console_wait_key(struct console *co)
2233 return(my_console_wait_key(co->index, 0, NULL));
2236 #ifdef CONFIG_XMON
2238 xmon_360_read_poll(void)
2240 return(my_console_wait_key(0, 1, NULL));
2244 xmon_360_read_char(void)
2246 return(my_console_wait_key(0, 0, NULL));
2248 #endif
2250 #ifdef CONFIG_KGDB
2251 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2252 static int kgdb_chars;
2254 unsigned char
2255 getDebugChar(void)
2257 if (kgdb_chars <= 0) {
2258 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2259 kgdp = kgdb_buf;
2261 kgdb_chars--;
2263 return(*kgdp++);
2266 void kgdb_interruptible(int state)
2269 void kgdb_map_scc(void)
2271 struct serial_state *ser;
2272 uint mem_addr;
2273 volatile QUICC_BD *bdp;
2274 volatile smc_uart_t *up;
2276 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2278 /* To avoid data cache CPM DMA coherency problems, allocate a
2279 * buffer in the CPM DPRAM. This will work until the CPM and
2280 * serial ports are initialized. At that time a memory buffer
2281 * will be allocated.
2282 * The port is already initialized from the boot procedure, all
2283 * we do here is give it a different buffer and make it a FIFO.
2286 ser = rs_table;
2288 /* Right now, assume we are using SMCs.
2290 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2292 /* Allocate space for an input FIFO, plus a few bytes for output.
2293 * Allocate bytes to maintain word alignment.
2295 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2297 /* Set the physical address of the host memory buffers in
2298 * the buffer descriptors.
2300 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2301 bdp->buf = mem_addr;
2303 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2304 bdp->buf = mem_addr+RX_BUF_SIZE;
2306 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2307 up->smc_maxidl = RX_BUF_SIZE;
2309 #endif
2311 static struct tty_struct *serial_console_device(struct console *c, int *index)
2313 *index = c->index;
2314 return serial_driver;
2318 struct console sercons = {
2319 .name = "ttyS",
2320 .write = serial_console_write,
2321 .device = serial_console_device,
2322 .wait_key = serial_console_wait_key,
2323 .setup = serial_console_setup,
2324 .flags = CON_PRINTBUFFER,
2325 .index = CONFIG_SERIAL_CONSOLE_PORT,
2331 * Register console.
2333 long console_360_init(long kmem_start, long kmem_end)
2335 register_console(&sercons);
2336 /*register_console (console_print_68360); - 2.0.38 only required a write
2337 function pointer. */
2338 return kmem_start;
2341 #endif
2343 /* Index in baud rate table of the default console baud rate.
2345 static int baud_idx;
2347 static const struct tty_operations rs_360_ops = {
2348 .owner = THIS_MODULE,
2349 .open = rs_360_open,
2350 .close = rs_360_close,
2351 .write = rs_360_write,
2352 .put_char = rs_360_put_char,
2353 .write_room = rs_360_write_room,
2354 .chars_in_buffer = rs_360_chars_in_buffer,
2355 .flush_buffer = rs_360_flush_buffer,
2356 .ioctl = rs_360_ioctl,
2357 .throttle = rs_360_throttle,
2358 .unthrottle = rs_360_unthrottle,
2359 /* .send_xchar = rs_360_send_xchar, */
2360 .set_termios = rs_360_set_termios,
2361 .stop = rs_360_stop,
2362 .start = rs_360_start,
2363 .hangup = rs_360_hangup,
2364 /* .wait_until_sent = rs_360_wait_until_sent, */
2365 /* .read_proc = rs_360_read_proc, */
2366 .tiocmget = rs_360_tiocmget,
2367 .tiocmset = rs_360_tiocmset,
2370 static int __init rs_360_init(void)
2372 struct serial_state * state;
2373 ser_info_t *info;
2374 void *mem_addr;
2375 uint dp_addr, iobits;
2376 int i, j, idx;
2377 ushort chan;
2378 QUICC_BD *bdp;
2379 volatile QUICC *cp;
2380 volatile struct smc_regs *sp;
2381 volatile struct smc_uart_pram *up;
2382 volatile struct scc_regs *scp;
2383 volatile struct uart_pram *sup;
2384 /* volatile immap_t *immap; */
2386 serial_driver = alloc_tty_driver(NR_PORTS);
2387 if (!serial_driver)
2388 return -1;
2390 show_serial_version();
2392 serial_driver->name = "ttyS";
2393 serial_driver->major = TTY_MAJOR;
2394 serial_driver->minor_start = 64;
2395 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2396 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2397 serial_driver->init_termios = tty_std_termios;
2398 serial_driver->init_termios.c_cflag =
2399 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2400 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2401 tty_set_operations(serial_driver, &rs_360_ops);
2403 if (tty_register_driver(serial_driver))
2404 panic("Couldn't register serial driver\n");
2406 cp = pquicc; /* Get pointer to Communication Processor */
2407 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2410 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2412 /* The "standard" configuration through the 860.
2414 /* immap->im_ioport.iop_papar |= 0x00fc; */
2415 /* immap->im_ioport.iop_padir &= ~0x00fc; */
2416 /* immap->im_ioport.iop_paodr &= ~0x00fc; */
2417 cp->pio_papar |= 0x00fc;
2418 cp->pio_padir &= ~0x00fc;
2419 /* cp->pio_paodr &= ~0x00fc; */
2422 /* Since we don't yet do modem control, connect the port C pins
2423 * as general purpose I/O. This will assert CTS and CD for the
2424 * SCC ports.
2426 /* immap->im_ioport.iop_pcdir |= 0x03c6; */
2427 /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2429 /* cp->pio_pcdir |= 0x03c6; */
2430 /* cp->pio_pcpar &= ~0x03c6; */
2434 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2435 * BRG4 to SCC3.
2437 cp->si_sicr &= ~0x00ffff00;
2438 cp->si_sicr |= 0x001b1200;
2440 #ifdef CONFIG_PP04
2441 /* Frequentis PP04 forced to RS-232 until we know better.
2442 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2444 immap->im_ioport.iop_pcdir |= 0x000c;
2445 immap->im_ioport.iop_pcpar &= ~0x000c;
2446 immap->im_ioport.iop_pcdat &= ~0x000c;
2448 /* This enables the TX driver.
2450 cp->cp_pbpar &= ~0x6000;
2451 cp->cp_pbdat &= ~0x6000;
2452 #endif
2454 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2455 state->magic = SSTATE_MAGIC;
2456 state->line = i;
2457 state->type = PORT_UNKNOWN;
2458 state->custom_divisor = 0;
2459 state->close_delay = 5*HZ/10;
2460 state->closing_wait = 30*HZ;
2461 state->icount.cts = state->icount.dsr =
2462 state->icount.rng = state->icount.dcd = 0;
2463 state->icount.rx = state->icount.tx = 0;
2464 state->icount.frame = state->icount.parity = 0;
2465 state->icount.overrun = state->icount.brk = 0;
2466 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2467 i, (unsigned int)(state->irq),
2468 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2470 #ifdef CONFIG_SERIAL_CONSOLE
2471 /* If we just printed the message on the console port, and
2472 * we are about to initialize it for general use, we have
2473 * to wait a couple of character times for the CR/NL to
2474 * make it out of the transmit buffer.
2476 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2477 mdelay(8);
2480 /* idx = PORT_NUM(info->state->smc_scc_num); */
2481 /* if (info->state->smc_scc_num & NUM_IS_SCC) */
2482 /* chan = scc_chan_map[idx]; */
2483 /* else */
2484 /* chan = smc_chan_map[idx]; */
2486 /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2487 /* while (cp->cp_cr & CPM_CR_FLG); */
2489 #endif
2490 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2491 info = &quicc_ser_info[i];
2492 if (info) {
2493 memset (info, 0, sizeof(ser_info_t));
2494 info->magic = SERIAL_MAGIC;
2495 info->line = i;
2496 info->flags = state->flags;
2497 INIT_WORK(&info->tqueue, do_softint, info);
2498 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2499 init_waitqueue_head(&info->open_wait);
2500 init_waitqueue_head(&info->close_wait);
2501 info->state = state;
2502 state->info = (struct async_struct *)info;
2504 /* We need to allocate a transmit and receive buffer
2505 * descriptors from dual port ram, and a character
2506 * buffer area from host mem.
2508 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2510 /* Allocate space for FIFOs in the host memory.
2511 * (for now this is from a static array of buffers :(
2513 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2514 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2515 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2517 /* Set the physical address of the host memory
2518 * buffers in the buffer descriptors, and the
2519 * virtual address for us to work with.
2521 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2522 info->rx_cur = info->rx_bd_base = bdp;
2524 /* initialize rx buffer descriptors */
2525 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2526 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2527 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2528 mem_addr += RX_BUF_SIZE;
2529 bdp++;
2531 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2532 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2535 idx = PORT_NUM(info->state->smc_scc_num);
2536 if (info->state->smc_scc_num & NUM_IS_SCC) {
2538 #if defined(CONFIG_UCQUICC)
2539 /* set the transceiver mode to RS232 */
2540 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2541 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2542 *(uint *)_periph_base = sipex_mode_bits;
2543 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2544 #endif
2547 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2549 /* Allocate space for FIFOs in the host memory.
2551 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2552 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2553 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2555 /* Set the physical address of the host memory
2556 * buffers in the buffer descriptors, and the
2557 * virtual address for us to work with.
2559 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2560 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2561 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2563 /* initialize tx buffer descriptors */
2564 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2565 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2566 bdp->status = BD_SC_INTRPT;
2567 mem_addr += TX_BUF_SIZE;
2568 bdp++;
2570 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2571 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2573 if (info->state->smc_scc_num & NUM_IS_SCC) {
2574 scp = &pquicc->scc_regs[idx];
2575 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2576 sup->rbase = dp_addr;
2577 sup->tbase = dp_addr;
2579 /* Set up the uart parameters in the
2580 * parameter ram.
2582 sup->rfcr = SMC_EB;
2583 sup->tfcr = SMC_EB;
2585 /* Set this to 1 for now, so we get single
2586 * character interrupts. Using idle character
2587 * time requires some additional tuning.
2589 sup->mrblr = 1;
2590 sup->max_idl = 0;
2591 sup->brkcr = 1;
2592 sup->parec = 0;
2593 sup->frmer = 0;
2594 sup->nosec = 0;
2595 sup->brkec = 0;
2596 sup->uaddr1 = 0;
2597 sup->uaddr2 = 0;
2598 sup->toseq = 0;
2600 int i;
2601 for (i=0;i<8;i++)
2602 sup->cc[i] = 0x8000;
2604 sup->rccm = 0xc0ff;
2606 /* Send the CPM an initialize command.
2608 chan = scc_chan_map[idx];
2610 /* execute the INIT RX & TX PARAMS command for this channel. */
2611 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2612 while (cp->cp_cr & CPM_CR_FLG);
2614 /* Set UART mode, 8 bit, no parity, one stop.
2615 * Enable receive and transmit.
2617 scp->scc_gsmr.w.high = 0;
2618 scp->scc_gsmr.w.low =
2619 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2621 /* Disable all interrupts and clear all pending
2622 * events.
2624 scp->scc_sccm = 0;
2625 scp->scc_scce = 0xffff;
2626 scp->scc_dsr = 0x7e7e;
2627 scp->scc_psmr = 0x3000;
2629 /* If the port is the console, enable Rx and Tx.
2631 #ifdef CONFIG_SERIAL_CONSOLE
2632 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2633 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2634 #endif
2636 else {
2637 /* Configure SMCs Tx/Rx instead of port B
2638 * parallel I/O.
2640 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2641 up->rbase = dp_addr;
2643 iobits = 0xc0 << (idx * 4);
2644 cp->pip_pbpar |= iobits;
2645 cp->pip_pbdir &= ~iobits;
2646 cp->pip_pbodr &= ~iobits;
2649 /* Connect the baud rate generator to the
2650 * SMC based upon index in rs_table. Also
2651 * make sure it is connected to NMSI.
2653 cp->si_simode &= ~(0xffff << (idx * 16));
2654 cp->si_simode |= (i << ((idx * 16) + 12));
2656 up->tbase = dp_addr;
2658 /* Set up the uart parameters in the
2659 * parameter ram.
2661 up->rfcr = SMC_EB;
2662 up->tfcr = SMC_EB;
2664 /* Set this to 1 for now, so we get single
2665 * character interrupts. Using idle character
2666 * time requires some additional tuning.
2668 up->mrblr = 1;
2669 up->max_idl = 0;
2670 up->brkcr = 1;
2672 /* Send the CPM an initialize command.
2674 chan = smc_chan_map[idx];
2676 cp->cp_cr = mk_cr_cmd(chan,
2677 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2678 #ifdef CONFIG_SERIAL_CONSOLE
2679 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2680 printk("");
2681 #endif
2682 while (cp->cp_cr & CPM_CR_FLG);
2684 /* Set UART mode, 8 bit, no parity, one stop.
2685 * Enable receive and transmit.
2687 sp = &cp->smc_regs[idx];
2688 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2690 /* Disable all interrupts and clear all pending
2691 * events.
2693 sp->smc_smcm = 0;
2694 sp->smc_smce = 0xff;
2696 /* If the port is the console, enable Rx and Tx.
2698 #ifdef CONFIG_SERIAL_CONSOLE
2699 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2700 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2701 #endif
2704 /* Install interrupt handler.
2706 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2707 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2708 request_irq(state->irq, rs_360_interrupt,
2709 IRQ_FLG_LOCK, "ttyS", (void *)info);
2711 /* Set up the baud rate generator.
2713 m360_cpm_setbrg(i, baud_table[baud_idx]);
2718 return 0;
2720 module_init(rs_360_init);
2722 /* This must always be called before the rs_360_init() function, otherwise
2723 * it blows away the port control information.
2725 //static int __init serial_console_setup( struct console *co, char *options)
2726 int serial_console_setup( struct console *co, char *options)
2728 struct serial_state *ser;
2729 uint mem_addr, dp_addr, bidx, idx, iobits;
2730 ushort chan;
2731 QUICC_BD *bdp;
2732 volatile QUICC *cp;
2733 volatile struct smc_regs *sp;
2734 volatile struct scc_regs *scp;
2735 volatile struct smc_uart_pram *up;
2736 volatile struct uart_pram *sup;
2738 /* mleslie TODO:
2739 * add something to the 68k bootloader to store a desired initial console baud rate */
2741 /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2742 /* bd = (bd_t *)__res; */
2744 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2745 /* if (bd->bi_baudrate == baud_table[bidx]) */
2746 if (CONSOLE_BAUDRATE == baud_table[bidx])
2747 break;
2749 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2750 baud_idx = bidx;
2752 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2754 cp = pquicc; /* Get pointer to Communication Processor */
2756 idx = PORT_NUM(ser->smc_scc_num);
2757 if (ser->smc_scc_num & NUM_IS_SCC) {
2759 /* TODO: need to set up SCC pin assignment etc. here */
2762 else {
2763 iobits = 0xc0 << (idx * 4);
2764 cp->pip_pbpar |= iobits;
2765 cp->pip_pbdir &= ~iobits;
2766 cp->pip_pbodr &= ~iobits;
2768 /* Connect the baud rate generator to the
2769 * SMC based upon index in rs_table. Also
2770 * make sure it is connected to NMSI.
2772 cp->si_simode &= ~(0xffff << (idx * 16));
2773 cp->si_simode |= (idx << ((idx * 16) + 12));
2776 /* When we get here, the CPM has been reset, so we need
2777 * to configure the port.
2778 * We need to allocate a transmit and receive buffer descriptor
2779 * from dual port ram, and a character buffer area from host mem.
2782 /* Allocate space for two buffer descriptors in the DP ram.
2784 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2786 /* Allocate space for two 2 byte FIFOs in the host memory.
2788 /* mem_addr = m360_cpm_hostalloc(8); */
2789 mem_addr = (uint)console_fifos;
2792 /* Set the physical address of the host memory buffers in
2793 * the buffer descriptors.
2795 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2796 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2797 bdp->buf = (char *)mem_addr;
2798 (bdp+1)->buf = (char *)(mem_addr+4);
2800 /* For the receive, set empty and wrap.
2801 * For transmit, set wrap.
2803 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2804 (bdp+1)->status = BD_SC_WRAP;
2806 /* Set up the uart parameters in the parameter ram.
2808 if (ser->smc_scc_num & NUM_IS_SCC) {
2809 scp = &cp->scc_regs[idx];
2810 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2811 sup = &pquicc->pram[ser->port].scc.pscc.u;
2813 sup->rbase = dp_addr;
2814 sup->tbase = dp_addr + sizeof(QUICC_BD);
2816 /* Set up the uart parameters in the
2817 * parameter ram.
2819 sup->rfcr = SMC_EB;
2820 sup->tfcr = SMC_EB;
2822 /* Set this to 1 for now, so we get single
2823 * character interrupts. Using idle character
2824 * time requires some additional tuning.
2826 sup->mrblr = 1;
2827 sup->max_idl = 0;
2828 sup->brkcr = 1;
2829 sup->parec = 0;
2830 sup->frmer = 0;
2831 sup->nosec = 0;
2832 sup->brkec = 0;
2833 sup->uaddr1 = 0;
2834 sup->uaddr2 = 0;
2835 sup->toseq = 0;
2837 int i;
2838 for (i=0;i<8;i++)
2839 sup->cc[i] = 0x8000;
2841 sup->rccm = 0xc0ff;
2843 /* Send the CPM an initialize command.
2845 chan = scc_chan_map[idx];
2847 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2848 while (cp->cp_cr & CPM_CR_FLG);
2850 /* Set UART mode, 8 bit, no parity, one stop.
2851 * Enable receive and transmit.
2853 scp->scc_gsmr.w.high = 0;
2854 scp->scc_gsmr.w.low =
2855 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2857 /* Disable all interrupts and clear all pending
2858 * events.
2860 scp->scc_sccm = 0;
2861 scp->scc_scce = 0xffff;
2862 scp->scc_dsr = 0x7e7e;
2863 scp->scc_psmr = 0x3000;
2865 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2868 else {
2869 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2870 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2872 up->rbase = dp_addr; /* Base of receive buffer desc. */
2873 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
2874 up->rfcr = SMC_EB;
2875 up->tfcr = SMC_EB;
2877 /* Set this to 1 for now, so we get single character interrupts.
2879 up->mrblr = 1; /* receive buffer length */
2880 up->max_idl = 0; /* wait forever for next char */
2882 /* Send the CPM an initialize command.
2884 chan = smc_chan_map[idx];
2885 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2886 while (cp->cp_cr & CPM_CR_FLG);
2888 /* Set UART mode, 8 bit, no parity, one stop.
2889 * Enable receive and transmit.
2891 sp = &cp->smc_regs[idx];
2892 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2894 /* And finally, enable Rx and Tx.
2896 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2899 /* Set up the baud rate generator.
2901 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2902 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2904 return 0;
2908 * Local variables:
2909 * c-indent-level: 4
2910 * c-basic-offset: 4
2911 * tab-width: 4
2912 * End: