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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / scsi / mpt2sas / mpt2sas_base.c
blob9e590265a020781d1eaacfbdd5c1075e6804b68b
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2010 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61 #include <linux/aer.h>
62
63 #include "mpt2sas_base.h"
64
65 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68 #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
69
70 static int max_queue_depth = -1;
71 module_param(max_queue_depth, int, 0);
72 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
73
74 static int max_sgl_entries = -1;
75 module_param(max_sgl_entries, int, 0);
76 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
77
78 static int msix_disable = -1;
79 module_param(msix_disable, int, 0);
80 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
81
82 /* diag_buffer_enable is bitwise
83 * bit 0 set = TRACE
84 * bit 1 set = SNAPSHOT
85 * bit 2 set = EXTENDED
86 *
87 * Either bit can be set, or both
88 */
89 static int diag_buffer_enable;
90 module_param(diag_buffer_enable, int, 0);
91 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
92 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
93
94 int mpt2sas_fwfault_debug;
95 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
96 "and halt firmware - (default=0)");
97
98 static int disable_discovery = -1;
99 module_param(disable_discovery, int, 0);
100 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
101
102 /**
103 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
104 *
105 */
106 static int
107 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
108 {
109 int ret = param_set_int(val, kp);
110 struct MPT2SAS_ADAPTER *ioc;
111
112 if (ret)
113 return ret;
114
115 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
116 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
117 ioc->fwfault_debug = mpt2sas_fwfault_debug;
118 return 0;
119 }
120 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
121 param_get_int, &mpt2sas_fwfault_debug, 0644);
122
123 /**
124 * _base_fault_reset_work - workq handling ioc fault conditions
125 * @work: input argument, used to derive ioc
126 * Context: sleep.
127 *
128 * Return nothing.
129 */
130 static void
131 _base_fault_reset_work(struct work_struct *work)
132 {
133 struct MPT2SAS_ADAPTER *ioc =
134 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
135 unsigned long flags;
136 u32 doorbell;
137 int rc;
138
139 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
140 if (ioc->shost_recovery)
141 goto rearm_timer;
142 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
143
144 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
145 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
146 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
147 FORCE_BIG_HAMMER);
148 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
149 __func__, (rc == 0) ? "success" : "failed");
150 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
151 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
152 mpt2sas_base_fault_info(ioc, doorbell &
153 MPI2_DOORBELL_DATA_MASK);
154 }
155
156 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
157 rearm_timer:
158 if (ioc->fault_reset_work_q)
159 queue_delayed_work(ioc->fault_reset_work_q,
160 &ioc->fault_reset_work,
161 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
162 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
163 }
164
165 /**
166 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
167 * @ioc: per adapter object
168 * Context: sleep.
169 *
170 * Return nothing.
171 */
172 void
173 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
174 {
175 unsigned long flags;
176
177 if (ioc->fault_reset_work_q)
178 return;
179
180 /* initialize fault polling */
181 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
182 snprintf(ioc->fault_reset_work_q_name,
183 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
184 ioc->fault_reset_work_q =
185 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
186 if (!ioc->fault_reset_work_q) {
187 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
188 ioc->name, __func__, __LINE__);
189 return;
190 }
191 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
192 if (ioc->fault_reset_work_q)
193 queue_delayed_work(ioc->fault_reset_work_q,
194 &ioc->fault_reset_work,
195 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
196 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
197 }
198
199 /**
200 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
201 * @ioc: per adapter object
202 * Context: sleep.
203 *
204 * Return nothing.
205 */
206 void
207 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
208 {
209 unsigned long flags;
210 struct workqueue_struct *wq;
211
212 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
213 wq = ioc->fault_reset_work_q;
214 ioc->fault_reset_work_q = NULL;
215 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
216 if (wq) {
217 if (!cancel_delayed_work(&ioc->fault_reset_work))
218 flush_workqueue(wq);
219 destroy_workqueue(wq);
220 }
221 }
222
223 /**
224 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
225 * @ioc: per adapter object
226 * @fault_code: fault code
227 *
228 * Return nothing.
229 */
230 void
231 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
232 {
233 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
234 ioc->name, fault_code);
235 }
236
237 /**
238 * mpt2sas_halt_firmware - halt's mpt controller firmware
239 * @ioc: per adapter object
240 *
241 * For debugging timeout related issues. Writing 0xCOFFEE00
242 * to the doorbell register will halt controller firmware. With
243 * the purpose to stop both driver and firmware, the enduser can
244 * obtain a ring buffer from controller UART.
245 */
246 void
247 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
248 {
249 u32 doorbell;
250
251 if (!ioc->fwfault_debug)
252 return;
253
254 dump_stack();
255
256 doorbell = readl(&ioc->chip->Doorbell);
257 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
258 mpt2sas_base_fault_info(ioc , doorbell);
259 else {
260 writel(0xC0FFEE00, &ioc->chip->Doorbell);
261 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
262 "timeout\n", ioc->name);
263 }
264
265 panic("panic in %s\n", __func__);
266 }
267
268 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
269 /**
270 * _base_sas_ioc_info - verbose translation of the ioc status
271 * @ioc: per adapter object
272 * @mpi_reply: reply mf payload returned from firmware
273 * @request_hdr: request mf
274 *
275 * Return nothing.
276 */
277 static void
278 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
279 MPI2RequestHeader_t *request_hdr)
280 {
281 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
282 MPI2_IOCSTATUS_MASK;
283 char *desc = NULL;
284 u16 frame_sz;
285 char *func_str = NULL;
286
287 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
288 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
289 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
290 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
291 return;
292
293 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
294 return;
295
296 switch (ioc_status) {
297
298 /****************************************************************************
299 * Common IOCStatus values for all replies
300 ****************************************************************************/
301
302 case MPI2_IOCSTATUS_INVALID_FUNCTION:
303 desc = "invalid function";
304 break;
305 case MPI2_IOCSTATUS_BUSY:
306 desc = "busy";
307 break;
308 case MPI2_IOCSTATUS_INVALID_SGL:
309 desc = "invalid sgl";
310 break;
311 case MPI2_IOCSTATUS_INTERNAL_ERROR:
312 desc = "internal error";
313 break;
314 case MPI2_IOCSTATUS_INVALID_VPID:
315 desc = "invalid vpid";
316 break;
317 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
318 desc = "insufficient resources";
319 break;
320 case MPI2_IOCSTATUS_INVALID_FIELD:
321 desc = "invalid field";
322 break;
323 case MPI2_IOCSTATUS_INVALID_STATE:
324 desc = "invalid state";
325 break;
326 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
327 desc = "op state not supported";
328 break;
329
330 /****************************************************************************
331 * Config IOCStatus values
332 ****************************************************************************/
333
334 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
335 desc = "config invalid action";
336 break;
337 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
338 desc = "config invalid type";
339 break;
340 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
341 desc = "config invalid page";
342 break;
343 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
344 desc = "config invalid data";
345 break;
346 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
347 desc = "config no defaults";
348 break;
349 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
350 desc = "config cant commit";
351 break;
352
353 /****************************************************************************
354 * SCSI IO Reply
355 ****************************************************************************/
356
357 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
358 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
359 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
360 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
361 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
362 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
363 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
364 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
365 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
366 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
367 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
368 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
369 break;
370
371 /****************************************************************************
372 * For use by SCSI Initiator and SCSI Target end-to-end data protection
373 ****************************************************************************/
374
375 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
376 desc = "eedp guard error";
377 break;
378 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
379 desc = "eedp ref tag error";
380 break;
381 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
382 desc = "eedp app tag error";
383 break;
384
385 /****************************************************************************
386 * SCSI Target values
387 ****************************************************************************/
388
389 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
390 desc = "target invalid io index";
391 break;
392 case MPI2_IOCSTATUS_TARGET_ABORTED:
393 desc = "target aborted";
394 break;
395 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
396 desc = "target no conn retryable";
397 break;
398 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
399 desc = "target no connection";
400 break;
401 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
402 desc = "target xfer count mismatch";
403 break;
404 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
405 desc = "target data offset error";
406 break;
407 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
408 desc = "target too much write data";
409 break;
410 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
411 desc = "target iu too short";
412 break;
413 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
414 desc = "target ack nak timeout";
415 break;
416 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
417 desc = "target nak received";
418 break;
419
420 /****************************************************************************
421 * Serial Attached SCSI values
422 ****************************************************************************/
423
424 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
425 desc = "smp request failed";
426 break;
427 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
428 desc = "smp data overrun";
429 break;
430
431 /****************************************************************************
432 * Diagnostic Buffer Post / Diagnostic Release values
433 ****************************************************************************/
434
435 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
436 desc = "diagnostic released";
437 break;
438 default:
439 break;
440 }
441
442 if (!desc)
443 return;
444
445 switch (request_hdr->Function) {
446 case MPI2_FUNCTION_CONFIG:
447 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
448 func_str = "config_page";
449 break;
450 case MPI2_FUNCTION_SCSI_TASK_MGMT:
451 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
452 func_str = "task_mgmt";
453 break;
454 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
455 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
456 func_str = "sas_iounit_ctl";
457 break;
458 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
459 frame_sz = sizeof(Mpi2SepRequest_t);
460 func_str = "enclosure";
461 break;
462 case MPI2_FUNCTION_IOC_INIT:
463 frame_sz = sizeof(Mpi2IOCInitRequest_t);
464 func_str = "ioc_init";
465 break;
466 case MPI2_FUNCTION_PORT_ENABLE:
467 frame_sz = sizeof(Mpi2PortEnableRequest_t);
468 func_str = "port_enable";
469 break;
470 case MPI2_FUNCTION_SMP_PASSTHROUGH:
471 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
472 func_str = "smp_passthru";
473 break;
474 default:
475 frame_sz = 32;
476 func_str = "unknown";
477 break;
478 }
479
480 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
481 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
482
483 _debug_dump_mf(request_hdr, frame_sz/4);
484 }
485
486 /**
487 * _base_display_event_data - verbose translation of firmware asyn events
488 * @ioc: per adapter object
489 * @mpi_reply: reply mf payload returned from firmware
490 *
491 * Return nothing.
492 */
493 static void
494 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
495 Mpi2EventNotificationReply_t *mpi_reply)
496 {
497 char *desc = NULL;
498 u16 event;
499
500 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
501 return;
502
503 event = le16_to_cpu(mpi_reply->Event);
504
505 switch (event) {
506 case MPI2_EVENT_LOG_DATA:
507 desc = "Log Data";
508 break;
509 case MPI2_EVENT_STATE_CHANGE:
510 desc = "Status Change";
511 break;
512 case MPI2_EVENT_HARD_RESET_RECEIVED:
513 desc = "Hard Reset Received";
514 break;
515 case MPI2_EVENT_EVENT_CHANGE:
516 desc = "Event Change";
517 break;
518 case MPI2_EVENT_TASK_SET_FULL:
519 desc = "Task Set Full";
520 break;
521 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
522 desc = "Device Status Change";
523 break;
524 case MPI2_EVENT_IR_OPERATION_STATUS:
525 desc = "IR Operation Status";
526 break;
527 case MPI2_EVENT_SAS_DISCOVERY:
528 {
529 Mpi2EventDataSasDiscovery_t *event_data =
530 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
531 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
532 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
533 "start" : "stop");
534 if (event_data->DiscoveryStatus)
535 printk("discovery_status(0x%08x)",
536 le32_to_cpu(event_data->DiscoveryStatus));
537 printk("\n");
538 return;
539 }
540 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
541 desc = "SAS Broadcast Primitive";
542 break;
543 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
544 desc = "SAS Init Device Status Change";
545 break;
546 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
547 desc = "SAS Init Table Overflow";
548 break;
549 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
550 desc = "SAS Topology Change List";
551 break;
552 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
553 desc = "SAS Enclosure Device Status Change";
554 break;
555 case MPI2_EVENT_IR_VOLUME:
556 desc = "IR Volume";
557 break;
558 case MPI2_EVENT_IR_PHYSICAL_DISK:
559 desc = "IR Physical Disk";
560 break;
561 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
562 desc = "IR Configuration Change List";
563 break;
564 case MPI2_EVENT_LOG_ENTRY_ADDED:
565 desc = "Log Entry Added";
566 break;
567 }
568
569 if (!desc)
570 return;
571
572 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
573 }
574 #endif
575
576 /**
577 * _base_sas_log_info - verbose translation of firmware log info
578 * @ioc: per adapter object
579 * @log_info: log info
580 *
581 * Return nothing.
582 */
583 static void
584 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
585 {
586 union loginfo_type {
587 u32 loginfo;
588 struct {
589 u32 subcode:16;
590 u32 code:8;
591 u32 originator:4;
592 u32 bus_type:4;
593 } dw;
594 };
595 union loginfo_type sas_loginfo;
596 char *originator_str = NULL;
597
598 sas_loginfo.loginfo = log_info;
599 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
600 return;
601
602 /* each nexus loss loginfo */
603 if (log_info == 0x31170000)
604 return;
605
606 /* eat the loginfos associated with task aborts */
607 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
608 0x31140000 || log_info == 0x31130000))
609 return;
610
611 switch (sas_loginfo.dw.originator) {
612 case 0:
613 originator_str = "IOP";
614 break;
615 case 1:
616 originator_str = "PL";
617 break;
618 case 2:
619 originator_str = "IR";
620 break;
621 }
622
623 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
624 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
625 originator_str, sas_loginfo.dw.code,
626 sas_loginfo.dw.subcode);
627 }
628
629 /**
630 * _base_display_reply_info -
631 * @ioc: per adapter object
632 * @smid: system request message index
633 * @msix_index: MSIX table index supplied by the OS
634 * @reply: reply message frame(lower 32bit addr)
635 *
636 * Return nothing.
637 */
638 static void
639 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
640 u32 reply)
641 {
642 MPI2DefaultReply_t *mpi_reply;
643 u16 ioc_status;
644
645 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
646 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
647 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
648 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
649 (ioc->logging_level & MPT_DEBUG_REPLY)) {
650 _base_sas_ioc_info(ioc , mpi_reply,
651 mpt2sas_base_get_msg_frame(ioc, smid));
652 }
653 #endif
654 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
655 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
656 }
657
658 /**
659 * mpt2sas_base_done - base internal command completion routine
660 * @ioc: per adapter object
661 * @smid: system request message index
662 * @msix_index: MSIX table index supplied by the OS
663 * @reply: reply message frame(lower 32bit addr)
664 *
665 * Return 1 meaning mf should be freed from _base_interrupt
666 * 0 means the mf is freed from this function.
667 */
668 u8
669 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
670 u32 reply)
671 {
672 MPI2DefaultReply_t *mpi_reply;
673
674 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
675 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
676 return 1;
677
678 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
679 return 1;
680
681 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
682 if (mpi_reply) {
683 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
684 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
685 }
686 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
687 complete(&ioc->base_cmds.done);
688 return 1;
689 }
690
691 /**
692 * _base_async_event - main callback handler for firmware asyn events
693 * @ioc: per adapter object
694 * @msix_index: MSIX table index supplied by the OS
695 * @reply: reply message frame(lower 32bit addr)
696 *
697 * Return 1 meaning mf should be freed from _base_interrupt
698 * 0 means the mf is freed from this function.
699 */
700 static u8
701 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
702 {
703 Mpi2EventNotificationReply_t *mpi_reply;
704 Mpi2EventAckRequest_t *ack_request;
705 u16 smid;
706
707 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
708 if (!mpi_reply)
709 return 1;
710 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
711 return 1;
712 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
713 _base_display_event_data(ioc, mpi_reply);
714 #endif
715 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
716 goto out;
717 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
718 if (!smid) {
719 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
720 ioc->name, __func__);
721 goto out;
722 }
723
724 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
725 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
726 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
727 ack_request->Event = mpi_reply->Event;
728 ack_request->EventContext = mpi_reply->EventContext;
729 ack_request->VF_ID = 0; /* TODO */
730 ack_request->VP_ID = 0;
731 mpt2sas_base_put_smid_default(ioc, smid);
732
733 out:
734
735 /* scsih callback handler */
736 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
737
738 /* ctl callback handler */
739 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
740
741 return 1;
742 }
743
744 /**
745 * _base_get_cb_idx - obtain the callback index
746 * @ioc: per adapter object
747 * @smid: system request message index
748 *
749 * Return callback index.
750 */
751 static u8
752 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
753 {
754 int i;
755 u8 cb_idx = 0xFF;
756
757 if (smid >= ioc->hi_priority_smid) {
758 if (smid < ioc->internal_smid) {
759 i = smid - ioc->hi_priority_smid;
760 cb_idx = ioc->hpr_lookup[i].cb_idx;
761 } else {
762 i = smid - ioc->internal_smid;
763 cb_idx = ioc->internal_lookup[i].cb_idx;
764 }
765 } else {
766 i = smid - 1;
767 cb_idx = ioc->scsi_lookup[i].cb_idx;
768 }
769 return cb_idx;
770 }
771
772 /**
773 * _base_mask_interrupts - disable interrupts
774 * @ioc: per adapter object
775 *
776 * Disabling ResetIRQ, Reply and Doorbell Interrupts
777 *
778 * Return nothing.
779 */
780 static void
781 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
782 {
783 u32 him_register;
784
785 ioc->mask_interrupts = 1;
786 him_register = readl(&ioc->chip->HostInterruptMask);
787 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
788 writel(him_register, &ioc->chip->HostInterruptMask);
789 readl(&ioc->chip->HostInterruptMask);
790 }
791
792 /**
793 * _base_unmask_interrupts - enable interrupts
794 * @ioc: per adapter object
795 *
796 * Enabling only Reply Interrupts
797 *
798 * Return nothing.
799 */
800 static void
801 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
802 {
803 u32 him_register;
804
805 him_register = readl(&ioc->chip->HostInterruptMask);
806 him_register &= ~MPI2_HIM_RIM;
807 writel(him_register, &ioc->chip->HostInterruptMask);
808 ioc->mask_interrupts = 0;
809 }
810
811 union reply_descriptor {
812 u64 word;
813 struct {
814 u32 low;
815 u32 high;
816 } u;
817 };
818
819 /**
820 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
821 * @irq: irq number (not used)
822 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
823 * @r: pt_regs pointer (not used)
824 *
825 * Return IRQ_HANDLE if processed, else IRQ_NONE.
826 */
827 static irqreturn_t
828 _base_interrupt(int irq, void *bus_id)
829 {
830 union reply_descriptor rd;
831 u32 completed_cmds;
832 u8 request_desript_type;
833 u16 smid;
834 u8 cb_idx;
835 u32 reply;
836 u8 msix_index;
837 struct MPT2SAS_ADAPTER *ioc = bus_id;
838 Mpi2ReplyDescriptorsUnion_t *rpf;
839 u8 rc;
840
841 if (ioc->mask_interrupts)
842 return IRQ_NONE;
843
844 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
845 request_desript_type = rpf->Default.ReplyFlags
846 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
847 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
848 return IRQ_NONE;
849
850 completed_cmds = 0;
851 do {
852 rd.word = rpf->Words;
853 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
854 goto out;
855 reply = 0;
856 cb_idx = 0xFF;
857 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
858 msix_index = rpf->Default.MSIxIndex;
859 if (request_desript_type ==
860 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
861 reply = le32_to_cpu
862 (rpf->AddressReply.ReplyFrameAddress);
863 } else if (request_desript_type ==
864 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
865 goto next;
866 else if (request_desript_type ==
867 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
868 goto next;
869 if (smid)
870 cb_idx = _base_get_cb_idx(ioc, smid);
871 if (smid && cb_idx != 0xFF) {
872 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
873 reply);
874 if (reply)
875 _base_display_reply_info(ioc, smid, msix_index,
876 reply);
877 if (rc)
878 mpt2sas_base_free_smid(ioc, smid);
879 }
880 if (!smid)
881 _base_async_event(ioc, msix_index, reply);
882
883 /* reply free queue handling */
884 if (reply) {
885 ioc->reply_free_host_index =
886 (ioc->reply_free_host_index ==
887 (ioc->reply_free_queue_depth - 1)) ?
888 0 : ioc->reply_free_host_index + 1;
889 ioc->reply_free[ioc->reply_free_host_index] =
890 cpu_to_le32(reply);
891 wmb();
892 writel(ioc->reply_free_host_index,
893 &ioc->chip->ReplyFreeHostIndex);
894 }
895
896 next:
897
898 rpf->Words = ULLONG_MAX;
899 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
900 (ioc->reply_post_queue_depth - 1)) ? 0 :
901 ioc->reply_post_host_index + 1;
902 request_desript_type =
903 ioc->reply_post_free[ioc->reply_post_host_index].Default.
904 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
905 completed_cmds++;
906 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
907 goto out;
908 if (!ioc->reply_post_host_index)
909 rpf = ioc->reply_post_free;
910 else
911 rpf++;
912 } while (1);
913
914 out:
915
916 if (!completed_cmds)
917 return IRQ_NONE;
918
919 wmb();
920 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
921 return IRQ_HANDLED;
922 }
923
924 /**
925 * mpt2sas_base_release_callback_handler - clear interupt callback handler
926 * @cb_idx: callback index
927 *
928 * Return nothing.
929 */
930 void
931 mpt2sas_base_release_callback_handler(u8 cb_idx)
932 {
933 mpt_callbacks[cb_idx] = NULL;
934 }
935
936 /**
937 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
938 * @cb_func: callback function
939 *
940 * Returns cb_func.
941 */
942 u8
943 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
944 {
945 u8 cb_idx;
946
947 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
948 if (mpt_callbacks[cb_idx] == NULL)
949 break;
950
951 mpt_callbacks[cb_idx] = cb_func;
952 return cb_idx;
953 }
954
955 /**
956 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
957 *
958 * Return nothing.
959 */
960 void
961 mpt2sas_base_initialize_callback_handler(void)
962 {
963 u8 cb_idx;
964
965 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
966 mpt2sas_base_release_callback_handler(cb_idx);
967 }
968
969 /**
970 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
971 * @ioc: per adapter object
972 * @paddr: virtual address for SGE
973 *
974 * Create a zero length scatter gather entry to insure the IOCs hardware has
975 * something to use if the target device goes brain dead and tries
976 * to send data even when none is asked for.
977 *
978 * Return nothing.
979 */
980 void
981 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
982 {
983 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
984 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
985 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
986 MPI2_SGE_FLAGS_SHIFT);
987 ioc->base_add_sg_single(paddr, flags_length, -1);
988 }
989
990 /**
991 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
992 * @paddr: virtual address for SGE
993 * @flags_length: SGE flags and data transfer length
994 * @dma_addr: Physical address
995 *
996 * Return nothing.
997 */
998 static void
999 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1000 {
1001 Mpi2SGESimple32_t *sgel = paddr;
1002
1003 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1004 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1005 sgel->FlagsLength = cpu_to_le32(flags_length);
1006 sgel->Address = cpu_to_le32(dma_addr);
1007 }
1008
1009
1010 /**
1011 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1012 * @paddr: virtual address for SGE
1013 * @flags_length: SGE flags and data transfer length
1014 * @dma_addr: Physical address
1015 *
1016 * Return nothing.
1017 */
1018 static void
1019 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1020 {
1021 Mpi2SGESimple64_t *sgel = paddr;
1022
1023 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1024 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1025 sgel->FlagsLength = cpu_to_le32(flags_length);
1026 sgel->Address = cpu_to_le64(dma_addr);
1027 }
1028
1029 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1030
1031 /**
1032 * _base_config_dma_addressing - set dma addressing
1033 * @ioc: per adapter object
1034 * @pdev: PCI device struct
1035 *
1036 * Returns 0 for success, non-zero for failure.
1037 */
1038 static int
1039 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1040 {
1041 struct sysinfo s;
1042 char *desc = NULL;
1043
1044 if (sizeof(dma_addr_t) > 4) {
1045 const uint64_t required_mask =
1046 dma_get_required_mask(&pdev->dev);
1047 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1048 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1049 DMA_BIT_MASK(64))) {
1050 ioc->base_add_sg_single = &_base_add_sg_single_64;
1051 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1052 desc = "64";
1053 goto out;
1054 }
1055 }
1056
1057 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1058 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1059 ioc->base_add_sg_single = &_base_add_sg_single_32;
1060 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1061 desc = "32";
1062 } else
1063 return -ENODEV;
1064
1065 out:
1066 si_meminfo(&s);
1067 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1068 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1069
1070 return 0;
1071 }
1072
1073 /**
1074 * _base_save_msix_table - backup msix vector table
1075 * @ioc: per adapter object
1076 *
1077 * This address an errata where diag reset clears out the table
1078 */
1079 static void
1080 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1081 {
1082 int i;
1083
1084 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1085 return;
1086
1087 for (i = 0; i < ioc->msix_vector_count; i++)
1088 ioc->msix_table_backup[i] = ioc->msix_table[i];
1089 }
1090
1091 /**
1092 * _base_restore_msix_table - this restores the msix vector table
1093 * @ioc: per adapter object
1094 *
1095 */
1096 static void
1097 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1098 {
1099 int i;
1100
1101 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1102 return;
1103
1104 for (i = 0; i < ioc->msix_vector_count; i++)
1105 ioc->msix_table[i] = ioc->msix_table_backup[i];
1106 }
1107
1108 /**
1109 * _base_check_enable_msix - checks MSIX capabable.
1110 * @ioc: per adapter object
1111 *
1112 * Check to see if card is capable of MSIX, and set number
1113 * of avaliable msix vectors
1114 */
1115 static int
1116 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1117 {
1118 int base;
1119 u16 message_control;
1120 u32 msix_table_offset;
1121
1122 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1123 if (!base) {
1124 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1125 "supported\n", ioc->name));
1126 return -EINVAL;
1127 }
1128
1129 /* get msix vector count */
1130 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1131 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1132
1133 /* get msix table */
1134 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1135 msix_table_offset &= 0xFFFFFFF8;
1136 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1137
1138 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1139 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1140 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1141 return 0;
1142 }
1143
1144 /**
1145 * _base_disable_msix - disables msix
1146 * @ioc: per adapter object
1147 *
1148 */
1149 static void
1150 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1151 {
1152 if (ioc->msix_enable) {
1153 pci_disable_msix(ioc->pdev);
1154 kfree(ioc->msix_table_backup);
1155 ioc->msix_table_backup = NULL;
1156 ioc->msix_enable = 0;
1157 }
1158 }
1159
1160 /**
1161 * _base_enable_msix - enables msix, failback to io_apic
1162 * @ioc: per adapter object
1163 *
1164 */
1165 static int
1166 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1167 {
1168 struct msix_entry entries;
1169 int r;
1170 u8 try_msix = 0;
1171
1172 if (msix_disable == -1 || msix_disable == 0)
1173 try_msix = 1;
1174
1175 if (!try_msix)
1176 goto try_ioapic;
1177
1178 if (_base_check_enable_msix(ioc) != 0)
1179 goto try_ioapic;
1180
1181 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1182 sizeof(u32), GFP_KERNEL);
1183 if (!ioc->msix_table_backup) {
1184 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1185 "msix_table_backup failed!!!\n", ioc->name));
1186 goto try_ioapic;
1187 }
1188
1189 memset(&entries, 0, sizeof(struct msix_entry));
1190 r = pci_enable_msix(ioc->pdev, &entries, 1);
1191 if (r) {
1192 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1193 "failed (r=%d) !!!\n", ioc->name, r));
1194 goto try_ioapic;
1195 }
1196
1197 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1198 ioc->name, ioc);
1199 if (r) {
1200 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1201 "interrupt %d !!!\n", ioc->name, entries.vector));
1202 pci_disable_msix(ioc->pdev);
1203 goto try_ioapic;
1204 }
1205
1206 ioc->pci_irq = entries.vector;
1207 ioc->msix_enable = 1;
1208 return 0;
1209
1210 /* failback to io_apic interrupt routing */
1211 try_ioapic:
1212
1213 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1214 ioc->name, ioc);
1215 if (r) {
1216 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1217 ioc->name, ioc->pdev->irq);
1218 r = -EBUSY;
1219 goto out_fail;
1220 }
1221
1222 ioc->pci_irq = ioc->pdev->irq;
1223 return 0;
1224
1225 out_fail:
1226 return r;
1227 }
1228
1229 /**
1230 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1231 * @ioc: per adapter object
1232 *
1233 * Returns 0 for success, non-zero for failure.
1234 */
1235 int
1236 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1237 {
1238 struct pci_dev *pdev = ioc->pdev;
1239 u32 memap_sz;
1240 u32 pio_sz;
1241 int i, r = 0;
1242 u64 pio_chip = 0;
1243 u64 chip_phys = 0;
1244
1245 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1246 ioc->name, __func__));
1247
1248 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1249 if (pci_enable_device_mem(pdev)) {
1250 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1251 "failed\n", ioc->name);
1252 return -ENODEV;
1253 }
1254
1255
1256 if (pci_request_selected_regions(pdev, ioc->bars,
1257 MPT2SAS_DRIVER_NAME)) {
1258 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1259 "failed\n", ioc->name);
1260 r = -ENODEV;
1261 goto out_fail;
1262 }
1263
1264 /* AER (Advanced Error Reporting) hooks */
1265 pci_enable_pcie_error_reporting(pdev);
1266
1267 pci_set_master(pdev);
1268
1269 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1270 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1271 ioc->name, pci_name(pdev));
1272 r = -ENODEV;
1273 goto out_fail;
1274 }
1275
1276 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1277 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1278 if (pio_sz)
1279 continue;
1280 pio_chip = (u64)pci_resource_start(pdev, i);
1281 pio_sz = pci_resource_len(pdev, i);
1282 } else {
1283 if (memap_sz)
1284 continue;
1285 /* verify memory resource is valid before using */
1286 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1287 ioc->chip_phys = pci_resource_start(pdev, i);
1288 chip_phys = (u64)ioc->chip_phys;
1289 memap_sz = pci_resource_len(pdev, i);
1290 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1291 if (ioc->chip == NULL) {
1292 printk(MPT2SAS_ERR_FMT "unable to map "
1293 "adapter memory!\n", ioc->name);
1294 r = -EINVAL;
1295 goto out_fail;
1296 }
1297 }
1298 }
1299 }
1300
1301 _base_mask_interrupts(ioc);
1302 r = _base_enable_msix(ioc);
1303 if (r)
1304 goto out_fail;
1305
1306 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1307 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1308 "IO-APIC enabled"), ioc->pci_irq);
1309 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1310 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1311 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1312 ioc->name, (unsigned long long)pio_chip, pio_sz);
1313
1314 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1315 pci_save_state(pdev);
1316
1317 return 0;
1318
1319 out_fail:
1320 if (ioc->chip_phys)
1321 iounmap(ioc->chip);
1322 ioc->chip_phys = 0;
1323 ioc->pci_irq = -1;
1324 pci_release_selected_regions(ioc->pdev, ioc->bars);
1325 pci_disable_pcie_error_reporting(pdev);
1326 pci_disable_device(pdev);
1327 return r;
1328 }
1329
1330 /**
1331 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1332 * @ioc: per adapter object
1333 * @smid: system request message index(smid zero is invalid)
1334 *
1335 * Returns virt pointer to message frame.
1336 */
1337 void *
1338 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1339 {
1340 return (void *)(ioc->request + (smid * ioc->request_sz));
1341 }
1342
1343 /**
1344 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1345 * @ioc: per adapter object
1346 * @smid: system request message index
1347 *
1348 * Returns virt pointer to sense buffer.
1349 */
1350 void *
1351 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1352 {
1353 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1354 }
1355
1356 /**
1357 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1358 * @ioc: per adapter object
1359 * @smid: system request message index
1360 *
1361 * Returns phys pointer to the low 32bit address of the sense buffer.
1362 */
1363 __le32
1364 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1365 {
1366 return cpu_to_le32(ioc->sense_dma +
1367 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1368 }
1369
1370 /**
1371 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1372 * @ioc: per adapter object
1373 * @phys_addr: lower 32 physical addr of the reply
1374 *
1375 * Converts 32bit lower physical addr into a virt address.
1376 */
1377 void *
1378 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1379 {
1380 if (!phys_addr)
1381 return NULL;
1382 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1383 }
1384
1385 /**
1386 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1387 * @ioc: per adapter object
1388 * @cb_idx: callback index
1389 *
1390 * Returns smid (zero is invalid)
1391 */
1392 u16
1393 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1394 {
1395 unsigned long flags;
1396 struct request_tracker *request;
1397 u16 smid;
1398
1399 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1400 if (list_empty(&ioc->internal_free_list)) {
1401 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1402 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1403 ioc->name, __func__);
1404 return 0;
1405 }
1406
1407 request = list_entry(ioc->internal_free_list.next,
1408 struct request_tracker, tracker_list);
1409 request->cb_idx = cb_idx;
1410 smid = request->smid;
1411 list_del(&request->tracker_list);
1412 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1413 return smid;
1414 }
1415
1416 /**
1417 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1418 * @ioc: per adapter object
1419 * @cb_idx: callback index
1420 * @scmd: pointer to scsi command object
1421 *
1422 * Returns smid (zero is invalid)
1423 */
1424 u16
1425 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1426 struct scsi_cmnd *scmd)
1427 {
1428 unsigned long flags;
1429 struct request_tracker *request;
1430 u16 smid;
1431
1432 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1433 if (list_empty(&ioc->free_list)) {
1434 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1435 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1436 ioc->name, __func__);
1437 return 0;
1438 }
1439
1440 request = list_entry(ioc->free_list.next,
1441 struct request_tracker, tracker_list);
1442 request->scmd = scmd;
1443 request->cb_idx = cb_idx;
1444 smid = request->smid;
1445 list_del(&request->tracker_list);
1446 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1447 return smid;
1448 }
1449
1450 /**
1451 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1452 * @ioc: per adapter object
1453 * @cb_idx: callback index
1454 *
1455 * Returns smid (zero is invalid)
1456 */
1457 u16
1458 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1459 {
1460 unsigned long flags;
1461 struct request_tracker *request;
1462 u16 smid;
1463
1464 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1465 if (list_empty(&ioc->hpr_free_list)) {
1466 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1467 return 0;
1468 }
1469
1470 request = list_entry(ioc->hpr_free_list.next,
1471 struct request_tracker, tracker_list);
1472 request->cb_idx = cb_idx;
1473 smid = request->smid;
1474 list_del(&request->tracker_list);
1475 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1476 return smid;
1477 }
1478
1479
1480 /**
1481 * mpt2sas_base_free_smid - put smid back on free_list
1482 * @ioc: per adapter object
1483 * @smid: system request message index
1484 *
1485 * Return nothing.
1486 */
1487 void
1488 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1489 {
1490 unsigned long flags;
1491 int i;
1492
1493 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1494 if (smid >= ioc->hi_priority_smid) {
1495 if (smid < ioc->internal_smid) {
1496 /* hi-priority */
1497 i = smid - ioc->hi_priority_smid;
1498 ioc->hpr_lookup[i].cb_idx = 0xFF;
1499 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1500 &ioc->hpr_free_list);
1501 } else {
1502 /* internal queue */
1503 i = smid - ioc->internal_smid;
1504 ioc->internal_lookup[i].cb_idx = 0xFF;
1505 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1506 &ioc->internal_free_list);
1507 }
1508 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1509 return;
1510 }
1511
1512 /* scsiio queue */
1513 i = smid - 1;
1514 ioc->scsi_lookup[i].cb_idx = 0xFF;
1515 ioc->scsi_lookup[i].scmd = NULL;
1516 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1517 &ioc->free_list);
1518 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1519
1520 /*
1521 * See _wait_for_commands_to_complete() call with regards to this code.
1522 */
1523 if (ioc->shost_recovery && ioc->pending_io_count) {
1524 if (ioc->pending_io_count == 1)
1525 wake_up(&ioc->reset_wq);
1526 ioc->pending_io_count--;
1527 }
1528 }
1529
1530 /**
1531 * _base_writeq - 64 bit write to MMIO
1532 * @ioc: per adapter object
1533 * @b: data payload
1534 * @addr: address in MMIO space
1535 * @writeq_lock: spin lock
1536 *
1537 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1538 * care of 32 bit environment where its not quarenteed to send the entire word
1539 * in one transfer.
1540 */
1541 #ifndef writeq
1542 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1543 spinlock_t *writeq_lock)
1544 {
1545 unsigned long flags;
1546 __u64 data_out = cpu_to_le64(b);
1547
1548 spin_lock_irqsave(writeq_lock, flags);
1549 writel((u32)(data_out), addr);
1550 writel((u32)(data_out >> 32), (addr + 4));
1551 spin_unlock_irqrestore(writeq_lock, flags);
1552 }
1553 #else
1554 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1555 spinlock_t *writeq_lock)
1556 {
1557 writeq(cpu_to_le64(b), addr);
1558 }
1559 #endif
1560
1561 /**
1562 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1563 * @ioc: per adapter object
1564 * @smid: system request message index
1565 * @handle: device handle
1566 *
1567 * Return nothing.
1568 */
1569 void
1570 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1571 {
1572 Mpi2RequestDescriptorUnion_t descriptor;
1573 u64 *request = (u64 *)&descriptor;
1574
1575
1576 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1577 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1578 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1579 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1580 descriptor.SCSIIO.LMID = 0;
1581 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1582 &ioc->scsi_lookup_lock);
1583 }
1584
1585
1586 /**
1587 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1588 * @ioc: per adapter object
1589 * @smid: system request message index
1590 *
1591 * Return nothing.
1592 */
1593 void
1594 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1595 {
1596 Mpi2RequestDescriptorUnion_t descriptor;
1597 u64 *request = (u64 *)&descriptor;
1598
1599 descriptor.HighPriority.RequestFlags =
1600 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1601 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1602 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1603 descriptor.HighPriority.LMID = 0;
1604 descriptor.HighPriority.Reserved1 = 0;
1605 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1606 &ioc->scsi_lookup_lock);
1607 }
1608
1609 /**
1610 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1611 * @ioc: per adapter object
1612 * @smid: system request message index
1613 *
1614 * Return nothing.
1615 */
1616 void
1617 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1618 {
1619 Mpi2RequestDescriptorUnion_t descriptor;
1620 u64 *request = (u64 *)&descriptor;
1621
1622 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1623 descriptor.Default.MSIxIndex = 0; /* TODO */
1624 descriptor.Default.SMID = cpu_to_le16(smid);
1625 descriptor.Default.LMID = 0;
1626 descriptor.Default.DescriptorTypeDependent = 0;
1627 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1628 &ioc->scsi_lookup_lock);
1629 }
1630
1631 /**
1632 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1633 * @ioc: per adapter object
1634 * @smid: system request message index
1635 * @io_index: value used to track the IO
1636 *
1637 * Return nothing.
1638 */
1639 void
1640 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1641 u16 io_index)
1642 {
1643 Mpi2RequestDescriptorUnion_t descriptor;
1644 u64 *request = (u64 *)&descriptor;
1645
1646 descriptor.SCSITarget.RequestFlags =
1647 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1648 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1649 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1650 descriptor.SCSITarget.LMID = 0;
1651 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1652 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1653 &ioc->scsi_lookup_lock);
1654 }
1655
1656 /**
1657 * _base_display_dell_branding - Disply branding string
1658 * @ioc: per adapter object
1659 *
1660 * Return nothing.
1661 */
1662 static void
1663 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1664 {
1665 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1666
1667 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1668 return;
1669
1670 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1671 switch (ioc->pdev->subsystem_device) {
1672 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1673 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1674 MPT2SAS_DELL_BRANDING_SIZE - 1);
1675 break;
1676 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1677 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1678 MPT2SAS_DELL_BRANDING_SIZE - 1);
1679 break;
1680 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1681 strncpy(dell_branding,
1682 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1683 MPT2SAS_DELL_BRANDING_SIZE - 1);
1684 break;
1685 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1686 strncpy(dell_branding,
1687 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1688 MPT2SAS_DELL_BRANDING_SIZE - 1);
1689 break;
1690 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1691 strncpy(dell_branding,
1692 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1693 MPT2SAS_DELL_BRANDING_SIZE - 1);
1694 break;
1695 case MPT2SAS_DELL_PERC_H200_SSDID:
1696 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1697 MPT2SAS_DELL_BRANDING_SIZE - 1);
1698 break;
1699 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1700 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1701 MPT2SAS_DELL_BRANDING_SIZE - 1);
1702 break;
1703 default:
1704 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1705 break;
1706 }
1707
1708 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1709 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1710 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1711 ioc->pdev->subsystem_device);
1712 }
1713
1714 /**
1715 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1716 * @ioc: per adapter object
1717 *
1718 * Return nothing.
1719 */
1720 static void
1721 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1722 {
1723 int i = 0;
1724 char desc[16];
1725 u8 revision;
1726 u32 iounit_pg1_flags;
1727
1728 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1729 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1730 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1731 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1732 ioc->name, desc,
1733 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1734 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1735 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1736 ioc->facts.FWVersion.Word & 0x000000FF,
1737 revision,
1738 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1739 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1740 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1741 ioc->bios_pg3.BiosVersion & 0x000000FF);
1742
1743 _base_display_dell_branding(ioc);
1744
1745 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1746
1747 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1748 printk("Initiator");
1749 i++;
1750 }
1751
1752 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1753 printk("%sTarget", i ? "," : "");
1754 i++;
1755 }
1756
1757 i = 0;
1758 printk("), ");
1759 printk("Capabilities=(");
1760
1761 if (ioc->facts.IOCCapabilities &
1762 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1763 printk("Raid");
1764 i++;
1765 }
1766
1767 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1768 printk("%sTLR", i ? "," : "");
1769 i++;
1770 }
1771
1772 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1773 printk("%sMulticast", i ? "," : "");
1774 i++;
1775 }
1776
1777 if (ioc->facts.IOCCapabilities &
1778 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1779 printk("%sBIDI Target", i ? "," : "");
1780 i++;
1781 }
1782
1783 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1784 printk("%sEEDP", i ? "," : "");
1785 i++;
1786 }
1787
1788 if (ioc->facts.IOCCapabilities &
1789 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1790 printk("%sSnapshot Buffer", i ? "," : "");
1791 i++;
1792 }
1793
1794 if (ioc->facts.IOCCapabilities &
1795 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1796 printk("%sDiag Trace Buffer", i ? "," : "");
1797 i++;
1798 }
1799
1800 if (ioc->facts.IOCCapabilities &
1801 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1802 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1803 i++;
1804 }
1805
1806 if (ioc->facts.IOCCapabilities &
1807 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1808 printk("%sTask Set Full", i ? "," : "");
1809 i++;
1810 }
1811
1812 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1813 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1814 printk("%sNCQ", i ? "," : "");
1815 i++;
1816 }
1817
1818 printk(")\n");
1819 }
1820
1821 /**
1822 * _base_static_config_pages - static start of day config pages
1823 * @ioc: per adapter object
1824 *
1825 * Return nothing.
1826 */
1827 static void
1828 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1829 {
1830 Mpi2ConfigReply_t mpi_reply;
1831 u32 iounit_pg1_flags;
1832
1833 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1834 if (ioc->ir_firmware)
1835 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1836 &ioc->manu_pg10);
1837 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1838 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1839 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1840 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1841 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1842 _base_display_ioc_capabilities(ioc);
1843
1844 /*
1845 * Enable task_set_full handling in iounit_pg1 when the
1846 * facts capabilities indicate that its supported.
1847 */
1848 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1849 if ((ioc->facts.IOCCapabilities &
1850 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1851 iounit_pg1_flags &=
1852 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1853 else
1854 iounit_pg1_flags |=
1855 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1856 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1857 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1858 }
1859
1860 /**
1861 * _base_release_memory_pools - release memory
1862 * @ioc: per adapter object
1863 *
1864 * Free memory allocated from _base_allocate_memory_pools.
1865 *
1866 * Return nothing.
1867 */
1868 static void
1869 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1870 {
1871 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1872 __func__));
1873
1874 if (ioc->request) {
1875 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1876 ioc->request, ioc->request_dma);
1877 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1878 ": free\n", ioc->name, ioc->request));
1879 ioc->request = NULL;
1880 }
1881
1882 if (ioc->sense) {
1883 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1884 if (ioc->sense_dma_pool)
1885 pci_pool_destroy(ioc->sense_dma_pool);
1886 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1887 ": free\n", ioc->name, ioc->sense));
1888 ioc->sense = NULL;
1889 }
1890
1891 if (ioc->reply) {
1892 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1893 if (ioc->reply_dma_pool)
1894 pci_pool_destroy(ioc->reply_dma_pool);
1895 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1896 ": free\n", ioc->name, ioc->reply));
1897 ioc->reply = NULL;
1898 }
1899
1900 if (ioc->reply_free) {
1901 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1902 ioc->reply_free_dma);
1903 if (ioc->reply_free_dma_pool)
1904 pci_pool_destroy(ioc->reply_free_dma_pool);
1905 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1906 "(0x%p): free\n", ioc->name, ioc->reply_free));
1907 ioc->reply_free = NULL;
1908 }
1909
1910 if (ioc->reply_post_free) {
1911 pci_pool_free(ioc->reply_post_free_dma_pool,
1912 ioc->reply_post_free, ioc->reply_post_free_dma);
1913 if (ioc->reply_post_free_dma_pool)
1914 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1915 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1916 "reply_post_free_pool(0x%p): free\n", ioc->name,
1917 ioc->reply_post_free));
1918 ioc->reply_post_free = NULL;
1919 }
1920
1921 if (ioc->config_page) {
1922 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1923 "config_page(0x%p): free\n", ioc->name,
1924 ioc->config_page));
1925 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1926 ioc->config_page, ioc->config_page_dma);
1927 }
1928
1929 if (ioc->scsi_lookup) {
1930 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
1931 ioc->scsi_lookup = NULL;
1932 }
1933 kfree(ioc->hpr_lookup);
1934 kfree(ioc->internal_lookup);
1935 }
1936
1937
1938 /**
1939 * _base_allocate_memory_pools - allocate start of day memory pools
1940 * @ioc: per adapter object
1941 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1942 *
1943 * Returns 0 success, anything else error
1944 */
1945 static int
1946 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1947 {
1948 Mpi2IOCFactsReply_t *facts;
1949 u32 queue_size, queue_diff;
1950 u16 max_sge_elements;
1951 u16 num_of_reply_frames;
1952 u16 chains_needed_per_io;
1953 u32 sz, total_sz;
1954 u32 retry_sz;
1955 u16 max_request_credit;
1956
1957 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1958 __func__));
1959
1960 retry_sz = 0;
1961 facts = &ioc->facts;
1962
1963 /* command line tunables for max sgl entries */
1964 if (max_sgl_entries != -1) {
1965 ioc->shost->sg_tablesize = (max_sgl_entries <
1966 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1967 MPT2SAS_SG_DEPTH;
1968 } else {
1969 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1970 }
1971
1972 /* command line tunables for max controller queue depth */
1973 if (max_queue_depth != -1) {
1974 max_request_credit = (max_queue_depth < facts->RequestCredit)
1975 ? max_queue_depth : facts->RequestCredit;
1976 } else {
1977 max_request_credit = (facts->RequestCredit >
1978 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1979 facts->RequestCredit;
1980 }
1981
1982 ioc->hba_queue_depth = max_request_credit;
1983 ioc->hi_priority_depth = facts->HighPriorityCredit;
1984 ioc->internal_depth = ioc->hi_priority_depth + 5;
1985
1986 /* request frame size */
1987 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1988
1989 /* reply frame size */
1990 ioc->reply_sz = facts->ReplyFrameSize * 4;
1991
1992 retry_allocation:
1993 total_sz = 0;
1994 /* calculate number of sg elements left over in the 1st frame */
1995 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1996 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1997 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1998
1999 /* now do the same for a chain buffer */
2000 max_sge_elements = ioc->request_sz - ioc->sge_size;
2001 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2002
2003 ioc->chain_offset_value_for_main_message =
2004 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2005 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2006
2007 /*
2008 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2009 */
2010 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2011 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2012 + 1;
2013 if (chains_needed_per_io > facts->MaxChainDepth) {
2014 chains_needed_per_io = facts->MaxChainDepth;
2015 ioc->shost->sg_tablesize = min_t(u16,
2016 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2017 * chains_needed_per_io), ioc->shost->sg_tablesize);
2018 }
2019 ioc->chains_needed_per_io = chains_needed_per_io;
2020
2021 /* reply free queue sizing - taking into account for events */
2022 num_of_reply_frames = ioc->hba_queue_depth + 32;
2023
2024 /* number of replies frames can't be a multiple of 16 */
2025 /* decrease number of reply frames by 1 */
2026 if (!(num_of_reply_frames % 16))
2027 num_of_reply_frames--;
2028
2029 /* calculate number of reply free queue entries
2030 * (must be multiple of 16)
2031 */
2032
2033 /* (we know reply_free_queue_depth is not a multiple of 16) */
2034 queue_size = num_of_reply_frames;
2035 queue_size += 16 - (queue_size % 16);
2036 ioc->reply_free_queue_depth = queue_size;
2037
2038 /* reply descriptor post queue sizing */
2039 /* this size should be the number of request frames + number of reply
2040 * frames
2041 */
2042
2043 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2044 /* round up to 16 byte boundary */
2045 if (queue_size % 16)
2046 queue_size += 16 - (queue_size % 16);
2047
2048 /* check against IOC maximum reply post queue depth */
2049 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2050 queue_diff = queue_size -
2051 facts->MaxReplyDescriptorPostQueueDepth;
2052
2053 /* round queue_diff up to multiple of 16 */
2054 if (queue_diff % 16)
2055 queue_diff += 16 - (queue_diff % 16);
2056
2057 /* adjust hba_queue_depth, reply_free_queue_depth,
2058 * and queue_size
2059 */
2060 ioc->hba_queue_depth -= (queue_diff / 2);
2061 ioc->reply_free_queue_depth -= (queue_diff / 2);
2062 queue_size = facts->MaxReplyDescriptorPostQueueDepth;
2063 }
2064 ioc->reply_post_queue_depth = queue_size;
2065
2066 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2067 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2068 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2069 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2070 ioc->chains_needed_per_io));
2071
2072 ioc->scsiio_depth = ioc->hba_queue_depth -
2073 ioc->hi_priority_depth - ioc->internal_depth;
2074
2075 /* set the scsi host can_queue depth
2076 * with some internal commands that could be outstanding
2077 */
2078 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2079 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2080 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2081
2082 /* contiguous pool for request and chains, 16 byte align, one extra "
2083 * "frame for smid=0
2084 */
2085 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2086 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
2087
2088 /* hi-priority queue */
2089 sz += (ioc->hi_priority_depth * ioc->request_sz);
2090
2091 /* internal queue */
2092 sz += (ioc->internal_depth * ioc->request_sz);
2093
2094 ioc->request_dma_sz = sz;
2095 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2096 if (!ioc->request) {
2097 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2098 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2099 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2100 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2101 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2102 goto out;
2103 retry_sz += 64;
2104 ioc->hba_queue_depth = max_request_credit - retry_sz;
2105 goto retry_allocation;
2106 }
2107
2108 if (retry_sz)
2109 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2110 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2111 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2112 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2113
2114
2115 /* hi-priority queue */
2116 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2117 ioc->request_sz);
2118 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2119 ioc->request_sz);
2120
2121 /* internal queue */
2122 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2123 ioc->request_sz);
2124 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2125 ioc->request_sz);
2126
2127 ioc->chain = ioc->internal + (ioc->internal_depth *
2128 ioc->request_sz);
2129 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
2130 ioc->request_sz);
2131
2132 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2133 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2134 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2135 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2136 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
2137 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
2138 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2139 ioc->request_sz))/1024));
2140 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2141 ioc->name, (unsigned long long) ioc->request_dma));
2142 total_sz += sz;
2143
2144 sz = ioc->scsiio_depth * sizeof(struct request_tracker);
2145 ioc->scsi_lookup_pages = get_order(sz);
2146 ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
2147 GFP_KERNEL, ioc->scsi_lookup_pages);
2148 if (!ioc->scsi_lookup) {
2149 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2150 "sz(%d)\n", ioc->name, (int)sz);
2151 goto out;
2152 }
2153
2154 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2155 "depth(%d)\n", ioc->name, ioc->request,
2156 ioc->scsiio_depth));
2157
2158 /* initialize hi-priority queue smid's */
2159 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2160 sizeof(struct request_tracker), GFP_KERNEL);
2161 if (!ioc->hpr_lookup) {
2162 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2163 ioc->name);
2164 goto out;
2165 }
2166 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2167 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2168 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2169 ioc->hi_priority_depth, ioc->hi_priority_smid));
2170
2171 /* initialize internal queue smid's */
2172 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2173 sizeof(struct request_tracker), GFP_KERNEL);
2174 if (!ioc->internal_lookup) {
2175 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2176 ioc->name);
2177 goto out;
2178 }
2179 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2180 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2181 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2182 ioc->internal_depth, ioc->internal_smid));
2183
2184 /* sense buffers, 4 byte align */
2185 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2186 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2187 0);
2188 if (!ioc->sense_dma_pool) {
2189 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2190 ioc->name);
2191 goto out;
2192 }
2193 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2194 &ioc->sense_dma);
2195 if (!ioc->sense) {
2196 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2197 ioc->name);
2198 goto out;
2199 }
2200 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2201 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2202 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2203 SCSI_SENSE_BUFFERSIZE, sz/1024));
2204 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2205 ioc->name, (unsigned long long)ioc->sense_dma));
2206 total_sz += sz;
2207
2208 /* reply pool, 4 byte align */
2209 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2210 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2211 0);
2212 if (!ioc->reply_dma_pool) {
2213 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2214 ioc->name);
2215 goto out;
2216 }
2217 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2218 &ioc->reply_dma);
2219 if (!ioc->reply) {
2220 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2221 ioc->name);
2222 goto out;
2223 }
2224 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2225 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2226 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2227 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2228 ioc->name, (unsigned long long)ioc->reply_dma));
2229 total_sz += sz;
2230
2231 /* reply free queue, 16 byte align */
2232 sz = ioc->reply_free_queue_depth * 4;
2233 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2234 ioc->pdev, sz, 16, 0);
2235 if (!ioc->reply_free_dma_pool) {
2236 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2237 "failed\n", ioc->name);
2238 goto out;
2239 }
2240 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2241 &ioc->reply_free_dma);
2242 if (!ioc->reply_free) {
2243 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2244 "failed\n", ioc->name);
2245 goto out;
2246 }
2247 memset(ioc->reply_free, 0, sz);
2248 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2249 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2250 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2251 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2252 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2253 total_sz += sz;
2254
2255 /* reply post queue, 16 byte align */
2256 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2257 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2258 ioc->pdev, sz, 16, 0);
2259 if (!ioc->reply_post_free_dma_pool) {
2260 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2261 "failed\n", ioc->name);
2262 goto out;
2263 }
2264 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2265 GFP_KERNEL, &ioc->reply_post_free_dma);
2266 if (!ioc->reply_post_free) {
2267 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2268 "failed\n", ioc->name);
2269 goto out;
2270 }
2271 memset(ioc->reply_post_free, 0, sz);
2272 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2273 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2274 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2275 sz/1024));
2276 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2277 "(0x%llx)\n", ioc->name, (unsigned long long)
2278 ioc->reply_post_free_dma));
2279 total_sz += sz;
2280
2281 ioc->config_page_sz = 512;
2282 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2283 ioc->config_page_sz, &ioc->config_page_dma);
2284 if (!ioc->config_page) {
2285 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2286 "failed\n", ioc->name);
2287 goto out;
2288 }
2289 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2290 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2291 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2292 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2293 total_sz += ioc->config_page_sz;
2294
2295 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2296 ioc->name, total_sz/1024);
2297 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2298 "Max Controller Queue Depth(%d)\n",
2299 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2300 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2301 ioc->name, ioc->shost->sg_tablesize);
2302 return 0;
2303
2304 out:
2305 _base_release_memory_pools(ioc);
2306 return -ENOMEM;
2307 }
2308
2309
2310 /**
2311 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2312 * @ioc: Pointer to MPT_ADAPTER structure
2313 * @cooked: Request raw or cooked IOC state
2314 *
2315 * Returns all IOC Doorbell register bits if cooked==0, else just the
2316 * Doorbell bits in MPI_IOC_STATE_MASK.
2317 */
2318 u32
2319 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2320 {
2321 u32 s, sc;
2322
2323 s = readl(&ioc->chip->Doorbell);
2324 sc = s & MPI2_IOC_STATE_MASK;
2325 return cooked ? sc : s;
2326 }
2327
2328 /**
2329 * _base_wait_on_iocstate - waiting on a particular ioc state
2330 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2331 * @timeout: timeout in second
2332 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2333 *
2334 * Returns 0 for success, non-zero for failure.
2335 */
2336 static int
2337 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2338 int sleep_flag)
2339 {
2340 u32 count, cntdn;
2341 u32 current_state;
2342
2343 count = 0;
2344 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2345 do {
2346 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2347 if (current_state == ioc_state)
2348 return 0;
2349 if (count && current_state == MPI2_IOC_STATE_FAULT)
2350 break;
2351 if (sleep_flag == CAN_SLEEP)
2352 msleep(1);
2353 else
2354 udelay(500);
2355 count++;
2356 } while (--cntdn);
2357
2358 return current_state;
2359 }
2360
2361 /**
2362 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2363 * a write to the doorbell)
2364 * @ioc: per adapter object
2365 * @timeout: timeout in second
2366 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2367 *
2368 * Returns 0 for success, non-zero for failure.
2369 *
2370 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2371 */
2372 static int
2373 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2374 int sleep_flag)
2375 {
2376 u32 cntdn, count;
2377 u32 int_status;
2378
2379 count = 0;
2380 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2381 do {
2382 int_status = readl(&ioc->chip->HostInterruptStatus);
2383 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2384 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2385 "successfull count(%d), timeout(%d)\n", ioc->name,
2386 __func__, count, timeout));
2387 return 0;
2388 }
2389 if (sleep_flag == CAN_SLEEP)
2390 msleep(1);
2391 else
2392 udelay(500);
2393 count++;
2394 } while (--cntdn);
2395
2396 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2397 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2398 return -EFAULT;
2399 }
2400
2401 /**
2402 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2403 * @ioc: per adapter object
2404 * @timeout: timeout in second
2405 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2406 *
2407 * Returns 0 for success, non-zero for failure.
2408 *
2409 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2410 * doorbell.
2411 */
2412 static int
2413 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2414 int sleep_flag)
2415 {
2416 u32 cntdn, count;
2417 u32 int_status;
2418 u32 doorbell;
2419
2420 count = 0;
2421 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2422 do {
2423 int_status = readl(&ioc->chip->HostInterruptStatus);
2424 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2425 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2426 "successfull count(%d), timeout(%d)\n", ioc->name,
2427 __func__, count, timeout));
2428 return 0;
2429 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2430 doorbell = readl(&ioc->chip->Doorbell);
2431 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2432 MPI2_IOC_STATE_FAULT) {
2433 mpt2sas_base_fault_info(ioc , doorbell);
2434 return -EFAULT;
2435 }
2436 } else if (int_status == 0xFFFFFFFF)
2437 goto out;
2438
2439 if (sleep_flag == CAN_SLEEP)
2440 msleep(1);
2441 else
2442 udelay(500);
2443 count++;
2444 } while (--cntdn);
2445
2446 out:
2447 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2448 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2449 return -EFAULT;
2450 }
2451
2452 /**
2453 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2454 * @ioc: per adapter object
2455 * @timeout: timeout in second
2456 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2457 *
2458 * Returns 0 for success, non-zero for failure.
2459 *
2460 */
2461 static int
2462 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2463 int sleep_flag)
2464 {
2465 u32 cntdn, count;
2466 u32 doorbell_reg;
2467
2468 count = 0;
2469 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2470 do {
2471 doorbell_reg = readl(&ioc->chip->Doorbell);
2472 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2473 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2474 "successfull count(%d), timeout(%d)\n", ioc->name,
2475 __func__, count, timeout));
2476 return 0;
2477 }
2478 if (sleep_flag == CAN_SLEEP)
2479 msleep(1);
2480 else
2481 udelay(500);
2482 count++;
2483 } while (--cntdn);
2484
2485 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2486 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2487 return -EFAULT;
2488 }
2489
2490 /**
2491 * _base_send_ioc_reset - send doorbell reset
2492 * @ioc: per adapter object
2493 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2494 * @timeout: timeout in second
2495 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2496 *
2497 * Returns 0 for success, non-zero for failure.
2498 */
2499 static int
2500 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2501 int sleep_flag)
2502 {
2503 u32 ioc_state;
2504 int r = 0;
2505
2506 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2507 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2508 ioc->name, __func__);
2509 return -EFAULT;
2510 }
2511
2512 if (!(ioc->facts.IOCCapabilities &
2513 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2514 return -EFAULT;
2515
2516 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2517
2518 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2519 &ioc->chip->Doorbell);
2520 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2521 r = -EFAULT;
2522 goto out;
2523 }
2524 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2525 timeout, sleep_flag);
2526 if (ioc_state) {
2527 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2528 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2529 r = -EFAULT;
2530 goto out;
2531 }
2532 out:
2533 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2534 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2535 return r;
2536 }
2537
2538 /**
2539 * _base_handshake_req_reply_wait - send request thru doorbell interface
2540 * @ioc: per adapter object
2541 * @request_bytes: request length
2542 * @request: pointer having request payload
2543 * @reply_bytes: reply length
2544 * @reply: pointer to reply payload
2545 * @timeout: timeout in second
2546 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2547 *
2548 * Returns 0 for success, non-zero for failure.
2549 */
2550 static int
2551 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2552 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2553 {
2554 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2555 int i;
2556 u8 failed;
2557 u16 dummy;
2558 u32 *mfp;
2559
2560 /* make sure doorbell is not in use */
2561 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2562 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2563 " (line=%d)\n", ioc->name, __LINE__);
2564 return -EFAULT;
2565 }
2566
2567 /* clear pending doorbell interrupts from previous state changes */
2568 if (readl(&ioc->chip->HostInterruptStatus) &
2569 MPI2_HIS_IOC2SYS_DB_STATUS)
2570 writel(0, &ioc->chip->HostInterruptStatus);
2571
2572 /* send message to ioc */
2573 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2574 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2575 &ioc->chip->Doorbell);
2576
2577 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2578 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2579 "int failed (line=%d)\n", ioc->name, __LINE__);
2580 return -EFAULT;
2581 }
2582 writel(0, &ioc->chip->HostInterruptStatus);
2583
2584 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2585 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2586 "ack failed (line=%d)\n", ioc->name, __LINE__);
2587 return -EFAULT;
2588 }
2589
2590 /* send message 32-bits at a time */
2591 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2592 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2593 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2594 failed = 1;
2595 }
2596
2597 if (failed) {
2598 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2599 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2600 return -EFAULT;
2601 }
2602
2603 /* now wait for the reply */
2604 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2605 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2606 "int failed (line=%d)\n", ioc->name, __LINE__);
2607 return -EFAULT;
2608 }
2609
2610 /* read the first two 16-bits, it gives the total length of the reply */
2611 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2612 & MPI2_DOORBELL_DATA_MASK);
2613 writel(0, &ioc->chip->HostInterruptStatus);
2614 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2615 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2616 "int failed (line=%d)\n", ioc->name, __LINE__);
2617 return -EFAULT;
2618 }
2619 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2620 & MPI2_DOORBELL_DATA_MASK);
2621 writel(0, &ioc->chip->HostInterruptStatus);
2622
2623 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2624 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2625 printk(MPT2SAS_ERR_FMT "doorbell "
2626 "handshake int failed (line=%d)\n", ioc->name,
2627 __LINE__);
2628 return -EFAULT;
2629 }
2630 if (i >= reply_bytes/2) /* overflow case */
2631 dummy = readl(&ioc->chip->Doorbell);
2632 else
2633 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2634 & MPI2_DOORBELL_DATA_MASK);
2635 writel(0, &ioc->chip->HostInterruptStatus);
2636 }
2637
2638 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2639 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2640 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2641 " (line=%d)\n", ioc->name, __LINE__));
2642 }
2643 writel(0, &ioc->chip->HostInterruptStatus);
2644
2645 if (ioc->logging_level & MPT_DEBUG_INIT) {
2646 mfp = (u32 *)reply;
2647 printk(KERN_INFO "\toffset:data\n");
2648 for (i = 0; i < reply_bytes/4; i++)
2649 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
2650 le32_to_cpu(mfp[i]));
2651 }
2652 return 0;
2653 }
2654
2655 /**
2656 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2657 * @ioc: per adapter object
2658 * @mpi_reply: the reply payload from FW
2659 * @mpi_request: the request payload sent to FW
2660 *
2661 * The SAS IO Unit Control Request message allows the host to perform low-level
2662 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2663 * to obtain the IOC assigned device handles for a device if it has other
2664 * identifying information about the device, in addition allows the host to
2665 * remove IOC resources associated with the device.
2666 *
2667 * Returns 0 for success, non-zero for failure.
2668 */
2669 int
2670 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2671 Mpi2SasIoUnitControlReply_t *mpi_reply,
2672 Mpi2SasIoUnitControlRequest_t *mpi_request)
2673 {
2674 u16 smid;
2675 u32 ioc_state;
2676 unsigned long timeleft;
2677 u8 issue_reset;
2678 int rc;
2679 void *request;
2680 u16 wait_state_count;
2681
2682 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2683 __func__));
2684
2685 mutex_lock(&ioc->base_cmds.mutex);
2686
2687 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2688 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2689 ioc->name, __func__);
2690 rc = -EAGAIN;
2691 goto out;
2692 }
2693
2694 wait_state_count = 0;
2695 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2696 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2697 if (wait_state_count++ == 10) {
2698 printk(MPT2SAS_ERR_FMT
2699 "%s: failed due to ioc not operational\n",
2700 ioc->name, __func__);
2701 rc = -EFAULT;
2702 goto out;
2703 }
2704 ssleep(1);
2705 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2706 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2707 "operational state(count=%d)\n", ioc->name,
2708 __func__, wait_state_count);
2709 }
2710
2711 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2712 if (!smid) {
2713 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2714 ioc->name, __func__);
2715 rc = -EAGAIN;
2716 goto out;
2717 }
2718
2719 rc = 0;
2720 ioc->base_cmds.status = MPT2_CMD_PENDING;
2721 request = mpt2sas_base_get_msg_frame(ioc, smid);
2722 ioc->base_cmds.smid = smid;
2723 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2724 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2725 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2726 ioc->ioc_link_reset_in_progress = 1;
2727 mpt2sas_base_put_smid_default(ioc, smid);
2728 init_completion(&ioc->base_cmds.done);
2729 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2730 msecs_to_jiffies(10000));
2731 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2732 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2733 ioc->ioc_link_reset_in_progress)
2734 ioc->ioc_link_reset_in_progress = 0;
2735 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2736 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2737 ioc->name, __func__);
2738 _debug_dump_mf(mpi_request,
2739 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2740 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2741 issue_reset = 1;
2742 goto issue_host_reset;
2743 }
2744 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2745 memcpy(mpi_reply, ioc->base_cmds.reply,
2746 sizeof(Mpi2SasIoUnitControlReply_t));
2747 else
2748 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2749 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2750 goto out;
2751
2752 issue_host_reset:
2753 if (issue_reset)
2754 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2755 FORCE_BIG_HAMMER);
2756 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2757 rc = -EFAULT;
2758 out:
2759 mutex_unlock(&ioc->base_cmds.mutex);
2760 return rc;
2761 }
2762
2763
2764 /**
2765 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2766 * @ioc: per adapter object
2767 * @mpi_reply: the reply payload from FW
2768 * @mpi_request: the request payload sent to FW
2769 *
2770 * The SCSI Enclosure Processor request message causes the IOC to
2771 * communicate with SES devices to control LED status signals.
2772 *
2773 * Returns 0 for success, non-zero for failure.
2774 */
2775 int
2776 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2777 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2778 {
2779 u16 smid;
2780 u32 ioc_state;
2781 unsigned long timeleft;
2782 u8 issue_reset;
2783 int rc;
2784 void *request;
2785 u16 wait_state_count;
2786
2787 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2788 __func__));
2789
2790 mutex_lock(&ioc->base_cmds.mutex);
2791
2792 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2793 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2794 ioc->name, __func__);
2795 rc = -EAGAIN;
2796 goto out;
2797 }
2798
2799 wait_state_count = 0;
2800 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2801 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2802 if (wait_state_count++ == 10) {
2803 printk(MPT2SAS_ERR_FMT
2804 "%s: failed due to ioc not operational\n",
2805 ioc->name, __func__);
2806 rc = -EFAULT;
2807 goto out;
2808 }
2809 ssleep(1);
2810 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2811 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2812 "operational state(count=%d)\n", ioc->name,
2813 __func__, wait_state_count);
2814 }
2815
2816 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2817 if (!smid) {
2818 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2819 ioc->name, __func__);
2820 rc = -EAGAIN;
2821 goto out;
2822 }
2823
2824 rc = 0;
2825 ioc->base_cmds.status = MPT2_CMD_PENDING;
2826 request = mpt2sas_base_get_msg_frame(ioc, smid);
2827 ioc->base_cmds.smid = smid;
2828 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2829 mpt2sas_base_put_smid_default(ioc, smid);
2830 init_completion(&ioc->base_cmds.done);
2831 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2832 msecs_to_jiffies(10000));
2833 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2834 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2835 ioc->name, __func__);
2836 _debug_dump_mf(mpi_request,
2837 sizeof(Mpi2SepRequest_t)/4);
2838 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2839 issue_reset = 1;
2840 goto issue_host_reset;
2841 }
2842 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2843 memcpy(mpi_reply, ioc->base_cmds.reply,
2844 sizeof(Mpi2SepReply_t));
2845 else
2846 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2847 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2848 goto out;
2849
2850 issue_host_reset:
2851 if (issue_reset)
2852 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2853 FORCE_BIG_HAMMER);
2854 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2855 rc = -EFAULT;
2856 out:
2857 mutex_unlock(&ioc->base_cmds.mutex);
2858 return rc;
2859 }
2860
2861 /**
2862 * _base_get_port_facts - obtain port facts reply and save in ioc
2863 * @ioc: per adapter object
2864 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2865 *
2866 * Returns 0 for success, non-zero for failure.
2867 */
2868 static int
2869 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2870 {
2871 Mpi2PortFactsRequest_t mpi_request;
2872 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2873 int mpi_reply_sz, mpi_request_sz, r;
2874
2875 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2876 __func__));
2877
2878 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2879 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2880 memset(&mpi_request, 0, mpi_request_sz);
2881 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2882 mpi_request.PortNumber = port;
2883 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2884 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2885
2886 if (r != 0) {
2887 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2888 ioc->name, __func__, r);
2889 return r;
2890 }
2891
2892 pfacts = &ioc->pfacts[port];
2893 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2894 pfacts->PortNumber = mpi_reply.PortNumber;
2895 pfacts->VP_ID = mpi_reply.VP_ID;
2896 pfacts->VF_ID = mpi_reply.VF_ID;
2897 pfacts->MaxPostedCmdBuffers =
2898 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2899
2900 return 0;
2901 }
2902
2903 /**
2904 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2905 * @ioc: per adapter object
2906 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2907 *
2908 * Returns 0 for success, non-zero for failure.
2909 */
2910 static int
2911 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2912 {
2913 Mpi2IOCFactsRequest_t mpi_request;
2914 Mpi2IOCFactsReply_t mpi_reply, *facts;
2915 int mpi_reply_sz, mpi_request_sz, r;
2916
2917 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2918 __func__));
2919
2920 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2921 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2922 memset(&mpi_request, 0, mpi_request_sz);
2923 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2924 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2925 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2926
2927 if (r != 0) {
2928 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2929 ioc->name, __func__, r);
2930 return r;
2931 }
2932
2933 facts = &ioc->facts;
2934 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2935 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2936 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2937 facts->VP_ID = mpi_reply.VP_ID;
2938 facts->VF_ID = mpi_reply.VF_ID;
2939 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2940 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2941 facts->WhoInit = mpi_reply.WhoInit;
2942 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2943 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2944 facts->MaxReplyDescriptorPostQueueDepth =
2945 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2946 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2947 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2948 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2949 ioc->ir_firmware = 1;
2950 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2951 facts->IOCRequestFrameSize =
2952 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2953 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2954 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2955 ioc->shost->max_id = -1;
2956 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2957 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2958 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2959 facts->HighPriorityCredit =
2960 le16_to_cpu(mpi_reply.HighPriorityCredit);
2961 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2962 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2963
2964 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2965 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2966 facts->MaxChainDepth));
2967 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2968 "reply frame size(%d)\n", ioc->name,
2969 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2970 return 0;
2971 }
2972
2973 /**
2974 * _base_send_ioc_init - send ioc_init to firmware
2975 * @ioc: per adapter object
2976 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2977 *
2978 * Returns 0 for success, non-zero for failure.
2979 */
2980 static int
2981 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2982 {
2983 Mpi2IOCInitRequest_t mpi_request;
2984 Mpi2IOCInitReply_t mpi_reply;
2985 int r;
2986 struct timeval current_time;
2987 u16 ioc_status;
2988
2989 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2990 __func__));
2991
2992 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2993 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2994 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2995 mpi_request.VF_ID = 0; /* TODO */
2996 mpi_request.VP_ID = 0;
2997 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2998 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2999
3000 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
3001 * removed and made reserved. For those with older firmware will need
3002 * this fix. It was decided that the Reply and Request frame sizes are
3003 * the same.
3004 */
3005 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
3006 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
3007 /* mpi_request.SystemReplyFrameSize =
3008 * cpu_to_le16(ioc->reply_sz);
3009 */
3010 }
3011
3012 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3013 mpi_request.ReplyDescriptorPostQueueDepth =
3014 cpu_to_le16(ioc->reply_post_queue_depth);
3015 mpi_request.ReplyFreeQueueDepth =
3016 cpu_to_le16(ioc->reply_free_queue_depth);
3017
3018 #if BITS_PER_LONG > 32
3019 mpi_request.SenseBufferAddressHigh =
3020 cpu_to_le32(ioc->sense_dma >> 32);
3021 mpi_request.SystemReplyAddressHigh =
3022 cpu_to_le32(ioc->reply_dma >> 32);
3023 mpi_request.SystemRequestFrameBaseAddress =
3024 cpu_to_le64(ioc->request_dma);
3025 mpi_request.ReplyFreeQueueAddress =
3026 cpu_to_le64(ioc->reply_free_dma);
3027 mpi_request.ReplyDescriptorPostQueueAddress =
3028 cpu_to_le64(ioc->reply_post_free_dma);
3029 #else
3030 mpi_request.SystemRequestFrameBaseAddress =
3031 cpu_to_le32(ioc->request_dma);
3032 mpi_request.ReplyFreeQueueAddress =
3033 cpu_to_le32(ioc->reply_free_dma);
3034 mpi_request.ReplyDescriptorPostQueueAddress =
3035 cpu_to_le32(ioc->reply_post_free_dma);
3036 #endif
3037
3038 /* This time stamp specifies number of milliseconds
3039 * since epoch ~ midnight January 1, 1970.
3040 */
3041 do_gettimeofday(&current_time);
3042 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3043 (current_time.tv_usec / 1000));
3044
3045 if (ioc->logging_level & MPT_DEBUG_INIT) {
3046 u32 *mfp;
3047 int i;
3048
3049 mfp = (u32 *)&mpi_request;
3050 printk(KERN_INFO "\toffset:data\n");
3051 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3052 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3053 le32_to_cpu(mfp[i]));
3054 }
3055
3056 r = _base_handshake_req_reply_wait(ioc,
3057 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3058 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3059 sleep_flag);
3060
3061 if (r != 0) {
3062 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3063 ioc->name, __func__, r);
3064 return r;
3065 }
3066
3067 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3068 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3069 mpi_reply.IOCLogInfo) {
3070 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3071 r = -EIO;
3072 }
3073
3074 return 0;
3075 }
3076
3077 /**
3078 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3079 * @ioc: per adapter object
3080 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3081 *
3082 * Returns 0 for success, non-zero for failure.
3083 */
3084 static int
3085 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3086 {
3087 Mpi2PortEnableRequest_t *mpi_request;
3088 u32 ioc_state;
3089 unsigned long timeleft;
3090 int r = 0;
3091 u16 smid;
3092
3093 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3094
3095 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3096 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3097 ioc->name, __func__);
3098 return -EAGAIN;
3099 }
3100
3101 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3102 if (!smid) {
3103 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3104 ioc->name, __func__);
3105 return -EAGAIN;
3106 }
3107
3108 ioc->base_cmds.status = MPT2_CMD_PENDING;
3109 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3110 ioc->base_cmds.smid = smid;
3111 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3112 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3113 mpi_request->VF_ID = 0; /* TODO */
3114 mpi_request->VP_ID = 0;
3115
3116 mpt2sas_base_put_smid_default(ioc, smid);
3117 init_completion(&ioc->base_cmds.done);
3118 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3119 300*HZ);
3120 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3121 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3122 ioc->name, __func__);
3123 _debug_dump_mf(mpi_request,
3124 sizeof(Mpi2PortEnableRequest_t)/4);
3125 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3126 r = -EFAULT;
3127 else
3128 r = -ETIME;
3129 goto out;
3130 } else
3131 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3132 ioc->name, __func__));
3133
3134 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3135 60, sleep_flag);
3136 if (ioc_state) {
3137 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3138 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3139 r = -EFAULT;
3140 }
3141 out:
3142 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3143 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3144 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3145 return r;
3146 }
3147
3148 /**
3149 * _base_unmask_events - turn on notification for this event
3150 * @ioc: per adapter object
3151 * @event: firmware event
3152 *
3153 * The mask is stored in ioc->event_masks.
3154 */
3155 static void
3156 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3157 {
3158 u32 desired_event;
3159
3160 if (event >= 128)
3161 return;
3162
3163 desired_event = (1 << (event % 32));
3164
3165 if (event < 32)
3166 ioc->event_masks[0] &= ~desired_event;
3167 else if (event < 64)
3168 ioc->event_masks[1] &= ~desired_event;
3169 else if (event < 96)
3170 ioc->event_masks[2] &= ~desired_event;
3171 else if (event < 128)
3172 ioc->event_masks[3] &= ~desired_event;
3173 }
3174
3175 /**
3176 * _base_event_notification - send event notification
3177 * @ioc: per adapter object
3178 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3179 *
3180 * Returns 0 for success, non-zero for failure.
3181 */
3182 static int
3183 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3184 {
3185 Mpi2EventNotificationRequest_t *mpi_request;
3186 unsigned long timeleft;
3187 u16 smid;
3188 int r = 0;
3189 int i;
3190
3191 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3192 __func__));
3193
3194 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3195 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3196 ioc->name, __func__);
3197 return -EAGAIN;
3198 }
3199
3200 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3201 if (!smid) {
3202 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3203 ioc->name, __func__);
3204 return -EAGAIN;
3205 }
3206 ioc->base_cmds.status = MPT2_CMD_PENDING;
3207 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3208 ioc->base_cmds.smid = smid;
3209 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3210 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3211 mpi_request->VF_ID = 0; /* TODO */
3212 mpi_request->VP_ID = 0;
3213 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3214 mpi_request->EventMasks[i] =
3215 cpu_to_le32(ioc->event_masks[i]);
3216 mpt2sas_base_put_smid_default(ioc, smid);
3217 init_completion(&ioc->base_cmds.done);
3218 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3219 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3220 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3221 ioc->name, __func__);
3222 _debug_dump_mf(mpi_request,
3223 sizeof(Mpi2EventNotificationRequest_t)/4);
3224 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3225 r = -EFAULT;
3226 else
3227 r = -ETIME;
3228 } else
3229 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3230 ioc->name, __func__));
3231 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3232 return r;
3233 }
3234
3235 /**
3236 * mpt2sas_base_validate_event_type - validating event types
3237 * @ioc: per adapter object
3238 * @event: firmware event
3239 *
3240 * This will turn on firmware event notification when application
3241 * ask for that event. We don't mask events that are already enabled.
3242 */
3243 void
3244 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3245 {
3246 int i, j;
3247 u32 event_mask, desired_event;
3248 u8 send_update_to_fw;
3249
3250 for (i = 0, send_update_to_fw = 0; i <
3251 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3252 event_mask = ~event_type[i];
3253 desired_event = 1;
3254 for (j = 0; j < 32; j++) {
3255 if (!(event_mask & desired_event) &&
3256 (ioc->event_masks[i] & desired_event)) {
3257 ioc->event_masks[i] &= ~desired_event;
3258 send_update_to_fw = 1;
3259 }
3260 desired_event = (desired_event << 1);
3261 }
3262 }
3263
3264 if (!send_update_to_fw)
3265 return;
3266
3267 mutex_lock(&ioc->base_cmds.mutex);
3268 _base_event_notification(ioc, CAN_SLEEP);
3269 mutex_unlock(&ioc->base_cmds.mutex);
3270 }
3271
3272 /**
3273 * _base_diag_reset - the "big hammer" start of day reset
3274 * @ioc: per adapter object
3275 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3276 *
3277 * Returns 0 for success, non-zero for failure.
3278 */
3279 static int
3280 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3281 {
3282 u32 host_diagnostic;
3283 u32 ioc_state;
3284 u32 count;
3285 u32 hcb_size;
3286
3287 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3288
3289 _base_save_msix_table(ioc);
3290
3291 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3292 ioc->name));
3293
3294 count = 0;
3295 do {
3296 /* Write magic sequence to WriteSequence register
3297 * Loop until in diagnostic mode
3298 */
3299 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3300 "sequence\n", ioc->name));
3301 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3302 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3303 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3304 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3305 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3306 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3307 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3308
3309 /* wait 100 msec */
3310 if (sleep_flag == CAN_SLEEP)
3311 msleep(100);
3312 else
3313 mdelay(100);
3314
3315 if (count++ > 20)
3316 goto out;
3317
3318 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3319 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3320 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3321 ioc->name, count, host_diagnostic));
3322
3323 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3324
3325 hcb_size = readl(&ioc->chip->HCBSize);
3326
3327 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3328 ioc->name));
3329 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3330 &ioc->chip->HostDiagnostic);
3331
3332 /* don't access any registers for 50 milliseconds */
3333 msleep(50);
3334
3335 /* 300 second max wait */
3336 for (count = 0; count < 3000000 ; count++) {
3337
3338 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3339
3340 if (host_diagnostic == 0xFFFFFFFF)
3341 goto out;
3342 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3343 break;
3344
3345 /* wait 100 msec */
3346 if (sleep_flag == CAN_SLEEP)
3347 msleep(1);
3348 else
3349 mdelay(1);
3350 }
3351
3352 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3353
3354 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3355 "assuming the HCB Address points to good F/W\n",
3356 ioc->name));
3357 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3358 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3359 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3360
3361 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3362 "re-enable the HCDW\n", ioc->name));
3363 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3364 &ioc->chip->HCBSize);
3365 }
3366
3367 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3368 ioc->name));
3369 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3370 &ioc->chip->HostDiagnostic);
3371
3372 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3373 "diagnostic register\n", ioc->name));
3374 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3375
3376 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3377 "READY state\n", ioc->name));
3378 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3379 sleep_flag);
3380 if (ioc_state) {
3381 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3382 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3383 goto out;
3384 }
3385
3386 _base_restore_msix_table(ioc);
3387 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3388 return 0;
3389
3390 out:
3391 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3392 return -EFAULT;
3393 }
3394
3395 /**
3396 * _base_make_ioc_ready - put controller in READY state
3397 * @ioc: per adapter object
3398 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3399 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3400 *
3401 * Returns 0 for success, non-zero for failure.
3402 */
3403 static int
3404 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3405 enum reset_type type)
3406 {
3407 u32 ioc_state;
3408 int rc;
3409
3410 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3411 __func__));
3412
3413 if (ioc->pci_error_recovery)
3414 return 0;
3415
3416 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3417 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3418 ioc->name, __func__, ioc_state));
3419
3420 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3421 return 0;
3422
3423 if (ioc_state & MPI2_DOORBELL_USED) {
3424 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3425 "active!\n", ioc->name));
3426 goto issue_diag_reset;
3427 }
3428
3429 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3430 mpt2sas_base_fault_info(ioc, ioc_state &
3431 MPI2_DOORBELL_DATA_MASK);
3432 goto issue_diag_reset;
3433 }
3434
3435 if (type == FORCE_BIG_HAMMER)
3436 goto issue_diag_reset;
3437
3438 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3439 if (!(_base_send_ioc_reset(ioc,
3440 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
3441 ioc->ioc_reset_count++;
3442 return 0;
3443 }
3444
3445 issue_diag_reset:
3446 rc = _base_diag_reset(ioc, CAN_SLEEP);
3447 ioc->ioc_reset_count++;
3448 return rc;
3449 }
3450
3451 /**
3452 * _base_make_ioc_operational - put controller in OPERATIONAL state
3453 * @ioc: per adapter object
3454 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3455 *
3456 * Returns 0 for success, non-zero for failure.
3457 */
3458 static int
3459 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3460 {
3461 int r, i;
3462 unsigned long flags;
3463 u32 reply_address;
3464 u16 smid;
3465 struct _tr_list *delayed_tr, *delayed_tr_next;
3466
3467 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3468 __func__));
3469
3470 /* clean the delayed target reset list */
3471 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3472 &ioc->delayed_tr_list, list) {
3473 list_del(&delayed_tr->list);
3474 kfree(delayed_tr);
3475 }
3476
3477 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3478 &ioc->delayed_tr_volume_list, list) {
3479 list_del(&delayed_tr->list);
3480 kfree(delayed_tr);
3481 }
3482
3483 /* initialize the scsi lookup free list */
3484 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3485 INIT_LIST_HEAD(&ioc->free_list);
3486 smid = 1;
3487 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3488 ioc->scsi_lookup[i].cb_idx = 0xFF;
3489 ioc->scsi_lookup[i].smid = smid;
3490 ioc->scsi_lookup[i].scmd = NULL;
3491 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3492 &ioc->free_list);
3493 }
3494
3495 /* hi-priority queue */
3496 INIT_LIST_HEAD(&ioc->hpr_free_list);
3497 smid = ioc->hi_priority_smid;
3498 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3499 ioc->hpr_lookup[i].cb_idx = 0xFF;
3500 ioc->hpr_lookup[i].smid = smid;
3501 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3502 &ioc->hpr_free_list);
3503 }
3504
3505 /* internal queue */
3506 INIT_LIST_HEAD(&ioc->internal_free_list);
3507 smid = ioc->internal_smid;
3508 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3509 ioc->internal_lookup[i].cb_idx = 0xFF;
3510 ioc->internal_lookup[i].smid = smid;
3511 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3512 &ioc->internal_free_list);
3513 }
3514 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3515
3516 /* initialize Reply Free Queue */
3517 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3518 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3519 ioc->reply_sz)
3520 ioc->reply_free[i] = cpu_to_le32(reply_address);
3521
3522 /* initialize Reply Post Free Queue */
3523 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3524 ioc->reply_post_free[i].Words = ULLONG_MAX;
3525
3526 r = _base_send_ioc_init(ioc, sleep_flag);
3527 if (r)
3528 return r;
3529
3530 /* initialize the index's */
3531 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3532 ioc->reply_post_host_index = 0;
3533 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3534 writel(0, &ioc->chip->ReplyPostHostIndex);
3535
3536 _base_unmask_interrupts(ioc);
3537 r = _base_event_notification(ioc, sleep_flag);
3538 if (r)
3539 return r;
3540
3541 if (sleep_flag == CAN_SLEEP)
3542 _base_static_config_pages(ioc);
3543
3544 if (ioc->wait_for_port_enable_to_complete) {
3545 if (diag_buffer_enable != 0)
3546 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3547 if (disable_discovery > 0)
3548 return r;
3549 }
3550
3551 r = _base_send_port_enable(ioc, sleep_flag);
3552 if (r)
3553 return r;
3554
3555 return r;
3556 }
3557
3558 /**
3559 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3560 * @ioc: per adapter object
3561 *
3562 * Return nothing.
3563 */
3564 void
3565 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3566 {
3567 struct pci_dev *pdev = ioc->pdev;
3568
3569 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3570 __func__));
3571
3572 _base_mask_interrupts(ioc);
3573 ioc->shost_recovery = 1;
3574 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3575 ioc->shost_recovery = 0;
3576 if (ioc->pci_irq) {
3577 synchronize_irq(pdev->irq);
3578 free_irq(ioc->pci_irq, ioc);
3579 }
3580 _base_disable_msix(ioc);
3581 if (ioc->chip_phys)
3582 iounmap(ioc->chip);
3583 ioc->pci_irq = -1;
3584 ioc->chip_phys = 0;
3585 pci_release_selected_regions(ioc->pdev, ioc->bars);
3586 pci_disable_pcie_error_reporting(pdev);
3587 pci_disable_device(pdev);
3588 return;
3589 }
3590
3591 /**
3592 * mpt2sas_base_attach - attach controller instance
3593 * @ioc: per adapter object
3594 *
3595 * Returns 0 for success, non-zero for failure.
3596 */
3597 int
3598 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3599 {
3600 int r, i;
3601
3602 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3603 __func__));
3604
3605 r = mpt2sas_base_map_resources(ioc);
3606 if (r)
3607 return r;
3608
3609 pci_set_drvdata(ioc->pdev, ioc->shost);
3610 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3611 if (r)
3612 goto out_free_resources;
3613
3614 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3615 if (r)
3616 goto out_free_resources;
3617
3618 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3619 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3620 if (!ioc->pfacts) {
3621 r = -ENOMEM;
3622 goto out_free_resources;
3623 }
3624
3625 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3626 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3627 if (r)
3628 goto out_free_resources;
3629 }
3630
3631 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3632 if (r)
3633 goto out_free_resources;
3634
3635 init_waitqueue_head(&ioc->reset_wq);
3636
3637 /* allocate memory pd handle bitmask list */
3638 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
3639 if (ioc->facts.MaxDevHandle % 8)
3640 ioc->pd_handles_sz++;
3641 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
3642 GFP_KERNEL);
3643 if (!ioc->pd_handles) {
3644 r = -ENOMEM;
3645 goto out_free_resources;
3646 }
3647
3648 ioc->fwfault_debug = mpt2sas_fwfault_debug;
3649
3650 /* base internal command bits */
3651 mutex_init(&ioc->base_cmds.mutex);
3652 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3653 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3654
3655 /* transport internal command bits */
3656 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3657 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3658 mutex_init(&ioc->transport_cmds.mutex);
3659
3660 /* scsih internal command bits */
3661 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3662 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3663 mutex_init(&ioc->scsih_cmds.mutex);
3664
3665 /* scsih internal command bits */
3666 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3667 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3668 mutex_init(&ioc->scsih_cmds.mutex);
3669
3670 /* task management internal command bits */
3671 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3672 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3673 mutex_init(&ioc->tm_cmds.mutex);
3674
3675 /* config page internal command bits */
3676 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3677 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3678 mutex_init(&ioc->config_cmds.mutex);
3679
3680 /* ctl module internal command bits */
3681 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3682 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
3683 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3684 mutex_init(&ioc->ctl_cmds.mutex);
3685
3686 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3687 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3688 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
3689 !ioc->ctl_cmds.sense) {
3690 r = -ENOMEM;
3691 goto out_free_resources;
3692 }
3693
3694 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3695 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3696 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
3697 r = -ENOMEM;
3698 goto out_free_resources;
3699 }
3700
3701 init_completion(&ioc->shost_recovery_done);
3702
3703 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3704 ioc->event_masks[i] = -1;
3705
3706 /* here we enable the events we care about */
3707 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3708 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3709 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3710 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3711 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3712 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3713 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3714 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3715 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3716 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3717 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3718 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3719 if (r)
3720 goto out_free_resources;
3721
3722 mpt2sas_base_start_watchdog(ioc);
3723 return 0;
3724
3725 out_free_resources:
3726
3727 ioc->remove_host = 1;
3728 mpt2sas_base_free_resources(ioc);
3729 _base_release_memory_pools(ioc);
3730 pci_set_drvdata(ioc->pdev, NULL);
3731 kfree(ioc->pd_handles);
3732 kfree(ioc->tm_cmds.reply);
3733 kfree(ioc->transport_cmds.reply);
3734 kfree(ioc->scsih_cmds.reply);
3735 kfree(ioc->config_cmds.reply);
3736 kfree(ioc->base_cmds.reply);
3737 kfree(ioc->ctl_cmds.reply);
3738 kfree(ioc->ctl_cmds.sense);
3739 kfree(ioc->pfacts);
3740 ioc->ctl_cmds.reply = NULL;
3741 ioc->base_cmds.reply = NULL;
3742 ioc->tm_cmds.reply = NULL;
3743 ioc->scsih_cmds.reply = NULL;
3744 ioc->transport_cmds.reply = NULL;
3745 ioc->config_cmds.reply = NULL;
3746 ioc->pfacts = NULL;
3747 return r;
3748 }
3749
3750
3751 /**
3752 * mpt2sas_base_detach - remove controller instance
3753 * @ioc: per adapter object
3754 *
3755 * Return nothing.
3756 */
3757 void
3758 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3759 {
3760
3761 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3762 __func__));
3763
3764 mpt2sas_base_stop_watchdog(ioc);
3765 mpt2sas_base_free_resources(ioc);
3766 _base_release_memory_pools(ioc);
3767 pci_set_drvdata(ioc->pdev, NULL);
3768 kfree(ioc->pd_handles);
3769 kfree(ioc->pfacts);
3770 kfree(ioc->ctl_cmds.reply);
3771 kfree(ioc->ctl_cmds.sense);
3772 kfree(ioc->base_cmds.reply);
3773 kfree(ioc->tm_cmds.reply);
3774 kfree(ioc->transport_cmds.reply);
3775 kfree(ioc->scsih_cmds.reply);
3776 kfree(ioc->config_cmds.reply);
3777 }
3778
3779 /**
3780 * _base_reset_handler - reset callback handler (for base)
3781 * @ioc: per adapter object
3782 * @reset_phase: phase
3783 *
3784 * The handler for doing any required cleanup or initialization.
3785 *
3786 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3787 * MPT2_IOC_DONE_RESET
3788 *
3789 * Return nothing.
3790 */
3791 static void
3792 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3793 {
3794 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3795 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3796 switch (reset_phase) {
3797 case MPT2_IOC_PRE_RESET:
3798 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
3799 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3800 break;
3801 case MPT2_IOC_AFTER_RESET:
3802 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
3803 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3804 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3805 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3806 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3807 complete(&ioc->transport_cmds.done);
3808 }
3809 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3810 ioc->base_cmds.status |= MPT2_CMD_RESET;
3811 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3812 complete(&ioc->base_cmds.done);
3813 }
3814 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3815 ioc->config_cmds.status |= MPT2_CMD_RESET;
3816 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3817 ioc->config_cmds.smid = USHRT_MAX;
3818 complete(&ioc->config_cmds.done);
3819 }
3820 break;
3821 case MPT2_IOC_DONE_RESET:
3822 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
3823 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3824 break;
3825 }
3826 }
3827
3828 /**
3829 * _wait_for_commands_to_complete - reset controller
3830 * @ioc: Pointer to MPT_ADAPTER structure
3831 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3832 *
3833 * This function waiting(3s) for all pending commands to complete
3834 * prior to putting controller in reset.
3835 */
3836 static void
3837 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3838 {
3839 u32 ioc_state;
3840 unsigned long flags;
3841 u16 i;
3842
3843 ioc->pending_io_count = 0;
3844 if (sleep_flag != CAN_SLEEP)
3845 return;
3846
3847 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3848 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3849 return;
3850
3851 /* pending command count */
3852 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3853 for (i = 0; i < ioc->scsiio_depth; i++)
3854 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3855 ioc->pending_io_count++;
3856 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3857
3858 if (!ioc->pending_io_count)
3859 return;
3860
3861 /* wait for pending commands to complete */
3862 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
3863 }
3864
3865 /**
3866 * mpt2sas_base_hard_reset_handler - reset controller
3867 * @ioc: Pointer to MPT_ADAPTER structure
3868 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3869 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3870 *
3871 * Returns 0 for success, non-zero for failure.
3872 */
3873 int
3874 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3875 enum reset_type type)
3876 {
3877 int r;
3878 unsigned long flags;
3879 u8 pe_complete = ioc->wait_for_port_enable_to_complete;
3880
3881 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
3882 __func__));
3883
3884 if (ioc->pci_error_recovery) {
3885 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
3886 ioc->name, __func__);
3887 r = 0;
3888 goto out;
3889 }
3890
3891 if (mpt2sas_fwfault_debug)
3892 mpt2sas_halt_firmware(ioc);
3893
3894 /* TODO - What we really should be doing is pulling
3895 * out all the code associated with NO_SLEEP; its never used.
3896 * That is legacy code from mpt fusion driver, ported over.
3897 * I will leave this BUG_ON here for now till its been resolved.
3898 */
3899 BUG_ON(sleep_flag == NO_SLEEP);
3900
3901 /* wait for an active reset in progress to complete */
3902 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
3903 do {
3904 ssleep(1);
3905 } while (ioc->shost_recovery == 1);
3906 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
3907 __func__));
3908 return ioc->ioc_reset_in_progress_status;
3909 }
3910
3911 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3912 ioc->shost_recovery = 1;
3913 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3914
3915 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3916 _wait_for_commands_to_complete(ioc, sleep_flag);
3917 _base_mask_interrupts(ioc);
3918 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3919 if (r)
3920 goto out;
3921 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3922
3923 /* If this hard reset is called while port enable is active, then
3924 * there is no reason to call make_ioc_operational
3925 */
3926 if (pe_complete) {
3927 r = -EFAULT;
3928 goto out;
3929 }
3930 r = _base_make_ioc_operational(ioc, sleep_flag);
3931 if (!r)
3932 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3933 out:
3934 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
3935 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3936
3937 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3938 ioc->ioc_reset_in_progress_status = r;
3939 ioc->shost_recovery = 0;
3940 complete(&ioc->shost_recovery_done);
3941 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3942 mutex_unlock(&ioc->reset_in_progress_mutex);
3943
3944 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
3945 __func__));
3946 return r;
3947 }
Tomato firmware and modifications.