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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / s390 / net / qeth_core_main.c
blobe165babf0d60f9eff74025f7c3feb5770814a291
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
24
25 #include <asm/ebcdic.h>
26 #include <asm/io.h>
27
28 #include "qeth_core.h"
29
30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_MSG] = {"qeth_msg",
36 8, 1, 128, 3, &debug_sprintf_view, NULL},
37 [QETH_DBF_CTRL] = {"qeth_control",
38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
39 };
40 EXPORT_SYMBOL_GPL(qeth_dbf);
41
42 struct qeth_card_list_struct qeth_core_card_list;
43 EXPORT_SYMBOL_GPL(qeth_core_card_list);
44 struct kmem_cache *qeth_core_header_cache;
45 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
46
47 static struct device *qeth_core_root_dev;
48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
49 static struct lock_class_key qdio_out_skb_queue_key;
50
51 static void qeth_send_control_data_cb(struct qeth_channel *,
52 struct qeth_cmd_buffer *);
53 static int qeth_issue_next_read(struct qeth_card *);
54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
56 static void qeth_free_buffer_pool(struct qeth_card *);
57 static int qeth_qdio_establish(struct qeth_card *);
58
59
60 static inline const char *qeth_get_cardname(struct qeth_card *card)
61 {
62 if (card->info.guestlan) {
63 switch (card->info.type) {
64 case QETH_CARD_TYPE_OSD:
65 return " Guest LAN QDIO";
66 case QETH_CARD_TYPE_IQD:
67 return " Guest LAN Hiper";
68 case QETH_CARD_TYPE_OSM:
69 return " Guest LAN QDIO - OSM";
70 case QETH_CARD_TYPE_OSX:
71 return " Guest LAN QDIO - OSX";
72 default:
73 return " unknown";
74 }
75 } else {
76 switch (card->info.type) {
77 case QETH_CARD_TYPE_OSD:
78 return " OSD Express";
79 case QETH_CARD_TYPE_IQD:
80 return " HiperSockets";
81 case QETH_CARD_TYPE_OSN:
82 return " OSN QDIO";
83 case QETH_CARD_TYPE_OSM:
84 return " OSM QDIO";
85 case QETH_CARD_TYPE_OSX:
86 return " OSX QDIO";
87 default:
88 return " unknown";
89 }
90 }
91 return " n/a";
92 }
93
94 /* max length to be returned: 14 */
95 const char *qeth_get_cardname_short(struct qeth_card *card)
96 {
97 if (card->info.guestlan) {
98 switch (card->info.type) {
99 case QETH_CARD_TYPE_OSD:
100 return "GuestLAN QDIO";
101 case QETH_CARD_TYPE_IQD:
102 return "GuestLAN Hiper";
103 case QETH_CARD_TYPE_OSM:
104 return "GuestLAN OSM";
105 case QETH_CARD_TYPE_OSX:
106 return "GuestLAN OSX";
107 default:
108 return "unknown";
109 }
110 } else {
111 switch (card->info.type) {
112 case QETH_CARD_TYPE_OSD:
113 switch (card->info.link_type) {
114 case QETH_LINK_TYPE_FAST_ETH:
115 return "OSD_100";
116 case QETH_LINK_TYPE_HSTR:
117 return "HSTR";
118 case QETH_LINK_TYPE_GBIT_ETH:
119 return "OSD_1000";
120 case QETH_LINK_TYPE_10GBIT_ETH:
121 return "OSD_10GIG";
122 case QETH_LINK_TYPE_LANE_ETH100:
123 return "OSD_FE_LANE";
124 case QETH_LINK_TYPE_LANE_TR:
125 return "OSD_TR_LANE";
126 case QETH_LINK_TYPE_LANE_ETH1000:
127 return "OSD_GbE_LANE";
128 case QETH_LINK_TYPE_LANE:
129 return "OSD_ATM_LANE";
130 default:
131 return "OSD_Express";
132 }
133 case QETH_CARD_TYPE_IQD:
134 return "HiperSockets";
135 case QETH_CARD_TYPE_OSN:
136 return "OSN";
137 case QETH_CARD_TYPE_OSM:
138 return "OSM_1000";
139 case QETH_CARD_TYPE_OSX:
140 return "OSX_10GIG";
141 default:
142 return "unknown";
143 }
144 }
145 return "n/a";
146 }
147
148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
149 int clear_start_mask)
150 {
151 unsigned long flags;
152
153 spin_lock_irqsave(&card->thread_mask_lock, flags);
154 card->thread_allowed_mask = threads;
155 if (clear_start_mask)
156 card->thread_start_mask &= threads;
157 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
158 wake_up(&card->wait_q);
159 }
160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
161
162 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
163 {
164 unsigned long flags;
165 int rc = 0;
166
167 spin_lock_irqsave(&card->thread_mask_lock, flags);
168 rc = (card->thread_running_mask & threads);
169 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
170 return rc;
171 }
172 EXPORT_SYMBOL_GPL(qeth_threads_running);
173
174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
175 {
176 return wait_event_interruptible(card->wait_q,
177 qeth_threads_running(card, threads) == 0);
178 }
179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
180
181 void qeth_clear_working_pool_list(struct qeth_card *card)
182 {
183 struct qeth_buffer_pool_entry *pool_entry, *tmp;
184
185 QETH_CARD_TEXT(card, 5, "clwrklst");
186 list_for_each_entry_safe(pool_entry, tmp,
187 &card->qdio.in_buf_pool.entry_list, list){
188 list_del(&pool_entry->list);
189 }
190 }
191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
192
193 static int qeth_alloc_buffer_pool(struct qeth_card *card)
194 {
195 struct qeth_buffer_pool_entry *pool_entry;
196 void *ptr;
197 int i, j;
198
199 QETH_CARD_TEXT(card, 5, "alocpool");
200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
202 if (!pool_entry) {
203 qeth_free_buffer_pool(card);
204 return -ENOMEM;
205 }
206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
207 ptr = (void *) __get_free_page(GFP_KERNEL);
208 if (!ptr) {
209 while (j > 0)
210 free_page((unsigned long)
211 pool_entry->elements[--j]);
212 kfree(pool_entry);
213 qeth_free_buffer_pool(card);
214 return -ENOMEM;
215 }
216 pool_entry->elements[j] = ptr;
217 }
218 list_add(&pool_entry->init_list,
219 &card->qdio.init_pool.entry_list);
220 }
221 return 0;
222 }
223
224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
225 {
226 QETH_CARD_TEXT(card, 2, "realcbp");
227
228 if ((card->state != CARD_STATE_DOWN) &&
229 (card->state != CARD_STATE_RECOVER))
230 return -EPERM;
231
232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
233 qeth_clear_working_pool_list(card);
234 qeth_free_buffer_pool(card);
235 card->qdio.in_buf_pool.buf_count = bufcnt;
236 card->qdio.init_pool.buf_count = bufcnt;
237 return qeth_alloc_buffer_pool(card);
238 }
239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
240
241 static int qeth_issue_next_read(struct qeth_card *card)
242 {
243 int rc;
244 struct qeth_cmd_buffer *iob;
245
246 QETH_CARD_TEXT(card, 5, "issnxrd");
247 if (card->read.state != CH_STATE_UP)
248 return -EIO;
249 iob = qeth_get_buffer(&card->read);
250 if (!iob) {
251 dev_warn(&card->gdev->dev, "The qeth device driver "
252 "failed to recover an error on the device\n");
253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
254 "available\n", dev_name(&card->gdev->dev));
255 return -ENOMEM;
256 }
257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
258 QETH_CARD_TEXT(card, 6, "noirqpnd");
259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
260 (addr_t) iob, 0, 0);
261 if (rc) {
262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
263 "rc=%i\n", dev_name(&card->gdev->dev), rc);
264 atomic_set(&card->read.irq_pending, 0);
265 card->read_or_write_problem = 1;
266 qeth_schedule_recovery(card);
267 wake_up(&card->wait_q);
268 }
269 return rc;
270 }
271
272 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
273 {
274 struct qeth_reply *reply;
275
276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
277 if (reply) {
278 atomic_set(&reply->refcnt, 1);
279 atomic_set(&reply->received, 0);
280 reply->card = card;
281 };
282 return reply;
283 }
284
285 static void qeth_get_reply(struct qeth_reply *reply)
286 {
287 WARN_ON(atomic_read(&reply->refcnt) <= 0);
288 atomic_inc(&reply->refcnt);
289 }
290
291 static void qeth_put_reply(struct qeth_reply *reply)
292 {
293 WARN_ON(atomic_read(&reply->refcnt) <= 0);
294 if (atomic_dec_and_test(&reply->refcnt))
295 kfree(reply);
296 }
297
298 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
299 struct qeth_card *card)
300 {
301 char *ipa_name;
302 int com = cmd->hdr.command;
303 ipa_name = qeth_get_ipa_cmd_name(com);
304 if (rc)
305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
306 ipa_name, com, QETH_CARD_IFNAME(card),
307 rc, qeth_get_ipa_msg(rc));
308 else
309 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
310 ipa_name, com, QETH_CARD_IFNAME(card));
311 }
312
313 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
314 struct qeth_cmd_buffer *iob)
315 {
316 struct qeth_ipa_cmd *cmd = NULL;
317
318 QETH_CARD_TEXT(card, 5, "chkipad");
319 if (IS_IPA(iob->data)) {
320 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
321 if (IS_IPA_REPLY(cmd)) {
322 if (cmd->hdr.command != IPA_CMD_SETCCID &&
323 cmd->hdr.command != IPA_CMD_DELCCID &&
324 cmd->hdr.command != IPA_CMD_MODCCID &&
325 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
326 qeth_issue_ipa_msg(cmd,
327 cmd->hdr.return_code, card);
328 return cmd;
329 } else {
330 switch (cmd->hdr.command) {
331 case IPA_CMD_STOPLAN:
332 dev_warn(&card->gdev->dev,
333 "The link for interface %s on CHPID"
334 " 0x%X failed\n",
335 QETH_CARD_IFNAME(card),
336 card->info.chpid);
337 card->lan_online = 0;
338 if (card->dev && netif_carrier_ok(card->dev))
339 netif_carrier_off(card->dev);
340 return NULL;
341 case IPA_CMD_STARTLAN:
342 dev_info(&card->gdev->dev,
343 "The link for %s on CHPID 0x%X has"
344 " been restored\n",
345 QETH_CARD_IFNAME(card),
346 card->info.chpid);
347 netif_carrier_on(card->dev);
348 card->lan_online = 1;
349 qeth_schedule_recovery(card);
350 return NULL;
351 case IPA_CMD_MODCCID:
352 return cmd;
353 case IPA_CMD_REGISTER_LOCAL_ADDR:
354 QETH_CARD_TEXT(card, 3, "irla");
355 break;
356 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
357 QETH_CARD_TEXT(card, 3, "urla");
358 break;
359 default:
360 QETH_DBF_MESSAGE(2, "Received data is IPA "
361 "but not a reply!\n");
362 break;
363 }
364 }
365 }
366 return cmd;
367 }
368
369 void qeth_clear_ipacmd_list(struct qeth_card *card)
370 {
371 struct qeth_reply *reply, *r;
372 unsigned long flags;
373
374 QETH_CARD_TEXT(card, 4, "clipalst");
375
376 spin_lock_irqsave(&card->lock, flags);
377 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
378 qeth_get_reply(reply);
379 reply->rc = -EIO;
380 atomic_inc(&reply->received);
381 list_del_init(&reply->list);
382 wake_up(&reply->wait_q);
383 qeth_put_reply(reply);
384 }
385 spin_unlock_irqrestore(&card->lock, flags);
386 atomic_set(&card->write.irq_pending, 0);
387 }
388 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
389
390 static int qeth_check_idx_response(struct qeth_card *card,
391 unsigned char *buffer)
392 {
393 if (!buffer)
394 return 0;
395
396 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
397 if ((buffer[2] & 0xc0) == 0xc0) {
398 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
399 "with cause code 0x%02x%s\n",
400 buffer[4],
401 ((buffer[4] == 0x22) ?
402 " -- try another portname" : ""));
403 QETH_CARD_TEXT(card, 2, "ckidxres");
404 QETH_CARD_TEXT(card, 2, " idxterm");
405 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
406 if (buffer[4] == 0xf6) {
407 dev_err(&card->gdev->dev,
408 "The qeth device is not configured "
409 "for the OSI layer required by z/VM\n");
410 return -EPERM;
411 }
412 return -EIO;
413 }
414 return 0;
415 }
416
417 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
418 __u32 len)
419 {
420 struct qeth_card *card;
421
422 card = CARD_FROM_CDEV(channel->ccwdev);
423 QETH_CARD_TEXT(card, 4, "setupccw");
424 if (channel == &card->read)
425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
426 else
427 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
428 channel->ccw.count = len;
429 channel->ccw.cda = (__u32) __pa(iob);
430 }
431
432 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
433 {
434 __u8 index;
435
436 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
437 index = channel->io_buf_no;
438 do {
439 if (channel->iob[index].state == BUF_STATE_FREE) {
440 channel->iob[index].state = BUF_STATE_LOCKED;
441 channel->io_buf_no = (channel->io_buf_no + 1) %
442 QETH_CMD_BUFFER_NO;
443 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
444 return channel->iob + index;
445 }
446 index = (index + 1) % QETH_CMD_BUFFER_NO;
447 } while (index != channel->io_buf_no);
448
449 return NULL;
450 }
451
452 void qeth_release_buffer(struct qeth_channel *channel,
453 struct qeth_cmd_buffer *iob)
454 {
455 unsigned long flags;
456
457 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
458 spin_lock_irqsave(&channel->iob_lock, flags);
459 memset(iob->data, 0, QETH_BUFSIZE);
460 iob->state = BUF_STATE_FREE;
461 iob->callback = qeth_send_control_data_cb;
462 iob->rc = 0;
463 spin_unlock_irqrestore(&channel->iob_lock, flags);
464 }
465 EXPORT_SYMBOL_GPL(qeth_release_buffer);
466
467 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
468 {
469 struct qeth_cmd_buffer *buffer = NULL;
470 unsigned long flags;
471
472 spin_lock_irqsave(&channel->iob_lock, flags);
473 buffer = __qeth_get_buffer(channel);
474 spin_unlock_irqrestore(&channel->iob_lock, flags);
475 return buffer;
476 }
477
478 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
479 {
480 struct qeth_cmd_buffer *buffer;
481 wait_event(channel->wait_q,
482 ((buffer = qeth_get_buffer(channel)) != NULL));
483 return buffer;
484 }
485 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
486
487 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
488 {
489 int cnt;
490
491 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
492 qeth_release_buffer(channel, &channel->iob[cnt]);
493 channel->buf_no = 0;
494 channel->io_buf_no = 0;
495 }
496 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
497
498 static void qeth_send_control_data_cb(struct qeth_channel *channel,
499 struct qeth_cmd_buffer *iob)
500 {
501 struct qeth_card *card;
502 struct qeth_reply *reply, *r;
503 struct qeth_ipa_cmd *cmd;
504 unsigned long flags;
505 int keep_reply;
506 int rc = 0;
507
508 card = CARD_FROM_CDEV(channel->ccwdev);
509 QETH_CARD_TEXT(card, 4, "sndctlcb");
510 rc = qeth_check_idx_response(card, iob->data);
511 switch (rc) {
512 case 0:
513 break;
514 case -EIO:
515 qeth_clear_ipacmd_list(card);
516 qeth_schedule_recovery(card);
517 /* fall through */
518 default:
519 goto out;
520 }
521
522 cmd = qeth_check_ipa_data(card, iob);
523 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
524 goto out;
525 /*in case of OSN : check if cmd is set */
526 if (card->info.type == QETH_CARD_TYPE_OSN &&
527 cmd &&
528 cmd->hdr.command != IPA_CMD_STARTLAN &&
529 card->osn_info.assist_cb != NULL) {
530 card->osn_info.assist_cb(card->dev, cmd);
531 goto out;
532 }
533
534 spin_lock_irqsave(&card->lock, flags);
535 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
536 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
537 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
538 qeth_get_reply(reply);
539 list_del_init(&reply->list);
540 spin_unlock_irqrestore(&card->lock, flags);
541 keep_reply = 0;
542 if (reply->callback != NULL) {
543 if (cmd) {
544 reply->offset = (__u16)((char *)cmd -
545 (char *)iob->data);
546 keep_reply = reply->callback(card,
547 reply,
548 (unsigned long)cmd);
549 } else
550 keep_reply = reply->callback(card,
551 reply,
552 (unsigned long)iob);
553 }
554 if (cmd)
555 reply->rc = (u16) cmd->hdr.return_code;
556 else if (iob->rc)
557 reply->rc = iob->rc;
558 if (keep_reply) {
559 spin_lock_irqsave(&card->lock, flags);
560 list_add_tail(&reply->list,
561 &card->cmd_waiter_list);
562 spin_unlock_irqrestore(&card->lock, flags);
563 } else {
564 atomic_inc(&reply->received);
565 wake_up(&reply->wait_q);
566 }
567 qeth_put_reply(reply);
568 goto out;
569 }
570 }
571 spin_unlock_irqrestore(&card->lock, flags);
572 out:
573 memcpy(&card->seqno.pdu_hdr_ack,
574 QETH_PDU_HEADER_SEQ_NO(iob->data),
575 QETH_SEQ_NO_LENGTH);
576 qeth_release_buffer(channel, iob);
577 }
578
579 static int qeth_setup_channel(struct qeth_channel *channel)
580 {
581 int cnt;
582
583 QETH_DBF_TEXT(SETUP, 2, "setupch");
584 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
585 channel->iob[cnt].data =
586 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
587 if (channel->iob[cnt].data == NULL)
588 break;
589 channel->iob[cnt].state = BUF_STATE_FREE;
590 channel->iob[cnt].channel = channel;
591 channel->iob[cnt].callback = qeth_send_control_data_cb;
592 channel->iob[cnt].rc = 0;
593 }
594 if (cnt < QETH_CMD_BUFFER_NO) {
595 while (cnt-- > 0)
596 kfree(channel->iob[cnt].data);
597 return -ENOMEM;
598 }
599 channel->buf_no = 0;
600 channel->io_buf_no = 0;
601 atomic_set(&channel->irq_pending, 0);
602 spin_lock_init(&channel->iob_lock);
603
604 init_waitqueue_head(&channel->wait_q);
605 return 0;
606 }
607
608 static int qeth_set_thread_start_bit(struct qeth_card *card,
609 unsigned long thread)
610 {
611 unsigned long flags;
612
613 spin_lock_irqsave(&card->thread_mask_lock, flags);
614 if (!(card->thread_allowed_mask & thread) ||
615 (card->thread_start_mask & thread)) {
616 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
617 return -EPERM;
618 }
619 card->thread_start_mask |= thread;
620 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
621 return 0;
622 }
623
624 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
625 {
626 unsigned long flags;
627
628 spin_lock_irqsave(&card->thread_mask_lock, flags);
629 card->thread_start_mask &= ~thread;
630 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
631 wake_up(&card->wait_q);
632 }
633 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
634
635 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
636 {
637 unsigned long flags;
638
639 spin_lock_irqsave(&card->thread_mask_lock, flags);
640 card->thread_running_mask &= ~thread;
641 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
642 wake_up(&card->wait_q);
643 }
644 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
645
646 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
647 {
648 unsigned long flags;
649 int rc = 0;
650
651 spin_lock_irqsave(&card->thread_mask_lock, flags);
652 if (card->thread_start_mask & thread) {
653 if ((card->thread_allowed_mask & thread) &&
654 !(card->thread_running_mask & thread)) {
655 rc = 1;
656 card->thread_start_mask &= ~thread;
657 card->thread_running_mask |= thread;
658 } else
659 rc = -EPERM;
660 }
661 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
662 return rc;
663 }
664
665 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
666 {
667 int rc = 0;
668
669 wait_event(card->wait_q,
670 (rc = __qeth_do_run_thread(card, thread)) >= 0);
671 return rc;
672 }
673 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
674
675 void qeth_schedule_recovery(struct qeth_card *card)
676 {
677 QETH_CARD_TEXT(card, 2, "startrec");
678 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
679 schedule_work(&card->kernel_thread_starter);
680 }
681 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
682
683 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
684 {
685 int dstat, cstat;
686 char *sense;
687 struct qeth_card *card;
688
689 sense = (char *) irb->ecw;
690 cstat = irb->scsw.cmd.cstat;
691 dstat = irb->scsw.cmd.dstat;
692 card = CARD_FROM_CDEV(cdev);
693
694 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
695 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
696 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
697 QETH_CARD_TEXT(card, 2, "CGENCHK");
698 dev_warn(&cdev->dev, "The qeth device driver "
699 "failed to recover an error on the device\n");
700 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
701 dev_name(&cdev->dev), dstat, cstat);
702 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
703 16, 1, irb, 64, 1);
704 return 1;
705 }
706
707 if (dstat & DEV_STAT_UNIT_CHECK) {
708 if (sense[SENSE_RESETTING_EVENT_BYTE] &
709 SENSE_RESETTING_EVENT_FLAG) {
710 QETH_CARD_TEXT(card, 2, "REVIND");
711 return 1;
712 }
713 if (sense[SENSE_COMMAND_REJECT_BYTE] &
714 SENSE_COMMAND_REJECT_FLAG) {
715 QETH_CARD_TEXT(card, 2, "CMDREJi");
716 return 1;
717 }
718 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
719 QETH_CARD_TEXT(card, 2, "AFFE");
720 return 1;
721 }
722 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
723 QETH_CARD_TEXT(card, 2, "ZEROSEN");
724 return 0;
725 }
726 QETH_CARD_TEXT(card, 2, "DGENCHK");
727 return 1;
728 }
729 return 0;
730 }
731
732 static long __qeth_check_irb_error(struct ccw_device *cdev,
733 unsigned long intparm, struct irb *irb)
734 {
735 struct qeth_card *card;
736
737 card = CARD_FROM_CDEV(cdev);
738
739 if (!IS_ERR(irb))
740 return 0;
741
742 switch (PTR_ERR(irb)) {
743 case -EIO:
744 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
745 dev_name(&cdev->dev));
746 QETH_CARD_TEXT(card, 2, "ckirberr");
747 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
748 break;
749 case -ETIMEDOUT:
750 dev_warn(&cdev->dev, "A hardware operation timed out"
751 " on the device\n");
752 QETH_CARD_TEXT(card, 2, "ckirberr");
753 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
754 if (intparm == QETH_RCD_PARM) {
755 if (card && (card->data.ccwdev == cdev)) {
756 card->data.state = CH_STATE_DOWN;
757 wake_up(&card->wait_q);
758 }
759 }
760 break;
761 default:
762 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
763 dev_name(&cdev->dev), PTR_ERR(irb));
764 QETH_CARD_TEXT(card, 2, "ckirberr");
765 QETH_CARD_TEXT(card, 2, " rc???");
766 }
767 return PTR_ERR(irb);
768 }
769
770 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
771 struct irb *irb)
772 {
773 int rc;
774 int cstat, dstat;
775 struct qeth_cmd_buffer *buffer;
776 struct qeth_channel *channel;
777 struct qeth_card *card;
778 struct qeth_cmd_buffer *iob;
779 __u8 index;
780
781 if (__qeth_check_irb_error(cdev, intparm, irb))
782 return;
783 cstat = irb->scsw.cmd.cstat;
784 dstat = irb->scsw.cmd.dstat;
785
786 card = CARD_FROM_CDEV(cdev);
787 if (!card)
788 return;
789
790 QETH_CARD_TEXT(card, 5, "irq");
791
792 if (card->read.ccwdev == cdev) {
793 channel = &card->read;
794 QETH_CARD_TEXT(card, 5, "read");
795 } else if (card->write.ccwdev == cdev) {
796 channel = &card->write;
797 QETH_CARD_TEXT(card, 5, "write");
798 } else {
799 channel = &card->data;
800 QETH_CARD_TEXT(card, 5, "data");
801 }
802 atomic_set(&channel->irq_pending, 0);
803
804 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
805 channel->state = CH_STATE_STOPPED;
806
807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
808 channel->state = CH_STATE_HALTED;
809
810 /*let's wake up immediately on data channel*/
811 if ((channel == &card->data) && (intparm != 0) &&
812 (intparm != QETH_RCD_PARM))
813 goto out;
814
815 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
816 QETH_CARD_TEXT(card, 6, "clrchpar");
817 /* we don't have to handle this further */
818 intparm = 0;
819 }
820 if (intparm == QETH_HALT_CHANNEL_PARM) {
821 QETH_CARD_TEXT(card, 6, "hltchpar");
822 /* we don't have to handle this further */
823 intparm = 0;
824 }
825 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
826 (dstat & DEV_STAT_UNIT_CHECK) ||
827 (cstat)) {
828 if (irb->esw.esw0.erw.cons) {
829 dev_warn(&channel->ccwdev->dev,
830 "The qeth device driver failed to recover "
831 "an error on the device\n");
832 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
833 "0x%X dstat 0x%X\n",
834 dev_name(&channel->ccwdev->dev), cstat, dstat);
835 print_hex_dump(KERN_WARNING, "qeth: irb ",
836 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
837 print_hex_dump(KERN_WARNING, "qeth: sense data ",
838 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
839 }
840 if (intparm == QETH_RCD_PARM) {
841 channel->state = CH_STATE_DOWN;
842 goto out;
843 }
844 rc = qeth_get_problem(cdev, irb);
845 if (rc) {
846 qeth_clear_ipacmd_list(card);
847 qeth_schedule_recovery(card);
848 goto out;
849 }
850 }
851
852 if (intparm == QETH_RCD_PARM) {
853 channel->state = CH_STATE_RCD_DONE;
854 goto out;
855 }
856 if (intparm) {
857 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
858 buffer->state = BUF_STATE_PROCESSED;
859 }
860 if (channel == &card->data)
861 return;
862 if (channel == &card->read &&
863 channel->state == CH_STATE_UP)
864 qeth_issue_next_read(card);
865
866 iob = channel->iob;
867 index = channel->buf_no;
868 while (iob[index].state == BUF_STATE_PROCESSED) {
869 if (iob[index].callback != NULL)
870 iob[index].callback(channel, iob + index);
871
872 index = (index + 1) % QETH_CMD_BUFFER_NO;
873 }
874 channel->buf_no = index;
875 out:
876 wake_up(&card->wait_q);
877 return;
878 }
879
880 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
881 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
882 {
883 int i;
884 struct sk_buff *skb;
885
886 /* is PCI flag set on buffer? */
887 if (buf->buffer->element[0].flags & 0x40)
888 atomic_dec(&queue->set_pci_flags_count);
889
890 if (!qeth_skip_skb) {
891 skb = skb_dequeue(&buf->skb_list);
892 while (skb) {
893 atomic_dec(&skb->users);
894 dev_kfree_skb_any(skb);
895 skb = skb_dequeue(&buf->skb_list);
896 }
897 }
898 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
899 if (buf->buffer->element[i].addr && buf->is_header[i])
900 kmem_cache_free(qeth_core_header_cache,
901 buf->buffer->element[i].addr);
902 buf->is_header[i] = 0;
903 buf->buffer->element[i].length = 0;
904 buf->buffer->element[i].addr = NULL;
905 buf->buffer->element[i].flags = 0;
906 }
907 buf->buffer->element[15].flags = 0;
908 buf->next_element_to_fill = 0;
909 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
910 }
911
912 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
913 struct qeth_qdio_out_buffer *buf)
914 {
915 __qeth_clear_output_buffer(queue, buf, 0);
916 }
917
918 void qeth_clear_qdio_buffers(struct qeth_card *card)
919 {
920 int i, j;
921
922 QETH_CARD_TEXT(card, 2, "clearqdbf");
923 /* clear outbound buffers to free skbs */
924 for (i = 0; i < card->qdio.no_out_queues; ++i)
925 if (card->qdio.out_qs[i]) {
926 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
927 qeth_clear_output_buffer(card->qdio.out_qs[i],
928 &card->qdio.out_qs[i]->bufs[j]);
929 }
930 }
931 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
932
933 static void qeth_free_buffer_pool(struct qeth_card *card)
934 {
935 struct qeth_buffer_pool_entry *pool_entry, *tmp;
936 int i = 0;
937 list_for_each_entry_safe(pool_entry, tmp,
938 &card->qdio.init_pool.entry_list, init_list){
939 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
940 free_page((unsigned long)pool_entry->elements[i]);
941 list_del(&pool_entry->init_list);
942 kfree(pool_entry);
943 }
944 }
945
946 static void qeth_free_qdio_buffers(struct qeth_card *card)
947 {
948 int i, j;
949
950 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
951 QETH_QDIO_UNINITIALIZED)
952 return;
953 kfree(card->qdio.in_q);
954 card->qdio.in_q = NULL;
955 /* inbound buffer pool */
956 qeth_free_buffer_pool(card);
957 /* free outbound qdio_qs */
958 if (card->qdio.out_qs) {
959 for (i = 0; i < card->qdio.no_out_queues; ++i) {
960 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
961 qeth_clear_output_buffer(card->qdio.out_qs[i],
962 &card->qdio.out_qs[i]->bufs[j]);
963 kfree(card->qdio.out_qs[i]);
964 }
965 kfree(card->qdio.out_qs);
966 card->qdio.out_qs = NULL;
967 }
968 }
969
970 static void qeth_clean_channel(struct qeth_channel *channel)
971 {
972 int cnt;
973
974 QETH_DBF_TEXT(SETUP, 2, "freech");
975 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
976 kfree(channel->iob[cnt].data);
977 }
978
979 static void qeth_get_channel_path_desc(struct qeth_card *card)
980 {
981 struct ccw_device *ccwdev;
982 struct channelPath_dsc {
983 u8 flags;
984 u8 lsn;
985 u8 desc;
986 u8 chpid;
987 u8 swla;
988 u8 zeroes;
989 u8 chla;
990 u8 chpp;
991 } *chp_dsc;
992
993 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
994
995 ccwdev = card->data.ccwdev;
996 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
997 if (chp_dsc != NULL) {
998 /* CHPP field bit 6 == 1 -> single queue */
999 if ((chp_dsc->chpp & 0x02) == 0x02)
1000 card->qdio.no_out_queues = 1;
1001 card->info.func_level = 0x4100 + chp_dsc->desc;
1002 kfree(chp_dsc);
1003 }
1004 if (card->qdio.no_out_queues == 1) {
1005 card->qdio.default_out_queue = 0;
1006 dev_info(&card->gdev->dev,
1007 "Priority Queueing not supported\n");
1008 }
1009 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1010 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1011 return;
1012 }
1013
1014 static void qeth_init_qdio_info(struct qeth_card *card)
1015 {
1016 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1017 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1018 /* inbound */
1019 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1020 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1021 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1022 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1023 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1024 }
1025
1026 static void qeth_set_intial_options(struct qeth_card *card)
1027 {
1028 card->options.route4.type = NO_ROUTER;
1029 card->options.route6.type = NO_ROUTER;
1030 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1031 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1032 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1033 card->options.fake_broadcast = 0;
1034 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1035 card->options.performance_stats = 0;
1036 card->options.rx_sg_cb = QETH_RX_SG_CB;
1037 card->options.isolation = ISOLATION_MODE_NONE;
1038 }
1039
1040 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1041 {
1042 unsigned long flags;
1043 int rc = 0;
1044
1045 spin_lock_irqsave(&card->thread_mask_lock, flags);
1046 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1047 (u8) card->thread_start_mask,
1048 (u8) card->thread_allowed_mask,
1049 (u8) card->thread_running_mask);
1050 rc = (card->thread_start_mask & thread);
1051 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1052 return rc;
1053 }
1054
1055 static void qeth_start_kernel_thread(struct work_struct *work)
1056 {
1057 struct qeth_card *card = container_of(work, struct qeth_card,
1058 kernel_thread_starter);
1059 QETH_CARD_TEXT(card , 2, "strthrd");
1060
1061 if (card->read.state != CH_STATE_UP &&
1062 card->write.state != CH_STATE_UP)
1063 return;
1064 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1065 kthread_run(card->discipline.recover, (void *) card,
1066 "qeth_recover");
1067 }
1068
1069 static int qeth_setup_card(struct qeth_card *card)
1070 {
1071
1072 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1073 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1074
1075 card->read.state = CH_STATE_DOWN;
1076 card->write.state = CH_STATE_DOWN;
1077 card->data.state = CH_STATE_DOWN;
1078 card->state = CARD_STATE_DOWN;
1079 card->lan_online = 0;
1080 card->use_hard_stop = 0;
1081 card->read_or_write_problem = 0;
1082 card->dev = NULL;
1083 spin_lock_init(&card->vlanlock);
1084 spin_lock_init(&card->mclock);
1085 card->vlangrp = NULL;
1086 spin_lock_init(&card->lock);
1087 spin_lock_init(&card->ip_lock);
1088 spin_lock_init(&card->thread_mask_lock);
1089 mutex_init(&card->conf_mutex);
1090 mutex_init(&card->discipline_mutex);
1091 card->thread_start_mask = 0;
1092 card->thread_allowed_mask = 0;
1093 card->thread_running_mask = 0;
1094 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1095 INIT_LIST_HEAD(&card->ip_list);
1096 INIT_LIST_HEAD(card->ip_tbd_list);
1097 INIT_LIST_HEAD(&card->cmd_waiter_list);
1098 init_waitqueue_head(&card->wait_q);
1099 /* intial options */
1100 qeth_set_intial_options(card);
1101 /* IP address takeover */
1102 INIT_LIST_HEAD(&card->ipato.entries);
1103 card->ipato.enabled = 0;
1104 card->ipato.invert4 = 0;
1105 card->ipato.invert6 = 0;
1106 /* init QDIO stuff */
1107 qeth_init_qdio_info(card);
1108 return 0;
1109 }
1110
1111 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1112 {
1113 struct qeth_card *card = container_of(slr, struct qeth_card,
1114 qeth_service_level);
1115 if (card->info.mcl_level[0])
1116 seq_printf(m, "qeth: %s firmware level %s\n",
1117 CARD_BUS_ID(card), card->info.mcl_level);
1118 }
1119
1120 static struct qeth_card *qeth_alloc_card(void)
1121 {
1122 struct qeth_card *card;
1123
1124 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1125 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1126 if (!card)
1127 goto out;
1128 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1129 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1130 if (!card->ip_tbd_list) {
1131 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1132 goto out_card;
1133 }
1134 if (qeth_setup_channel(&card->read))
1135 goto out_ip;
1136 if (qeth_setup_channel(&card->write))
1137 goto out_channel;
1138 card->options.layer2 = -1;
1139 card->qeth_service_level.seq_print = qeth_core_sl_print;
1140 register_service_level(&card->qeth_service_level);
1141 return card;
1142
1143 out_channel:
1144 qeth_clean_channel(&card->read);
1145 out_ip:
1146 kfree(card->ip_tbd_list);
1147 out_card:
1148 kfree(card);
1149 out:
1150 return NULL;
1151 }
1152
1153 static int qeth_determine_card_type(struct qeth_card *card)
1154 {
1155 int i = 0;
1156
1157 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1158
1159 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1160 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1161 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1162 if ((CARD_RDEV(card)->id.dev_type ==
1163 known_devices[i][QETH_DEV_TYPE_IND]) &&
1164 (CARD_RDEV(card)->id.dev_model ==
1165 known_devices[i][QETH_DEV_MODEL_IND])) {
1166 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1167 card->qdio.no_out_queues =
1168 known_devices[i][QETH_QUEUE_NO_IND];
1169 card->info.is_multicast_different =
1170 known_devices[i][QETH_MULTICAST_IND];
1171 qeth_get_channel_path_desc(card);
1172 return 0;
1173 }
1174 i++;
1175 }
1176 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1177 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1178 "unknown type\n");
1179 return -ENOENT;
1180 }
1181
1182 static int qeth_clear_channel(struct qeth_channel *channel)
1183 {
1184 unsigned long flags;
1185 struct qeth_card *card;
1186 int rc;
1187
1188 card = CARD_FROM_CDEV(channel->ccwdev);
1189 QETH_CARD_TEXT(card, 3, "clearch");
1190 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1191 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1192 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1193
1194 if (rc)
1195 return rc;
1196 rc = wait_event_interruptible_timeout(card->wait_q,
1197 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1198 if (rc == -ERESTARTSYS)
1199 return rc;
1200 if (channel->state != CH_STATE_STOPPED)
1201 return -ETIME;
1202 channel->state = CH_STATE_DOWN;
1203 return 0;
1204 }
1205
1206 static int qeth_halt_channel(struct qeth_channel *channel)
1207 {
1208 unsigned long flags;
1209 struct qeth_card *card;
1210 int rc;
1211
1212 card = CARD_FROM_CDEV(channel->ccwdev);
1213 QETH_CARD_TEXT(card, 3, "haltch");
1214 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1215 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1216 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1217
1218 if (rc)
1219 return rc;
1220 rc = wait_event_interruptible_timeout(card->wait_q,
1221 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1222 if (rc == -ERESTARTSYS)
1223 return rc;
1224 if (channel->state != CH_STATE_HALTED)
1225 return -ETIME;
1226 return 0;
1227 }
1228
1229 static int qeth_halt_channels(struct qeth_card *card)
1230 {
1231 int rc1 = 0, rc2 = 0, rc3 = 0;
1232
1233 QETH_CARD_TEXT(card, 3, "haltchs");
1234 rc1 = qeth_halt_channel(&card->read);
1235 rc2 = qeth_halt_channel(&card->write);
1236 rc3 = qeth_halt_channel(&card->data);
1237 if (rc1)
1238 return rc1;
1239 if (rc2)
1240 return rc2;
1241 return rc3;
1242 }
1243
1244 static int qeth_clear_channels(struct qeth_card *card)
1245 {
1246 int rc1 = 0, rc2 = 0, rc3 = 0;
1247
1248 QETH_CARD_TEXT(card, 3, "clearchs");
1249 rc1 = qeth_clear_channel(&card->read);
1250 rc2 = qeth_clear_channel(&card->write);
1251 rc3 = qeth_clear_channel(&card->data);
1252 if (rc1)
1253 return rc1;
1254 if (rc2)
1255 return rc2;
1256 return rc3;
1257 }
1258
1259 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1260 {
1261 int rc = 0;
1262
1263 QETH_CARD_TEXT(card, 3, "clhacrd");
1264
1265 if (halt)
1266 rc = qeth_halt_channels(card);
1267 if (rc)
1268 return rc;
1269 return qeth_clear_channels(card);
1270 }
1271
1272 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1273 {
1274 int rc = 0;
1275
1276 QETH_CARD_TEXT(card, 3, "qdioclr");
1277 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1278 QETH_QDIO_CLEANING)) {
1279 case QETH_QDIO_ESTABLISHED:
1280 if (card->info.type == QETH_CARD_TYPE_IQD)
1281 rc = qdio_shutdown(CARD_DDEV(card),
1282 QDIO_FLAG_CLEANUP_USING_HALT);
1283 else
1284 rc = qdio_shutdown(CARD_DDEV(card),
1285 QDIO_FLAG_CLEANUP_USING_CLEAR);
1286 if (rc)
1287 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1288 qdio_free(CARD_DDEV(card));
1289 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1290 break;
1291 case QETH_QDIO_CLEANING:
1292 return rc;
1293 default:
1294 break;
1295 }
1296 rc = qeth_clear_halt_card(card, use_halt);
1297 if (rc)
1298 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1299 card->state = CARD_STATE_DOWN;
1300 return rc;
1301 }
1302 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1303
1304 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1305 int *length)
1306 {
1307 struct ciw *ciw;
1308 char *rcd_buf;
1309 int ret;
1310 struct qeth_channel *channel = &card->data;
1311 unsigned long flags;
1312
1313 /*
1314 * scan for RCD command in extended SenseID data
1315 */
1316 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1317 if (!ciw || ciw->cmd == 0)
1318 return -EOPNOTSUPP;
1319 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1320 if (!rcd_buf)
1321 return -ENOMEM;
1322
1323 channel->ccw.cmd_code = ciw->cmd;
1324 channel->ccw.cda = (__u32) __pa(rcd_buf);
1325 channel->ccw.count = ciw->count;
1326 channel->ccw.flags = CCW_FLAG_SLI;
1327 channel->state = CH_STATE_RCD;
1328 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1329 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1330 QETH_RCD_PARM, LPM_ANYPATH, 0,
1331 QETH_RCD_TIMEOUT);
1332 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1333 if (!ret)
1334 wait_event(card->wait_q,
1335 (channel->state == CH_STATE_RCD_DONE ||
1336 channel->state == CH_STATE_DOWN));
1337 if (channel->state == CH_STATE_DOWN)
1338 ret = -EIO;
1339 else
1340 channel->state = CH_STATE_DOWN;
1341 if (ret) {
1342 kfree(rcd_buf);
1343 *buffer = NULL;
1344 *length = 0;
1345 } else {
1346 *length = ciw->count;
1347 *buffer = rcd_buf;
1348 }
1349 return ret;
1350 }
1351
1352 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1353 {
1354 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1355 card->info.chpid = prcd[30];
1356 card->info.unit_addr2 = prcd[31];
1357 card->info.cula = prcd[63];
1358 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1359 (prcd[0x11] == _ascebc['M']));
1360 }
1361
1362 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1363 {
1364 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1365
1366 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1367 card->info.blkt.time_total = 250;
1368 card->info.blkt.inter_packet = 5;
1369 card->info.blkt.inter_packet_jumbo = 15;
1370 } else {
1371 card->info.blkt.time_total = 0;
1372 card->info.blkt.inter_packet = 0;
1373 card->info.blkt.inter_packet_jumbo = 0;
1374 }
1375 }
1376
1377 static void qeth_init_tokens(struct qeth_card *card)
1378 {
1379 card->token.issuer_rm_w = 0x00010103UL;
1380 card->token.cm_filter_w = 0x00010108UL;
1381 card->token.cm_connection_w = 0x0001010aUL;
1382 card->token.ulp_filter_w = 0x0001010bUL;
1383 card->token.ulp_connection_w = 0x0001010dUL;
1384 }
1385
1386 static void qeth_init_func_level(struct qeth_card *card)
1387 {
1388 switch (card->info.type) {
1389 case QETH_CARD_TYPE_IQD:
1390 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1391 break;
1392 case QETH_CARD_TYPE_OSD:
1393 case QETH_CARD_TYPE_OSN:
1394 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1395 break;
1396 default:
1397 break;
1398 }
1399 }
1400
1401 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1402 void (*idx_reply_cb)(struct qeth_channel *,
1403 struct qeth_cmd_buffer *))
1404 {
1405 struct qeth_cmd_buffer *iob;
1406 unsigned long flags;
1407 int rc;
1408 struct qeth_card *card;
1409
1410 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1411 card = CARD_FROM_CDEV(channel->ccwdev);
1412 iob = qeth_get_buffer(channel);
1413 iob->callback = idx_reply_cb;
1414 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1415 channel->ccw.count = QETH_BUFSIZE;
1416 channel->ccw.cda = (__u32) __pa(iob->data);
1417
1418 wait_event(card->wait_q,
1419 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1420 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1421 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1422 rc = ccw_device_start(channel->ccwdev,
1423 &channel->ccw, (addr_t) iob, 0, 0);
1424 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1425
1426 if (rc) {
1427 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1428 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1429 atomic_set(&channel->irq_pending, 0);
1430 wake_up(&card->wait_q);
1431 return rc;
1432 }
1433 rc = wait_event_interruptible_timeout(card->wait_q,
1434 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1435 if (rc == -ERESTARTSYS)
1436 return rc;
1437 if (channel->state != CH_STATE_UP) {
1438 rc = -ETIME;
1439 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1440 qeth_clear_cmd_buffers(channel);
1441 } else
1442 rc = 0;
1443 return rc;
1444 }
1445
1446 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1447 void (*idx_reply_cb)(struct qeth_channel *,
1448 struct qeth_cmd_buffer *))
1449 {
1450 struct qeth_card *card;
1451 struct qeth_cmd_buffer *iob;
1452 unsigned long flags;
1453 __u16 temp;
1454 __u8 tmp;
1455 int rc;
1456 struct ccw_dev_id temp_devid;
1457
1458 card = CARD_FROM_CDEV(channel->ccwdev);
1459
1460 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1461
1462 iob = qeth_get_buffer(channel);
1463 iob->callback = idx_reply_cb;
1464 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1465 channel->ccw.count = IDX_ACTIVATE_SIZE;
1466 channel->ccw.cda = (__u32) __pa(iob->data);
1467 if (channel == &card->write) {
1468 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1469 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1470 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1471 card->seqno.trans_hdr++;
1472 } else {
1473 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1474 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1475 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1476 }
1477 tmp = ((__u8)card->info.portno) | 0x80;
1478 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1479 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1480 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1481 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1482 &card->info.func_level, sizeof(__u16));
1483 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1484 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1485 temp = (card->info.cula << 8) + card->info.unit_addr2;
1486 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1487
1488 wait_event(card->wait_q,
1489 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1490 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1491 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1492 rc = ccw_device_start(channel->ccwdev,
1493 &channel->ccw, (addr_t) iob, 0, 0);
1494 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1495
1496 if (rc) {
1497 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1498 rc);
1499 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1500 atomic_set(&channel->irq_pending, 0);
1501 wake_up(&card->wait_q);
1502 return rc;
1503 }
1504 rc = wait_event_interruptible_timeout(card->wait_q,
1505 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1506 if (rc == -ERESTARTSYS)
1507 return rc;
1508 if (channel->state != CH_STATE_ACTIVATING) {
1509 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1510 " failed to recover an error on the device\n");
1511 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1512 dev_name(&channel->ccwdev->dev));
1513 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1514 qeth_clear_cmd_buffers(channel);
1515 return -ETIME;
1516 }
1517 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1518 }
1519
1520 static int qeth_peer_func_level(int level)
1521 {
1522 if ((level & 0xff) == 8)
1523 return (level & 0xff) + 0x400;
1524 if (((level >> 8) & 3) == 1)
1525 return (level & 0xff) + 0x200;
1526 return level;
1527 }
1528
1529 static void qeth_idx_write_cb(struct qeth_channel *channel,
1530 struct qeth_cmd_buffer *iob)
1531 {
1532 struct qeth_card *card;
1533 __u16 temp;
1534
1535 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1536
1537 if (channel->state == CH_STATE_DOWN) {
1538 channel->state = CH_STATE_ACTIVATING;
1539 goto out;
1540 }
1541 card = CARD_FROM_CDEV(channel->ccwdev);
1542
1543 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1544 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1545 dev_err(&card->write.ccwdev->dev,
1546 "The adapter is used exclusively by another "
1547 "host\n");
1548 else
1549 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1550 " negative reply\n",
1551 dev_name(&card->write.ccwdev->dev));
1552 goto out;
1553 }
1554 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1555 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1556 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1557 "function level mismatch (sent: 0x%x, received: "
1558 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1559 card->info.func_level, temp);
1560 goto out;
1561 }
1562 channel->state = CH_STATE_UP;
1563 out:
1564 qeth_release_buffer(channel, iob);
1565 }
1566
1567 static void qeth_idx_read_cb(struct qeth_channel *channel,
1568 struct qeth_cmd_buffer *iob)
1569 {
1570 struct qeth_card *card;
1571 __u16 temp;
1572
1573 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1574 if (channel->state == CH_STATE_DOWN) {
1575 channel->state = CH_STATE_ACTIVATING;
1576 goto out;
1577 }
1578
1579 card = CARD_FROM_CDEV(channel->ccwdev);
1580 if (qeth_check_idx_response(card, iob->data))
1581 goto out;
1582
1583 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1584 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1585 case QETH_IDX_ACT_ERR_EXCL:
1586 dev_err(&card->write.ccwdev->dev,
1587 "The adapter is used exclusively by another "
1588 "host\n");
1589 break;
1590 case QETH_IDX_ACT_ERR_AUTH:
1591 case QETH_IDX_ACT_ERR_AUTH_USER:
1592 dev_err(&card->read.ccwdev->dev,
1593 "Setting the device online failed because of "
1594 "insufficient authorization\n");
1595 break;
1596 default:
1597 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1598 " negative reply\n",
1599 dev_name(&card->read.ccwdev->dev));
1600 }
1601 QETH_CARD_TEXT_(card, 2, "idxread%c",
1602 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1603 goto out;
1604 }
1605
1606 /**
1607 * * temporary fix for microcode bug
1608 * * to revert it,replace OR by AND
1609 * */
1610 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1611 (card->info.type == QETH_CARD_TYPE_OSD))
1612 card->info.portname_required = 1;
1613
1614 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1615 if (temp != qeth_peer_func_level(card->info.func_level)) {
1616 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1617 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1618 dev_name(&card->read.ccwdev->dev),
1619 card->info.func_level, temp);
1620 goto out;
1621 }
1622 memcpy(&card->token.issuer_rm_r,
1623 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1624 QETH_MPC_TOKEN_LENGTH);
1625 memcpy(&card->info.mcl_level[0],
1626 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1627 channel->state = CH_STATE_UP;
1628 out:
1629 qeth_release_buffer(channel, iob);
1630 }
1631
1632 void qeth_prepare_control_data(struct qeth_card *card, int len,
1633 struct qeth_cmd_buffer *iob)
1634 {
1635 qeth_setup_ccw(&card->write, iob->data, len);
1636 iob->callback = qeth_release_buffer;
1637
1638 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1639 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1640 card->seqno.trans_hdr++;
1641 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1642 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1643 card->seqno.pdu_hdr++;
1644 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1645 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1646 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1647 }
1648 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1649
1650 int qeth_send_control_data(struct qeth_card *card, int len,
1651 struct qeth_cmd_buffer *iob,
1652 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1653 unsigned long),
1654 void *reply_param)
1655 {
1656 int rc;
1657 unsigned long flags;
1658 struct qeth_reply *reply = NULL;
1659 unsigned long timeout, event_timeout;
1660 struct qeth_ipa_cmd *cmd;
1661
1662 QETH_CARD_TEXT(card, 2, "sendctl");
1663
1664 if (card->read_or_write_problem) {
1665 qeth_release_buffer(iob->channel, iob);
1666 return -EIO;
1667 }
1668 reply = qeth_alloc_reply(card);
1669 if (!reply) {
1670 return -ENOMEM;
1671 }
1672 reply->callback = reply_cb;
1673 reply->param = reply_param;
1674 if (card->state == CARD_STATE_DOWN)
1675 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1676 else
1677 reply->seqno = card->seqno.ipa++;
1678 init_waitqueue_head(&reply->wait_q);
1679 spin_lock_irqsave(&card->lock, flags);
1680 list_add_tail(&reply->list, &card->cmd_waiter_list);
1681 spin_unlock_irqrestore(&card->lock, flags);
1682 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1683
1684 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1685 qeth_prepare_control_data(card, len, iob);
1686
1687 if (IS_IPA(iob->data))
1688 event_timeout = QETH_IPA_TIMEOUT;
1689 else
1690 event_timeout = QETH_TIMEOUT;
1691 timeout = jiffies + event_timeout;
1692
1693 QETH_CARD_TEXT(card, 6, "noirqpnd");
1694 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1695 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1696 (addr_t) iob, 0, 0);
1697 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1698 if (rc) {
1699 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1700 "ccw_device_start rc = %i\n",
1701 dev_name(&card->write.ccwdev->dev), rc);
1702 QETH_CARD_TEXT_(card, 2, " err%d", rc);
1703 spin_lock_irqsave(&card->lock, flags);
1704 list_del_init(&reply->list);
1705 qeth_put_reply(reply);
1706 spin_unlock_irqrestore(&card->lock, flags);
1707 qeth_release_buffer(iob->channel, iob);
1708 atomic_set(&card->write.irq_pending, 0);
1709 wake_up(&card->wait_q);
1710 return rc;
1711 }
1712
1713 /* we have only one long running ipassist, since we can ensure
1714 process context of this command we can sleep */
1715 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1716 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1717 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1718 if (!wait_event_timeout(reply->wait_q,
1719 atomic_read(&reply->received), event_timeout))
1720 goto time_err;
1721 } else {
1722 while (!atomic_read(&reply->received)) {
1723 if (time_after(jiffies, timeout))
1724 goto time_err;
1725 cpu_relax();
1726 };
1727 }
1728
1729 rc = reply->rc;
1730 qeth_put_reply(reply);
1731 return rc;
1732
1733 time_err:
1734 spin_lock_irqsave(&reply->card->lock, flags);
1735 list_del_init(&reply->list);
1736 spin_unlock_irqrestore(&reply->card->lock, flags);
1737 reply->rc = -ETIME;
1738 atomic_inc(&reply->received);
1739 atomic_set(&card->write.irq_pending, 0);
1740 qeth_release_buffer(iob->channel, iob);
1741 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
1742 wake_up(&reply->wait_q);
1743 rc = reply->rc;
1744 qeth_put_reply(reply);
1745 return rc;
1746 }
1747 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1748
1749 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1750 unsigned long data)
1751 {
1752 struct qeth_cmd_buffer *iob;
1753
1754 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1755
1756 iob = (struct qeth_cmd_buffer *) data;
1757 memcpy(&card->token.cm_filter_r,
1758 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1759 QETH_MPC_TOKEN_LENGTH);
1760 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1761 return 0;
1762 }
1763
1764 static int qeth_cm_enable(struct qeth_card *card)
1765 {
1766 int rc;
1767 struct qeth_cmd_buffer *iob;
1768
1769 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1770
1771 iob = qeth_wait_for_buffer(&card->write);
1772 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1773 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1774 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1775 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1776 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1777
1778 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1779 qeth_cm_enable_cb, NULL);
1780 return rc;
1781 }
1782
1783 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1784 unsigned long data)
1785 {
1786
1787 struct qeth_cmd_buffer *iob;
1788
1789 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1790
1791 iob = (struct qeth_cmd_buffer *) data;
1792 memcpy(&card->token.cm_connection_r,
1793 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1794 QETH_MPC_TOKEN_LENGTH);
1795 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1796 return 0;
1797 }
1798
1799 static int qeth_cm_setup(struct qeth_card *card)
1800 {
1801 int rc;
1802 struct qeth_cmd_buffer *iob;
1803
1804 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1805
1806 iob = qeth_wait_for_buffer(&card->write);
1807 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1808 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1809 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1810 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1811 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1812 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1813 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1814 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1815 qeth_cm_setup_cb, NULL);
1816 return rc;
1817
1818 }
1819
1820 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1821 {
1822 switch (card->info.type) {
1823 case QETH_CARD_TYPE_UNKNOWN:
1824 return 1500;
1825 case QETH_CARD_TYPE_IQD:
1826 return card->info.max_mtu;
1827 case QETH_CARD_TYPE_OSD:
1828 switch (card->info.link_type) {
1829 case QETH_LINK_TYPE_HSTR:
1830 case QETH_LINK_TYPE_LANE_TR:
1831 return 2000;
1832 default:
1833 return 1492;
1834 }
1835 case QETH_CARD_TYPE_OSM:
1836 case QETH_CARD_TYPE_OSX:
1837 return 1492;
1838 default:
1839 return 1500;
1840 }
1841 }
1842
1843 static inline int qeth_get_max_mtu_for_card(int cardtype)
1844 {
1845 switch (cardtype) {
1846
1847 case QETH_CARD_TYPE_UNKNOWN:
1848 case QETH_CARD_TYPE_OSD:
1849 case QETH_CARD_TYPE_OSN:
1850 case QETH_CARD_TYPE_OSM:
1851 case QETH_CARD_TYPE_OSX:
1852 return 61440;
1853 case QETH_CARD_TYPE_IQD:
1854 return 57344;
1855 default:
1856 return 1500;
1857 }
1858 }
1859
1860 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1861 {
1862 switch (cardtype) {
1863 case QETH_CARD_TYPE_IQD:
1864 return 1;
1865 default:
1866 return 0;
1867 }
1868 }
1869
1870 static inline int qeth_get_mtu_outof_framesize(int framesize)
1871 {
1872 switch (framesize) {
1873 case 0x4000:
1874 return 8192;
1875 case 0x6000:
1876 return 16384;
1877 case 0xa000:
1878 return 32768;
1879 case 0xffff:
1880 return 57344;
1881 default:
1882 return 0;
1883 }
1884 }
1885
1886 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1887 {
1888 switch (card->info.type) {
1889 case QETH_CARD_TYPE_OSD:
1890 case QETH_CARD_TYPE_OSM:
1891 case QETH_CARD_TYPE_OSX:
1892 return ((mtu >= 576) && (mtu <= 61440));
1893 case QETH_CARD_TYPE_IQD:
1894 return ((mtu >= 576) &&
1895 (mtu <= card->info.max_mtu + 4096 - 32));
1896 case QETH_CARD_TYPE_OSN:
1897 case QETH_CARD_TYPE_UNKNOWN:
1898 default:
1899 return 1;
1900 }
1901 }
1902
1903 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1904 unsigned long data)
1905 {
1906
1907 __u16 mtu, framesize;
1908 __u16 len;
1909 __u8 link_type;
1910 struct qeth_cmd_buffer *iob;
1911
1912 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1913
1914 iob = (struct qeth_cmd_buffer *) data;
1915 memcpy(&card->token.ulp_filter_r,
1916 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1917 QETH_MPC_TOKEN_LENGTH);
1918 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1919 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1920 mtu = qeth_get_mtu_outof_framesize(framesize);
1921 if (!mtu) {
1922 iob->rc = -EINVAL;
1923 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1924 return 0;
1925 }
1926 card->info.max_mtu = mtu;
1927 card->info.initial_mtu = mtu;
1928 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1929 } else {
1930 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1931 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1932 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1933 }
1934
1935 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1936 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1937 memcpy(&link_type,
1938 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1939 card->info.link_type = link_type;
1940 } else
1941 card->info.link_type = 0;
1942 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
1943 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1944 return 0;
1945 }
1946
1947 static int qeth_ulp_enable(struct qeth_card *card)
1948 {
1949 int rc;
1950 char prot_type;
1951 struct qeth_cmd_buffer *iob;
1952
1953 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1954
1955 iob = qeth_wait_for_buffer(&card->write);
1956 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1957
1958 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1959 (__u8) card->info.portno;
1960 if (card->options.layer2)
1961 if (card->info.type == QETH_CARD_TYPE_OSN)
1962 prot_type = QETH_PROT_OSN2;
1963 else
1964 prot_type = QETH_PROT_LAYER2;
1965 else
1966 prot_type = QETH_PROT_TCPIP;
1967
1968 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1969 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1970 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1971 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1972 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1973 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1974 card->info.portname, 9);
1975 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1976 qeth_ulp_enable_cb, NULL);
1977 return rc;
1978
1979 }
1980
1981 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1982 unsigned long data)
1983 {
1984 struct qeth_cmd_buffer *iob;
1985 int rc = 0;
1986
1987 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1988
1989 iob = (struct qeth_cmd_buffer *) data;
1990 memcpy(&card->token.ulp_connection_r,
1991 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1992 QETH_MPC_TOKEN_LENGTH);
1993 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1994 3)) {
1995 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1996 dev_err(&card->gdev->dev, "A connection could not be "
1997 "established because of an OLM limit\n");
1998 iob->rc = -EMLINK;
1999 }
2000 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2001 return rc;
2002 }
2003
2004 static int qeth_ulp_setup(struct qeth_card *card)
2005 {
2006 int rc;
2007 __u16 temp;
2008 struct qeth_cmd_buffer *iob;
2009 struct ccw_dev_id dev_id;
2010
2011 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2012
2013 iob = qeth_wait_for_buffer(&card->write);
2014 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2015
2016 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2017 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2018 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2019 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2020 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2021 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2022
2023 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2024 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2025 temp = (card->info.cula << 8) + card->info.unit_addr2;
2026 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2027 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2028 qeth_ulp_setup_cb, NULL);
2029 return rc;
2030 }
2031
2032 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2033 {
2034 int i, j;
2035
2036 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2037
2038 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2039 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2040 return 0;
2041
2042 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2043 GFP_KERNEL);
2044 if (!card->qdio.in_q)
2045 goto out_nomem;
2046 QETH_DBF_TEXT(SETUP, 2, "inq");
2047 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2048 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2049 /* give inbound qeth_qdio_buffers their qdio_buffers */
2050 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2051 card->qdio.in_q->bufs[i].buffer =
2052 &card->qdio.in_q->qdio_bufs[i];
2053 /* inbound buffer pool */
2054 if (qeth_alloc_buffer_pool(card))
2055 goto out_freeinq;
2056 /* outbound */
2057 card->qdio.out_qs =
2058 kmalloc(card->qdio.no_out_queues *
2059 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2060 if (!card->qdio.out_qs)
2061 goto out_freepool;
2062 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2063 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2064 GFP_KERNEL);
2065 if (!card->qdio.out_qs[i])
2066 goto out_freeoutq;
2067 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2068 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2069 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2070 card->qdio.out_qs[i]->queue_no = i;
2071 /* give outbound qeth_qdio_buffers their qdio_buffers */
2072 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2073 card->qdio.out_qs[i]->bufs[j].buffer =
2074 &card->qdio.out_qs[i]->qdio_bufs[j];
2075 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2076 skb_list);
2077 lockdep_set_class(
2078 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2079 &qdio_out_skb_queue_key);
2080 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2081 }
2082 }
2083 return 0;
2084
2085 out_freeoutq:
2086 while (i > 0)
2087 kfree(card->qdio.out_qs[--i]);
2088 kfree(card->qdio.out_qs);
2089 card->qdio.out_qs = NULL;
2090 out_freepool:
2091 qeth_free_buffer_pool(card);
2092 out_freeinq:
2093 kfree(card->qdio.in_q);
2094 card->qdio.in_q = NULL;
2095 out_nomem:
2096 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2097 return -ENOMEM;
2098 }
2099
2100 static void qeth_create_qib_param_field(struct qeth_card *card,
2101 char *param_field)
2102 {
2103
2104 param_field[0] = _ascebc['P'];
2105 param_field[1] = _ascebc['C'];
2106 param_field[2] = _ascebc['I'];
2107 param_field[3] = _ascebc['T'];
2108 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2109 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2110 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2111 }
2112
2113 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2114 char *param_field)
2115 {
2116 param_field[16] = _ascebc['B'];
2117 param_field[17] = _ascebc['L'];
2118 param_field[18] = _ascebc['K'];
2119 param_field[19] = _ascebc['T'];
2120 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2121 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2122 *((unsigned int *) (&param_field[28])) =
2123 card->info.blkt.inter_packet_jumbo;
2124 }
2125
2126 static int qeth_qdio_activate(struct qeth_card *card)
2127 {
2128 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2129 return qdio_activate(CARD_DDEV(card));
2130 }
2131
2132 static int qeth_dm_act(struct qeth_card *card)
2133 {
2134 int rc;
2135 struct qeth_cmd_buffer *iob;
2136
2137 QETH_DBF_TEXT(SETUP, 2, "dmact");
2138
2139 iob = qeth_wait_for_buffer(&card->write);
2140 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2141
2142 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2143 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2144 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2145 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2146 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2147 return rc;
2148 }
2149
2150 static int qeth_mpc_initialize(struct qeth_card *card)
2151 {
2152 int rc;
2153
2154 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2155
2156 rc = qeth_issue_next_read(card);
2157 if (rc) {
2158 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2159 return rc;
2160 }
2161 rc = qeth_cm_enable(card);
2162 if (rc) {
2163 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2164 goto out_qdio;
2165 }
2166 rc = qeth_cm_setup(card);
2167 if (rc) {
2168 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2169 goto out_qdio;
2170 }
2171 rc = qeth_ulp_enable(card);
2172 if (rc) {
2173 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2174 goto out_qdio;
2175 }
2176 rc = qeth_ulp_setup(card);
2177 if (rc) {
2178 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2179 goto out_qdio;
2180 }
2181 rc = qeth_alloc_qdio_buffers(card);
2182 if (rc) {
2183 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2184 goto out_qdio;
2185 }
2186 rc = qeth_qdio_establish(card);
2187 if (rc) {
2188 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2189 qeth_free_qdio_buffers(card);
2190 goto out_qdio;
2191 }
2192 rc = qeth_qdio_activate(card);
2193 if (rc) {
2194 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2195 goto out_qdio;
2196 }
2197 rc = qeth_dm_act(card);
2198 if (rc) {
2199 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2200 goto out_qdio;
2201 }
2202
2203 return 0;
2204 out_qdio:
2205 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2206 return rc;
2207 }
2208
2209 static void qeth_print_status_with_portname(struct qeth_card *card)
2210 {
2211 char dbf_text[15];
2212 int i;
2213
2214 sprintf(dbf_text, "%s", card->info.portname + 1);
2215 for (i = 0; i < 8; i++)
2216 dbf_text[i] =
2217 (char) _ebcasc[(__u8) dbf_text[i]];
2218 dbf_text[8] = 0;
2219 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2220 "with link type %s (portname: %s)\n",
2221 qeth_get_cardname(card),
2222 (card->info.mcl_level[0]) ? " (level: " : "",
2223 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2224 (card->info.mcl_level[0]) ? ")" : "",
2225 qeth_get_cardname_short(card),
2226 dbf_text);
2227
2228 }
2229
2230 static void qeth_print_status_no_portname(struct qeth_card *card)
2231 {
2232 if (card->info.portname[0])
2233 dev_info(&card->gdev->dev, "Device is a%s "
2234 "card%s%s%s\nwith link type %s "
2235 "(no portname needed by interface).\n",
2236 qeth_get_cardname(card),
2237 (card->info.mcl_level[0]) ? " (level: " : "",
2238 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2239 (card->info.mcl_level[0]) ? ")" : "",
2240 qeth_get_cardname_short(card));
2241 else
2242 dev_info(&card->gdev->dev, "Device is a%s "
2243 "card%s%s%s\nwith link type %s.\n",
2244 qeth_get_cardname(card),
2245 (card->info.mcl_level[0]) ? " (level: " : "",
2246 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2247 (card->info.mcl_level[0]) ? ")" : "",
2248 qeth_get_cardname_short(card));
2249 }
2250
2251 void qeth_print_status_message(struct qeth_card *card)
2252 {
2253 switch (card->info.type) {
2254 case QETH_CARD_TYPE_OSD:
2255 case QETH_CARD_TYPE_OSM:
2256 case QETH_CARD_TYPE_OSX:
2257 /* VM will use a non-zero first character
2258 * to indicate a HiperSockets like reporting
2259 * of the level OSA sets the first character to zero
2260 * */
2261 if (!card->info.mcl_level[0]) {
2262 sprintf(card->info.mcl_level, "%02x%02x",
2263 card->info.mcl_level[2],
2264 card->info.mcl_level[3]);
2265
2266 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2267 break;
2268 }
2269 /* fallthrough */
2270 case QETH_CARD_TYPE_IQD:
2271 if ((card->info.guestlan) ||
2272 (card->info.mcl_level[0] & 0x80)) {
2273 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2274 card->info.mcl_level[0]];
2275 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2276 card->info.mcl_level[1]];
2277 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2278 card->info.mcl_level[2]];
2279 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2280 card->info.mcl_level[3]];
2281 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2282 }
2283 break;
2284 default:
2285 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2286 }
2287 if (card->info.portname_required)
2288 qeth_print_status_with_portname(card);
2289 else
2290 qeth_print_status_no_portname(card);
2291 }
2292 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2293
2294 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2295 {
2296 struct qeth_buffer_pool_entry *entry;
2297
2298 QETH_CARD_TEXT(card, 5, "inwrklst");
2299
2300 list_for_each_entry(entry,
2301 &card->qdio.init_pool.entry_list, init_list) {
2302 qeth_put_buffer_pool_entry(card, entry);
2303 }
2304 }
2305
2306 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2307 struct qeth_card *card)
2308 {
2309 struct list_head *plh;
2310 struct qeth_buffer_pool_entry *entry;
2311 int i, free;
2312 struct page *page;
2313
2314 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2315 return NULL;
2316
2317 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2318 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2319 free = 1;
2320 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2321 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2322 free = 0;
2323 break;
2324 }
2325 }
2326 if (free) {
2327 list_del_init(&entry->list);
2328 return entry;
2329 }
2330 }
2331
2332 /* no free buffer in pool so take first one and swap pages */
2333 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2334 struct qeth_buffer_pool_entry, list);
2335 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2336 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2337 page = alloc_page(GFP_ATOMIC);
2338 if (!page) {
2339 return NULL;
2340 } else {
2341 free_page((unsigned long)entry->elements[i]);
2342 entry->elements[i] = page_address(page);
2343 if (card->options.performance_stats)
2344 card->perf_stats.sg_alloc_page_rx++;
2345 }
2346 }
2347 }
2348 list_del_init(&entry->list);
2349 return entry;
2350 }
2351
2352 static int qeth_init_input_buffer(struct qeth_card *card,
2353 struct qeth_qdio_buffer *buf)
2354 {
2355 struct qeth_buffer_pool_entry *pool_entry;
2356 int i;
2357
2358 pool_entry = qeth_find_free_buffer_pool_entry(card);
2359 if (!pool_entry)
2360 return 1;
2361
2362 /*
2363 * since the buffer is accessed only from the input_tasklet
2364 * there shouldn't be a need to synchronize; also, since we use
2365 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2366 * buffers
2367 */
2368
2369 buf->pool_entry = pool_entry;
2370 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2371 buf->buffer->element[i].length = PAGE_SIZE;
2372 buf->buffer->element[i].addr = pool_entry->elements[i];
2373 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2374 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2375 else
2376 buf->buffer->element[i].flags = 0;
2377 }
2378 return 0;
2379 }
2380
2381 int qeth_init_qdio_queues(struct qeth_card *card)
2382 {
2383 int i, j;
2384 int rc;
2385
2386 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2387
2388 /* inbound queue */
2389 memset(card->qdio.in_q->qdio_bufs, 0,
2390 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2391 qeth_initialize_working_pool_list(card);
2392 /*give only as many buffers to hardware as we have buffer pool entries*/
2393 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2394 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2395 card->qdio.in_q->next_buf_to_init =
2396 card->qdio.in_buf_pool.buf_count - 1;
2397 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2398 card->qdio.in_buf_pool.buf_count - 1);
2399 if (rc) {
2400 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2401 return rc;
2402 }
2403 /* outbound queue */
2404 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2405 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2406 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2407 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2408 qeth_clear_output_buffer(card->qdio.out_qs[i],
2409 &card->qdio.out_qs[i]->bufs[j]);
2410 }
2411 card->qdio.out_qs[i]->card = card;
2412 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2413 card->qdio.out_qs[i]->do_pack = 0;
2414 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2415 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2416 atomic_set(&card->qdio.out_qs[i]->state,
2417 QETH_OUT_Q_UNLOCKED);
2418 }
2419 return 0;
2420 }
2421 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2422
2423 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2424 {
2425 switch (link_type) {
2426 case QETH_LINK_TYPE_HSTR:
2427 return 2;
2428 default:
2429 return 1;
2430 }
2431 }
2432
2433 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2434 struct qeth_ipa_cmd *cmd, __u8 command,
2435 enum qeth_prot_versions prot)
2436 {
2437 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2438 cmd->hdr.command = command;
2439 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2440 cmd->hdr.seqno = card->seqno.ipa;
2441 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2442 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2443 if (card->options.layer2)
2444 cmd->hdr.prim_version_no = 2;
2445 else
2446 cmd->hdr.prim_version_no = 1;
2447 cmd->hdr.param_count = 1;
2448 cmd->hdr.prot_version = prot;
2449 cmd->hdr.ipa_supported = 0;
2450 cmd->hdr.ipa_enabled = 0;
2451 }
2452
2453 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2454 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2455 {
2456 struct qeth_cmd_buffer *iob;
2457 struct qeth_ipa_cmd *cmd;
2458
2459 iob = qeth_wait_for_buffer(&card->write);
2460 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2461 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2462
2463 return iob;
2464 }
2465 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2466
2467 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2468 char prot_type)
2469 {
2470 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2471 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2472 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2473 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2474 }
2475 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2476
2477 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2478 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2479 unsigned long),
2480 void *reply_param)
2481 {
2482 int rc;
2483 char prot_type;
2484
2485 QETH_CARD_TEXT(card, 4, "sendipa");
2486
2487 if (card->options.layer2)
2488 if (card->info.type == QETH_CARD_TYPE_OSN)
2489 prot_type = QETH_PROT_OSN2;
2490 else
2491 prot_type = QETH_PROT_LAYER2;
2492 else
2493 prot_type = QETH_PROT_TCPIP;
2494 qeth_prepare_ipa_cmd(card, iob, prot_type);
2495 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2496 iob, reply_cb, reply_param);
2497 if (rc == -ETIME) {
2498 qeth_clear_ipacmd_list(card);
2499 qeth_schedule_recovery(card);
2500 }
2501 return rc;
2502 }
2503 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2504
2505 static int qeth_send_startstoplan(struct qeth_card *card,
2506 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2507 {
2508 int rc;
2509 struct qeth_cmd_buffer *iob;
2510
2511 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2512 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2513
2514 return rc;
2515 }
2516
2517 int qeth_send_startlan(struct qeth_card *card)
2518 {
2519 int rc;
2520
2521 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2522
2523 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2524 return rc;
2525 }
2526 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2527
2528 int qeth_send_stoplan(struct qeth_card *card)
2529 {
2530 int rc = 0;
2531
2532 /*
2533 * TODO: according to the IPA format document page 14,
2534 * TCP/IP (we!) never issue a STOPLAN
2535 * is this right ?!?
2536 */
2537 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2538
2539 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2540 return rc;
2541 }
2542 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2543
2544 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2545 struct qeth_reply *reply, unsigned long data)
2546 {
2547 struct qeth_ipa_cmd *cmd;
2548
2549 QETH_CARD_TEXT(card, 4, "defadpcb");
2550
2551 cmd = (struct qeth_ipa_cmd *) data;
2552 if (cmd->hdr.return_code == 0)
2553 cmd->hdr.return_code =
2554 cmd->data.setadapterparms.hdr.return_code;
2555 return 0;
2556 }
2557 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2558
2559 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2560 struct qeth_reply *reply, unsigned long data)
2561 {
2562 struct qeth_ipa_cmd *cmd;
2563
2564 QETH_CARD_TEXT(card, 3, "quyadpcb");
2565
2566 cmd = (struct qeth_ipa_cmd *) data;
2567 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2568 card->info.link_type =
2569 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2570 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2571 }
2572 card->options.adp.supported_funcs =
2573 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2574 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2575 }
2576
2577 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2578 __u32 command, __u32 cmdlen)
2579 {
2580 struct qeth_cmd_buffer *iob;
2581 struct qeth_ipa_cmd *cmd;
2582
2583 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2584 QETH_PROT_IPV4);
2585 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2586 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2587 cmd->data.setadapterparms.hdr.command_code = command;
2588 cmd->data.setadapterparms.hdr.used_total = 1;
2589 cmd->data.setadapterparms.hdr.seq_no = 1;
2590
2591 return iob;
2592 }
2593 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2594
2595 int qeth_query_setadapterparms(struct qeth_card *card)
2596 {
2597 int rc;
2598 struct qeth_cmd_buffer *iob;
2599
2600 QETH_CARD_TEXT(card, 3, "queryadp");
2601 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2602 sizeof(struct qeth_ipacmd_setadpparms));
2603 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2604 return rc;
2605 }
2606 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2607
2608 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2609 unsigned int qdio_error, const char *dbftext)
2610 {
2611 if (qdio_error) {
2612 QETH_CARD_TEXT(card, 2, dbftext);
2613 QETH_CARD_TEXT_(card, 2, " F15=%02X",
2614 buf->element[15].flags & 0xff);
2615 QETH_CARD_TEXT_(card, 2, " F14=%02X",
2616 buf->element[14].flags & 0xff);
2617 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
2618 if ((buf->element[15].flags & 0xff) == 0x12) {
2619 card->stats.rx_dropped++;
2620 return 0;
2621 } else
2622 return 1;
2623 }
2624 return 0;
2625 }
2626 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2627
2628 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2629 {
2630 struct qeth_qdio_q *queue = card->qdio.in_q;
2631 int count;
2632 int i;
2633 int rc;
2634 int newcount = 0;
2635
2636 count = (index < queue->next_buf_to_init)?
2637 card->qdio.in_buf_pool.buf_count -
2638 (queue->next_buf_to_init - index) :
2639 card->qdio.in_buf_pool.buf_count -
2640 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2641 /* only requeue at a certain threshold to avoid SIGAs */
2642 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2643 for (i = queue->next_buf_to_init;
2644 i < queue->next_buf_to_init + count; ++i) {
2645 if (qeth_init_input_buffer(card,
2646 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2647 break;
2648 } else {
2649 newcount++;
2650 }
2651 }
2652
2653 if (newcount < count) {
2654 /* we are in memory shortage so we switch back to
2655 traditional skb allocation and drop packages */
2656 atomic_set(&card->force_alloc_skb, 3);
2657 count = newcount;
2658 } else {
2659 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2660 }
2661
2662 /*
2663 * according to old code it should be avoided to requeue all
2664 * 128 buffers in order to benefit from PCI avoidance.
2665 * this function keeps at least one buffer (the buffer at
2666 * 'index') un-requeued -> this buffer is the first buffer that
2667 * will be requeued the next time
2668 */
2669 if (card->options.performance_stats) {
2670 card->perf_stats.inbound_do_qdio_cnt++;
2671 card->perf_stats.inbound_do_qdio_start_time =
2672 qeth_get_micros();
2673 }
2674 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2675 queue->next_buf_to_init, count);
2676 if (card->options.performance_stats)
2677 card->perf_stats.inbound_do_qdio_time +=
2678 qeth_get_micros() -
2679 card->perf_stats.inbound_do_qdio_start_time;
2680 if (rc) {
2681 dev_warn(&card->gdev->dev,
2682 "QDIO reported an error, rc=%i\n", rc);
2683 QETH_CARD_TEXT(card, 2, "qinberr");
2684 }
2685 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2686 QDIO_MAX_BUFFERS_PER_Q;
2687 }
2688 }
2689 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2690
2691 static int qeth_handle_send_error(struct qeth_card *card,
2692 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2693 {
2694 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2695
2696 QETH_CARD_TEXT(card, 6, "hdsnderr");
2697 if (card->info.type == QETH_CARD_TYPE_IQD) {
2698 if (sbalf15 == 0) {
2699 qdio_err = 0;
2700 } else {
2701 qdio_err = 1;
2702 }
2703 }
2704 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2705
2706 if (!qdio_err)
2707 return QETH_SEND_ERROR_NONE;
2708
2709 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2710 return QETH_SEND_ERROR_RETRY;
2711
2712 QETH_CARD_TEXT(card, 1, "lnkfail");
2713 QETH_CARD_TEXT_(card, 1, "%04x %02x",
2714 (u16)qdio_err, (u8)sbalf15);
2715 return QETH_SEND_ERROR_LINK_FAILURE;
2716 }
2717
2718 /*
2719 * Switched to packing state if the number of used buffers on a queue
2720 * reaches a certain limit.
2721 */
2722 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2723 {
2724 if (!queue->do_pack) {
2725 if (atomic_read(&queue->used_buffers)
2726 >= QETH_HIGH_WATERMARK_PACK){
2727 /* switch non-PACKING -> PACKING */
2728 QETH_CARD_TEXT(queue->card, 6, "np->pack");
2729 if (queue->card->options.performance_stats)
2730 queue->card->perf_stats.sc_dp_p++;
2731 queue->do_pack = 1;
2732 }
2733 }
2734 }
2735
2736 /*
2737 * Switches from packing to non-packing mode. If there is a packing
2738 * buffer on the queue this buffer will be prepared to be flushed.
2739 * In that case 1 is returned to inform the caller. If no buffer
2740 * has to be flushed, zero is returned.
2741 */
2742 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2743 {
2744 struct qeth_qdio_out_buffer *buffer;
2745 int flush_count = 0;
2746
2747 if (queue->do_pack) {
2748 if (atomic_read(&queue->used_buffers)
2749 <= QETH_LOW_WATERMARK_PACK) {
2750 /* switch PACKING -> non-PACKING */
2751 QETH_CARD_TEXT(queue->card, 6, "pack->np");
2752 if (queue->card->options.performance_stats)
2753 queue->card->perf_stats.sc_p_dp++;
2754 queue->do_pack = 0;
2755 /* flush packing buffers */
2756 buffer = &queue->bufs[queue->next_buf_to_fill];
2757 if ((atomic_read(&buffer->state) ==
2758 QETH_QDIO_BUF_EMPTY) &&
2759 (buffer->next_element_to_fill > 0)) {
2760 atomic_set(&buffer->state,
2761 QETH_QDIO_BUF_PRIMED);
2762 flush_count++;
2763 queue->next_buf_to_fill =
2764 (queue->next_buf_to_fill + 1) %
2765 QDIO_MAX_BUFFERS_PER_Q;
2766 }
2767 }
2768 }
2769 return flush_count;
2770 }
2771
2772 /*
2773 * Called to flush a packing buffer if no more pci flags are on the queue.
2774 * Checks if there is a packing buffer and prepares it to be flushed.
2775 * In that case returns 1, otherwise zero.
2776 */
2777 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2778 {
2779 struct qeth_qdio_out_buffer *buffer;
2780
2781 buffer = &queue->bufs[queue->next_buf_to_fill];
2782 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2783 (buffer->next_element_to_fill > 0)) {
2784 /* it's a packing buffer */
2785 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2786 queue->next_buf_to_fill =
2787 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2788 return 1;
2789 }
2790 return 0;
2791 }
2792
2793 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2794 int count)
2795 {
2796 struct qeth_qdio_out_buffer *buf;
2797 int rc;
2798 int i;
2799 unsigned int qdio_flags;
2800
2801 for (i = index; i < index + count; ++i) {
2802 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2803 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2804 SBAL_FLAGS_LAST_ENTRY;
2805
2806 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2807 continue;
2808
2809 if (!queue->do_pack) {
2810 if ((atomic_read(&queue->used_buffers) >=
2811 (QETH_HIGH_WATERMARK_PACK -
2812 QETH_WATERMARK_PACK_FUZZ)) &&
2813 !atomic_read(&queue->set_pci_flags_count)) {
2814 /* it's likely that we'll go to packing
2815 * mode soon */
2816 atomic_inc(&queue->set_pci_flags_count);
2817 buf->buffer->element[0].flags |= 0x40;
2818 }
2819 } else {
2820 if (!atomic_read(&queue->set_pci_flags_count)) {
2821 /*
2822 * there's no outstanding PCI any more, so we
2823 * have to request a PCI to be sure the the PCI
2824 * will wake at some time in the future then we
2825 * can flush packed buffers that might still be
2826 * hanging around, which can happen if no
2827 * further send was requested by the stack
2828 */
2829 atomic_inc(&queue->set_pci_flags_count);
2830 buf->buffer->element[0].flags |= 0x40;
2831 }
2832 }
2833 }
2834
2835 queue->sync_iqdio_error = 0;
2836 queue->card->dev->trans_start = jiffies;
2837 if (queue->card->options.performance_stats) {
2838 queue->card->perf_stats.outbound_do_qdio_cnt++;
2839 queue->card->perf_stats.outbound_do_qdio_start_time =
2840 qeth_get_micros();
2841 }
2842 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2843 if (atomic_read(&queue->set_pci_flags_count))
2844 qdio_flags |= QDIO_FLAG_PCI_OUT;
2845 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2846 queue->queue_no, index, count);
2847 if (queue->card->options.performance_stats)
2848 queue->card->perf_stats.outbound_do_qdio_time +=
2849 qeth_get_micros() -
2850 queue->card->perf_stats.outbound_do_qdio_start_time;
2851 if (rc > 0) {
2852 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2853 queue->sync_iqdio_error = rc & 3;
2854 }
2855 if (rc) {
2856 queue->card->stats.tx_errors += count;
2857 /* ignore temporary SIGA errors without busy condition */
2858 if (rc == QDIO_ERROR_SIGA_TARGET)
2859 return;
2860 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
2861 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
2862
2863 /* this must not happen under normal circumstances. if it
2864 * happens something is really wrong -> recover */
2865 qeth_schedule_recovery(queue->card);
2866 return;
2867 }
2868 atomic_add(count, &queue->used_buffers);
2869 if (queue->card->options.performance_stats)
2870 queue->card->perf_stats.bufs_sent += count;
2871 }
2872
2873 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2874 {
2875 int index;
2876 int flush_cnt = 0;
2877 int q_was_packing = 0;
2878
2879 /*
2880 * check if weed have to switch to non-packing mode or if
2881 * we have to get a pci flag out on the queue
2882 */
2883 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2884 !atomic_read(&queue->set_pci_flags_count)) {
2885 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2886 QETH_OUT_Q_UNLOCKED) {
2887 /*
2888 * If we get in here, there was no action in
2889 * do_send_packet. So, we check if there is a
2890 * packing buffer to be flushed here.
2891 */
2892 netif_stop_queue(queue->card->dev);
2893 index = queue->next_buf_to_fill;
2894 q_was_packing = queue->do_pack;
2895 /* queue->do_pack may change */
2896 barrier();
2897 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2898 if (!flush_cnt &&
2899 !atomic_read(&queue->set_pci_flags_count))
2900 flush_cnt +=
2901 qeth_flush_buffers_on_no_pci(queue);
2902 if (queue->card->options.performance_stats &&
2903 q_was_packing)
2904 queue->card->perf_stats.bufs_sent_pack +=
2905 flush_cnt;
2906 if (flush_cnt)
2907 qeth_flush_buffers(queue, index, flush_cnt);
2908 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2909 }
2910 }
2911 }
2912
2913 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2914 unsigned int qdio_error, int __queue, int first_element,
2915 int count, unsigned long card_ptr)
2916 {
2917 struct qeth_card *card = (struct qeth_card *) card_ptr;
2918 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2919 struct qeth_qdio_out_buffer *buffer;
2920 int i;
2921 unsigned qeth_send_err;
2922
2923 QETH_CARD_TEXT(card, 6, "qdouhdl");
2924 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2925 QETH_CARD_TEXT(card, 2, "achkcond");
2926 netif_stop_queue(card->dev);
2927 qeth_schedule_recovery(card);
2928 return;
2929 }
2930 if (card->options.performance_stats) {
2931 card->perf_stats.outbound_handler_cnt++;
2932 card->perf_stats.outbound_handler_start_time =
2933 qeth_get_micros();
2934 }
2935 for (i = first_element; i < (first_element + count); ++i) {
2936 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2937 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2938 __qeth_clear_output_buffer(queue, buffer,
2939 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2940 }
2941 atomic_sub(count, &queue->used_buffers);
2942 /* check if we need to do something on this outbound queue */
2943 if (card->info.type != QETH_CARD_TYPE_IQD)
2944 qeth_check_outbound_queue(queue);
2945
2946 netif_wake_queue(queue->card->dev);
2947 if (card->options.performance_stats)
2948 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2949 card->perf_stats.outbound_handler_start_time;
2950 }
2951 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2952
2953 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2954 int ipv, int cast_type)
2955 {
2956 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
2957 card->info.type == QETH_CARD_TYPE_OSX))
2958 return card->qdio.default_out_queue;
2959 switch (card->qdio.no_out_queues) {
2960 case 4:
2961 if (cast_type && card->info.is_multicast_different)
2962 return card->info.is_multicast_different &
2963 (card->qdio.no_out_queues - 1);
2964 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2965 const u8 tos = ip_hdr(skb)->tos;
2966
2967 if (card->qdio.do_prio_queueing ==
2968 QETH_PRIO_Q_ING_TOS) {
2969 if (tos & IP_TOS_NOTIMPORTANT)
2970 return 3;
2971 if (tos & IP_TOS_HIGHRELIABILITY)
2972 return 2;
2973 if (tos & IP_TOS_HIGHTHROUGHPUT)
2974 return 1;
2975 if (tos & IP_TOS_LOWDELAY)
2976 return 0;
2977 }
2978 if (card->qdio.do_prio_queueing ==
2979 QETH_PRIO_Q_ING_PREC)
2980 return 3 - (tos >> 6);
2981 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2982 /* TODO: IPv6!!! */
2983 }
2984 return card->qdio.default_out_queue;
2985 case 1: /* fallthrough for single-out-queue 1920-device */
2986 default:
2987 return card->qdio.default_out_queue;
2988 }
2989 }
2990 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2991
2992 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2993 struct sk_buff *skb, int elems)
2994 {
2995 int dlen = skb->len - skb->data_len;
2996 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
2997 PFN_DOWN((unsigned long)skb->data);
2998
2999 elements_needed += skb_shinfo(skb)->nr_frags;
3000 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3001 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3002 "(Number=%d / Length=%d). Discarded.\n",
3003 (elements_needed+elems), skb->len);
3004 return 0;
3005 }
3006 return elements_needed;
3007 }
3008 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3009
3010 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3011 {
3012 int hroom, inpage, rest;
3013
3014 if (((unsigned long)skb->data & PAGE_MASK) !=
3015 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3016 hroom = skb_headroom(skb);
3017 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3018 rest = len - inpage;
3019 if (rest > hroom)
3020 return 1;
3021 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3022 skb->data -= rest;
3023 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3024 }
3025 return 0;
3026 }
3027 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3028
3029 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3030 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3031 int offset)
3032 {
3033 int length = skb->len - skb->data_len;
3034 int length_here;
3035 int element;
3036 char *data;
3037 int first_lap, cnt;
3038 struct skb_frag_struct *frag;
3039
3040 element = *next_element_to_fill;
3041 data = skb->data;
3042 first_lap = (is_tso == 0 ? 1 : 0);
3043
3044 if (offset >= 0) {
3045 data = skb->data + offset;
3046 length -= offset;
3047 first_lap = 0;
3048 }
3049
3050 while (length > 0) {
3051 /* length_here is the remaining amount of data in this page */
3052 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3053 if (length < length_here)
3054 length_here = length;
3055
3056 buffer->element[element].addr = data;
3057 buffer->element[element].length = length_here;
3058 length -= length_here;
3059 if (!length) {
3060 if (first_lap)
3061 if (skb_shinfo(skb)->nr_frags)
3062 buffer->element[element].flags =
3063 SBAL_FLAGS_FIRST_FRAG;
3064 else
3065 buffer->element[element].flags = 0;
3066 else
3067 buffer->element[element].flags =
3068 SBAL_FLAGS_MIDDLE_FRAG;
3069 } else {
3070 if (first_lap)
3071 buffer->element[element].flags =
3072 SBAL_FLAGS_FIRST_FRAG;
3073 else
3074 buffer->element[element].flags =
3075 SBAL_FLAGS_MIDDLE_FRAG;
3076 }
3077 data += length_here;
3078 element++;
3079 first_lap = 0;
3080 }
3081
3082 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3083 frag = &skb_shinfo(skb)->frags[cnt];
3084 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3085 + frag->page_offset;
3086 buffer->element[element].length = frag->size;
3087 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG;
3088 element++;
3089 }
3090
3091 if (buffer->element[element - 1].flags)
3092 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG;
3093 *next_element_to_fill = element;
3094 }
3095
3096 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3097 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3098 struct qeth_hdr *hdr, int offset, int hd_len)
3099 {
3100 struct qdio_buffer *buffer;
3101 int flush_cnt = 0, hdr_len, large_send = 0;
3102
3103 buffer = buf->buffer;
3104 atomic_inc(&skb->users);
3105 skb_queue_tail(&buf->skb_list, skb);
3106
3107 /*check first on TSO ....*/
3108 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3109 int element = buf->next_element_to_fill;
3110
3111 hdr_len = sizeof(struct qeth_hdr_tso) +
3112 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3113 /*fill first buffer entry only with header information */
3114 buffer->element[element].addr = skb->data;
3115 buffer->element[element].length = hdr_len;
3116 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3117 buf->next_element_to_fill++;
3118 skb->data += hdr_len;
3119 skb->len -= hdr_len;
3120 large_send = 1;
3121 }
3122
3123 if (offset >= 0) {
3124 int element = buf->next_element_to_fill;
3125 buffer->element[element].addr = hdr;
3126 buffer->element[element].length = sizeof(struct qeth_hdr) +
3127 hd_len;
3128 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3129 buf->is_header[element] = 1;
3130 buf->next_element_to_fill++;
3131 }
3132
3133 __qeth_fill_buffer(skb, buffer, large_send,
3134 (int *)&buf->next_element_to_fill, offset);
3135
3136 if (!queue->do_pack) {
3137 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3138 /* set state to PRIMED -> will be flushed */
3139 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3140 flush_cnt = 1;
3141 } else {
3142 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3143 if (queue->card->options.performance_stats)
3144 queue->card->perf_stats.skbs_sent_pack++;
3145 if (buf->next_element_to_fill >=
3146 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3147 /*
3148 * packed buffer if full -> set state PRIMED
3149 * -> will be flushed
3150 */
3151 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3152 flush_cnt = 1;
3153 }
3154 }
3155 return flush_cnt;
3156 }
3157
3158 int qeth_do_send_packet_fast(struct qeth_card *card,
3159 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3160 struct qeth_hdr *hdr, int elements_needed,
3161 int offset, int hd_len)
3162 {
3163 struct qeth_qdio_out_buffer *buffer;
3164 struct sk_buff *skb1;
3165 struct qeth_skb_data *retry_ctrl;
3166 int index;
3167 int rc;
3168
3169 /* spin until we get the queue ... */
3170 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3171 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3172 /* ... now we've got the queue */
3173 index = queue->next_buf_to_fill;
3174 buffer = &queue->bufs[queue->next_buf_to_fill];
3175 /*
3176 * check if buffer is empty to make sure that we do not 'overtake'
3177 * ourselves and try to fill a buffer that is already primed
3178 */
3179 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3180 goto out;
3181 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3182 QDIO_MAX_BUFFERS_PER_Q;
3183 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3184 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3185 qeth_flush_buffers(queue, index, 1);
3186 if (queue->sync_iqdio_error == 2) {
3187 skb1 = skb_dequeue(&buffer->skb_list);
3188 while (skb1) {
3189 atomic_dec(&skb1->users);
3190 skb1 = skb_dequeue(&buffer->skb_list);
3191 }
3192 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3193 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3194 retry_ctrl->magic = QETH_SKB_MAGIC;
3195 retry_ctrl->count = 0;
3196 }
3197 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3198 retry_ctrl->count++;
3199 rc = dev_queue_xmit(skb);
3200 } else {
3201 dev_kfree_skb_any(skb);
3202 QETH_CARD_TEXT(card, 2, "qrdrop");
3203 }
3204 }
3205 return 0;
3206 out:
3207 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3208 return -EBUSY;
3209 }
3210 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3211
3212 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3213 struct sk_buff *skb, struct qeth_hdr *hdr,
3214 int elements_needed)
3215 {
3216 struct qeth_qdio_out_buffer *buffer;
3217 int start_index;
3218 int flush_count = 0;
3219 int do_pack = 0;
3220 int tmp;
3221 int rc = 0;
3222
3223 /* spin until we get the queue ... */
3224 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3225 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3226 start_index = queue->next_buf_to_fill;
3227 buffer = &queue->bufs[queue->next_buf_to_fill];
3228 /*
3229 * check if buffer is empty to make sure that we do not 'overtake'
3230 * ourselves and try to fill a buffer that is already primed
3231 */
3232 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3233 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3234 return -EBUSY;
3235 }
3236 /* check if we need to switch packing state of this queue */
3237 qeth_switch_to_packing_if_needed(queue);
3238 if (queue->do_pack) {
3239 do_pack = 1;
3240 /* does packet fit in current buffer? */
3241 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3242 buffer->next_element_to_fill) < elements_needed) {
3243 /* ... no -> set state PRIMED */
3244 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3245 flush_count++;
3246 queue->next_buf_to_fill =
3247 (queue->next_buf_to_fill + 1) %
3248 QDIO_MAX_BUFFERS_PER_Q;
3249 buffer = &queue->bufs[queue->next_buf_to_fill];
3250 /* we did a step forward, so check buffer state
3251 * again */
3252 if (atomic_read(&buffer->state) !=
3253 QETH_QDIO_BUF_EMPTY) {
3254 qeth_flush_buffers(queue, start_index,
3255 flush_count);
3256 atomic_set(&queue->state,
3257 QETH_OUT_Q_UNLOCKED);
3258 return -EBUSY;
3259 }
3260 }
3261 }
3262 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3263 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3264 QDIO_MAX_BUFFERS_PER_Q;
3265 flush_count += tmp;
3266 if (flush_count)
3267 qeth_flush_buffers(queue, start_index, flush_count);
3268 else if (!atomic_read(&queue->set_pci_flags_count))
3269 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3270 /*
3271 * queue->state will go from LOCKED -> UNLOCKED or from
3272 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3273 * (switch packing state or flush buffer to get another pci flag out).
3274 * In that case we will enter this loop
3275 */
3276 while (atomic_dec_return(&queue->state)) {
3277 flush_count = 0;
3278 start_index = queue->next_buf_to_fill;
3279 /* check if we can go back to non-packing state */
3280 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3281 /*
3282 * check if we need to flush a packing buffer to get a pci
3283 * flag out on the queue
3284 */
3285 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3286 flush_count += qeth_flush_buffers_on_no_pci(queue);
3287 if (flush_count)
3288 qeth_flush_buffers(queue, start_index, flush_count);
3289 }
3290 /* at this point the queue is UNLOCKED again */
3291 if (queue->card->options.performance_stats && do_pack)
3292 queue->card->perf_stats.bufs_sent_pack += flush_count;
3293
3294 return rc;
3295 }
3296 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3297
3298 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3299 struct qeth_reply *reply, unsigned long data)
3300 {
3301 struct qeth_ipa_cmd *cmd;
3302 struct qeth_ipacmd_setadpparms *setparms;
3303
3304 QETH_CARD_TEXT(card, 4, "prmadpcb");
3305
3306 cmd = (struct qeth_ipa_cmd *) data;
3307 setparms = &(cmd->data.setadapterparms);
3308
3309 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3310 if (cmd->hdr.return_code) {
3311 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3312 setparms->data.mode = SET_PROMISC_MODE_OFF;
3313 }
3314 card->info.promisc_mode = setparms->data.mode;
3315 return 0;
3316 }
3317
3318 void qeth_setadp_promisc_mode(struct qeth_card *card)
3319 {
3320 enum qeth_ipa_promisc_modes mode;
3321 struct net_device *dev = card->dev;
3322 struct qeth_cmd_buffer *iob;
3323 struct qeth_ipa_cmd *cmd;
3324
3325 QETH_CARD_TEXT(card, 4, "setprom");
3326
3327 if (((dev->flags & IFF_PROMISC) &&
3328 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3329 (!(dev->flags & IFF_PROMISC) &&
3330 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3331 return;
3332 mode = SET_PROMISC_MODE_OFF;
3333 if (dev->flags & IFF_PROMISC)
3334 mode = SET_PROMISC_MODE_ON;
3335 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3336
3337 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3338 sizeof(struct qeth_ipacmd_setadpparms));
3339 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3340 cmd->data.setadapterparms.data.mode = mode;
3341 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3342 }
3343 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3344
3345 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3346 {
3347 struct qeth_card *card;
3348 char dbf_text[15];
3349
3350 card = dev->ml_priv;
3351
3352 QETH_CARD_TEXT(card, 4, "chgmtu");
3353 sprintf(dbf_text, "%8x", new_mtu);
3354 QETH_CARD_TEXT(card, 4, dbf_text);
3355
3356 if (new_mtu < 64)
3357 return -EINVAL;
3358 if (new_mtu > 65535)
3359 return -EINVAL;
3360 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3361 (!qeth_mtu_is_valid(card, new_mtu)))
3362 return -EINVAL;
3363 dev->mtu = new_mtu;
3364 return 0;
3365 }
3366 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3367
3368 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3369 {
3370 struct qeth_card *card;
3371
3372 card = dev->ml_priv;
3373
3374 QETH_CARD_TEXT(card, 5, "getstat");
3375
3376 return &card->stats;
3377 }
3378 EXPORT_SYMBOL_GPL(qeth_get_stats);
3379
3380 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3381 struct qeth_reply *reply, unsigned long data)
3382 {
3383 struct qeth_ipa_cmd *cmd;
3384
3385 QETH_CARD_TEXT(card, 4, "chgmaccb");
3386
3387 cmd = (struct qeth_ipa_cmd *) data;
3388 if (!card->options.layer2 ||
3389 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3390 memcpy(card->dev->dev_addr,
3391 &cmd->data.setadapterparms.data.change_addr.addr,
3392 OSA_ADDR_LEN);
3393 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3394 }
3395 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3396 return 0;
3397 }
3398
3399 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3400 {
3401 int rc;
3402 struct qeth_cmd_buffer *iob;
3403 struct qeth_ipa_cmd *cmd;
3404
3405 QETH_CARD_TEXT(card, 4, "chgmac");
3406
3407 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3408 sizeof(struct qeth_ipacmd_setadpparms));
3409 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3410 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3411 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3412 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3413 card->dev->dev_addr, OSA_ADDR_LEN);
3414 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3415 NULL);
3416 return rc;
3417 }
3418 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3419
3420 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3421 struct qeth_reply *reply, unsigned long data)
3422 {
3423 struct qeth_ipa_cmd *cmd;
3424 struct qeth_set_access_ctrl *access_ctrl_req;
3425
3426 QETH_CARD_TEXT(card, 4, "setaccb");
3427
3428 cmd = (struct qeth_ipa_cmd *) data;
3429 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3430 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3431 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3432 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3433 cmd->data.setadapterparms.hdr.return_code);
3434 switch (cmd->data.setadapterparms.hdr.return_code) {
3435 case SET_ACCESS_CTRL_RC_SUCCESS:
3436 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3437 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3438 {
3439 card->options.isolation = access_ctrl_req->subcmd_code;
3440 if (card->options.isolation == ISOLATION_MODE_NONE) {
3441 dev_info(&card->gdev->dev,
3442 "QDIO data connection isolation is deactivated\n");
3443 } else {
3444 dev_info(&card->gdev->dev,
3445 "QDIO data connection isolation is activated\n");
3446 }
3447 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3448 card->gdev->dev.kobj.name,
3449 access_ctrl_req->subcmd_code,
3450 cmd->data.setadapterparms.hdr.return_code);
3451 break;
3452 }
3453 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3454 {
3455 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3456 card->gdev->dev.kobj.name,
3457 access_ctrl_req->subcmd_code,
3458 cmd->data.setadapterparms.hdr.return_code);
3459 dev_err(&card->gdev->dev, "Adapter does not "
3460 "support QDIO data connection isolation\n");
3461
3462 /* ensure isolation mode is "none" */
3463 card->options.isolation = ISOLATION_MODE_NONE;
3464 break;
3465 }
3466 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3467 {
3468 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3469 card->gdev->dev.kobj.name,
3470 access_ctrl_req->subcmd_code,
3471 cmd->data.setadapterparms.hdr.return_code);
3472 dev_err(&card->gdev->dev,
3473 "Adapter is dedicated. "
3474 "QDIO data connection isolation not supported\n");
3475
3476 /* ensure isolation mode is "none" */
3477 card->options.isolation = ISOLATION_MODE_NONE;
3478 break;
3479 }
3480 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3481 {
3482 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3483 card->gdev->dev.kobj.name,
3484 access_ctrl_req->subcmd_code,
3485 cmd->data.setadapterparms.hdr.return_code);
3486 dev_err(&card->gdev->dev,
3487 "TSO does not permit QDIO data connection isolation\n");
3488
3489 /* ensure isolation mode is "none" */
3490 card->options.isolation = ISOLATION_MODE_NONE;
3491 break;
3492 }
3493 default:
3494 {
3495 /* this should never happen */
3496 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3497 "==UNKNOWN\n",
3498 card->gdev->dev.kobj.name,
3499 access_ctrl_req->subcmd_code,
3500 cmd->data.setadapterparms.hdr.return_code);
3501
3502 /* ensure isolation mode is "none" */
3503 card->options.isolation = ISOLATION_MODE_NONE;
3504 break;
3505 }
3506 }
3507 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3508 return 0;
3509 }
3510
3511 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3512 enum qeth_ipa_isolation_modes isolation)
3513 {
3514 int rc;
3515 struct qeth_cmd_buffer *iob;
3516 struct qeth_ipa_cmd *cmd;
3517 struct qeth_set_access_ctrl *access_ctrl_req;
3518
3519 QETH_CARD_TEXT(card, 4, "setacctl");
3520
3521 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3522 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3523
3524 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3525 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3526 sizeof(struct qeth_set_access_ctrl));
3527 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3528 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3529 access_ctrl_req->subcmd_code = isolation;
3530
3531 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3532 NULL);
3533 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3534 return rc;
3535 }
3536
3537 int qeth_set_access_ctrl_online(struct qeth_card *card)
3538 {
3539 int rc = 0;
3540
3541 QETH_CARD_TEXT(card, 4, "setactlo");
3542
3543 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3544 card->info.type == QETH_CARD_TYPE_OSX) &&
3545 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3546 rc = qeth_setadpparms_set_access_ctrl(card,
3547 card->options.isolation);
3548 if (rc) {
3549 QETH_DBF_MESSAGE(3,
3550 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
3551 card->gdev->dev.kobj.name,
3552 rc);
3553 }
3554 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3555 card->options.isolation = ISOLATION_MODE_NONE;
3556
3557 dev_err(&card->gdev->dev, "Adapter does not "
3558 "support QDIO data connection isolation\n");
3559 rc = -EOPNOTSUPP;
3560 }
3561 return rc;
3562 }
3563 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3564
3565 void qeth_tx_timeout(struct net_device *dev)
3566 {
3567 struct qeth_card *card;
3568
3569 card = dev->ml_priv;
3570 QETH_CARD_TEXT(card, 4, "txtimeo");
3571 card->stats.tx_errors++;
3572 qeth_schedule_recovery(card);
3573 }
3574 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3575
3576 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3577 {
3578 struct qeth_card *card = dev->ml_priv;
3579 int rc = 0;
3580
3581 switch (regnum) {
3582 case MII_BMCR: /* Basic mode control register */
3583 rc = BMCR_FULLDPLX;
3584 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3585 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3586 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3587 rc |= BMCR_SPEED100;
3588 break;
3589 case MII_BMSR: /* Basic mode status register */
3590 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3591 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3592 BMSR_100BASE4;
3593 break;
3594 case MII_PHYSID1: /* PHYS ID 1 */
3595 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3596 dev->dev_addr[2];
3597 rc = (rc >> 5) & 0xFFFF;
3598 break;
3599 case MII_PHYSID2: /* PHYS ID 2 */
3600 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3601 break;
3602 case MII_ADVERTISE: /* Advertisement control reg */
3603 rc = ADVERTISE_ALL;
3604 break;
3605 case MII_LPA: /* Link partner ability reg */
3606 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3607 LPA_100BASE4 | LPA_LPACK;
3608 break;
3609 case MII_EXPANSION: /* Expansion register */
3610 break;
3611 case MII_DCOUNTER: /* disconnect counter */
3612 break;
3613 case MII_FCSCOUNTER: /* false carrier counter */
3614 break;
3615 case MII_NWAYTEST: /* N-way auto-neg test register */
3616 break;
3617 case MII_RERRCOUNTER: /* rx error counter */
3618 rc = card->stats.rx_errors;
3619 break;
3620 case MII_SREVISION: /* silicon revision */
3621 break;
3622 case MII_RESV1: /* reserved 1 */
3623 break;
3624 case MII_LBRERROR: /* loopback, rx, bypass error */
3625 break;
3626 case MII_PHYADDR: /* physical address */
3627 break;
3628 case MII_RESV2: /* reserved 2 */
3629 break;
3630 case MII_TPISTATUS: /* TPI status for 10mbps */
3631 break;
3632 case MII_NCONFIG: /* network interface config */
3633 break;
3634 default:
3635 break;
3636 }
3637 return rc;
3638 }
3639 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3640
3641 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3642 struct qeth_cmd_buffer *iob, int len,
3643 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3644 unsigned long),
3645 void *reply_param)
3646 {
3647 u16 s1, s2;
3648
3649 QETH_CARD_TEXT(card, 4, "sendsnmp");
3650
3651 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3652 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3653 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3654 /* adjust PDU length fields in IPA_PDU_HEADER */
3655 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3656 s2 = (u32) len;
3657 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3658 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3659 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3660 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3661 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3662 reply_cb, reply_param);
3663 }
3664
3665 static int qeth_snmp_command_cb(struct qeth_card *card,
3666 struct qeth_reply *reply, unsigned long sdata)
3667 {
3668 struct qeth_ipa_cmd *cmd;
3669 struct qeth_arp_query_info *qinfo;
3670 struct qeth_snmp_cmd *snmp;
3671 unsigned char *data;
3672 __u16 data_len;
3673
3674 QETH_CARD_TEXT(card, 3, "snpcmdcb");
3675
3676 cmd = (struct qeth_ipa_cmd *) sdata;
3677 data = (unsigned char *)((char *)cmd - reply->offset);
3678 qinfo = (struct qeth_arp_query_info *) reply->param;
3679 snmp = &cmd->data.setadapterparms.data.snmp;
3680
3681 if (cmd->hdr.return_code) {
3682 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
3683 return 0;
3684 }
3685 if (cmd->data.setadapterparms.hdr.return_code) {
3686 cmd->hdr.return_code =
3687 cmd->data.setadapterparms.hdr.return_code;
3688 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
3689 return 0;
3690 }
3691 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3692 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3693 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3694 else
3695 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3696
3697 /* check if there is enough room in userspace */
3698 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3699 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
3700 cmd->hdr.return_code = -ENOMEM;
3701 return 0;
3702 }
3703 QETH_CARD_TEXT_(card, 4, "snore%i",
3704 cmd->data.setadapterparms.hdr.used_total);
3705 QETH_CARD_TEXT_(card, 4, "sseqn%i",
3706 cmd->data.setadapterparms.hdr.seq_no);
3707 /*copy entries to user buffer*/
3708 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3709 memcpy(qinfo->udata + qinfo->udata_offset,
3710 (char *)snmp,
3711 data_len + offsetof(struct qeth_snmp_cmd, data));
3712 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3713 } else {
3714 memcpy(qinfo->udata + qinfo->udata_offset,
3715 (char *)&snmp->request, data_len);
3716 }
3717 qinfo->udata_offset += data_len;
3718 /* check if all replies received ... */
3719 QETH_CARD_TEXT_(card, 4, "srtot%i",
3720 cmd->data.setadapterparms.hdr.used_total);
3721 QETH_CARD_TEXT_(card, 4, "srseq%i",
3722 cmd->data.setadapterparms.hdr.seq_no);
3723 if (cmd->data.setadapterparms.hdr.seq_no <
3724 cmd->data.setadapterparms.hdr.used_total)
3725 return 1;
3726 return 0;
3727 }
3728
3729 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3730 {
3731 struct qeth_cmd_buffer *iob;
3732 struct qeth_ipa_cmd *cmd;
3733 struct qeth_snmp_ureq *ureq;
3734 int req_len;
3735 struct qeth_arp_query_info qinfo = {0, };
3736 int rc = 0;
3737
3738 QETH_CARD_TEXT(card, 3, "snmpcmd");
3739
3740 if (card->info.guestlan)
3741 return -EOPNOTSUPP;
3742
3743 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3744 (!card->options.layer2)) {
3745 return -EOPNOTSUPP;
3746 }
3747 /* skip 4 bytes (data_len struct member) to get req_len */
3748 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3749 return -EFAULT;
3750 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
3751 if (IS_ERR(ureq)) {
3752 QETH_CARD_TEXT(card, 2, "snmpnome");
3753 return PTR_ERR(ureq);
3754 }
3755 qinfo.udata_len = ureq->hdr.data_len;
3756 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3757 if (!qinfo.udata) {
3758 kfree(ureq);
3759 return -ENOMEM;
3760 }
3761 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3762
3763 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3764 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3765 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3766 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3767 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3768 qeth_snmp_command_cb, (void *)&qinfo);
3769 if (rc)
3770 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3771 QETH_CARD_IFNAME(card), rc);
3772 else {
3773 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3774 rc = -EFAULT;
3775 }
3776
3777 kfree(ureq);
3778 kfree(qinfo.udata);
3779 return rc;
3780 }
3781 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3782
3783 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3784 {
3785 switch (card->info.type) {
3786 case QETH_CARD_TYPE_IQD:
3787 return 2;
3788 default:
3789 return 0;
3790 }
3791 }
3792
3793 static int qeth_qdio_establish(struct qeth_card *card)
3794 {
3795 struct qdio_initialize init_data;
3796 char *qib_param_field;
3797 struct qdio_buffer **in_sbal_ptrs;
3798 struct qdio_buffer **out_sbal_ptrs;
3799 int i, j, k;
3800 int rc = 0;
3801
3802 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3803
3804 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3805 GFP_KERNEL);
3806 if (!qib_param_field)
3807 return -ENOMEM;
3808
3809 qeth_create_qib_param_field(card, qib_param_field);
3810 qeth_create_qib_param_field_blkt(card, qib_param_field);
3811
3812 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3813 GFP_KERNEL);
3814 if (!in_sbal_ptrs) {
3815 kfree(qib_param_field);
3816 return -ENOMEM;
3817 }
3818 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3819 in_sbal_ptrs[i] = (struct qdio_buffer *)
3820 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3821
3822 out_sbal_ptrs =
3823 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3824 sizeof(void *), GFP_KERNEL);
3825 if (!out_sbal_ptrs) {
3826 kfree(in_sbal_ptrs);
3827 kfree(qib_param_field);
3828 return -ENOMEM;
3829 }
3830 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3831 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3832 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3833 card->qdio.out_qs[i]->bufs[j].buffer);
3834 }
3835
3836 memset(&init_data, 0, sizeof(struct qdio_initialize));
3837 init_data.cdev = CARD_DDEV(card);
3838 init_data.q_format = qeth_get_qdio_q_format(card);
3839 init_data.qib_param_field_format = 0;
3840 init_data.qib_param_field = qib_param_field;
3841 init_data.no_input_qs = 1;
3842 init_data.no_output_qs = card->qdio.no_out_queues;
3843 init_data.input_handler = card->discipline.input_handler;
3844 init_data.output_handler = card->discipline.output_handler;
3845 init_data.int_parm = (unsigned long) card;
3846 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3847 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3848
3849 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3850 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3851 rc = qdio_allocate(&init_data);
3852 if (rc) {
3853 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3854 goto out;
3855 }
3856 rc = qdio_establish(&init_data);
3857 if (rc) {
3858 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3859 qdio_free(CARD_DDEV(card));
3860 }
3861 }
3862 out:
3863 kfree(out_sbal_ptrs);
3864 kfree(in_sbal_ptrs);
3865 kfree(qib_param_field);
3866 return rc;
3867 }
3868
3869 static void qeth_core_free_card(struct qeth_card *card)
3870 {
3871
3872 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3873 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3874 qeth_clean_channel(&card->read);
3875 qeth_clean_channel(&card->write);
3876 if (card->dev)
3877 free_netdev(card->dev);
3878 kfree(card->ip_tbd_list);
3879 qeth_free_qdio_buffers(card);
3880 unregister_service_level(&card->qeth_service_level);
3881 kfree(card);
3882 }
3883
3884 static struct ccw_device_id qeth_ids[] = {
3885 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
3886 .driver_info = QETH_CARD_TYPE_OSD},
3887 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
3888 .driver_info = QETH_CARD_TYPE_IQD},
3889 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
3890 .driver_info = QETH_CARD_TYPE_OSN},
3891 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
3892 .driver_info = QETH_CARD_TYPE_OSM},
3893 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
3894 .driver_info = QETH_CARD_TYPE_OSX},
3895 {},
3896 };
3897 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3898
3899 static struct ccw_driver qeth_ccw_driver = {
3900 .name = "qeth",
3901 .ids = qeth_ids,
3902 .probe = ccwgroup_probe_ccwdev,
3903 .remove = ccwgroup_remove_ccwdev,
3904 };
3905
3906 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3907 unsigned long driver_id)
3908 {
3909 return ccwgroup_create_from_string(root_dev, driver_id,
3910 &qeth_ccw_driver, 3, buf);
3911 }
3912
3913 int qeth_core_hardsetup_card(struct qeth_card *card)
3914 {
3915 int retries = 0;
3916 int rc;
3917
3918 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3919 atomic_set(&card->force_alloc_skb, 0);
3920 retry:
3921 if (retries)
3922 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3923 dev_name(&card->gdev->dev));
3924 ccw_device_set_offline(CARD_DDEV(card));
3925 ccw_device_set_offline(CARD_WDEV(card));
3926 ccw_device_set_offline(CARD_RDEV(card));
3927 rc = ccw_device_set_online(CARD_RDEV(card));
3928 if (rc)
3929 goto retriable;
3930 rc = ccw_device_set_online(CARD_WDEV(card));
3931 if (rc)
3932 goto retriable;
3933 rc = ccw_device_set_online(CARD_DDEV(card));
3934 if (rc)
3935 goto retriable;
3936 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3937 retriable:
3938 if (rc == -ERESTARTSYS) {
3939 QETH_DBF_TEXT(SETUP, 2, "break1");
3940 return rc;
3941 } else if (rc) {
3942 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3943 if (++retries > 3)
3944 goto out;
3945 else
3946 goto retry;
3947 }
3948 qeth_init_tokens(card);
3949 qeth_init_func_level(card);
3950 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3951 if (rc == -ERESTARTSYS) {
3952 QETH_DBF_TEXT(SETUP, 2, "break2");
3953 return rc;
3954 } else if (rc) {
3955 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3956 if (--retries < 0)
3957 goto out;
3958 else
3959 goto retry;
3960 }
3961 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3962 if (rc == -ERESTARTSYS) {
3963 QETH_DBF_TEXT(SETUP, 2, "break3");
3964 return rc;
3965 } else if (rc) {
3966 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3967 if (--retries < 0)
3968 goto out;
3969 else
3970 goto retry;
3971 }
3972 card->read_or_write_problem = 0;
3973 rc = qeth_mpc_initialize(card);
3974 if (rc) {
3975 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3976 goto out;
3977 }
3978 return 0;
3979 out:
3980 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3981 "an error on the device\n");
3982 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3983 dev_name(&card->gdev->dev), rc);
3984 return rc;
3985 }
3986 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3987
3988 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3989 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3990 {
3991 struct page *page = virt_to_page(element->addr);
3992 if (*pskb == NULL) {
3993 /* the upper protocol layers assume that there is data in the
3994 * skb itself. Copy a small amount (64 bytes) to make them
3995 * happy. */
3996 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3997 if (!(*pskb))
3998 return -ENOMEM;
3999 skb_reserve(*pskb, ETH_HLEN);
4000 if (data_len <= 64) {
4001 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4002 data_len);
4003 } else {
4004 get_page(page);
4005 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
4006 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
4007 data_len - 64);
4008 (*pskb)->data_len += data_len - 64;
4009 (*pskb)->len += data_len - 64;
4010 (*pskb)->truesize += data_len - 64;
4011 (*pfrag)++;
4012 }
4013 } else {
4014 get_page(page);
4015 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4016 (*pskb)->data_len += data_len;
4017 (*pskb)->len += data_len;
4018 (*pskb)->truesize += data_len;
4019 (*pfrag)++;
4020 }
4021 return 0;
4022 }
4023
4024 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4025 struct qdio_buffer *buffer,
4026 struct qdio_buffer_element **__element, int *__offset,
4027 struct qeth_hdr **hdr)
4028 {
4029 struct qdio_buffer_element *element = *__element;
4030 int offset = *__offset;
4031 struct sk_buff *skb = NULL;
4032 int skb_len = 0;
4033 void *data_ptr;
4034 int data_len;
4035 int headroom = 0;
4036 int use_rx_sg = 0;
4037 int frag = 0;
4038
4039 /* qeth_hdr must not cross element boundaries */
4040 if (element->length < offset + sizeof(struct qeth_hdr)) {
4041 if (qeth_is_last_sbale(element))
4042 return NULL;
4043 element++;
4044 offset = 0;
4045 if (element->length < sizeof(struct qeth_hdr))
4046 return NULL;
4047 }
4048 *hdr = element->addr + offset;
4049
4050 offset += sizeof(struct qeth_hdr);
4051 switch ((*hdr)->hdr.l2.id) {
4052 case QETH_HEADER_TYPE_LAYER2:
4053 skb_len = (*hdr)->hdr.l2.pkt_length;
4054 break;
4055 case QETH_HEADER_TYPE_LAYER3:
4056 skb_len = (*hdr)->hdr.l3.length;
4057 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4058 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4059 headroom = TR_HLEN;
4060 else
4061 headroom = ETH_HLEN;
4062 break;
4063 case QETH_HEADER_TYPE_OSN:
4064 skb_len = (*hdr)->hdr.osn.pdu_length;
4065 headroom = sizeof(struct qeth_hdr);
4066 break;
4067 default:
4068 break;
4069 }
4070
4071 if (!skb_len)
4072 return NULL;
4073
4074 if ((skb_len >= card->options.rx_sg_cb) &&
4075 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4076 (!atomic_read(&card->force_alloc_skb))) {
4077 use_rx_sg = 1;
4078 } else {
4079 skb = dev_alloc_skb(skb_len + headroom);
4080 if (!skb)
4081 goto no_mem;
4082 if (headroom)
4083 skb_reserve(skb, headroom);
4084 }
4085
4086 data_ptr = element->addr + offset;
4087 while (skb_len) {
4088 data_len = min(skb_len, (int)(element->length - offset));
4089 if (data_len) {
4090 if (use_rx_sg) {
4091 if (qeth_create_skb_frag(element, &skb, offset,
4092 &frag, data_len))
4093 goto no_mem;
4094 } else {
4095 memcpy(skb_put(skb, data_len), data_ptr,
4096 data_len);
4097 }
4098 }
4099 skb_len -= data_len;
4100 if (skb_len) {
4101 if (qeth_is_last_sbale(element)) {
4102 QETH_CARD_TEXT(card, 4, "unexeob");
4103 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4104 dev_kfree_skb_any(skb);
4105 card->stats.rx_errors++;
4106 return NULL;
4107 }
4108 element++;
4109 offset = 0;
4110 data_ptr = element->addr;
4111 } else {
4112 offset += data_len;
4113 }
4114 }
4115 *__element = element;
4116 *__offset = offset;
4117 if (use_rx_sg && card->options.performance_stats) {
4118 card->perf_stats.sg_skbs_rx++;
4119 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4120 }
4121 return skb;
4122 no_mem:
4123 if (net_ratelimit()) {
4124 QETH_CARD_TEXT(card, 2, "noskbmem");
4125 }
4126 card->stats.rx_dropped++;
4127 return NULL;
4128 }
4129 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4130
4131 static void qeth_unregister_dbf_views(void)
4132 {
4133 int x;
4134 for (x = 0; x < QETH_DBF_INFOS; x++) {
4135 debug_unregister(qeth_dbf[x].id);
4136 qeth_dbf[x].id = NULL;
4137 }
4138 }
4139
4140 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4141 {
4142 char dbf_txt_buf[32];
4143 va_list args;
4144
4145 if (level > id->level)
4146 return;
4147 va_start(args, fmt);
4148 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4149 va_end(args);
4150 debug_text_event(id, level, dbf_txt_buf);
4151 }
4152 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4153
4154 static int qeth_register_dbf_views(void)
4155 {
4156 int ret;
4157 int x;
4158
4159 for (x = 0; x < QETH_DBF_INFOS; x++) {
4160 /* register the areas */
4161 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4162 qeth_dbf[x].pages,
4163 qeth_dbf[x].areas,
4164 qeth_dbf[x].len);
4165 if (qeth_dbf[x].id == NULL) {
4166 qeth_unregister_dbf_views();
4167 return -ENOMEM;
4168 }
4169
4170 /* register a view */
4171 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4172 if (ret) {
4173 qeth_unregister_dbf_views();
4174 return ret;
4175 }
4176
4177 /* set a passing level */
4178 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4179 }
4180
4181 return 0;
4182 }
4183
4184 int qeth_core_load_discipline(struct qeth_card *card,
4185 enum qeth_discipline_id discipline)
4186 {
4187 int rc = 0;
4188 switch (discipline) {
4189 case QETH_DISCIPLINE_LAYER3:
4190 card->discipline.ccwgdriver = try_then_request_module(
4191 symbol_get(qeth_l3_ccwgroup_driver),
4192 "qeth_l3");
4193 break;
4194 case QETH_DISCIPLINE_LAYER2:
4195 card->discipline.ccwgdriver = try_then_request_module(
4196 symbol_get(qeth_l2_ccwgroup_driver),
4197 "qeth_l2");
4198 break;
4199 }
4200 if (!card->discipline.ccwgdriver) {
4201 dev_err(&card->gdev->dev, "There is no kernel module to "
4202 "support discipline %d\n", discipline);
4203 rc = -EINVAL;
4204 }
4205 return rc;
4206 }
4207
4208 void qeth_core_free_discipline(struct qeth_card *card)
4209 {
4210 if (card->options.layer2)
4211 symbol_put(qeth_l2_ccwgroup_driver);
4212 else
4213 symbol_put(qeth_l3_ccwgroup_driver);
4214 card->discipline.ccwgdriver = NULL;
4215 }
4216
4217 static void qeth_determine_capabilities(struct qeth_card *card)
4218 {
4219 int rc;
4220 int length;
4221 char *prcd;
4222
4223 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4224 rc = ccw_device_set_online(CARD_DDEV(card));
4225 if (rc) {
4226 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4227 goto out;
4228 }
4229
4230
4231 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4232 if (rc) {
4233 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4234 dev_name(&card->gdev->dev), rc);
4235 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4236 goto out_offline;
4237 }
4238 qeth_configure_unitaddr(card, prcd);
4239 qeth_configure_blkt_default(card, prcd);
4240 kfree(prcd);
4241
4242 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4243 if (rc)
4244 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4245
4246 out_offline:
4247 ccw_device_set_offline(CARD_DDEV(card));
4248 out:
4249 return;
4250 }
4251
4252 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4253 {
4254 struct qeth_card *card;
4255 struct device *dev;
4256 int rc;
4257 unsigned long flags;
4258 char dbf_name[20];
4259
4260 QETH_DBF_TEXT(SETUP, 2, "probedev");
4261
4262 dev = &gdev->dev;
4263 if (!get_device(dev))
4264 return -ENODEV;
4265
4266 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4267
4268 card = qeth_alloc_card();
4269 if (!card) {
4270 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4271 rc = -ENOMEM;
4272 goto err_dev;
4273 }
4274
4275 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4276 dev_name(&gdev->dev));
4277 card->debug = debug_register(dbf_name, 2, 1, 8);
4278 if (!card->debug) {
4279 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4280 rc = -ENOMEM;
4281 goto err_card;
4282 }
4283 debug_register_view(card->debug, &debug_hex_ascii_view);
4284
4285 card->read.ccwdev = gdev->cdev[0];
4286 card->write.ccwdev = gdev->cdev[1];
4287 card->data.ccwdev = gdev->cdev[2];
4288 dev_set_drvdata(&gdev->dev, card);
4289 card->gdev = gdev;
4290 gdev->cdev[0]->handler = qeth_irq;
4291 gdev->cdev[1]->handler = qeth_irq;
4292 gdev->cdev[2]->handler = qeth_irq;
4293
4294 rc = qeth_determine_card_type(card);
4295 if (rc) {
4296 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4297 goto err_dbf;
4298 }
4299 rc = qeth_setup_card(card);
4300 if (rc) {
4301 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4302 goto err_dbf;
4303 }
4304
4305 if (card->info.type == QETH_CARD_TYPE_OSN)
4306 rc = qeth_core_create_osn_attributes(dev);
4307 else
4308 rc = qeth_core_create_device_attributes(dev);
4309 if (rc)
4310 goto err_dbf;
4311 switch (card->info.type) {
4312 case QETH_CARD_TYPE_OSN:
4313 case QETH_CARD_TYPE_OSM:
4314 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4315 if (rc)
4316 goto err_attr;
4317 rc = card->discipline.ccwgdriver->probe(card->gdev);
4318 if (rc)
4319 goto err_disc;
4320 case QETH_CARD_TYPE_OSD:
4321 case QETH_CARD_TYPE_OSX:
4322 default:
4323 break;
4324 }
4325
4326 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4327 list_add_tail(&card->list, &qeth_core_card_list.list);
4328 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4329
4330 qeth_determine_capabilities(card);
4331 return 0;
4332
4333 err_disc:
4334 qeth_core_free_discipline(card);
4335 err_attr:
4336 if (card->info.type == QETH_CARD_TYPE_OSN)
4337 qeth_core_remove_osn_attributes(dev);
4338 else
4339 qeth_core_remove_device_attributes(dev);
4340 err_dbf:
4341 debug_unregister(card->debug);
4342 err_card:
4343 qeth_core_free_card(card);
4344 err_dev:
4345 put_device(dev);
4346 return rc;
4347 }
4348
4349 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4350 {
4351 unsigned long flags;
4352 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4353
4354 QETH_DBF_TEXT(SETUP, 2, "removedv");
4355
4356 if (card->info.type == QETH_CARD_TYPE_OSN) {
4357 qeth_core_remove_osn_attributes(&gdev->dev);
4358 } else {
4359 qeth_core_remove_device_attributes(&gdev->dev);
4360 }
4361
4362 if (card->discipline.ccwgdriver) {
4363 card->discipline.ccwgdriver->remove(gdev);
4364 qeth_core_free_discipline(card);
4365 }
4366
4367 debug_unregister(card->debug);
4368 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4369 list_del(&card->list);
4370 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4371 qeth_core_free_card(card);
4372 dev_set_drvdata(&gdev->dev, NULL);
4373 put_device(&gdev->dev);
4374 return;
4375 }
4376
4377 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4378 {
4379 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4380 int rc = 0;
4381 int def_discipline;
4382
4383 if (!card->discipline.ccwgdriver) {
4384 if (card->info.type == QETH_CARD_TYPE_IQD)
4385 def_discipline = QETH_DISCIPLINE_LAYER3;
4386 else
4387 def_discipline = QETH_DISCIPLINE_LAYER2;
4388 rc = qeth_core_load_discipline(card, def_discipline);
4389 if (rc)
4390 goto err;
4391 rc = card->discipline.ccwgdriver->probe(card->gdev);
4392 if (rc)
4393 goto err;
4394 }
4395 rc = card->discipline.ccwgdriver->set_online(gdev);
4396 err:
4397 return rc;
4398 }
4399
4400 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4401 {
4402 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4403 return card->discipline.ccwgdriver->set_offline(gdev);
4404 }
4405
4406 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4407 {
4408 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4409 if (card->discipline.ccwgdriver &&
4410 card->discipline.ccwgdriver->shutdown)
4411 card->discipline.ccwgdriver->shutdown(gdev);
4412 }
4413
4414 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4415 {
4416 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4417 if (card->discipline.ccwgdriver &&
4418 card->discipline.ccwgdriver->prepare)
4419 return card->discipline.ccwgdriver->prepare(gdev);
4420 return 0;
4421 }
4422
4423 static void qeth_core_complete(struct ccwgroup_device *gdev)
4424 {
4425 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4426 if (card->discipline.ccwgdriver &&
4427 card->discipline.ccwgdriver->complete)
4428 card->discipline.ccwgdriver->complete(gdev);
4429 }
4430
4431 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4432 {
4433 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4434 if (card->discipline.ccwgdriver &&
4435 card->discipline.ccwgdriver->freeze)
4436 return card->discipline.ccwgdriver->freeze(gdev);
4437 return 0;
4438 }
4439
4440 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4441 {
4442 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4443 if (card->discipline.ccwgdriver &&
4444 card->discipline.ccwgdriver->thaw)
4445 return card->discipline.ccwgdriver->thaw(gdev);
4446 return 0;
4447 }
4448
4449 static int qeth_core_restore(struct ccwgroup_device *gdev)
4450 {
4451 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4452 if (card->discipline.ccwgdriver &&
4453 card->discipline.ccwgdriver->restore)
4454 return card->discipline.ccwgdriver->restore(gdev);
4455 return 0;
4456 }
4457
4458 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4459 .owner = THIS_MODULE,
4460 .name = "qeth",
4461 .driver_id = 0xD8C5E3C8,
4462 .probe = qeth_core_probe_device,
4463 .remove = qeth_core_remove_device,
4464 .set_online = qeth_core_set_online,
4465 .set_offline = qeth_core_set_offline,
4466 .shutdown = qeth_core_shutdown,
4467 .prepare = qeth_core_prepare,
4468 .complete = qeth_core_complete,
4469 .freeze = qeth_core_freeze,
4470 .thaw = qeth_core_thaw,
4471 .restore = qeth_core_restore,
4472 };
4473
4474 static ssize_t
4475 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4476 size_t count)
4477 {
4478 int err;
4479 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4480 qeth_core_ccwgroup_driver.driver_id);
4481 if (err)
4482 return err;
4483 else
4484 return count;
4485 }
4486
4487 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4488
4489 static struct {
4490 const char str[ETH_GSTRING_LEN];
4491 } qeth_ethtool_stats_keys[] = {
4492 /* 0 */{"rx skbs"},
4493 {"rx buffers"},
4494 {"tx skbs"},
4495 {"tx buffers"},
4496 {"tx skbs no packing"},
4497 {"tx buffers no packing"},
4498 {"tx skbs packing"},
4499 {"tx buffers packing"},
4500 {"tx sg skbs"},
4501 {"tx sg frags"},
4502 /* 10 */{"rx sg skbs"},
4503 {"rx sg frags"},
4504 {"rx sg page allocs"},
4505 {"tx large kbytes"},
4506 {"tx large count"},
4507 {"tx pk state ch n->p"},
4508 {"tx pk state ch p->n"},
4509 {"tx pk watermark low"},
4510 {"tx pk watermark high"},
4511 {"queue 0 buffer usage"},
4512 /* 20 */{"queue 1 buffer usage"},
4513 {"queue 2 buffer usage"},
4514 {"queue 3 buffer usage"},
4515 {"rx handler time"},
4516 {"rx handler count"},
4517 {"rx do_QDIO time"},
4518 {"rx do_QDIO count"},
4519 {"tx handler time"},
4520 {"tx handler count"},
4521 {"tx time"},
4522 /* 30 */{"tx count"},
4523 {"tx do_QDIO time"},
4524 {"tx do_QDIO count"},
4525 {"tx csum"},
4526 {"tx lin"},
4527 };
4528
4529 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4530 {
4531 switch (stringset) {
4532 case ETH_SS_STATS:
4533 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4534 default:
4535 return -EINVAL;
4536 }
4537 }
4538 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4539
4540 void qeth_core_get_ethtool_stats(struct net_device *dev,
4541 struct ethtool_stats *stats, u64 *data)
4542 {
4543 struct qeth_card *card = dev->ml_priv;
4544 data[0] = card->stats.rx_packets -
4545 card->perf_stats.initial_rx_packets;
4546 data[1] = card->perf_stats.bufs_rec;
4547 data[2] = card->stats.tx_packets -
4548 card->perf_stats.initial_tx_packets;
4549 data[3] = card->perf_stats.bufs_sent;
4550 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4551 - card->perf_stats.skbs_sent_pack;
4552 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4553 data[6] = card->perf_stats.skbs_sent_pack;
4554 data[7] = card->perf_stats.bufs_sent_pack;
4555 data[8] = card->perf_stats.sg_skbs_sent;
4556 data[9] = card->perf_stats.sg_frags_sent;
4557 data[10] = card->perf_stats.sg_skbs_rx;
4558 data[11] = card->perf_stats.sg_frags_rx;
4559 data[12] = card->perf_stats.sg_alloc_page_rx;
4560 data[13] = (card->perf_stats.large_send_bytes >> 10);
4561 data[14] = card->perf_stats.large_send_cnt;
4562 data[15] = card->perf_stats.sc_dp_p;
4563 data[16] = card->perf_stats.sc_p_dp;
4564 data[17] = QETH_LOW_WATERMARK_PACK;
4565 data[18] = QETH_HIGH_WATERMARK_PACK;
4566 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4567 data[20] = (card->qdio.no_out_queues > 1) ?
4568 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4569 data[21] = (card->qdio.no_out_queues > 2) ?
4570 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4571 data[22] = (card->qdio.no_out_queues > 3) ?
4572 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4573 data[23] = card->perf_stats.inbound_time;
4574 data[24] = card->perf_stats.inbound_cnt;
4575 data[25] = card->perf_stats.inbound_do_qdio_time;
4576 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4577 data[27] = card->perf_stats.outbound_handler_time;
4578 data[28] = card->perf_stats.outbound_handler_cnt;
4579 data[29] = card->perf_stats.outbound_time;
4580 data[30] = card->perf_stats.outbound_cnt;
4581 data[31] = card->perf_stats.outbound_do_qdio_time;
4582 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4583 data[33] = card->perf_stats.tx_csum;
4584 data[34] = card->perf_stats.tx_lin;
4585 }
4586 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4587
4588 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4589 {
4590 switch (stringset) {
4591 case ETH_SS_STATS:
4592 memcpy(data, &qeth_ethtool_stats_keys,
4593 sizeof(qeth_ethtool_stats_keys));
4594 break;
4595 default:
4596 WARN_ON(1);
4597 break;
4598 }
4599 }
4600 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4601
4602 void qeth_core_get_drvinfo(struct net_device *dev,
4603 struct ethtool_drvinfo *info)
4604 {
4605 struct qeth_card *card = dev->ml_priv;
4606 if (card->options.layer2)
4607 strcpy(info->driver, "qeth_l2");
4608 else
4609 strcpy(info->driver, "qeth_l3");
4610
4611 strcpy(info->version, "1.0");
4612 strcpy(info->fw_version, card->info.mcl_level);
4613 sprintf(info->bus_info, "%s/%s/%s",
4614 CARD_RDEV_ID(card),
4615 CARD_WDEV_ID(card),
4616 CARD_DDEV_ID(card));
4617 }
4618 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4619
4620 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4621 struct ethtool_cmd *ecmd)
4622 {
4623 struct qeth_card *card = netdev->ml_priv;
4624 enum qeth_link_types link_type;
4625
4626 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4627 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4628 else
4629 link_type = card->info.link_type;
4630
4631 ecmd->transceiver = XCVR_INTERNAL;
4632 ecmd->supported = SUPPORTED_Autoneg;
4633 ecmd->advertising = ADVERTISED_Autoneg;
4634 ecmd->duplex = DUPLEX_FULL;
4635 ecmd->autoneg = AUTONEG_ENABLE;
4636
4637 switch (link_type) {
4638 case QETH_LINK_TYPE_FAST_ETH:
4639 case QETH_LINK_TYPE_LANE_ETH100:
4640 ecmd->supported |= SUPPORTED_10baseT_Half |
4641 SUPPORTED_10baseT_Full |
4642 SUPPORTED_100baseT_Half |
4643 SUPPORTED_100baseT_Full |
4644 SUPPORTED_TP;
4645 ecmd->advertising |= ADVERTISED_10baseT_Half |
4646 ADVERTISED_10baseT_Full |
4647 ADVERTISED_100baseT_Half |
4648 ADVERTISED_100baseT_Full |
4649 ADVERTISED_TP;
4650 ecmd->speed = SPEED_100;
4651 ecmd->port = PORT_TP;
4652 break;
4653
4654 case QETH_LINK_TYPE_GBIT_ETH:
4655 case QETH_LINK_TYPE_LANE_ETH1000:
4656 ecmd->supported |= SUPPORTED_10baseT_Half |
4657 SUPPORTED_10baseT_Full |
4658 SUPPORTED_100baseT_Half |
4659 SUPPORTED_100baseT_Full |
4660 SUPPORTED_1000baseT_Half |
4661 SUPPORTED_1000baseT_Full |
4662 SUPPORTED_FIBRE;
4663 ecmd->advertising |= ADVERTISED_10baseT_Half |
4664 ADVERTISED_10baseT_Full |
4665 ADVERTISED_100baseT_Half |
4666 ADVERTISED_100baseT_Full |
4667 ADVERTISED_1000baseT_Half |
4668 ADVERTISED_1000baseT_Full |
4669 ADVERTISED_FIBRE;
4670 ecmd->speed = SPEED_1000;
4671 ecmd->port = PORT_FIBRE;
4672 break;
4673
4674 case QETH_LINK_TYPE_10GBIT_ETH:
4675 ecmd->supported |= SUPPORTED_10baseT_Half |
4676 SUPPORTED_10baseT_Full |
4677 SUPPORTED_100baseT_Half |
4678 SUPPORTED_100baseT_Full |
4679 SUPPORTED_1000baseT_Half |
4680 SUPPORTED_1000baseT_Full |
4681 SUPPORTED_10000baseT_Full |
4682 SUPPORTED_FIBRE;
4683 ecmd->advertising |= ADVERTISED_10baseT_Half |
4684 ADVERTISED_10baseT_Full |
4685 ADVERTISED_100baseT_Half |
4686 ADVERTISED_100baseT_Full |
4687 ADVERTISED_1000baseT_Half |
4688 ADVERTISED_1000baseT_Full |
4689 ADVERTISED_10000baseT_Full |
4690 ADVERTISED_FIBRE;
4691 ecmd->speed = SPEED_10000;
4692 ecmd->port = PORT_FIBRE;
4693 break;
4694
4695 default:
4696 ecmd->supported |= SUPPORTED_10baseT_Half |
4697 SUPPORTED_10baseT_Full |
4698 SUPPORTED_TP;
4699 ecmd->advertising |= ADVERTISED_10baseT_Half |
4700 ADVERTISED_10baseT_Full |
4701 ADVERTISED_TP;
4702 ecmd->speed = SPEED_10;
4703 ecmd->port = PORT_TP;
4704 }
4705
4706 return 0;
4707 }
4708 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4709
4710 static int __init qeth_core_init(void)
4711 {
4712 int rc;
4713
4714 pr_info("loading core functions\n");
4715 INIT_LIST_HEAD(&qeth_core_card_list.list);
4716 rwlock_init(&qeth_core_card_list.rwlock);
4717
4718 rc = qeth_register_dbf_views();
4719 if (rc)
4720 goto out_err;
4721 rc = ccw_driver_register(&qeth_ccw_driver);
4722 if (rc)
4723 goto ccw_err;
4724 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4725 if (rc)
4726 goto ccwgroup_err;
4727 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4728 &driver_attr_group);
4729 if (rc)
4730 goto driver_err;
4731 qeth_core_root_dev = root_device_register("qeth");
4732 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4733 if (rc)
4734 goto register_err;
4735
4736 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4737 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4738 if (!qeth_core_header_cache) {
4739 rc = -ENOMEM;
4740 goto slab_err;
4741 }
4742
4743 return 0;
4744 slab_err:
4745 root_device_unregister(qeth_core_root_dev);
4746 register_err:
4747 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4748 &driver_attr_group);
4749 driver_err:
4750 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4751 ccwgroup_err:
4752 ccw_driver_unregister(&qeth_ccw_driver);
4753 ccw_err:
4754 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4755 qeth_unregister_dbf_views();
4756 out_err:
4757 pr_err("Initializing the qeth device driver failed\n");
4758 return rc;
4759 }
4760
4761 static void __exit qeth_core_exit(void)
4762 {
4763 root_device_unregister(qeth_core_root_dev);
4764 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4765 &driver_attr_group);
4766 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4767 ccw_driver_unregister(&qeth_ccw_driver);
4768 kmem_cache_destroy(qeth_core_header_cache);
4769 qeth_unregister_dbf_views();
4770 pr_info("core functions removed\n");
4771 }
4772
4773 module_init(qeth_core_init);
4774 module_exit(qeth_core_exit);
4775 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4776 MODULE_DESCRIPTION("qeth core functions");
4777 MODULE_LICENSE("GPL");
Tomato firmware and modifications.