release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/s390/net/ctcm_fsms.h

   1 /*
   2  * drivers/s390/net/ctcm_fsms.h
   3  *
   4  * Copyright IBM Corp. 2001, 2007
   5  * Authors:     Fritz Elfert (felfert@millenux.com)
   6  *              Peter Tiedemann (ptiedem@de.ibm.com)
   7  *      MPC additions :
   8  *              Belinda Thompson (belindat@us.ibm.com)
   9  *              Andy Richter (richtera@us.ibm.com)
  10  */
  11 #ifndef _CTCM_FSMS_H_
  12 #define _CTCM_FSMS_H_
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/slab.h>
  18 #include <linux/errno.h>
  19 #include <linux/types.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/timer.h>
  22 #include <linux/bitops.h>
  23
  24 #include <linux/signal.h>
  25 #include <linux/string.h>
  26
  27 #include <linux/ip.h>
  28 #include <linux/if_arp.h>
  29 #include <linux/tcp.h>
  30 #include <linux/skbuff.h>
  31 #include <linux/ctype.h>
  32 #include <net/dst.h>
  33
  34 #include <linux/io.h>
  35 #include <asm/ccwdev.h>
  36 #include <asm/ccwgroup.h>
  37 #include <linux/uaccess.h>
  38
  39 #include <asm/idals.h>
  40
  41 #include "fsm.h"
  42 #include "ctcm_main.h"
  43
  44 /*
  45  * Definitions for the channel statemachine(s) for ctc and ctcmpc
  46  *
  47  * To allow better kerntyping, prefix-less definitions for channel states
  48  * and channel events have been replaced :
  49  * ch_event... -> ctc_ch_event...
  50  * CH_EVENT... -> CTC_EVENT...
  51  * ch_state... -> ctc_ch_state...
  52  * CH_STATE... -> CTC_STATE...
  53  */
  54 /*
  55  * Events of the channel statemachine(s) for ctc and ctcmpc
  56  */
  57 enum ctc_ch_events {
  58         /*
  59          * Events, representing return code of
  60          * I/O operations (ccw_device_start, ccw_device_halt et al.)
  61          */
  62         CTC_EVENT_IO_SUCCESS,
  63         CTC_EVENT_IO_EBUSY,
  64         CTC_EVENT_IO_ENODEV,
  65         CTC_EVENT_IO_UNKNOWN,
  66
  67         CTC_EVENT_ATTNBUSY,
  68         CTC_EVENT_ATTN,
  69         CTC_EVENT_BUSY,
  70         /*
  71          * Events, representing unit-check
  72          */
  73         CTC_EVENT_UC_RCRESET,
  74         CTC_EVENT_UC_RSRESET,
  75         CTC_EVENT_UC_TXTIMEOUT,
  76         CTC_EVENT_UC_TXPARITY,
  77         CTC_EVENT_UC_HWFAIL,
  78         CTC_EVENT_UC_RXPARITY,
  79         CTC_EVENT_UC_ZERO,
  80         CTC_EVENT_UC_UNKNOWN,
  81         /*
  82          * Events, representing subchannel-check
  83          */
  84         CTC_EVENT_SC_UNKNOWN,
  85         /*
  86          * Events, representing machine checks
  87          */
  88         CTC_EVENT_MC_FAIL,
  89         CTC_EVENT_MC_GOOD,
  90         /*
  91          * Event, representing normal IRQ
  92          */
  93         CTC_EVENT_IRQ,
  94         CTC_EVENT_FINSTAT,
  95         /*
  96          * Event, representing timer expiry.
  97          */
  98         CTC_EVENT_TIMER,
  99         /*
 100          * Events, representing commands from upper levels.
 101          */
 102         CTC_EVENT_START,
 103         CTC_EVENT_STOP,
 104         CTC_NR_EVENTS,
 105         /*
 106          * additional MPC events
 107          */
 108         CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
 109         CTC_EVENT_RSWEEP_TIMER,
 110         /*
 111          * MUST be always the last element!!
 112          */
 113         CTC_MPC_NR_EVENTS,
 114 };
 115
 116 /*
 117  * States of the channel statemachine(s) for ctc and ctcmpc.
 118  */
 119 enum ctc_ch_states {
 120         /*
 121          * Channel not assigned to any device,
 122          * initial state, direction invalid
 123          */
 124         CTC_STATE_IDLE,
 125         /*
 126          * Channel assigned but not operating
 127          */
 128         CTC_STATE_STOPPED,
 129         CTC_STATE_STARTWAIT,
 130         CTC_STATE_STARTRETRY,
 131         CTC_STATE_SETUPWAIT,
 132         CTC_STATE_RXINIT,
 133         CTC_STATE_TXINIT,
 134         CTC_STATE_RX,
 135         CTC_STATE_TX,
 136         CTC_STATE_RXIDLE,
 137         CTC_STATE_TXIDLE,
 138         CTC_STATE_RXERR,
 139         CTC_STATE_TXERR,
 140         CTC_STATE_TERM,
 141         CTC_STATE_DTERM,
 142         CTC_STATE_NOTOP,
 143         CTC_NR_STATES,     /* MUST be the last element of non-expanded states */
 144         /*
 145          * additional MPC states
 146          */
 147         CH_XID0_PENDING = CTC_NR_STATES,
 148         CH_XID0_INPROGRESS,
 149         CH_XID7_PENDING,
 150         CH_XID7_PENDING1,
 151         CH_XID7_PENDING2,
 152         CH_XID7_PENDING3,
 153         CH_XID7_PENDING4,
 154         CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
 155 };
 156
 157 extern const char *ctc_ch_event_names[];
 158
 159 extern const char *ctc_ch_state_names[];
 160
 161 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
 162 void ctcm_purge_skb_queue(struct sk_buff_head *q);
 163 void fsm_action_nop(fsm_instance *fi, int event, void *arg);
 164
 165 /*
 166  * ----- non-static actions for ctcm channel statemachine -----
 167  *
 168  */
 169 void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
 170
 171 /*
 172  * ----- FSM (state/event/action) of the ctcm channel statemachine -----
 173  */
 174 extern const fsm_node ch_fsm[];
 175 extern int ch_fsm_len;
 176
 177
 178 /*
 179  * ----- non-static actions for ctcmpc channel statemachine ----
 180  *
 181  */
 182 /* shared :
 183 void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
 184  */
 185 void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
 186
 187 /*
 188  * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
 189  */
 190 extern const fsm_node ctcmpc_ch_fsm[];
 191 extern int mpc_ch_fsm_len;
 192
 193 /*
 194  * Definitions for the device interface statemachine for ctc and mpc
 195  */
 196
 197 /*
 198  * States of the device interface statemachine.
 199  */
 200 enum dev_states {
 201         DEV_STATE_STOPPED,
 202         DEV_STATE_STARTWAIT_RXTX,
 203         DEV_STATE_STARTWAIT_RX,
 204         DEV_STATE_STARTWAIT_TX,
 205         DEV_STATE_STOPWAIT_RXTX,
 206         DEV_STATE_STOPWAIT_RX,
 207         DEV_STATE_STOPWAIT_TX,
 208         DEV_STATE_RUNNING,
 209         /*
 210          * MUST be always the last element!!
 211          */
 212         CTCM_NR_DEV_STATES
 213 };
 214
 215 extern const char *dev_state_names[];
 216
 217 /*
 218  * Events of the device interface statemachine.
 219  * ctcm and ctcmpc
 220  */
 221 enum dev_events {
 222         DEV_EVENT_START,
 223         DEV_EVENT_STOP,
 224         DEV_EVENT_RXUP,
 225         DEV_EVENT_TXUP,
 226         DEV_EVENT_RXDOWN,
 227         DEV_EVENT_TXDOWN,
 228         DEV_EVENT_RESTART,
 229         /*
 230          * MUST be always the last element!!
 231          */
 232         CTCM_NR_DEV_EVENTS
 233 };
 234
 235 extern const char *dev_event_names[];
 236
 237 /*
 238  * Actions for the device interface statemachine.
 239  * ctc and ctcmpc
 240  */
 241 /*
 242 static void dev_action_start(fsm_instance * fi, int event, void *arg);
 243 static void dev_action_stop(fsm_instance * fi, int event, void *arg);
 244 static void dev_action_restart(fsm_instance *fi, int event, void *arg);
 245 static void dev_action_chup(fsm_instance * fi, int event, void *arg);
 246 static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
 247 */
 248
 249 /*
 250  * The (state/event/action) fsm table of the device interface statemachine.
 251  * ctcm and ctcmpc
 252  */
 253 extern const fsm_node dev_fsm[];
 254 extern int dev_fsm_len;
 255
 256
 257 /*
 258  * Definitions for the MPC Group statemachine
 259  */
 260
 261 /*
 262  * MPC Group Station FSM States
 263
 264 State Name              When In This State
 265 ======================  =======================================
 266 MPCG_STATE_RESET        Initial State When Driver Loaded
 267                         We receive and send NOTHING
 268
 269 MPCG_STATE_INOP         INOP Received.
 270                         Group level non-recoverable error
 271
 272 MPCG_STATE_READY        XID exchanges for at least 1 write and
 273                         1 read channel have completed.
 274                         Group is ready for data transfer.
 275
 276 States from ctc_mpc_alloc_channel
 277 ==============================================================
 278 MPCG_STATE_XID2INITW    Awaiting XID2(0) Initiation
 279                               ATTN from other side will start
 280                               XID negotiations.
 281                               Y-side protocol only.
 282
 283 MPCG_STATE_XID2INITX    XID2(0) negotiations are in progress.
 284                               At least 1, but not all, XID2(0)'s
 285                               have been received from partner.
 286
 287 MPCG_STATE_XID7INITW    XID2(0) complete
 288                               No XID2(7)'s have yet been received.
 289                               XID2(7) negotiations pending.
 290
 291 MPCG_STATE_XID7INITX    XID2(7) negotiations in progress.
 292                               At least 1, but not all, XID2(7)'s
 293                               have been received from partner.
 294
 295 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 296                               Transitioning to READY.
 297
 298 MPCG_STATE_READY              Ready for Data Transfer.
 299
 300
 301 States from ctc_mpc_establish_connectivity call
 302 ==============================================================
 303 MPCG_STATE_XID0IOWAIT   Initiating XID2(0) negotiations.
 304                               X-side protocol only.
 305                               ATTN-BUSY from other side will convert
 306                               this to Y-side protocol and the
 307                               ctc_mpc_alloc_channel flow will begin.
 308
 309 MPCG_STATE_XID0IOWAIX   XID2(0) negotiations are in progress.
 310                               At least 1, but not all, XID2(0)'s
 311                               have been received from partner.
 312
 313 MPCG_STATE_XID7INITI    XID2(0) complete
 314                               No XID2(7)'s have yet been received.
 315                               XID2(7) negotiations pending.
 316
 317 MPCG_STATE_XID7INITZ    XID2(7) negotiations in progress.
 318                               At least 1, but not all, XID2(7)'s
 319                               have been received from partner.
 320
 321 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 322                               Transitioning to READY.
 323
 324 MPCG_STATE_READY              Ready for Data Transfer.
 325
 326 */
 327
 328 enum mpcg_events {
 329         MPCG_EVENT_INOP,
 330         MPCG_EVENT_DISCONC,
 331         MPCG_EVENT_XID0DO,
 332         MPCG_EVENT_XID2,
 333         MPCG_EVENT_XID2DONE,
 334         MPCG_EVENT_XID7DONE,
 335         MPCG_EVENT_TIMER,
 336         MPCG_EVENT_DOIO,
 337         MPCG_NR_EVENTS,
 338 };
 339
 340 enum mpcg_states {
 341         MPCG_STATE_RESET,
 342         MPCG_STATE_INOP,
 343         MPCG_STATE_XID2INITW,
 344         MPCG_STATE_XID2INITX,
 345         MPCG_STATE_XID7INITW,
 346         MPCG_STATE_XID7INITX,
 347         MPCG_STATE_XID0IOWAIT,
 348         MPCG_STATE_XID0IOWAIX,
 349         MPCG_STATE_XID7INITI,
 350         MPCG_STATE_XID7INITZ,
 351         MPCG_STATE_XID7INITF,
 352         MPCG_STATE_FLOWC,
 353         MPCG_STATE_READY,
 354         MPCG_NR_STATES,
 355 };
 356
 357 #endif
 358 /* --- This is the END my friend --- */