release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/pci/setup-res.c

   1 /*
   2  *      drivers/pci/setup-res.c
   3  *
   4  * Extruded from code written by
   5  *      Dave Rusling (david.rusling@reo.mts.dec.com)
   6  *      David Mosberger (davidm@cs.arizona.edu)
   7  *      David Miller (davem@redhat.com)
   8  *
   9  * Support routines for initializing a PCI subsystem.
  10  */
  11
  12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
  13
  14 /*
  15  * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
  16  *           Resource sorting
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/pci.h>
  22 #include <linux/errno.h>
  23 #include <linux/ioport.h>
  24 #include <linux/cache.h>
  25 #include <linux/slab.h>
  26 #include "pci.h"
  27
  28
  29 void pci_update_resource(struct pci_dev *dev, int resno)
  30 {
  31         struct pci_bus_region region;
  32         u32 new, check, mask;
  33         int reg;
  34         enum pci_bar_type type;
  35         struct resource *res = dev->resource + resno;
  36
  37         /*
  38          * Ignore resources for unimplemented BARs and unused resource slots
  39          * for 64 bit BARs.
  40          */
  41         if (!res->flags)
  42                 return;
  43
  44         /*
  45          * Ignore non-moveable resources.  This might be legacy resources for
  46          * which no functional BAR register exists or another important
  47          * system resource we shouldn't move around.
  48          */
  49         if (res->flags & IORESOURCE_PCI_FIXED)
  50                 return;
  51
  52         pcibios_resource_to_bus(dev, &region, res);
  53
  54         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
  55         if (res->flags & IORESOURCE_IO)
  56                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
  57         else
  58                 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
  59
  60         reg = pci_resource_bar(dev, resno, &type);
  61         if (!reg)
  62                 return;
  63         if (type != pci_bar_unknown) {
  64                 if (!(res->flags & IORESOURCE_ROM_ENABLE))
  65                         return;
  66                 new |= PCI_ROM_ADDRESS_ENABLE;
  67         }
  68
  69         pci_write_config_dword(dev, reg, new);
  70         pci_read_config_dword(dev, reg, &check);
  71
  72         if ((new ^ check) & mask) {
  73                 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
  74                         resno, new, check);
  75         }
  76
  77         if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
  78             (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) {
  79                 new = region.start >> 16 >> 16;
  80                 pci_write_config_dword(dev, reg + 4, new);
  81                 pci_read_config_dword(dev, reg + 4, &check);
  82                 if (check != new) {
  83                         dev_err(&dev->dev, "BAR %d: error updating "
  84                                "(high %#08x != %#08x)\n", resno, new, check);
  85                 }
  86         }
  87         res->flags &= ~IORESOURCE_UNSET;
  88         dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx]\n",
  89                  resno, res, (unsigned long long)region.start,
  90                  (unsigned long long)region.end);
  91 }
  92
  93 int pci_claim_resource(struct pci_dev *dev, int resource)
  94 {
  95         struct resource *res = &dev->resource[resource];
  96         struct resource *root, *conflict;
  97
  98         root = pci_find_parent_resource(dev, res);
  99         if (!root) {
 100                 dev_info(&dev->dev, "no compatible bridge window for %pR\n",
 101                          res);
 102                 return -EINVAL;
 103         }
 104
 105         conflict = request_resource_conflict(root, res);
 106         if (conflict) {
 107                 dev_info(&dev->dev,
 108                          "address space collision: %pR conflicts with %s %pR\n",
 109                          res, conflict->name, conflict);
 110                 return -EBUSY;
 111         }
 112
 113         return 0;
 114 }
 115 EXPORT_SYMBOL(pci_claim_resource);
 116
 117 #ifdef CONFIG_PCI_QUIRKS
 118 void pci_disable_bridge_window(struct pci_dev *dev)
 119 {
 120         dev_info(&dev->dev, "disabling bridge mem windows\n");
 121
 122         /* MMIO Base/Limit */
 123         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
 124
 125         /* Prefetchable MMIO Base/Limit */
 126         pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
 127         pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
 128         pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
 129 }
 130 #endif  /* CONFIG_PCI_QUIRKS */
 131
 132 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 133                                  int resno)
 134 {
 135         struct resource *res = dev->resource + resno;
 136         resource_size_t size, min, align;
 137         int ret;
 138
 139         size = resource_size(res);
 140         min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
 141         align = pci_resource_alignment(dev, res);
 142
 143         /* First, try exact prefetching match.. */
 144         ret = pci_bus_alloc_resource(bus, res, size, align, min,
 145                                      IORESOURCE_PREFETCH,
 146                                      pcibios_align_resource, dev);
 147
 148         if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
 149                 /*
 150                  * That failed.
 151                  *
 152                  * But a prefetching area can handle a non-prefetching
 153                  * window (it will just not perform as well).
 154                  */
 155                 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
 156                                              pcibios_align_resource, dev);
 157         }
 158
 159         if (ret < 0 && dev->fw_addr[resno]) {
 160                 struct resource *root, *conflict;
 161                 resource_size_t start, end;
 162
 163                 /*
 164                  * If we failed to assign anything, let's try the address
 165                  * where firmware left it.  That at least has a chance of
 166                  * working, which is better than just leaving it disabled.
 167                  */
 168
 169                 if (res->flags & IORESOURCE_IO)
 170                         root = &ioport_resource;
 171                 else
 172                         root = &iomem_resource;
 173
 174                 start = res->start;
 175                 end = res->end;
 176                 res->start = dev->fw_addr[resno];
 177                 res->end = res->start + size - 1;
 178                 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
 179                          resno, res);
 180                 conflict = request_resource_conflict(root, res);
 181                 if (conflict) {
 182                         dev_info(&dev->dev,
 183                                  "BAR %d: %pR conflicts with %s %pR\n", resno,
 184                                  res, conflict->name, conflict);
 185                         res->start = start;
 186                         res->end = end;
 187                 } else
 188                         ret = 0;
 189         }
 190
 191         if (!ret) {
 192                 res->flags &= ~IORESOURCE_STARTALIGN;
 193                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 194                 if (resno < PCI_BRIDGE_RESOURCES)
 195                         pci_update_resource(dev, resno);
 196         }
 197
 198         return ret;
 199 }
 200
 201 int pci_assign_resource(struct pci_dev *dev, int resno)
 202 {
 203         struct resource *res = dev->resource + resno;
 204         resource_size_t align;
 205         struct pci_bus *bus;
 206         int ret;
 207         char *type;
 208
 209         align = pci_resource_alignment(dev, res);
 210         if (!align) {
 211                 dev_info(&dev->dev, "BAR %d: can't assign %pR "
 212                          "(bogus alignment)\n", resno, res);
 213                 return -EINVAL;
 214         }
 215
 216         bus = dev->bus;
 217         while ((ret = __pci_assign_resource(bus, dev, resno))) {
 218                 if (bus->parent && bus->self->transparent)
 219                         bus = bus->parent;
 220                 else
 221                         bus = NULL;
 222                 if (bus)
 223                         continue;
 224                 break;
 225         }
 226
 227         if (ret) {
 228                 if (res->flags & IORESOURCE_MEM)
 229                         if (res->flags & IORESOURCE_PREFETCH)
 230                                 type = "mem pref";
 231                         else
 232                                 type = "mem";
 233                 else if (res->flags & IORESOURCE_IO)
 234                         type = "io";
 235                 else
 236                         type = "unknown";
 237                 dev_info(&dev->dev,
 238                          "BAR %d: can't assign %s (size %#llx)\n",
 239                          resno, type, (unsigned long long) resource_size(res));
 240         }
 241
 242         return ret;
 243 }
 244
 245 /* Sort resources by alignment */
 246 void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
 247 {
 248         int i;
 249
 250         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 251                 struct resource *r;
 252                 struct resource_list *list, *tmp;
 253                 resource_size_t r_align;
 254
 255                 r = &dev->resource[i];
 256
 257                 if (r->flags & IORESOURCE_PCI_FIXED)
 258                         continue;
 259
 260                 if (!(r->flags) || r->parent)
 261                         continue;
 262
 263                 r_align = pci_resource_alignment(dev, r);
 264                 if (!r_align) {
 265                         dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
 266                                  i, r);
 267                         continue;
 268                 }
 269                 for (list = head; ; list = list->next) {
 270                         resource_size_t align = 0;
 271                         struct resource_list *ln = list->next;
 272
 273                         if (ln)
 274                                 align = pci_resource_alignment(ln->dev, ln->res);
 275
 276                         if (r_align > align) {
 277                                 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
 278                                 if (!tmp)
 279                                         panic("pdev_sort_resources(): "
 280                                               "kmalloc() failed!\n");
 281                                 tmp->next = ln;
 282                                 tmp->res = r;
 283                                 tmp->dev = dev;
 284                                 list->next = tmp;
 285                                 break;
 286                         }
 287                 }
 288         }
 289 }
 290
 291 int pci_enable_resources(struct pci_dev *dev, int mask)
 292 {
 293         u16 cmd, old_cmd;
 294         int i;
 295         struct resource *r;
 296
 297         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 298         old_cmd = cmd;
 299
 300         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 301                 if (!(mask & (1 << i)))
 302                         continue;
 303
 304                 r = &dev->resource[i];
 305
 306                 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 307                         continue;
 308                 if ((i == PCI_ROM_RESOURCE) &&
 309                                 (!(r->flags & IORESOURCE_ROM_ENABLE)))
 310                         continue;
 311
 312                 if (!r->parent) {
 313                         dev_err(&dev->dev, "device not available "
 314                                 "(can't reserve %pR)\n", r);
 315                         return -EINVAL;
 316                 }
 317
 318                 if (r->flags & IORESOURCE_IO)
 319                         cmd |= PCI_COMMAND_IO;
 320                 if (r->flags & IORESOURCE_MEM)
 321                         cmd |= PCI_COMMAND_MEMORY;
 322         }
 323
 324         if (cmd != old_cmd) {
 325                 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
 326                          old_cmd, cmd);
 327                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 328         }
 329         return 0;
 330 }