release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/wireless/rt2x00/rt2x00reg.h

   1 /*
   2         Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt2x00
  23         Abstract: rt2x00 generic register information.
  24  */
  25
  26 #ifndef RT2X00REG_H
  27 #define RT2X00REG_H
  28
  29 /*
  30  * RX crypto status
  31  */
  32 enum rx_crypto {
  33         RX_CRYPTO_SUCCESS = 0,
  34         RX_CRYPTO_FAIL_ICV = 1,
  35         RX_CRYPTO_FAIL_MIC = 2,
  36         RX_CRYPTO_FAIL_KEY = 3,
  37 };
  38
  39 /*
  40  * Antenna values
  41  */
  42 enum antenna {
  43         ANTENNA_SW_DIVERSITY = 0,
  44         ANTENNA_A = 1,
  45         ANTENNA_B = 2,
  46         ANTENNA_HW_DIVERSITY = 3,
  47 };
  48
  49 /*
  50  * Led mode values.
  51  */
  52 enum led_mode {
  53         LED_MODE_DEFAULT = 0,
  54         LED_MODE_TXRX_ACTIVITY = 1,
  55         LED_MODE_SIGNAL_STRENGTH = 2,
  56         LED_MODE_ASUS = 3,
  57         LED_MODE_ALPHA = 4,
  58 };
  59
  60 /*
  61  * TSF sync values
  62  */
  63 enum tsf_sync {
  64         TSF_SYNC_NONE = 0,
  65         TSF_SYNC_INFRA = 1,
  66         TSF_SYNC_ADHOC = 2,
  67         TSF_SYNC_AP_NONE = 3,
  68 };
  69
  70 /*
  71  * Device states
  72  */
  73 enum dev_state {
  74         STATE_DEEP_SLEEP = 0,
  75         STATE_SLEEP = 1,
  76         STATE_STANDBY = 2,
  77         STATE_AWAKE = 3,
  78
  79 /*
  80  * Additional device states, these values are
  81  * not strict since they are not directly passed
  82  * into the device.
  83  */
  84         STATE_RADIO_ON,
  85         STATE_RADIO_OFF,
  86         STATE_RADIO_RX_ON,
  87         STATE_RADIO_RX_OFF,
  88         STATE_RADIO_RX_ON_LINK,
  89         STATE_RADIO_RX_OFF_LINK,
  90         STATE_RADIO_IRQ_ON,
  91         STATE_RADIO_IRQ_OFF,
  92         STATE_RADIO_IRQ_ON_ISR,
  93         STATE_RADIO_IRQ_OFF_ISR,
  94 };
  95
  96 /*
  97  * IFS backoff values
  98  */
  99 enum ifs {
 100         IFS_BACKOFF = 0,
 101         IFS_SIFS = 1,
 102         IFS_NEW_BACKOFF = 2,
 103         IFS_NONE = 3,
 104 };
 105
 106 /*
 107  * IFS backoff values for HT devices
 108  */
 109 enum txop {
 110         TXOP_HTTXOP = 0,
 111         TXOP_PIFS = 1,
 112         TXOP_SIFS = 2,
 113         TXOP_BACKOFF = 3,
 114 };
 115
 116 /*
 117  * Cipher types for hardware encryption
 118  */
 119 enum cipher {
 120         CIPHER_NONE = 0,
 121         CIPHER_WEP64 = 1,
 122         CIPHER_WEP128 = 2,
 123         CIPHER_TKIP = 3,
 124         CIPHER_AES = 4,
 125 /*
 126  * The following fields were added by rt61pci and rt73usb.
 127  */
 128         CIPHER_CKIP64 = 5,
 129         CIPHER_CKIP128 = 6,
 130         CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
 131
 132 /*
 133  * Max cipher type.
 134  * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
 135  * are excluded due to limitations in mac80211.
 136  */
 137         CIPHER_MAX = 4,
 138 };
 139
 140 /*
 141  * Rate modulations
 142  */
 143 enum rate_modulation {
 144         RATE_MODE_CCK = 0,
 145         RATE_MODE_OFDM = 1,
 146         RATE_MODE_HT_MIX = 2,
 147         RATE_MODE_HT_GREENFIELD = 3,
 148 };
 149
 150 /*
 151  * Firmware validation error codes
 152  */
 153 enum firmware_errors {
 154         FW_OK,
 155         FW_BAD_CRC,
 156         FW_BAD_LENGTH,
 157         FW_BAD_VERSION,
 158 };
 159
 160 /*
 161  * Register handlers.
 162  * We store the position of a register field inside a field structure,
 163  * This will simplify the process of setting and reading a certain field
 164  * inside the register while making sure the process remains byte order safe.
 165  */
 166 struct rt2x00_field8 {
 167         u8 bit_offset;
 168         u8 bit_mask;
 169 };
 170
 171 struct rt2x00_field16 {
 172         u16 bit_offset;
 173         u16 bit_mask;
 174 };
 175
 176 struct rt2x00_field32 {
 177         u32 bit_offset;
 178         u32 bit_mask;
 179 };
 180
 181 /*
 182  * Power of two check, this will check
 183  * if the mask that has been given contains and contiguous set of bits.
 184  * Note that we cannot use the is_power_of_2() function since this
 185  * check must be done at compile-time.
 186  */
 187 #define is_power_of_two(x)      ( !((x) & ((x)-1)) )
 188 #define low_bit_mask(x)         ( ((x)-1) & ~(x) )
 189 #define is_valid_mask(x)        is_power_of_two(1LU + (x) + low_bit_mask(x))
 190
 191 /*
 192  * Macros to find first set bit in a variable.
 193  * These macros behave the same as the __ffs() functions but
 194  * the most important difference that this is done during
 195  * compile-time rather then run-time.
 196  */
 197 #define compile_ffs2(__x) \
 198         __builtin_choose_expr(((__x) & 0x1), 0, 1)
 199
 200 #define compile_ffs4(__x) \
 201         __builtin_choose_expr(((__x) & 0x3), \
 202                               (compile_ffs2((__x))), \
 203                               (compile_ffs2((__x) >> 2) + 2))
 204
 205 #define compile_ffs8(__x) \
 206         __builtin_choose_expr(((__x) & 0xf), \
 207                               (compile_ffs4((__x))), \
 208                               (compile_ffs4((__x) >> 4) + 4))
 209
 210 #define compile_ffs16(__x) \
 211         __builtin_choose_expr(((__x) & 0xff), \
 212                               (compile_ffs8((__x))), \
 213                               (compile_ffs8((__x) >> 8) + 8))
 214
 215 #define compile_ffs32(__x) \
 216         __builtin_choose_expr(((__x) & 0xffff), \
 217                               (compile_ffs16((__x))), \
 218                               (compile_ffs16((__x) >> 16) + 16))
 219
 220 /*
 221  * This macro will check the requirements for the FIELD{8,16,32} macros
 222  * The mask should be a constant non-zero contiguous set of bits which
 223  * does not exceed the given typelimit.
 224  */
 225 #define FIELD_CHECK(__mask, __type)                     \
 226         BUILD_BUG_ON(!(__mask) ||                       \
 227                      !is_valid_mask(__mask) ||          \
 228                      (__mask) != (__type)(__mask))      \
 229
 230 #define FIELD8(__mask)                          \
 231 ({                                              \
 232         FIELD_CHECK(__mask, u8);                \
 233         (struct rt2x00_field8) {                \
 234                 compile_ffs8(__mask), (__mask)  \
 235         };                                      \
 236 })
 237
 238 #define FIELD16(__mask)                         \
 239 ({                                              \
 240         FIELD_CHECK(__mask, u16);               \
 241         (struct rt2x00_field16) {               \
 242                 compile_ffs16(__mask), (__mask) \
 243         };                                      \
 244 })
 245
 246 #define FIELD32(__mask)                         \
 247 ({                                              \
 248         FIELD_CHECK(__mask, u32);               \
 249         (struct rt2x00_field32) {               \
 250                 compile_ffs32(__mask), (__mask) \
 251         };                                      \
 252 })
 253
 254 #define SET_FIELD(__reg, __type, __field, __value)\
 255 ({                                              \
 256         typecheck(__type, __field);             \
 257         *(__reg) &= ~((__field).bit_mask);      \
 258         *(__reg) |= ((__value) <<               \
 259             ((__field).bit_offset)) &           \
 260             ((__field).bit_mask);               \
 261 })
 262
 263 #define GET_FIELD(__reg, __type, __field)       \
 264 ({                                              \
 265         typecheck(__type, __field);             \
 266         ((__reg) & ((__field).bit_mask)) >>     \
 267             ((__field).bit_offset);             \
 268 })
 269
 270 #define rt2x00_set_field32(__reg, __field, __value) \
 271         SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
 272 #define rt2x00_get_field32(__reg, __field) \
 273         GET_FIELD(__reg, struct rt2x00_field32, __field)
 274
 275 #define rt2x00_set_field16(__reg, __field, __value) \
 276         SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
 277 #define rt2x00_get_field16(__reg, __field) \
 278         GET_FIELD(__reg, struct rt2x00_field16, __field)
 279
 280 #define rt2x00_set_field8(__reg, __field, __value) \
 281         SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
 282 #define rt2x00_get_field8(__reg, __field) \
 283         GET_FIELD(__reg, struct rt2x00_field8, __field)
 284
 285 #endif /* RT2X00REG_H */