GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / net / phy / qsemi.c
blobe1102c76871272c407df61c25c80fdd9aa9d62bd
1 /*
2 * drivers/net/phy/qsemi.c
4 * Driver for Quality Semiconductor PHYs
6 * Author: Andy Fleming
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/unistd.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/netdevice.h>
24 #include <linux/etherdevice.h>
25 #include <linux/skbuff.h>
26 #include <linux/spinlock.h>
27 #include <linux/mm.h>
28 #include <linux/module.h>
29 #include <linux/mii.h>
30 #include <linux/ethtool.h>
31 #include <linux/phy.h>
33 #include <asm/io.h>
34 #include <asm/irq.h>
35 #include <asm/uaccess.h>
37 /* ------------------------------------------------------------------------- */
38 /* The Quality Semiconductor QS6612 is used on the RPX CLLF */
40 /* register definitions */
42 #define MII_QS6612_MCR 17 /* Mode Control Register */
43 #define MII_QS6612_FTR 27 /* Factory Test Register */
44 #define MII_QS6612_MCO 28 /* Misc. Control Register */
45 #define MII_QS6612_ISR 29 /* Interrupt Source Register */
46 #define MII_QS6612_IMR 30 /* Interrupt Mask Register */
47 #define MII_QS6612_IMR_INIT 0x003a
48 #define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
50 #define QS6612_PCR_AN_COMPLETE 0x1000
51 #define QS6612_PCR_RLBEN 0x0200
52 #define QS6612_PCR_DCREN 0x0100
53 #define QS6612_PCR_4B5BEN 0x0040
54 #define QS6612_PCR_TX_ISOLATE 0x0020
55 #define QS6612_PCR_MLT3_DIS 0x0002
56 #define QS6612_PCR_SCRM_DESCRM 0x0001
58 MODULE_DESCRIPTION("Quality Semiconductor PHY driver");
59 MODULE_AUTHOR("Andy Fleming");
60 MODULE_LICENSE("GPL");
62 /* Returns 0, unless there's a write error */
63 static int qs6612_config_init(struct phy_device *phydev)
65 return phy_write(phydev, MII_QS6612_PCR, 0x0dc0);
68 static int qs6612_ack_interrupt(struct phy_device *phydev)
70 int err;
72 err = phy_read(phydev, MII_QS6612_ISR);
74 if (err < 0)
75 return err;
77 err = phy_read(phydev, MII_BMSR);
79 if (err < 0)
80 return err;
82 err = phy_read(phydev, MII_EXPANSION);
84 if (err < 0)
85 return err;
87 return 0;
90 static int qs6612_config_intr(struct phy_device *phydev)
92 int err;
93 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
94 err = phy_write(phydev, MII_QS6612_IMR,
95 MII_QS6612_IMR_INIT);
96 else
97 err = phy_write(phydev, MII_QS6612_IMR, 0);
99 return err;
103 static struct phy_driver qs6612_driver = {
104 .phy_id = 0x00181440,
105 .name = "QS6612",
106 .phy_id_mask = 0xfffffff0,
107 .features = PHY_BASIC_FEATURES,
108 .flags = PHY_HAS_INTERRUPT,
109 .config_init = qs6612_config_init,
110 .config_aneg = genphy_config_aneg,
111 .read_status = genphy_read_status,
112 .ack_interrupt = qs6612_ack_interrupt,
113 .config_intr = qs6612_config_intr,
114 .driver = { .owner = THIS_MODULE,},
117 static int __init qs6612_init(void)
119 return phy_driver_register(&qs6612_driver);
122 static void __exit qs6612_exit(void)
124 phy_driver_unregister(&qs6612_driver);
127 module_init(qs6612_init);
128 module_exit(qs6612_exit);
130 static struct mdio_device_id qs6612_tbl[] = {
131 { 0x00181440, 0xfffffff0 },
135 MODULE_DEVICE_TABLE(mdio, qs6612_tbl);