5 * Copyright Information:
6 * Copyright Digital Equipment Corporation 1996.
8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License, incorporated herein by reference.
12 * A Linux device driver supporting the Digital Equipment Corporation
13 * FDDI TURBOchannel, EISA and PCI controller families. Supported
16 * DEC FDDIcontroller/TURBOchannel (DEFTA)
17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA)
20 * The original author:
21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
24 * macro Maciej W. Rozycki <macro@linux-mips.org>
27 * I'd like to thank Patricia Cross for helping me get started with
28 * Linux, David Davies for a lot of help upgrading and configuring
29 * my development system and for answering many OS and driver
30 * development questions, and Alan Cox for recommendations and
31 * integration help on getting FDDI support into Linux. LVS
33 * Driver Architecture:
34 * The driver architecture is largely based on previous driver work
35 * for other operating systems. The upper edge interface and
36 * functions were largely taken from existing Linux device drivers
37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
41 * The driver scans for supported EISA adapters by reading the
42 * SLOT ID register for each EISA slot and making a match
43 * against the expected value.
45 * Bus-Specific Initialization -
46 * This driver currently supports both EISA and PCI controller
47 * families. While the custom DMA chip and FDDI logic is similar
48 * or identical, the bus logic is very different. After
49 * initialization, the only bus-specific differences is in how the
50 * driver enables and disables interrupts. Other than that, the
51 * run-time critical code behaves the same on both families.
52 * It's important to note that both adapter families are configured
53 * to I/O map, rather than memory map, the adapter registers.
56 * In the driver open routine, the driver ISR (interrupt service
57 * routine) is registered and the adapter is brought to an
58 * operational state. In the driver close routine, the opposite
59 * occurs; the driver ISR is deregistered and the adapter is
60 * brought to a safe, but closed state. Users may use consecutive
61 * commands to bring the adapter up and down as in the following
68 * Apparently, there is no shutdown or halt routine support under
69 * Linux. This routine would be called during "reboot" or
70 * "shutdown" to allow the driver to place the adapter in a safe
71 * state before a warm reboot occurs. To be really safe, the user
72 * should close the adapter before shutdown (eg. ifconfig fddi0 down)
73 * to ensure that the adapter DMA engine is taken off-line. However,
74 * the current driver code anticipates this problem and always issues
75 * a soft reset of the adapter at the beginning of driver initialization.
76 * A future driver enhancement in this area may occur in 2.1.X where
77 * Alan indicated that a shutdown handler may be implemented.
79 * Interrupt Service Routine -
80 * The driver supports shared interrupts, so the ISR is registered for
81 * each board with the appropriate flag and the pointer to that board's
82 * device structure. This provides the context during interrupt
83 * processing to support shared interrupts and multiple boards.
85 * Interrupt enabling/disabling can occur at many levels. At the host
86 * end, you can disable system interrupts, or disable interrupts at the
87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters
88 * have a bus-logic chip interrupt enable/disable as well as a DMA
89 * controller interrupt enable/disable.
91 * The driver currently enables and disables adapter interrupts at the
92 * bus-logic chip and assumes that Linux will take care of clearing or
93 * acknowledging any host-based interrupt chips.
96 * Control functions are those used to support functions such as adding
97 * or deleting multicast addresses, enabling or disabling packet
98 * reception filters, or other custom/proprietary commands. Presently,
99 * the driver supports the "get statistics", "set multicast list", and
100 * "set mac address" functions defined by Linux. A list of possible
101 * enhancements include:
103 * - Custom ioctl interface for executing port interface commands
104 * - Custom ioctl interface for adding unicast addresses to
105 * adapter CAM (to support bridge functions).
106 * - Custom ioctl interface for supporting firmware upgrades.
108 * Hardware (port interface) Support Routines -
109 * The driver function names that start with "dfx_hw_" represent
110 * low-level port interface routines that are called frequently. They
111 * include issuing a DMA or port control command to the adapter,
112 * resetting the adapter, or reading the adapter state. Since the
113 * driver initialization and run-time code must make calls into the
114 * port interface, these routines were written to be as generic and
115 * usable as possible.
118 * The adapter DMA engine supports a 256 entry receive descriptor block
119 * of which up to 255 entries can be used at any given time. The
120 * architecture is a standard producer, consumer, completion model in
121 * which the driver "produces" receive buffers to the adapter, the
122 * adapter "consumes" the receive buffers by DMAing incoming packet data,
123 * and the driver "completes" the receive buffers by servicing the
124 * incoming packet, then "produces" a new buffer and starts the cycle
125 * again. Receive buffers can be fragmented in up to 16 fragments
126 * (descriptor entries). For simplicity, this driver posts
127 * single-fragment receive buffers of 4608 bytes, then allocates a
128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU
129 * utilization, a better approach would be to pass up the receive
130 * buffer (no extra copy) then allocate and post a replacement buffer.
131 * This is a performance enhancement that should be looked into at
135 * Like the receive path, the adapter DMA engine supports a 256 entry
136 * transmit descriptor block of which up to 255 entries can be used at
137 * any given time. Transmit buffers can be fragmented in up to 255
138 * fragments (descriptor entries). This driver always posts one
139 * fragment per transmit packet request.
141 * The fragment contains the entire packet from FC to end of data.
142 * Before posting the buffer to the adapter, the driver sets a three-byte
143 * packet request header (PRH) which is required by the Motorola MAC chip
144 * used on the adapters. The PRH tells the MAC the type of token to
145 * receive/send, whether or not to generate and append the CRC, whether
146 * synchronous or asynchronous framing is used, etc. Since the PRH
147 * definition is not necessarily consistent across all FDDI chipsets,
148 * the driver, rather than the common FDDI packet handler routines,
151 * To reduce the amount of descriptor fetches needed per transmit request,
152 * the driver takes advantage of the fact that there are at least three
153 * bytes available before the skb->data field on the outgoing transmit
154 * request. This is guaranteed by having fddi_setup() in net_init.c set
155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest
156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad"
157 * bytes which we'll use to store the PRH.
159 * There's a subtle advantage to adding these pad bytes to the
160 * hard_header_len, it ensures that the data portion of the packet for
161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver
162 * implementations may not need the extra padding and can start copying
163 * or DMAing directly from the FC byte which starts at skb->data. Should
164 * another driver implementation need ADDITIONAL padding, the net_init.c
165 * module should be updated and dev->hard_header_len should be increased.
166 * NOTE: To maintain the alignment on the data portion of the packet,
167 * dev->hard_header_len should always be evenly divisible by 4 and at
168 * least 24 bytes in size.
170 * Modification History:
171 * Date Name Description
172 * 16-Aug-96 LVS Created.
173 * 20-Aug-96 LVS Updated dfx_probe so that version information
174 * string is only displayed if 1 or more cards are
175 * found. Changed dfx_rcv_queue_process to copy
176 * 3 NULL bytes before FC to ensure that data is
177 * longword aligned in receive buffer.
178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable
179 * LLC group promiscuous mode if multicast list
180 * is too large. LLC individual/group promiscuous
181 * mode is now disabled if IFF_PROMISC flag not set.
182 * dfx_xmt_queue_pkt no longer checks for NULL skb
183 * on Alan Cox recommendation. Added node address
185 * 12-Sep-96 LVS Reset current address to factory address during
186 * device open. Updated transmit path to post a
187 * single fragment which includes PRH->end of data.
188 * Mar 2000 AC Did various cleanups for 2.3.x
189 * Jun 2000 jgarzik PCI and resource alloc cleanups
190 * Jul 2000 tjeerd Much cleanup and some bug fixes
191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
192 * Feb 2001 Skb allocation fixes
193 * Feb 2001 davej PCI enable cleanups.
194 * 04 Aug 2003 macro Converted to the DMA API.
195 * 14 Aug 2004 macro Fix device names reported.
196 * 14 Jun 2005 macro Use irqreturn_t.
197 * 23 Oct 2006 macro Big-endian host support.
198 * 14 Dec 2006 macro TURBOchannel support.
202 #include <linux/bitops.h>
203 #include <linux/compiler.h>
204 #include <linux/delay.h>
205 #include <linux/dma-mapping.h>
206 #include <linux/eisa.h>
207 #include <linux/errno.h>
208 #include <linux/fddidevice.h>
209 #include <linux/init.h>
210 #include <linux/interrupt.h>
211 #include <linux/ioport.h>
212 #include <linux/kernel.h>
213 #include <linux/module.h>
214 #include <linux/netdevice.h>
215 #include <linux/pci.h>
216 #include <linux/skbuff.h>
217 #include <linux/slab.h>
218 #include <linux/string.h>
219 #include <linux/tc.h>
221 #include <asm/byteorder.h>
226 /* Version information string should be updated prior to each new release! */
227 #define DRV_NAME "defxx"
228 #define DRV_VERSION "v1.10"
229 #define DRV_RELDATE "2006/12/14"
231 static char version
[] __devinitdata
=
232 DRV_NAME
": " DRV_VERSION
" " DRV_RELDATE
233 " Lawrence V. Stefani and others\n";
235 #define DYNAMIC_BUFFERS 1
237 #define SKBUFF_RX_COPYBREAK 200
239 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
240 * alignment for compatibility with old EISA boards.
242 #define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
245 #define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
247 #define DFX_BUS_PCI(dev) 0
251 #define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
253 #define DFX_BUS_EISA(dev) 0
257 #define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
259 #define DFX_BUS_TC(dev) 0
262 #ifdef CONFIG_DEFXX_MMIO
268 /* Define module-wide (static) routines */
270 static void dfx_bus_init(struct net_device
*dev
);
271 static void dfx_bus_uninit(struct net_device
*dev
);
272 static void dfx_bus_config_check(DFX_board_t
*bp
);
274 static int dfx_driver_init(struct net_device
*dev
,
275 const char *print_name
,
276 resource_size_t bar_start
);
277 static int dfx_adap_init(DFX_board_t
*bp
, int get_buffers
);
279 static int dfx_open(struct net_device
*dev
);
280 static int dfx_close(struct net_device
*dev
);
282 static void dfx_int_pr_halt_id(DFX_board_t
*bp
);
283 static void dfx_int_type_0_process(DFX_board_t
*bp
);
284 static void dfx_int_common(struct net_device
*dev
);
285 static irqreturn_t
dfx_interrupt(int irq
, void *dev_id
);
287 static struct net_device_stats
*dfx_ctl_get_stats(struct net_device
*dev
);
288 static void dfx_ctl_set_multicast_list(struct net_device
*dev
);
289 static int dfx_ctl_set_mac_address(struct net_device
*dev
, void *addr
);
290 static int dfx_ctl_update_cam(DFX_board_t
*bp
);
291 static int dfx_ctl_update_filters(DFX_board_t
*bp
);
293 static int dfx_hw_dma_cmd_req(DFX_board_t
*bp
);
294 static int dfx_hw_port_ctrl_req(DFX_board_t
*bp
, PI_UINT32 command
, PI_UINT32 data_a
, PI_UINT32 data_b
, PI_UINT32
*host_data
);
295 static void dfx_hw_adap_reset(DFX_board_t
*bp
, PI_UINT32 type
);
296 static int dfx_hw_adap_state_rd(DFX_board_t
*bp
);
297 static int dfx_hw_dma_uninit(DFX_board_t
*bp
, PI_UINT32 type
);
299 static int dfx_rcv_init(DFX_board_t
*bp
, int get_buffers
);
300 static void dfx_rcv_queue_process(DFX_board_t
*bp
);
301 static void dfx_rcv_flush(DFX_board_t
*bp
);
303 static netdev_tx_t
dfx_xmt_queue_pkt(struct sk_buff
*skb
,
304 struct net_device
*dev
);
305 static int dfx_xmt_done(DFX_board_t
*bp
);
306 static void dfx_xmt_flush(DFX_board_t
*bp
);
308 /* Define module-wide (static) variables */
310 static struct pci_driver dfx_pci_driver
;
311 static struct eisa_driver dfx_eisa_driver
;
312 static struct tc_driver dfx_tc_driver
;
316 * =======================
317 * = dfx_port_write_long =
318 * = dfx_port_read_long =
319 * =======================
322 * Routines for reading and writing values from/to adapter
328 * bp - pointer to board information
329 * offset - register offset from base I/O address
330 * data - for dfx_port_write_long, this is a value to write;
331 * for dfx_port_read_long, this is a pointer to store
334 * Functional Description:
335 * These routines perform the correct operation to read or write
336 * the adapter register.
338 * EISA port block base addresses are based on the slot number in which the
339 * controller is installed. For example, if the EISA controller is installed
340 * in slot 4, the port block base address is 0x4000. If the controller is
341 * installed in slot 2, the port block base address is 0x2000, and so on.
342 * This port block can be used to access PDQ, ESIC, and DEFEA on-board
343 * registers using the register offsets defined in DEFXX.H.
345 * PCI port block base addresses are assigned by the PCI BIOS or system
346 * firmware. There is one 128 byte port block which can be accessed. It
347 * allows for I/O mapping of both PDQ and PFI registers using the register
348 * offsets defined in DEFXX.H.
354 * bp->base is a valid base I/O address for this adapter.
355 * offset is a valid register offset for this adapter.
358 * Rather than produce macros for these functions, these routines
359 * are defined using "inline" to ensure that the compiler will
360 * generate inline code and not waste a procedure call and return.
361 * This provides all the benefits of macros, but with the
362 * advantage of strict data type checking.
365 static inline void dfx_writel(DFX_board_t
*bp
, int offset
, u32 data
)
367 writel(data
, bp
->base
.mem
+ offset
);
371 static inline void dfx_outl(DFX_board_t
*bp
, int offset
, u32 data
)
373 outl(data
, bp
->base
.port
+ offset
);
376 static void dfx_port_write_long(DFX_board_t
*bp
, int offset
, u32 data
)
378 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
379 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
380 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
383 dfx_writel(bp
, offset
, data
);
385 dfx_outl(bp
, offset
, data
);
389 static inline void dfx_readl(DFX_board_t
*bp
, int offset
, u32
*data
)
392 *data
= readl(bp
->base
.mem
+ offset
);
395 static inline void dfx_inl(DFX_board_t
*bp
, int offset
, u32
*data
)
397 *data
= inl(bp
->base
.port
+ offset
);
400 static void dfx_port_read_long(DFX_board_t
*bp
, int offset
, u32
*data
)
402 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
403 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
404 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
407 dfx_readl(bp
, offset
, data
);
409 dfx_inl(bp
, offset
, data
);
419 * Retrieves the address range used to access control and status
426 * bdev - pointer to device information
427 * bar_start - pointer to store the start address
428 * bar_len - pointer to store the length of the area
431 * I am sure there are some.
436 static void dfx_get_bars(struct device
*bdev
,
437 resource_size_t
*bar_start
, resource_size_t
*bar_len
)
439 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
440 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
441 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
442 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
445 int num
= dfx_use_mmio
? 0 : 1;
447 *bar_start
= pci_resource_start(to_pci_dev(bdev
), num
);
448 *bar_len
= pci_resource_len(to_pci_dev(bdev
), num
);
451 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
455 bar
= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_2
);
457 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_1
);
459 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_0
);
462 bar
= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_2
);
464 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_1
);
466 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_0
);
468 *bar_len
= (bar
| PI_MEM_ADD_MASK_M
) + 1;
470 *bar_start
= base_addr
;
471 *bar_len
= PI_ESIC_K_CSR_IO_LEN
;
475 *bar_start
= to_tc_dev(bdev
)->resource
.start
+
477 *bar_len
= PI_TC_K_CSR_LEN
;
481 static const struct net_device_ops dfx_netdev_ops
= {
482 .ndo_open
= dfx_open
,
483 .ndo_stop
= dfx_close
,
484 .ndo_start_xmit
= dfx_xmt_queue_pkt
,
485 .ndo_get_stats
= dfx_ctl_get_stats
,
486 .ndo_set_multicast_list
= dfx_ctl_set_multicast_list
,
487 .ndo_set_mac_address
= dfx_ctl_set_mac_address
,
496 * Initializes a supported FDDI controller
502 * bdev - pointer to device information
504 * Functional Description:
507 * 0 - This device (fddi0, fddi1, etc) configured successfully
508 * -EBUSY - Failed to get resources, or dfx_driver_init failed.
511 * It compiles so it should work :-( (PCI cards do :-)
514 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
515 * initialized and the board resources are read and stored in
516 * the device structure.
518 static int __devinit
dfx_register(struct device
*bdev
)
520 static int version_disp
;
521 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
522 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
523 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
524 const char *print_name
= dev_name(bdev
);
525 struct net_device
*dev
;
526 DFX_board_t
*bp
; /* board pointer */
527 resource_size_t bar_start
= 0; /* pointer to port */
528 resource_size_t bar_len
= 0; /* resource length */
529 int alloc_size
; /* total buffer size used */
530 struct resource
*region
;
533 if (!version_disp
) { /* display version info if adapter is found */
534 version_disp
= 1; /* set display flag to TRUE so that */
535 printk(version
); /* we only display this string ONCE */
538 dev
= alloc_fddidev(sizeof(*bp
));
540 printk(KERN_ERR
"%s: Unable to allocate fddidev, aborting\n",
545 /* Enable PCI device. */
546 if (dfx_bus_pci
&& pci_enable_device(to_pci_dev(bdev
))) {
547 printk(KERN_ERR
"%s: Cannot enable PCI device, aborting\n",
552 SET_NETDEV_DEV(dev
, bdev
);
554 bp
= netdev_priv(dev
);
556 dev_set_drvdata(bdev
, dev
);
558 dfx_get_bars(bdev
, &bar_start
, &bar_len
);
561 region
= request_mem_region(bar_start
, bar_len
, print_name
);
563 region
= request_region(bar_start
, bar_len
, print_name
);
565 printk(KERN_ERR
"%s: Cannot reserve I/O resource "
566 "0x%lx @ 0x%lx, aborting\n",
567 print_name
, (long)bar_len
, (long)bar_start
);
569 goto err_out_disable
;
572 /* Set up I/O base address. */
574 bp
->base
.mem
= ioremap_nocache(bar_start
, bar_len
);
576 printk(KERN_ERR
"%s: Cannot map MMIO\n", print_name
);
581 bp
->base
.port
= bar_start
;
582 dev
->base_addr
= bar_start
;
585 /* Initialize new device structure */
586 dev
->netdev_ops
= &dfx_netdev_ops
;
589 pci_set_master(to_pci_dev(bdev
));
591 if (dfx_driver_init(dev
, print_name
, bar_start
) != DFX_K_SUCCESS
) {
596 err
= register_netdev(dev
);
600 printk("%s: registered as %s\n", print_name
, dev
->name
);
604 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
605 PI_CMD_REQ_K_SIZE_MAX
+ PI_CMD_RSP_K_SIZE_MAX
+
606 #ifndef DYNAMIC_BUFFERS
607 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
609 sizeof(PI_CONSUMER_BLOCK
) +
610 (PI_ALIGN_K_DESC_BLK
- 1);
612 dma_free_coherent(bdev
, alloc_size
,
613 bp
->kmalloced
, bp
->kmalloced_dma
);
617 iounmap(bp
->base
.mem
);
621 release_mem_region(bar_start
, bar_len
);
623 release_region(bar_start
, bar_len
);
627 pci_disable_device(to_pci_dev(bdev
));
641 * Initializes the bus-specific controller logic.
647 * dev - pointer to device information
649 * Functional Description:
650 * Determine and save adapter IRQ in device table,
651 * then perform bus-specific logic initialization.
657 * bp->base has already been set with the proper
658 * base I/O address for this device.
661 * Interrupts are enabled at the adapter bus-specific logic.
662 * Note: Interrupts at the DMA engine (PDQ chip) are not
666 static void __devinit
dfx_bus_init(struct net_device
*dev
)
668 DFX_board_t
*bp
= netdev_priv(dev
);
669 struct device
*bdev
= bp
->bus_dev
;
670 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
671 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
672 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
673 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
676 DBG_printk("In dfx_bus_init...\n");
678 /* Initialize a pointer back to the net_device struct */
681 /* Initialize adapter based on bus type */
684 dev
->irq
= to_tc_dev(bdev
)->interrupt
;
686 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
688 /* Get the interrupt level from the ESIC chip. */
689 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
690 val
&= PI_CONFIG_STAT_0_M_IRQ
;
691 val
>>= PI_CONFIG_STAT_0_V_IRQ
;
694 case PI_CONFIG_STAT_0_IRQ_K_9
:
698 case PI_CONFIG_STAT_0_IRQ_K_10
:
702 case PI_CONFIG_STAT_0_IRQ_K_11
:
706 case PI_CONFIG_STAT_0_IRQ_K_15
:
712 * Enable memory decoding (MEMCS0) and/or port decoding
713 * (IOCS1/IOCS0) as appropriate in Function Control
714 * Register. One of the port chip selects seems to be
715 * used for the Burst Holdoff register, but this bit of
716 * documentation is missing and as yet it has not been
717 * determined which of the two. This is also the reason
718 * the size of the decoded port range is twice as large
719 * as one required by the PDQ.
722 /* Set the decode range of the board. */
723 val
= ((bp
->base
.port
>> 12) << PI_IO_CMP_V_SLOT
);
724 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_0_1
, val
);
725 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_0_0
, 0);
726 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_1_1
, val
);
727 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_1_0
, 0);
728 val
= PI_ESIC_K_CSR_IO_LEN
- 1;
729 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_0_1
, (val
>> 8) & 0xff);
730 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_0_0
, val
& 0xff);
731 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_1_1
, (val
>> 8) & 0xff);
732 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_1_0
, val
& 0xff);
734 /* Enable the decoders. */
735 val
= PI_FUNCTION_CNTRL_M_IOCS1
| PI_FUNCTION_CNTRL_M_IOCS0
;
737 val
|= PI_FUNCTION_CNTRL_M_MEMCS0
;
738 outb(base_addr
+ PI_ESIC_K_FUNCTION_CNTRL
, val
);
741 * Enable access to the rest of the module
742 * (including PDQ and packet memory).
744 val
= PI_SLOT_CNTRL_M_ENB
;
745 outb(base_addr
+ PI_ESIC_K_SLOT_CNTRL
, val
);
748 * Map PDQ registers into memory or port space. This is
749 * done with a bit in the Burst Holdoff register.
751 val
= inb(base_addr
+ PI_DEFEA_K_BURST_HOLDOFF
);
753 val
|= PI_BURST_HOLDOFF_V_MEM_MAP
;
755 val
&= ~PI_BURST_HOLDOFF_V_MEM_MAP
;
756 outb(base_addr
+ PI_DEFEA_K_BURST_HOLDOFF
, val
);
758 /* Enable interrupts at EISA bus interface chip (ESIC) */
759 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
760 val
|= PI_CONFIG_STAT_0_M_INT_ENB
;
761 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, val
);
764 struct pci_dev
*pdev
= to_pci_dev(bdev
);
766 /* Get the interrupt level from the PCI Configuration Table */
768 dev
->irq
= pdev
->irq
;
770 /* Check Latency Timer and set if less than minimal */
772 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &val
);
773 if (val
< PFI_K_LAT_TIMER_MIN
) {
774 val
= PFI_K_LAT_TIMER_DEF
;
775 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, val
);
778 /* Enable interrupts at PCI bus interface chip (PFI) */
779 val
= PFI_MODE_M_PDQ_INT_ENB
| PFI_MODE_M_DMA_ENB
;
780 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
, val
);
790 * Uninitializes the bus-specific controller logic.
796 * dev - pointer to device information
798 * Functional Description:
799 * Perform bus-specific logic uninitialization.
805 * bp->base has already been set with the proper
806 * base I/O address for this device.
809 * Interrupts are disabled at the adapter bus-specific logic.
812 static void __devexit
dfx_bus_uninit(struct net_device
*dev
)
814 DFX_board_t
*bp
= netdev_priv(dev
);
815 struct device
*bdev
= bp
->bus_dev
;
816 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
817 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
820 DBG_printk("In dfx_bus_uninit...\n");
822 /* Uninitialize adapter based on bus type */
825 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
827 /* Disable interrupts at EISA bus interface chip (ESIC) */
828 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
829 val
&= ~PI_CONFIG_STAT_0_M_INT_ENB
;
830 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, val
);
833 /* Disable interrupts at PCI bus interface chip (PFI) */
834 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
, 0);
840 * ========================
841 * = dfx_bus_config_check =
842 * ========================
845 * Checks the configuration (burst size, full-duplex, etc.) If any parameters
846 * are illegal, then this routine will set new defaults.
852 * bp - pointer to board information
854 * Functional Description:
855 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
856 * PDQ, and all FDDI PCI controllers, all values are legal.
862 * dfx_adap_init has NOT been called yet so burst size and other items have
869 static void __devinit
dfx_bus_config_check(DFX_board_t
*bp
)
871 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
872 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
873 int status
; /* return code from adapter port control call */
874 u32 host_data
; /* LW data returned from port control call */
876 DBG_printk("In dfx_bus_config_check...\n");
878 /* Configuration check only valid for EISA adapter */
881 if (to_eisa_device(bdev
)->id
.driver_data
== DEFEA_PROD_ID_2
) {
883 * Revision 2 FDDI EISA controller found,
884 * so let's check PDQ revision of adapter.
886 status
= dfx_hw_port_ctrl_req(bp
,
888 PI_SUB_CMD_K_PDQ_REV_GET
,
891 if ((status
!= DFX_K_SUCCESS
) || (host_data
== 2))
894 /* Ensure that the burst size is set to 8 longwords or less */
896 switch (bp
->burst_size
)
898 case PI_PDATA_B_DMA_BURST_SIZE_32
:
899 case PI_PDATA_B_DMA_BURST_SIZE_16
:
900 bp
->burst_size
= PI_PDATA_B_DMA_BURST_SIZE_8
;
907 /* Ensure that full-duplex mode is not enabled */
909 bp
->full_duplex_enb
= PI_SNMP_K_FALSE
;
917 * ===================
918 * = dfx_driver_init =
919 * ===================
922 * Initializes remaining adapter board structure information
923 * and makes sure adapter is in a safe state prior to dfx_open().
929 * dev - pointer to device information
930 * print_name - printable device name
932 * Functional Description:
933 * This function allocates additional resources such as the host memory
934 * blocks needed by the adapter (eg. descriptor and consumer blocks).
935 * Remaining bus initialization steps are also completed. The adapter
936 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS
937 * must call dfx_open() to open the adapter and bring it on-line.
940 * DFX_K_SUCCESS - initialization succeeded
941 * DFX_K_FAILURE - initialization failed - could not allocate memory
942 * or read adapter MAC address
945 * Memory allocated from pci_alloc_consistent() call is physically
946 * contiguous, locked memory.
949 * Adapter is reset and should be in DMA_UNAVAILABLE state before
950 * returning from this routine.
953 static int __devinit
dfx_driver_init(struct net_device
*dev
,
954 const char *print_name
,
955 resource_size_t bar_start
)
957 DFX_board_t
*bp
= netdev_priv(dev
);
958 struct device
*bdev
= bp
->bus_dev
;
959 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
960 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
961 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
962 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
963 int alloc_size
; /* total buffer size needed */
964 char *top_v
, *curr_v
; /* virtual addrs into memory block */
965 dma_addr_t top_p
, curr_p
; /* physical addrs into memory block */
966 u32 data
; /* host data register value */
968 char *board_name
= NULL
;
970 DBG_printk("In dfx_driver_init...\n");
972 /* Initialize bus-specific hardware registers */
977 * Initialize default values for configurable parameters
979 * Note: All of these parameters are ones that a user may
980 * want to customize. It'd be nice to break these
981 * out into Space.c or someplace else that's more
982 * accessible/understandable than this file.
985 bp
->full_duplex_enb
= PI_SNMP_K_FALSE
;
986 bp
->req_ttrt
= 8 * 12500; /* 8ms in 80 nanosec units */
987 bp
->burst_size
= PI_PDATA_B_DMA_BURST_SIZE_DEF
;
988 bp
->rcv_bufs_to_post
= RCV_BUFS_DEF
;
991 dfx_bus_config_check(bp
);
993 /* Disable PDQ interrupts first */
995 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
997 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
999 (void) dfx_hw_dma_uninit(bp
, PI_PDATA_A_RESET_M_SKIP_ST
);
1001 /* Read the factory MAC address from the adapter then save it */
1003 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_MLA
, PI_PDATA_A_MLA_K_LO
, 0,
1004 &data
) != DFX_K_SUCCESS
) {
1005 printk("%s: Could not read adapter factory MAC address!\n",
1007 return(DFX_K_FAILURE
);
1009 le32
= cpu_to_le32(data
);
1010 memcpy(&bp
->factory_mac_addr
[0], &le32
, sizeof(u32
));
1012 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_MLA
, PI_PDATA_A_MLA_K_HI
, 0,
1013 &data
) != DFX_K_SUCCESS
) {
1014 printk("%s: Could not read adapter factory MAC address!\n",
1016 return(DFX_K_FAILURE
);
1018 le32
= cpu_to_le32(data
);
1019 memcpy(&bp
->factory_mac_addr
[4], &le32
, sizeof(u16
));
1022 * Set current address to factory address
1024 * Note: Node address override support is handled through
1025 * dfx_ctl_set_mac_address.
1028 memcpy(dev
->dev_addr
, bp
->factory_mac_addr
, FDDI_K_ALEN
);
1030 board_name
= "DEFTA";
1032 board_name
= "DEFEA";
1034 board_name
= "DEFPA";
1035 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, Hardware addr = %pMF\n",
1036 print_name
, board_name
, dfx_use_mmio
? "" : "I/O ",
1037 (long long)bar_start
, dev
->irq
, dev
->dev_addr
);
1040 * Get memory for descriptor block, consumer block, and other buffers
1041 * that need to be DMA read or written to by the adapter.
1044 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
1045 PI_CMD_REQ_K_SIZE_MAX
+
1046 PI_CMD_RSP_K_SIZE_MAX
+
1047 #ifndef DYNAMIC_BUFFERS
1048 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
1050 sizeof(PI_CONSUMER_BLOCK
) +
1051 (PI_ALIGN_K_DESC_BLK
- 1);
1052 bp
->kmalloced
= top_v
= dma_alloc_coherent(bp
->bus_dev
, alloc_size
,
1055 if (top_v
== NULL
) {
1056 printk("%s: Could not allocate memory for host buffers "
1057 "and structures!\n", print_name
);
1058 return(DFX_K_FAILURE
);
1060 memset(top_v
, 0, alloc_size
); /* zero out memory before continuing */
1061 top_p
= bp
->kmalloced_dma
; /* get physical address of buffer */
1064 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
1065 * plus the amount of memory needed was allocated. The physical address
1066 * is now 8K aligned. By carving up the memory in a specific order,
1067 * we'll guarantee the alignment requirements for all other structures.
1069 * Note: If the assumptions change regarding the non-paged, non-cached,
1070 * physically contiguous nature of the memory block or the address
1071 * alignments, then we'll need to implement a different algorithm
1072 * for allocating the needed memory.
1075 curr_p
= ALIGN(top_p
, PI_ALIGN_K_DESC_BLK
);
1076 curr_v
= top_v
+ (curr_p
- top_p
);
1078 /* Reserve space for descriptor block */
1080 bp
->descr_block_virt
= (PI_DESCR_BLOCK
*) curr_v
;
1081 bp
->descr_block_phys
= curr_p
;
1082 curr_v
+= sizeof(PI_DESCR_BLOCK
);
1083 curr_p
+= sizeof(PI_DESCR_BLOCK
);
1085 /* Reserve space for command request buffer */
1087 bp
->cmd_req_virt
= (PI_DMA_CMD_REQ
*) curr_v
;
1088 bp
->cmd_req_phys
= curr_p
;
1089 curr_v
+= PI_CMD_REQ_K_SIZE_MAX
;
1090 curr_p
+= PI_CMD_REQ_K_SIZE_MAX
;
1092 /* Reserve space for command response buffer */
1094 bp
->cmd_rsp_virt
= (PI_DMA_CMD_RSP
*) curr_v
;
1095 bp
->cmd_rsp_phys
= curr_p
;
1096 curr_v
+= PI_CMD_RSP_K_SIZE_MAX
;
1097 curr_p
+= PI_CMD_RSP_K_SIZE_MAX
;
1099 /* Reserve space for the LLC host receive queue buffers */
1101 bp
->rcv_block_virt
= curr_v
;
1102 bp
->rcv_block_phys
= curr_p
;
1104 #ifndef DYNAMIC_BUFFERS
1105 curr_v
+= (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
);
1106 curr_p
+= (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
);
1109 /* Reserve space for the consumer block */
1111 bp
->cons_block_virt
= (PI_CONSUMER_BLOCK
*) curr_v
;
1112 bp
->cons_block_phys
= curr_p
;
1114 /* Display virtual and physical addresses if debug driver */
1116 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1118 (long)bp
->descr_block_virt
, bp
->descr_block_phys
);
1119 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1120 print_name
, (long)bp
->cmd_req_virt
, bp
->cmd_req_phys
);
1121 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1122 print_name
, (long)bp
->cmd_rsp_virt
, bp
->cmd_rsp_phys
);
1123 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1124 print_name
, (long)bp
->rcv_block_virt
, bp
->rcv_block_phys
);
1125 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1126 print_name
, (long)bp
->cons_block_virt
, bp
->cons_block_phys
);
1128 return(DFX_K_SUCCESS
);
1138 * Brings the adapter to the link avail/link unavailable state.
1144 * bp - pointer to board information
1145 * get_buffers - non-zero if buffers to be allocated
1147 * Functional Description:
1148 * Issues the low-level firmware/hardware calls necessary to bring
1149 * the adapter up, or to properly reset and restore adapter during
1153 * DFX_K_SUCCESS - Adapter brought up successfully
1154 * DFX_K_FAILURE - Adapter initialization failed
1157 * bp->reset_type should be set to a valid reset type value before
1158 * calling this routine.
1161 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1162 * upon a successful return of this routine.
1165 static int dfx_adap_init(DFX_board_t
*bp
, int get_buffers
)
1167 DBG_printk("In dfx_adap_init...\n");
1169 /* Disable PDQ interrupts first */
1171 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1173 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1175 if (dfx_hw_dma_uninit(bp
, bp
->reset_type
) != DFX_K_SUCCESS
)
1177 printk("%s: Could not uninitialize/reset adapter!\n", bp
->dev
->name
);
1178 return(DFX_K_FAILURE
);
1182 * When the PDQ is reset, some false Type 0 interrupts may be pending,
1183 * so we'll acknowledge all Type 0 interrupts now before continuing.
1186 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, PI_HOST_INT_K_ACK_ALL_TYPE_0
);
1189 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1191 * Note: We only need to clear host copies of these registers. The PDQ reset
1192 * takes care of the on-board register values.
1195 bp
->cmd_req_reg
.lword
= 0;
1196 bp
->cmd_rsp_reg
.lword
= 0;
1197 bp
->rcv_xmt_reg
.lword
= 0;
1199 /* Clear consumer block before going to DMA_AVAILABLE state */
1201 memset(bp
->cons_block_virt
, 0, sizeof(PI_CONSUMER_BLOCK
));
1203 /* Initialize the DMA Burst Size */
1205 if (dfx_hw_port_ctrl_req(bp
,
1207 PI_SUB_CMD_K_BURST_SIZE_SET
,
1209 NULL
) != DFX_K_SUCCESS
)
1211 printk("%s: Could not set adapter burst size!\n", bp
->dev
->name
);
1212 return(DFX_K_FAILURE
);
1216 * Set base address of Consumer Block
1218 * Assumption: 32-bit physical address of consumer block is 64 byte
1219 * aligned. That is, bits 0-5 of the address must be zero.
1222 if (dfx_hw_port_ctrl_req(bp
,
1223 PI_PCTRL_M_CONS_BLOCK
,
1224 bp
->cons_block_phys
,
1226 NULL
) != DFX_K_SUCCESS
)
1228 printk("%s: Could not set consumer block address!\n", bp
->dev
->name
);
1229 return(DFX_K_FAILURE
);
1233 * Set the base address of Descriptor Block and bring adapter
1234 * to DMA_AVAILABLE state.
1236 * Note: We also set the literal and data swapping requirements
1239 * Assumption: 32-bit physical address of descriptor block
1240 * is 8Kbyte aligned.
1242 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_INIT
,
1243 (u32
)(bp
->descr_block_phys
|
1244 PI_PDATA_A_INIT_M_BSWAP_INIT
),
1245 0, NULL
) != DFX_K_SUCCESS
) {
1246 printk("%s: Could not set descriptor block address!\n",
1248 return DFX_K_FAILURE
;
1251 /* Set transmit flush timeout value */
1253 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_CHARS_SET
;
1254 bp
->cmd_req_virt
->char_set
.item
[0].item_code
= PI_ITEM_K_FLUSH_TIME
;
1255 bp
->cmd_req_virt
->char_set
.item
[0].value
= 3; /* 3 seconds */
1256 bp
->cmd_req_virt
->char_set
.item
[0].item_index
= 0;
1257 bp
->cmd_req_virt
->char_set
.item
[1].item_code
= PI_ITEM_K_EOL
;
1258 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1260 printk("%s: DMA command request failed!\n", bp
->dev
->name
);
1261 return(DFX_K_FAILURE
);
1264 /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1266 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_SNMP_SET
;
1267 bp
->cmd_req_virt
->snmp_set
.item
[0].item_code
= PI_ITEM_K_FDX_ENB_DIS
;
1268 bp
->cmd_req_virt
->snmp_set
.item
[0].value
= bp
->full_duplex_enb
;
1269 bp
->cmd_req_virt
->snmp_set
.item
[0].item_index
= 0;
1270 bp
->cmd_req_virt
->snmp_set
.item
[1].item_code
= PI_ITEM_K_MAC_T_REQ
;
1271 bp
->cmd_req_virt
->snmp_set
.item
[1].value
= bp
->req_ttrt
;
1272 bp
->cmd_req_virt
->snmp_set
.item
[1].item_index
= 0;
1273 bp
->cmd_req_virt
->snmp_set
.item
[2].item_code
= PI_ITEM_K_EOL
;
1274 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1276 printk("%s: DMA command request failed!\n", bp
->dev
->name
);
1277 return(DFX_K_FAILURE
);
1280 /* Initialize adapter CAM */
1282 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
1284 printk("%s: Adapter CAM update failed!\n", bp
->dev
->name
);
1285 return(DFX_K_FAILURE
);
1288 /* Initialize adapter filters */
1290 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
1292 printk("%s: Adapter filters update failed!\n", bp
->dev
->name
);
1293 return(DFX_K_FAILURE
);
1297 * Remove any existing dynamic buffers (i.e. if the adapter is being
1304 /* Initialize receive descriptor block and produce buffers */
1306 if (dfx_rcv_init(bp
, get_buffers
))
1308 printk("%s: Receive buffer allocation failed\n", bp
->dev
->name
);
1311 return(DFX_K_FAILURE
);
1314 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1316 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_START
;
1317 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1319 printk("%s: Start command failed\n", bp
->dev
->name
);
1322 return(DFX_K_FAILURE
);
1325 /* Initialization succeeded, reenable PDQ interrupts */
1327 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_ENABLE_DEF_INTS
);
1328 return(DFX_K_SUCCESS
);
1344 * dev - pointer to device information
1346 * Functional Description:
1347 * This function brings the adapter to an operational state.
1350 * 0 - Adapter was successfully opened
1351 * -EAGAIN - Could not register IRQ or adapter initialization failed
1354 * This routine should only be called for a device that was
1355 * initialized successfully.
1358 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1359 * if the open is successful.
1362 static int dfx_open(struct net_device
*dev
)
1364 DFX_board_t
*bp
= netdev_priv(dev
);
1367 DBG_printk("In dfx_open...\n");
1369 /* Register IRQ - support shared interrupts by passing device ptr */
1371 ret
= request_irq(dev
->irq
, dfx_interrupt
, IRQF_SHARED
, dev
->name
,
1374 printk(KERN_ERR
"%s: Requested IRQ %d is busy\n", dev
->name
, dev
->irq
);
1379 * Set current address to factory MAC address
1381 * Note: We've already done this step in dfx_driver_init.
1382 * However, it's possible that a user has set a node
1383 * address override, then closed and reopened the
1384 * adapter. Unless we reset the device address field
1385 * now, we'll continue to use the existing modified
1389 memcpy(dev
->dev_addr
, bp
->factory_mac_addr
, FDDI_K_ALEN
);
1391 /* Clear local unicast/multicast address tables and counts */
1393 memset(bp
->uc_table
, 0, sizeof(bp
->uc_table
));
1394 memset(bp
->mc_table
, 0, sizeof(bp
->mc_table
));
1398 /* Disable promiscuous filter settings */
1400 bp
->ind_group_prom
= PI_FSTATE_K_BLOCK
;
1401 bp
->group_prom
= PI_FSTATE_K_BLOCK
;
1403 spin_lock_init(&bp
->lock
);
1405 /* Reset and initialize adapter */
1407 bp
->reset_type
= PI_PDATA_A_RESET_M_SKIP_ST
; /* skip self-test */
1408 if (dfx_adap_init(bp
, 1) != DFX_K_SUCCESS
)
1410 printk(KERN_ERR
"%s: Adapter open failed!\n", dev
->name
);
1411 free_irq(dev
->irq
, dev
);
1415 /* Set device structure info */
1416 netif_start_queue(dev
);
1427 * Closes the device/module.
1433 * dev - pointer to device information
1435 * Functional Description:
1436 * This routine closes the adapter and brings it to a safe state.
1437 * The interrupt service routine is deregistered with the OS.
1438 * The adapter can be opened again with another call to dfx_open().
1444 * No further requests for this adapter are made after this routine is
1445 * called. dfx_open() can be called to reset and reinitialize the
1449 * Adapter should be in DMA_UNAVAILABLE state upon completion of this
1453 static int dfx_close(struct net_device
*dev
)
1455 DFX_board_t
*bp
= netdev_priv(dev
);
1457 DBG_printk("In dfx_close...\n");
1459 /* Disable PDQ interrupts first */
1461 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1463 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1465 (void) dfx_hw_dma_uninit(bp
, PI_PDATA_A_RESET_M_SKIP_ST
);
1468 * Flush any pending transmit buffers
1470 * Note: It's important that we flush the transmit buffers
1471 * BEFORE we clear our copy of the Type 2 register.
1472 * Otherwise, we'll have no idea how many buffers
1479 * Clear Type 1 and Type 2 registers after adapter reset
1481 * Note: Even though we're closing the adapter, it's
1482 * possible that an interrupt will occur after
1483 * dfx_close is called. Without some assurance to
1484 * the contrary we want to make sure that we don't
1485 * process receive and transmit LLC frames and update
1486 * the Type 2 register with bad information.
1489 bp
->cmd_req_reg
.lword
= 0;
1490 bp
->cmd_rsp_reg
.lword
= 0;
1491 bp
->rcv_xmt_reg
.lword
= 0;
1493 /* Clear consumer block for the same reason given above */
1495 memset(bp
->cons_block_virt
, 0, sizeof(PI_CONSUMER_BLOCK
));
1497 /* Release all dynamically allocate skb in the receive ring. */
1501 /* Clear device structure flags */
1503 netif_stop_queue(dev
);
1505 /* Deregister (free) IRQ */
1507 free_irq(dev
->irq
, dev
);
1514 * ======================
1515 * = dfx_int_pr_halt_id =
1516 * ======================
1519 * Displays halt id's in string form.
1525 * bp - pointer to board information
1527 * Functional Description:
1528 * Determine current halt id and display appropriate string.
1540 static void dfx_int_pr_halt_id(DFX_board_t
*bp
)
1542 PI_UINT32 port_status
; /* PDQ port status register value */
1543 PI_UINT32 halt_id
; /* PDQ port status halt ID */
1545 /* Read the latest port status */
1547 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
1549 /* Display halt state transition information */
1551 halt_id
= (port_status
& PI_PSTATUS_M_HALT_ID
) >> PI_PSTATUS_V_HALT_ID
;
1554 case PI_HALT_ID_K_SELFTEST_TIMEOUT
:
1555 printk("%s: Halt ID: Selftest Timeout\n", bp
->dev
->name
);
1558 case PI_HALT_ID_K_PARITY_ERROR
:
1559 printk("%s: Halt ID: Host Bus Parity Error\n", bp
->dev
->name
);
1562 case PI_HALT_ID_K_HOST_DIR_HALT
:
1563 printk("%s: Halt ID: Host-Directed Halt\n", bp
->dev
->name
);
1566 case PI_HALT_ID_K_SW_FAULT
:
1567 printk("%s: Halt ID: Adapter Software Fault\n", bp
->dev
->name
);
1570 case PI_HALT_ID_K_HW_FAULT
:
1571 printk("%s: Halt ID: Adapter Hardware Fault\n", bp
->dev
->name
);
1574 case PI_HALT_ID_K_PC_TRACE
:
1575 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp
->dev
->name
);
1578 case PI_HALT_ID_K_DMA_ERROR
:
1579 printk("%s: Halt ID: Adapter DMA Error\n", bp
->dev
->name
);
1582 case PI_HALT_ID_K_IMAGE_CRC_ERROR
:
1583 printk("%s: Halt ID: Firmware Image CRC Error\n", bp
->dev
->name
);
1586 case PI_HALT_ID_K_BUS_EXCEPTION
:
1587 printk("%s: Halt ID: 68000 Bus Exception\n", bp
->dev
->name
);
1591 printk("%s: Halt ID: Unknown (code = %X)\n", bp
->dev
->name
, halt_id
);
1598 * ==========================
1599 * = dfx_int_type_0_process =
1600 * ==========================
1603 * Processes Type 0 interrupts.
1609 * bp - pointer to board information
1611 * Functional Description:
1612 * Processes all enabled Type 0 interrupts. If the reason for the interrupt
1613 * is a serious fault on the adapter, then an error message is displayed
1614 * and the adapter is reset.
1616 * One tricky potential timing window is the rapid succession of "link avail"
1617 * "link unavail" state change interrupts. The acknowledgement of the Type 0
1618 * interrupt must be done before reading the state from the Port Status
1619 * register. This is true because a state change could occur after reading
1620 * the data, but before acknowledging the interrupt. If this state change
1621 * does happen, it would be lost because the driver is using the old state,
1622 * and it will never know about the new state because it subsequently
1623 * acknowledges the state change interrupt.
1626 * read type 0 int reasons read type 0 int reasons
1627 * read adapter state ack type 0 interrupts
1628 * ack type 0 interrupts read adapter state
1629 * ... process interrupt ... ... process interrupt ...
1638 * An adapter reset may occur if the adapter has any Type 0 error interrupts
1639 * or if the port status indicates that the adapter is halted. The driver
1640 * is responsible for reinitializing the adapter with the current CAM
1641 * contents and adapter filter settings.
1644 static void dfx_int_type_0_process(DFX_board_t
*bp
)
1647 PI_UINT32 type_0_status
; /* Host Interrupt Type 0 register */
1648 PI_UINT32 state
; /* current adap state (from port status) */
1651 * Read host interrupt Type 0 register to determine which Type 0
1652 * interrupts are pending. Immediately write it back out to clear
1656 dfx_port_read_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, &type_0_status
);
1657 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, type_0_status
);
1659 /* Check for Type 0 error interrupts */
1661 if (type_0_status
& (PI_TYPE_0_STAT_M_NXM
|
1662 PI_TYPE_0_STAT_M_PM_PAR_ERR
|
1663 PI_TYPE_0_STAT_M_BUS_PAR_ERR
))
1665 /* Check for Non-Existent Memory error */
1667 if (type_0_status
& PI_TYPE_0_STAT_M_NXM
)
1668 printk("%s: Non-Existent Memory Access Error\n", bp
->dev
->name
);
1670 /* Check for Packet Memory Parity error */
1672 if (type_0_status
& PI_TYPE_0_STAT_M_PM_PAR_ERR
)
1673 printk("%s: Packet Memory Parity Error\n", bp
->dev
->name
);
1675 /* Check for Host Bus Parity error */
1677 if (type_0_status
& PI_TYPE_0_STAT_M_BUS_PAR_ERR
)
1678 printk("%s: Host Bus Parity Error\n", bp
->dev
->name
);
1680 /* Reset adapter and bring it back on-line */
1682 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1683 bp
->reset_type
= 0; /* rerun on-board diagnostics */
1684 printk("%s: Resetting adapter...\n", bp
->dev
->name
);
1685 if (dfx_adap_init(bp
, 0) != DFX_K_SUCCESS
)
1687 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp
->dev
->name
);
1688 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1691 printk("%s: Adapter reset successful!\n", bp
->dev
->name
);
1695 /* Check for transmit flush interrupt */
1697 if (type_0_status
& PI_TYPE_0_STAT_M_XMT_FLUSH
)
1699 /* Flush any pending xmt's and acknowledge the flush interrupt */
1701 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1702 dfx_xmt_flush(bp
); /* flush any outstanding packets */
1703 (void) dfx_hw_port_ctrl_req(bp
,
1704 PI_PCTRL_M_XMT_DATA_FLUSH_DONE
,
1710 /* Check for adapter state change */
1712 if (type_0_status
& PI_TYPE_0_STAT_M_STATE_CHANGE
)
1714 /* Get latest adapter state */
1716 state
= dfx_hw_adap_state_rd(bp
); /* get adapter state */
1717 if (state
== PI_STATE_K_HALTED
)
1720 * Adapter has transitioned to HALTED state, try to reset
1721 * adapter to bring it back on-line. If reset fails,
1722 * leave the adapter in the broken state.
1725 printk("%s: Controller has transitioned to HALTED state!\n", bp
->dev
->name
);
1726 dfx_int_pr_halt_id(bp
); /* display halt id as string */
1728 /* Reset adapter and bring it back on-line */
1730 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1731 bp
->reset_type
= 0; /* rerun on-board diagnostics */
1732 printk("%s: Resetting adapter...\n", bp
->dev
->name
);
1733 if (dfx_adap_init(bp
, 0) != DFX_K_SUCCESS
)
1735 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp
->dev
->name
);
1736 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1739 printk("%s: Adapter reset successful!\n", bp
->dev
->name
);
1741 else if (state
== PI_STATE_K_LINK_AVAIL
)
1743 bp
->link_available
= PI_K_TRUE
; /* set link available flag */
1750 * ==================
1751 * = dfx_int_common =
1752 * ==================
1755 * Interrupt service routine (ISR)
1761 * bp - pointer to board information
1763 * Functional Description:
1764 * This is the ISR which processes incoming adapter interrupts.
1770 * This routine assumes PDQ interrupts have not been disabled.
1771 * When interrupts are disabled at the PDQ, the Port Status register
1772 * is automatically cleared. This routine uses the Port Status
1773 * register value to determine whether a Type 0 interrupt occurred,
1774 * so it's important that adapter interrupts are not normally
1775 * enabled/disabled at the PDQ.
1777 * It's vital that this routine is NOT reentered for the
1778 * same board and that the OS is not in another section of
1779 * code (eg. dfx_xmt_queue_pkt) for the same board on a
1783 * Pending interrupts are serviced. Depending on the type of
1784 * interrupt, acknowledging and clearing the interrupt at the
1785 * PDQ involves writing a register to clear the interrupt bit
1786 * or updating completion indices.
1789 static void dfx_int_common(struct net_device
*dev
)
1791 DFX_board_t
*bp
= netdev_priv(dev
);
1792 PI_UINT32 port_status
; /* Port Status register */
1794 /* Process xmt interrupts - frequent case, so always call this routine */
1796 if(dfx_xmt_done(bp
)) /* free consumed xmt packets */
1797 netif_wake_queue(dev
);
1799 /* Process rcv interrupts - frequent case, so always call this routine */
1801 dfx_rcv_queue_process(bp
); /* service received LLC frames */
1804 * Transmit and receive producer and completion indices are updated on the
1805 * adapter by writing to the Type 2 Producer register. Since the frequent
1806 * case is that we'll be processing either LLC transmit or receive buffers,
1807 * we'll optimize I/O writes by doing a single register write here.
1810 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
1812 /* Read PDQ Port Status register to find out which interrupts need processing */
1814 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
1816 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1818 if (port_status
& PI_PSTATUS_M_TYPE_0_PENDING
)
1819 dfx_int_type_0_process(bp
); /* process Type 0 interrupts */
1829 * Interrupt processing routine
1832 * Whether a valid interrupt was seen.
1835 * irq - interrupt vector
1836 * dev_id - pointer to device information
1838 * Functional Description:
1839 * This routine calls the interrupt processing routine for this adapter. It
1840 * disables and reenables adapter interrupts, as appropriate. We can support
1841 * shared interrupts since the incoming dev_id pointer provides our device
1842 * structure context.
1845 * IRQ_HANDLED - an IRQ was handled.
1846 * IRQ_NONE - no IRQ was handled.
1849 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1850 * on Intel-based systems) is done by the operating system outside this
1853 * System interrupts are enabled through this call.
1856 * Interrupts are disabled, then reenabled at the adapter.
1859 static irqreturn_t
dfx_interrupt(int irq
, void *dev_id
)
1861 struct net_device
*dev
= dev_id
;
1862 DFX_board_t
*bp
= netdev_priv(dev
);
1863 struct device
*bdev
= bp
->bus_dev
;
1864 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
1865 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
1866 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
1868 /* Service adapter interrupts */
1873 dfx_port_read_long(bp
, PFI_K_REG_STATUS
, &status
);
1874 if (!(status
& PFI_STATUS_M_PDQ_INT
))
1877 spin_lock(&bp
->lock
);
1879 /* Disable PDQ-PFI interrupts at PFI */
1880 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
,
1881 PFI_MODE_M_DMA_ENB
);
1883 /* Call interrupt service routine for this adapter */
1884 dfx_int_common(dev
);
1886 /* Clear PDQ interrupt status bit and reenable interrupts */
1887 dfx_port_write_long(bp
, PFI_K_REG_STATUS
,
1888 PFI_STATUS_M_PDQ_INT
);
1889 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
,
1890 (PFI_MODE_M_PDQ_INT_ENB
|
1891 PFI_MODE_M_DMA_ENB
));
1893 spin_unlock(&bp
->lock
);
1896 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
1899 status
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
1900 if (!(status
& PI_CONFIG_STAT_0_M_PEND
))
1903 spin_lock(&bp
->lock
);
1905 /* Disable interrupts at the ESIC */
1906 status
&= ~PI_CONFIG_STAT_0_M_INT_ENB
;
1907 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, status
);
1909 /* Call interrupt service routine for this adapter */
1910 dfx_int_common(dev
);
1912 /* Reenable interrupts at the ESIC */
1913 status
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
1914 status
|= PI_CONFIG_STAT_0_M_INT_ENB
;
1915 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, status
);
1917 spin_unlock(&bp
->lock
);
1922 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &status
);
1923 if (!(status
& (PI_PSTATUS_M_RCV_DATA_PENDING
|
1924 PI_PSTATUS_M_XMT_DATA_PENDING
|
1925 PI_PSTATUS_M_SMT_HOST_PENDING
|
1926 PI_PSTATUS_M_UNSOL_PENDING
|
1927 PI_PSTATUS_M_CMD_RSP_PENDING
|
1928 PI_PSTATUS_M_CMD_REQ_PENDING
|
1929 PI_PSTATUS_M_TYPE_0_PENDING
)))
1932 spin_lock(&bp
->lock
);
1934 /* Call interrupt service routine for this adapter */
1935 dfx_int_common(dev
);
1937 spin_unlock(&bp
->lock
);
1945 * =====================
1946 * = dfx_ctl_get_stats =
1947 * =====================
1950 * Get statistics for FDDI adapter
1953 * Pointer to FDDI statistics structure
1956 * dev - pointer to device information
1958 * Functional Description:
1959 * Gets current MIB objects from adapter, then
1960 * returns FDDI statistics structure as defined
1963 * Note: Since the FDDI statistics structure is
1964 * still new and the device structure doesn't
1965 * have an FDDI-specific get statistics handler,
1966 * we'll return the FDDI statistics structure as
1967 * a pointer to an Ethernet statistics structure.
1968 * That way, at least the first part of the statistics
1969 * structure can be decoded properly, and it allows
1970 * "smart" applications to perform a second cast to
1971 * decode the FDDI-specific statistics.
1973 * We'll have to pay attention to this routine as the
1974 * device structure becomes more mature and LAN media
1987 static struct net_device_stats
*dfx_ctl_get_stats(struct net_device
*dev
)
1989 DFX_board_t
*bp
= netdev_priv(dev
);
1991 /* Fill the bp->stats structure with driver-maintained counters */
1993 bp
->stats
.gen
.rx_packets
= bp
->rcv_total_frames
;
1994 bp
->stats
.gen
.tx_packets
= bp
->xmt_total_frames
;
1995 bp
->stats
.gen
.rx_bytes
= bp
->rcv_total_bytes
;
1996 bp
->stats
.gen
.tx_bytes
= bp
->xmt_total_bytes
;
1997 bp
->stats
.gen
.rx_errors
= bp
->rcv_crc_errors
+
1998 bp
->rcv_frame_status_errors
+
1999 bp
->rcv_length_errors
;
2000 bp
->stats
.gen
.tx_errors
= bp
->xmt_length_errors
;
2001 bp
->stats
.gen
.rx_dropped
= bp
->rcv_discards
;
2002 bp
->stats
.gen
.tx_dropped
= bp
->xmt_discards
;
2003 bp
->stats
.gen
.multicast
= bp
->rcv_multicast_frames
;
2004 bp
->stats
.gen
.collisions
= 0; /* always zero (0) for FDDI */
2006 /* Get FDDI SMT MIB objects */
2008 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_SMT_MIB_GET
;
2009 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2010 return((struct net_device_stats
*) &bp
->stats
);
2012 /* Fill the bp->stats structure with the SMT MIB object values */
2014 memcpy(bp
->stats
.smt_station_id
, &bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_id
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_id
));
2015 bp
->stats
.smt_op_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_op_version_id
;
2016 bp
->stats
.smt_hi_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_hi_version_id
;
2017 bp
->stats
.smt_lo_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_lo_version_id
;
2018 memcpy(bp
->stats
.smt_user_data
, &bp
->cmd_rsp_virt
->smt_mib_get
.smt_user_data
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.smt_user_data
));
2019 bp
->stats
.smt_mib_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_mib_version_id
;
2020 bp
->stats
.smt_mac_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_mac_ct
;
2021 bp
->stats
.smt_non_master_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_non_master_ct
;
2022 bp
->stats
.smt_master_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_master_ct
;
2023 bp
->stats
.smt_available_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_available_paths
;
2024 bp
->stats
.smt_config_capabilities
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_config_capabilities
;
2025 bp
->stats
.smt_config_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_config_policy
;
2026 bp
->stats
.smt_connection_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_connection_policy
;
2027 bp
->stats
.smt_t_notify
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_t_notify
;
2028 bp
->stats
.smt_stat_rpt_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_stat_rpt_policy
;
2029 bp
->stats
.smt_trace_max_expiration
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_trace_max_expiration
;
2030 bp
->stats
.smt_bypass_present
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_bypass_present
;
2031 bp
->stats
.smt_ecm_state
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_ecm_state
;
2032 bp
->stats
.smt_cf_state
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_cf_state
;
2033 bp
->stats
.smt_remote_disconnect_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_remote_disconnect_flag
;
2034 bp
->stats
.smt_station_status
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_status
;
2035 bp
->stats
.smt_peer_wrap_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_peer_wrap_flag
;
2036 bp
->stats
.smt_time_stamp
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_msg_time_stamp
.ls
;
2037 bp
->stats
.smt_transition_time_stamp
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_transition_time_stamp
.ls
;
2038 bp
->stats
.mac_frame_status_functions
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_status_functions
;
2039 bp
->stats
.mac_t_max_capability
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_max_capability
;
2040 bp
->stats
.mac_tvx_capability
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_tvx_capability
;
2041 bp
->stats
.mac_available_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_available_paths
;
2042 bp
->stats
.mac_current_path
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_current_path
;
2043 memcpy(bp
->stats
.mac_upstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_upstream_nbr
, FDDI_K_ALEN
);
2044 memcpy(bp
->stats
.mac_downstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_downstream_nbr
, FDDI_K_ALEN
);
2045 memcpy(bp
->stats
.mac_old_upstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_old_upstream_nbr
, FDDI_K_ALEN
);
2046 memcpy(bp
->stats
.mac_old_downstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_old_downstream_nbr
, FDDI_K_ALEN
);
2047 bp
->stats
.mac_dup_address_test
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_dup_address_test
;
2048 bp
->stats
.mac_requested_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_requested_paths
;
2049 bp
->stats
.mac_downstream_port_type
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_downstream_port_type
;
2050 memcpy(bp
->stats
.mac_smt_address
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_smt_address
, FDDI_K_ALEN
);
2051 bp
->stats
.mac_t_req
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_req
;
2052 bp
->stats
.mac_t_neg
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_neg
;
2053 bp
->stats
.mac_t_max
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_max
;
2054 bp
->stats
.mac_tvx_value
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_tvx_value
;
2055 bp
->stats
.mac_frame_error_threshold
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_threshold
;
2056 bp
->stats
.mac_frame_error_ratio
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_ratio
;
2057 bp
->stats
.mac_rmt_state
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_rmt_state
;
2058 bp
->stats
.mac_da_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_da_flag
;
2059 bp
->stats
.mac_una_da_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_unda_flag
;
2060 bp
->stats
.mac_frame_error_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_flag
;
2061 bp
->stats
.mac_ma_unitdata_available
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_ma_unitdata_available
;
2062 bp
->stats
.mac_hardware_present
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_hardware_present
;
2063 bp
->stats
.mac_ma_unitdata_enable
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_ma_unitdata_enable
;
2064 bp
->stats
.path_tvx_lower_bound
= bp
->cmd_rsp_virt
->smt_mib_get
.path_tvx_lower_bound
;
2065 bp
->stats
.path_t_max_lower_bound
= bp
->cmd_rsp_virt
->smt_mib_get
.path_t_max_lower_bound
;
2066 bp
->stats
.path_max_t_req
= bp
->cmd_rsp_virt
->smt_mib_get
.path_max_t_req
;
2067 memcpy(bp
->stats
.path_configuration
, &bp
->cmd_rsp_virt
->smt_mib_get
.path_configuration
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.path_configuration
));
2068 bp
->stats
.port_my_type
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_my_type
[0];
2069 bp
->stats
.port_my_type
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_my_type
[1];
2070 bp
->stats
.port_neighbor_type
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_neighbor_type
[0];
2071 bp
->stats
.port_neighbor_type
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_neighbor_type
[1];
2072 bp
->stats
.port_connection_policies
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_policies
[0];
2073 bp
->stats
.port_connection_policies
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_policies
[1];
2074 bp
->stats
.port_mac_indicated
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_indicated
[0];
2075 bp
->stats
.port_mac_indicated
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_indicated
[1];
2076 bp
->stats
.port_current_path
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_current_path
[0];
2077 bp
->stats
.port_current_path
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_current_path
[1];
2078 memcpy(&bp
->stats
.port_requested_paths
[0*3], &bp
->cmd_rsp_virt
->smt_mib_get
.port_requested_paths
[0], 3);
2079 memcpy(&bp
->stats
.port_requested_paths
[1*3], &bp
->cmd_rsp_virt
->smt_mib_get
.port_requested_paths
[1], 3);
2080 bp
->stats
.port_mac_placement
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_placement
[0];
2081 bp
->stats
.port_mac_placement
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_placement
[1];
2082 bp
->stats
.port_available_paths
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_available_paths
[0];
2083 bp
->stats
.port_available_paths
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_available_paths
[1];
2084 bp
->stats
.port_pmd_class
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pmd_class
[0];
2085 bp
->stats
.port_pmd_class
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pmd_class
[1];
2086 bp
->stats
.port_connection_capabilities
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_capabilities
[0];
2087 bp
->stats
.port_connection_capabilities
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_capabilities
[1];
2088 bp
->stats
.port_bs_flag
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_bs_flag
[0];
2089 bp
->stats
.port_bs_flag
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_bs_flag
[1];
2090 bp
->stats
.port_ler_estimate
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_estimate
[0];
2091 bp
->stats
.port_ler_estimate
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_estimate
[1];
2092 bp
->stats
.port_ler_cutoff
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_cutoff
[0];
2093 bp
->stats
.port_ler_cutoff
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_cutoff
[1];
2094 bp
->stats
.port_ler_alarm
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_alarm
[0];
2095 bp
->stats
.port_ler_alarm
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_alarm
[1];
2096 bp
->stats
.port_connect_state
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connect_state
[0];
2097 bp
->stats
.port_connect_state
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connect_state
[1];
2098 bp
->stats
.port_pcm_state
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pcm_state
[0];
2099 bp
->stats
.port_pcm_state
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pcm_state
[1];
2100 bp
->stats
.port_pc_withhold
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pc_withhold
[0];
2101 bp
->stats
.port_pc_withhold
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pc_withhold
[1];
2102 bp
->stats
.port_ler_flag
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_flag
[0];
2103 bp
->stats
.port_ler_flag
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_flag
[1];
2104 bp
->stats
.port_hardware_present
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_hardware_present
[0];
2105 bp
->stats
.port_hardware_present
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_hardware_present
[1];
2107 /* Get FDDI counters */
2109 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_CNTRS_GET
;
2110 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2111 return((struct net_device_stats
*) &bp
->stats
);
2113 /* Fill the bp->stats structure with the FDDI counter values */
2115 bp
->stats
.mac_frame_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.frame_cnt
.ls
;
2116 bp
->stats
.mac_copied_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.copied_cnt
.ls
;
2117 bp
->stats
.mac_transmit_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.transmit_cnt
.ls
;
2118 bp
->stats
.mac_error_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.error_cnt
.ls
;
2119 bp
->stats
.mac_lost_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lost_cnt
.ls
;
2120 bp
->stats
.port_lct_fail_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lct_rejects
[0].ls
;
2121 bp
->stats
.port_lct_fail_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lct_rejects
[1].ls
;
2122 bp
->stats
.port_lem_reject_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lem_rejects
[0].ls
;
2123 bp
->stats
.port_lem_reject_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lem_rejects
[1].ls
;
2124 bp
->stats
.port_lem_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.link_errors
[0].ls
;
2125 bp
->stats
.port_lem_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.link_errors
[1].ls
;
2127 return((struct net_device_stats
*) &bp
->stats
);
2132 * ==============================
2133 * = dfx_ctl_set_multicast_list =
2134 * ==============================
2137 * Enable/Disable LLC frame promiscuous mode reception
2138 * on the adapter and/or update multicast address table.
2144 * dev - pointer to device information
2146 * Functional Description:
2147 * This routine follows a fairly simple algorithm for setting the
2148 * adapter filters and CAM:
2150 * if IFF_PROMISC flag is set
2151 * enable LLC individual/group promiscuous mode
2153 * disable LLC individual/group promiscuous mode
2154 * if number of incoming multicast addresses >
2155 * (CAM max size - number of unicast addresses in CAM)
2156 * enable LLC group promiscuous mode
2157 * set driver-maintained multicast address count to zero
2159 * disable LLC group promiscuous mode
2160 * set driver-maintained multicast address count to incoming count
2161 * update adapter CAM
2162 * update adapter filters
2168 * Multicast addresses are presented in canonical (LSB) format.
2171 * On-board adapter CAM and filters are updated.
2174 static void dfx_ctl_set_multicast_list(struct net_device
*dev
)
2176 DFX_board_t
*bp
= netdev_priv(dev
);
2177 int i
; /* used as index in for loop */
2178 struct netdev_hw_addr
*ha
;
2180 /* Enable LLC frame promiscuous mode, if necessary */
2182 if (dev
->flags
& IFF_PROMISC
)
2183 bp
->ind_group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC ind/group prom mode */
2185 /* Else, update multicast address table */
2189 bp
->ind_group_prom
= PI_FSTATE_K_BLOCK
; /* Disable LLC ind/group prom mode */
2191 * Check whether incoming multicast address count exceeds table size
2193 * Note: The adapters utilize an on-board 64 entry CAM for
2194 * supporting perfect filtering of multicast packets
2195 * and bridge functions when adding unicast addresses.
2196 * There is no hash function available. To support
2197 * additional multicast addresses, the all multicast
2198 * filter (LLC group promiscuous mode) must be enabled.
2200 * The firmware reserves two CAM entries for SMT-related
2201 * multicast addresses, which leaves 62 entries available.
2202 * The following code ensures that we're not being asked
2203 * to add more than 62 addresses to the CAM. If we are,
2204 * the driver will enable the all multicast filter.
2205 * Should the number of multicast addresses drop below
2206 * the high water mark, the filter will be disabled and
2207 * perfect filtering will be used.
2210 if (netdev_mc_count(dev
) > (PI_CMD_ADDR_FILTER_K_SIZE
- bp
->uc_count
))
2212 bp
->group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC group prom mode */
2213 bp
->mc_count
= 0; /* Don't add mc addrs to CAM */
2217 bp
->group_prom
= PI_FSTATE_K_BLOCK
; /* Disable LLC group prom mode */
2218 bp
->mc_count
= netdev_mc_count(dev
); /* Add mc addrs to CAM */
2221 /* Copy addresses to multicast address table, then update adapter CAM */
2224 netdev_for_each_mc_addr(ha
, dev
)
2225 memcpy(&bp
->mc_table
[i
++ * FDDI_K_ALEN
],
2226 ha
->addr
, FDDI_K_ALEN
);
2228 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
2230 DBG_printk("%s: Could not update multicast address table!\n", dev
->name
);
2234 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev
->name
, bp
->mc_count
);
2238 /* Update adapter filters */
2240 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
2242 DBG_printk("%s: Could not update adapter filters!\n", dev
->name
);
2246 DBG_printk("%s: Adapter filters updated!\n", dev
->name
);
2252 * ===========================
2253 * = dfx_ctl_set_mac_address =
2254 * ===========================
2257 * Add node address override (unicast address) to adapter
2258 * CAM and update dev_addr field in device table.
2264 * dev - pointer to device information
2265 * addr - pointer to sockaddr structure containing unicast address to add
2267 * Functional Description:
2268 * The adapter supports node address overrides by adding one or more
2269 * unicast addresses to the adapter CAM. This is similar to adding
2270 * multicast addresses. In this routine we'll update the driver and
2271 * device structures with the new address, then update the adapter CAM
2272 * to ensure that the adapter will copy and strip frames destined and
2273 * sourced by that address.
2276 * Always returns zero.
2279 * The address pointed to by addr->sa_data is a valid unicast
2280 * address and is presented in canonical (LSB) format.
2283 * On-board adapter CAM is updated. On-board adapter filters
2287 static int dfx_ctl_set_mac_address(struct net_device
*dev
, void *addr
)
2289 struct sockaddr
*p_sockaddr
= (struct sockaddr
*)addr
;
2290 DFX_board_t
*bp
= netdev_priv(dev
);
2292 /* Copy unicast address to driver-maintained structs and update count */
2294 memcpy(dev
->dev_addr
, p_sockaddr
->sa_data
, FDDI_K_ALEN
); /* update device struct */
2295 memcpy(&bp
->uc_table
[0], p_sockaddr
->sa_data
, FDDI_K_ALEN
); /* update driver struct */
2299 * Verify we're not exceeding the CAM size by adding unicast address
2301 * Note: It's possible that before entering this routine we've
2302 * already filled the CAM with 62 multicast addresses.
2303 * Since we need to place the node address override into
2304 * the CAM, we have to check to see that we're not
2305 * exceeding the CAM size. If we are, we have to enable
2306 * the LLC group (multicast) promiscuous mode filter as
2307 * in dfx_ctl_set_multicast_list.
2310 if ((bp
->uc_count
+ bp
->mc_count
) > PI_CMD_ADDR_FILTER_K_SIZE
)
2312 bp
->group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC group prom mode */
2313 bp
->mc_count
= 0; /* Don't add mc addrs to CAM */
2315 /* Update adapter filters */
2317 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
2319 DBG_printk("%s: Could not update adapter filters!\n", dev
->name
);
2323 DBG_printk("%s: Adapter filters updated!\n", dev
->name
);
2327 /* Update adapter CAM with new unicast address */
2329 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
2331 DBG_printk("%s: Could not set new MAC address!\n", dev
->name
);
2335 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev
->name
);
2337 return(0); /* always return zero */
2342 * ======================
2343 * = dfx_ctl_update_cam =
2344 * ======================
2347 * Procedure to update adapter CAM (Content Addressable Memory)
2348 * with desired unicast and multicast address entries.
2354 * bp - pointer to board information
2356 * Functional Description:
2357 * Updates adapter CAM with current contents of board structure
2358 * unicast and multicast address tables. Since there are only 62
2359 * free entries in CAM, this routine ensures that the command
2360 * request buffer is not overrun.
2363 * DFX_K_SUCCESS - Request succeeded
2364 * DFX_K_FAILURE - Request failed
2367 * All addresses being added (unicast and multicast) are in canonical
2371 * On-board adapter CAM is updated.
2374 static int dfx_ctl_update_cam(DFX_board_t
*bp
)
2376 int i
; /* used as index */
2377 PI_LAN_ADDR
*p_addr
; /* pointer to CAM entry */
2380 * Fill in command request information
2382 * Note: Even though both the unicast and multicast address
2383 * table entries are stored as contiguous 6 byte entries,
2384 * the firmware address filter set command expects each
2385 * entry to be two longwords (8 bytes total). We must be
2386 * careful to only copy the six bytes of each unicast and
2387 * multicast table entry into each command entry. This
2388 * is also why we must first clear the entire command
2392 memset(bp
->cmd_req_virt
, 0, PI_CMD_REQ_K_SIZE_MAX
); /* first clear buffer */
2393 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_ADDR_FILTER_SET
;
2394 p_addr
= &bp
->cmd_req_virt
->addr_filter_set
.entry
[0];
2396 /* Now add unicast addresses to command request buffer, if any */
2398 for (i
=0; i
< (int)bp
->uc_count
; i
++)
2400 if (i
< PI_CMD_ADDR_FILTER_K_SIZE
)
2402 memcpy(p_addr
, &bp
->uc_table
[i
*FDDI_K_ALEN
], FDDI_K_ALEN
);
2403 p_addr
++; /* point to next command entry */
2407 /* Now add multicast addresses to command request buffer, if any */
2409 for (i
=0; i
< (int)bp
->mc_count
; i
++)
2411 if ((i
+ bp
->uc_count
) < PI_CMD_ADDR_FILTER_K_SIZE
)
2413 memcpy(p_addr
, &bp
->mc_table
[i
*FDDI_K_ALEN
], FDDI_K_ALEN
);
2414 p_addr
++; /* point to next command entry */
2418 /* Issue command to update adapter CAM, then return */
2420 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2421 return(DFX_K_FAILURE
);
2422 return(DFX_K_SUCCESS
);
2427 * ==========================
2428 * = dfx_ctl_update_filters =
2429 * ==========================
2432 * Procedure to update adapter filters with desired
2439 * bp - pointer to board information
2441 * Functional Description:
2442 * Enables or disables filter using current filter settings.
2445 * DFX_K_SUCCESS - Request succeeded.
2446 * DFX_K_FAILURE - Request failed.
2449 * We must always pass up packets destined to the broadcast
2450 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2451 * broadcast filter enabled.
2454 * On-board adapter filters are updated.
2457 static int dfx_ctl_update_filters(DFX_board_t
*bp
)
2459 int i
= 0; /* used as index */
2461 /* Fill in command request information */
2463 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_FILTERS_SET
;
2465 /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2467 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_BROADCAST
;
2468 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= PI_FSTATE_K_PASS
;
2470 /* Initialize LLC Individual/Group Promiscuous filter */
2472 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_IND_GROUP_PROM
;
2473 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= bp
->ind_group_prom
;
2475 /* Initialize LLC Group Promiscuous filter */
2477 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_GROUP_PROM
;
2478 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= bp
->group_prom
;
2480 /* Terminate the item code list */
2482 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_EOL
;
2484 /* Issue command to update adapter filters, then return */
2486 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2487 return(DFX_K_FAILURE
);
2488 return(DFX_K_SUCCESS
);
2493 * ======================
2494 * = dfx_hw_dma_cmd_req =
2495 * ======================
2498 * Sends PDQ DMA command to adapter firmware
2504 * bp - pointer to board information
2506 * Functional Description:
2507 * The command request and response buffers are posted to the adapter in the manner
2508 * described in the PDQ Port Specification:
2510 * 1. Command Response Buffer is posted to adapter.
2511 * 2. Command Request Buffer is posted to adapter.
2512 * 3. Command Request consumer index is polled until it indicates that request
2513 * buffer has been DMA'd to adapter.
2514 * 4. Command Response consumer index is polled until it indicates that response
2515 * buffer has been DMA'd from adapter.
2517 * This ordering ensures that a response buffer is already available for the firmware
2518 * to use once it's done processing the request buffer.
2521 * DFX_K_SUCCESS - DMA command succeeded
2522 * DFX_K_OUTSTATE - Adapter is NOT in proper state
2523 * DFX_K_HW_TIMEOUT - DMA command timed out
2526 * Command request buffer has already been filled with desired DMA command.
2532 static int dfx_hw_dma_cmd_req(DFX_board_t
*bp
)
2534 int status
; /* adapter status */
2535 int timeout_cnt
; /* used in for loops */
2537 /* Make sure the adapter is in a state that we can issue the DMA command in */
2539 status
= dfx_hw_adap_state_rd(bp
);
2540 if ((status
== PI_STATE_K_RESET
) ||
2541 (status
== PI_STATE_K_HALTED
) ||
2542 (status
== PI_STATE_K_DMA_UNAVAIL
) ||
2543 (status
== PI_STATE_K_UPGRADE
))
2544 return(DFX_K_OUTSTATE
);
2546 /* Put response buffer on the command response queue */
2548 bp
->descr_block_virt
->cmd_rsp
[bp
->cmd_rsp_reg
.index
.prod
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2549 ((PI_CMD_RSP_K_SIZE_MAX
/ PI_ALIGN_K_CMD_RSP_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2550 bp
->descr_block_virt
->cmd_rsp
[bp
->cmd_rsp_reg
.index
.prod
].long_1
= bp
->cmd_rsp_phys
;
2552 /* Bump (and wrap) the producer index and write out to register */
2554 bp
->cmd_rsp_reg
.index
.prod
+= 1;
2555 bp
->cmd_rsp_reg
.index
.prod
&= PI_CMD_RSP_K_NUM_ENTRIES
-1;
2556 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_RSP_PROD
, bp
->cmd_rsp_reg
.lword
);
2558 /* Put request buffer on the command request queue */
2560 bp
->descr_block_virt
->cmd_req
[bp
->cmd_req_reg
.index
.prod
].long_0
= (u32
) (PI_XMT_DESCR_M_SOP
|
2561 PI_XMT_DESCR_M_EOP
| (PI_CMD_REQ_K_SIZE_MAX
<< PI_XMT_DESCR_V_SEG_LEN
));
2562 bp
->descr_block_virt
->cmd_req
[bp
->cmd_req_reg
.index
.prod
].long_1
= bp
->cmd_req_phys
;
2564 /* Bump (and wrap) the producer index and write out to register */
2566 bp
->cmd_req_reg
.index
.prod
+= 1;
2567 bp
->cmd_req_reg
.index
.prod
&= PI_CMD_REQ_K_NUM_ENTRIES
-1;
2568 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_REQ_PROD
, bp
->cmd_req_reg
.lword
);
2571 * Here we wait for the command request consumer index to be equal
2572 * to the producer, indicating that the adapter has DMAed the request.
2575 for (timeout_cnt
= 20000; timeout_cnt
> 0; timeout_cnt
--)
2577 if (bp
->cmd_req_reg
.index
.prod
== (u8
)(bp
->cons_block_virt
->cmd_req
))
2579 udelay(100); /* wait for 100 microseconds */
2581 if (timeout_cnt
== 0)
2582 return(DFX_K_HW_TIMEOUT
);
2584 /* Bump (and wrap) the completion index and write out to register */
2586 bp
->cmd_req_reg
.index
.comp
+= 1;
2587 bp
->cmd_req_reg
.index
.comp
&= PI_CMD_REQ_K_NUM_ENTRIES
-1;
2588 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_REQ_PROD
, bp
->cmd_req_reg
.lword
);
2591 * Here we wait for the command response consumer index to be equal
2592 * to the producer, indicating that the adapter has DMAed the response.
2595 for (timeout_cnt
= 20000; timeout_cnt
> 0; timeout_cnt
--)
2597 if (bp
->cmd_rsp_reg
.index
.prod
== (u8
)(bp
->cons_block_virt
->cmd_rsp
))
2599 udelay(100); /* wait for 100 microseconds */
2601 if (timeout_cnt
== 0)
2602 return(DFX_K_HW_TIMEOUT
);
2604 /* Bump (and wrap) the completion index and write out to register */
2606 bp
->cmd_rsp_reg
.index
.comp
+= 1;
2607 bp
->cmd_rsp_reg
.index
.comp
&= PI_CMD_RSP_K_NUM_ENTRIES
-1;
2608 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_RSP_PROD
, bp
->cmd_rsp_reg
.lword
);
2609 return(DFX_K_SUCCESS
);
2614 * ========================
2615 * = dfx_hw_port_ctrl_req =
2616 * ========================
2619 * Sends PDQ port control command to adapter firmware
2622 * Host data register value in host_data if ptr is not NULL
2625 * bp - pointer to board information
2626 * command - port control command
2627 * data_a - port data A register value
2628 * data_b - port data B register value
2629 * host_data - ptr to host data register value
2631 * Functional Description:
2632 * Send generic port control command to adapter by writing
2633 * to various PDQ port registers, then polling for completion.
2636 * DFX_K_SUCCESS - port control command succeeded
2637 * DFX_K_HW_TIMEOUT - port control command timed out
2646 static int dfx_hw_port_ctrl_req(
2651 PI_UINT32
*host_data
2655 PI_UINT32 port_cmd
; /* Port Control command register value */
2656 int timeout_cnt
; /* used in for loops */
2658 /* Set Command Error bit in command longword */
2660 port_cmd
= (PI_UINT32
) (command
| PI_PCTRL_M_CMD_ERROR
);
2662 /* Issue port command to the adapter */
2664 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_A
, data_a
);
2665 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_B
, data_b
);
2666 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_CTRL
, port_cmd
);
2668 /* Now wait for command to complete */
2670 if (command
== PI_PCTRL_M_BLAST_FLASH
)
2671 timeout_cnt
= 600000; /* set command timeout count to 60 seconds */
2673 timeout_cnt
= 20000; /* set command timeout count to 2 seconds */
2675 for (; timeout_cnt
> 0; timeout_cnt
--)
2677 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_CTRL
, &port_cmd
);
2678 if (!(port_cmd
& PI_PCTRL_M_CMD_ERROR
))
2680 udelay(100); /* wait for 100 microseconds */
2682 if (timeout_cnt
== 0)
2683 return(DFX_K_HW_TIMEOUT
);
2686 * If the address of host_data is non-zero, assume caller has supplied a
2687 * non NULL pointer, and return the contents of the HOST_DATA register in
2691 if (host_data
!= NULL
)
2692 dfx_port_read_long(bp
, PI_PDQ_K_REG_HOST_DATA
, host_data
);
2693 return(DFX_K_SUCCESS
);
2698 * =====================
2699 * = dfx_hw_adap_reset =
2700 * =====================
2709 * bp - pointer to board information
2710 * type - type of reset to perform
2712 * Functional Description:
2713 * Issue soft reset to adapter by writing to PDQ Port Reset
2714 * register. Use incoming reset type to tell adapter what
2715 * kind of reset operation to perform.
2721 * This routine merely issues a soft reset to the adapter.
2722 * It is expected that after this routine returns, the caller
2723 * will appropriately poll the Port Status register for the
2724 * adapter to enter the proper state.
2727 * Internal adapter registers are cleared.
2730 static void dfx_hw_adap_reset(
2736 /* Set Reset type and assert reset */
2738 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_A
, type
); /* tell adapter type of reset */
2739 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_RESET
, PI_RESET_M_ASSERT_RESET
);
2741 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2745 /* Deassert reset */
2747 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_RESET
, 0);
2752 * ========================
2753 * = dfx_hw_adap_state_rd =
2754 * ========================
2757 * Returns current adapter state
2760 * Adapter state per PDQ Port Specification
2763 * bp - pointer to board information
2765 * Functional Description:
2766 * Reads PDQ Port Status register and returns adapter state.
2778 static int dfx_hw_adap_state_rd(DFX_board_t
*bp
)
2780 PI_UINT32 port_status
; /* Port Status register value */
2782 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
2783 return((port_status
& PI_PSTATUS_M_STATE
) >> PI_PSTATUS_V_STATE
);
2788 * =====================
2789 * = dfx_hw_dma_uninit =
2790 * =====================
2793 * Brings adapter to DMA_UNAVAILABLE state
2799 * bp - pointer to board information
2800 * type - type of reset to perform
2802 * Functional Description:
2803 * Bring adapter to DMA_UNAVAILABLE state by performing the following:
2804 * 1. Set reset type bit in Port Data A Register then reset adapter.
2805 * 2. Check that adapter is in DMA_UNAVAILABLE state.
2808 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state
2809 * DFX_K_HW_TIMEOUT - adapter did not reset properly
2815 * Internal adapter registers are cleared.
2818 static int dfx_hw_dma_uninit(DFX_board_t
*bp
, PI_UINT32 type
)
2820 int timeout_cnt
; /* used in for loops */
2822 /* Set reset type bit and reset adapter */
2824 dfx_hw_adap_reset(bp
, type
);
2826 /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2828 for (timeout_cnt
= 100000; timeout_cnt
> 0; timeout_cnt
--)
2830 if (dfx_hw_adap_state_rd(bp
) == PI_STATE_K_DMA_UNAVAIL
)
2832 udelay(100); /* wait for 100 microseconds */
2834 if (timeout_cnt
== 0)
2835 return(DFX_K_HW_TIMEOUT
);
2836 return(DFX_K_SUCCESS
);
2840 * Align an sk_buff to a boundary power of 2
2844 static void my_skb_align(struct sk_buff
*skb
, int n
)
2846 unsigned long x
= (unsigned long)skb
->data
;
2849 v
= ALIGN(x
, n
); /* Where we want to be */
2851 skb_reserve(skb
, v
- x
);
2861 * Produces buffers to adapter LLC Host receive descriptor block
2867 * bp - pointer to board information
2868 * get_buffers - non-zero if buffers to be allocated
2870 * Functional Description:
2871 * This routine can be called during dfx_adap_init() or during an adapter
2872 * reset. It initializes the descriptor block and produces all allocated
2873 * LLC Host queue receive buffers.
2876 * Return 0 on success or -ENOMEM if buffer allocation failed (when using
2877 * dynamic buffer allocation). If the buffer allocation failed, the
2878 * already allocated buffers will not be released and the caller should do
2882 * The PDQ has been reset and the adapter and driver maintained Type 2
2883 * register indices are cleared.
2886 * Receive buffers are posted to the adapter LLC queue and the adapter
2890 static int dfx_rcv_init(DFX_board_t
*bp
, int get_buffers
)
2892 int i
, j
; /* used in for loop */
2895 * Since each receive buffer is a single fragment of same length, initialize
2896 * first longword in each receive descriptor for entire LLC Host descriptor
2897 * block. Also initialize second longword in each receive descriptor with
2898 * physical address of receive buffer. We'll always allocate receive
2899 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2900 * block and produce new receive buffers by simply updating the receive
2904 * To support all shipping versions of PDQ, the receive buffer size
2905 * must be mod 128 in length and the physical address must be 128 byte
2906 * aligned. In other words, bits 0-6 of the length and address must
2907 * be zero for the following descriptor field entries to be correct on
2908 * all PDQ-based boards. We guaranteed both requirements during
2909 * driver initialization when we allocated memory for the receive buffers.
2913 #ifdef DYNAMIC_BUFFERS
2914 for (i
= 0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
2915 for (j
= 0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
2917 struct sk_buff
*newskb
= __netdev_alloc_skb(bp
->dev
, NEW_SKB_SIZE
, GFP_NOIO
);
2920 bp
->descr_block_virt
->rcv_data
[i
+j
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2921 ((PI_RCV_DATA_K_SIZE_MAX
/ PI_ALIGN_K_RCV_DATA_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2923 * align to 128 bytes for compatibility with
2924 * the old EISA boards.
2927 my_skb_align(newskb
, 128);
2928 bp
->descr_block_virt
->rcv_data
[i
+ j
].long_1
=
2929 (u32
)dma_map_single(bp
->bus_dev
, newskb
->data
,
2933 * p_rcv_buff_va is only used inside the
2934 * kernel so we put the skb pointer here.
2936 bp
->p_rcv_buff_va
[i
+j
] = (char *) newskb
;
2939 for (i
=0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
2940 for (j
=0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
2942 bp
->descr_block_virt
->rcv_data
[i
+j
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2943 ((PI_RCV_DATA_K_SIZE_MAX
/ PI_ALIGN_K_RCV_DATA_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2944 bp
->descr_block_virt
->rcv_data
[i
+j
].long_1
= (u32
) (bp
->rcv_block_phys
+ (i
* PI_RCV_DATA_K_SIZE_MAX
));
2945 bp
->p_rcv_buff_va
[i
+j
] = (char *) (bp
->rcv_block_virt
+ (i
* PI_RCV_DATA_K_SIZE_MAX
));
2950 /* Update receive producer and Type 2 register */
2952 bp
->rcv_xmt_reg
.index
.rcv_prod
= bp
->rcv_bufs_to_post
;
2953 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
2959 * =========================
2960 * = dfx_rcv_queue_process =
2961 * =========================
2964 * Process received LLC frames.
2970 * bp - pointer to board information
2972 * Functional Description:
2973 * Received LLC frames are processed until there are no more consumed frames.
2974 * Once all frames are processed, the receive buffers are returned to the
2975 * adapter. Note that this algorithm fixes the length of time that can be spent
2976 * in this routine, because there are a fixed number of receive buffers to
2977 * process and buffers are not produced until this routine exits and returns
2990 static void dfx_rcv_queue_process(
2995 PI_TYPE_2_CONSUMER
*p_type_2_cons
; /* ptr to rcv/xmt consumer block register */
2996 char *p_buff
; /* ptr to start of packet receive buffer (FMC descriptor) */
2997 u32 descr
, pkt_len
; /* FMC descriptor field and packet length */
2998 struct sk_buff
*skb
; /* pointer to a sk_buff to hold incoming packet data */
3000 /* Service all consumed LLC receive frames */
3002 p_type_2_cons
= (PI_TYPE_2_CONSUMER
*)(&bp
->cons_block_virt
->xmt_rcv_data
);
3003 while (bp
->rcv_xmt_reg
.index
.rcv_comp
!= p_type_2_cons
->index
.rcv_cons
)
3005 /* Process any errors */
3009 entry
= bp
->rcv_xmt_reg
.index
.rcv_comp
;
3010 #ifdef DYNAMIC_BUFFERS
3011 p_buff
= (char *) (((struct sk_buff
*)bp
->p_rcv_buff_va
[entry
])->data
);
3013 p_buff
= (char *) bp
->p_rcv_buff_va
[entry
];
3015 memcpy(&descr
, p_buff
+ RCV_BUFF_K_DESCR
, sizeof(u32
));
3017 if (descr
& PI_FMC_DESCR_M_RCC_FLUSH
)
3019 if (descr
& PI_FMC_DESCR_M_RCC_CRC
)
3020 bp
->rcv_crc_errors
++;
3022 bp
->rcv_frame_status_errors
++;
3026 int rx_in_place
= 0;
3028 /* The frame was received without errors - verify packet length */
3030 pkt_len
= (u32
)((descr
& PI_FMC_DESCR_M_LEN
) >> PI_FMC_DESCR_V_LEN
);
3031 pkt_len
-= 4; /* subtract 4 byte CRC */
3032 if (!IN_RANGE(pkt_len
, FDDI_K_LLC_ZLEN
, FDDI_K_LLC_LEN
))
3033 bp
->rcv_length_errors
++;
3035 #ifdef DYNAMIC_BUFFERS
3036 if (pkt_len
> SKBUFF_RX_COPYBREAK
) {
3037 struct sk_buff
*newskb
;
3039 newskb
= dev_alloc_skb(NEW_SKB_SIZE
);
3043 my_skb_align(newskb
, 128);
3044 skb
= (struct sk_buff
*)bp
->p_rcv_buff_va
[entry
];
3045 dma_unmap_single(bp
->bus_dev
,
3046 bp
->descr_block_virt
->rcv_data
[entry
].long_1
,
3049 skb_reserve(skb
, RCV_BUFF_K_PADDING
);
3050 bp
->p_rcv_buff_va
[entry
] = (char *)newskb
;
3051 bp
->descr_block_virt
->rcv_data
[entry
].long_1
=
3052 (u32
)dma_map_single(bp
->bus_dev
,
3060 skb
= dev_alloc_skb(pkt_len
+3); /* alloc new buffer to pass up, add room for PRH */
3063 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp
->dev
->name
);
3068 #ifndef DYNAMIC_BUFFERS
3072 /* Receive buffer allocated, pass receive packet up */
3074 skb_copy_to_linear_data(skb
,
3075 p_buff
+ RCV_BUFF_K_PADDING
,
3079 skb_reserve(skb
,3); /* adjust data field so that it points to FC byte */
3080 skb_put(skb
, pkt_len
); /* pass up packet length, NOT including CRC */
3081 skb
->protocol
= fddi_type_trans(skb
, bp
->dev
);
3082 bp
->rcv_total_bytes
+= skb
->len
;
3085 /* Update the rcv counters */
3086 bp
->rcv_total_frames
++;
3087 if (*(p_buff
+ RCV_BUFF_K_DA
) & 0x01)
3088 bp
->rcv_multicast_frames
++;
3094 * Advance the producer (for recycling) and advance the completion
3095 * (for servicing received frames). Note that it is okay to
3096 * advance the producer without checking that it passes the
3097 * completion index because they are both advanced at the same
3101 bp
->rcv_xmt_reg
.index
.rcv_prod
+= 1;
3102 bp
->rcv_xmt_reg
.index
.rcv_comp
+= 1;
3108 * =====================
3109 * = dfx_xmt_queue_pkt =
3110 * =====================
3113 * Queues packets for transmission
3119 * skb - pointer to sk_buff to queue for transmission
3120 * dev - pointer to device information
3122 * Functional Description:
3123 * Here we assume that an incoming skb transmit request
3124 * is contained in a single physically contiguous buffer
3125 * in which the virtual address of the start of packet
3126 * (skb->data) can be converted to a physical address
3127 * by using pci_map_single().
3129 * Since the adapter architecture requires a three byte
3130 * packet request header to prepend the start of packet,
3131 * we'll write the three byte field immediately prior to
3132 * the FC byte. This assumption is valid because we've
3133 * ensured that dev->hard_header_len includes three pad
3134 * bytes. By posting a single fragment to the adapter,
3135 * we'll reduce the number of descriptor fetches and
3136 * bus traffic needed to send the request.
3138 * Also, we can't free the skb until after it's been DMA'd
3139 * out by the adapter, so we'll queue it in the driver and
3140 * return it in dfx_xmt_done.
3143 * 0 - driver queued packet, link is unavailable, or skbuff was bad
3144 * 1 - caller should requeue the sk_buff for later transmission
3147 * First and foremost, we assume the incoming skb pointer
3148 * is NOT NULL and is pointing to a valid sk_buff structure.
3150 * The outgoing packet is complete, starting with the
3151 * frame control byte including the last byte of data,
3152 * but NOT including the 4 byte CRC. We'll let the
3153 * adapter hardware generate and append the CRC.
3155 * The entire packet is stored in one physically
3156 * contiguous buffer which is not cached and whose
3157 * 32-bit physical address can be determined.
3159 * It's vital that this routine is NOT reentered for the
3160 * same board and that the OS is not in another section of
3161 * code (eg. dfx_int_common) for the same board on a
3168 static netdev_tx_t
dfx_xmt_queue_pkt(struct sk_buff
*skb
,
3169 struct net_device
*dev
)
3171 DFX_board_t
*bp
= netdev_priv(dev
);
3172 u8 prod
; /* local transmit producer index */
3173 PI_XMT_DESCR
*p_xmt_descr
; /* ptr to transmit descriptor block entry */
3174 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3175 unsigned long flags
;
3177 netif_stop_queue(dev
);
3180 * Verify that incoming transmit request is OK
3182 * Note: The packet size check is consistent with other
3183 * Linux device drivers, although the correct packet
3184 * size should be verified before calling the
3188 if (!IN_RANGE(skb
->len
, FDDI_K_LLC_ZLEN
, FDDI_K_LLC_LEN
))
3190 printk("%s: Invalid packet length - %u bytes\n",
3191 dev
->name
, skb
->len
);
3192 bp
->xmt_length_errors
++; /* bump error counter */
3193 netif_wake_queue(dev
);
3195 return NETDEV_TX_OK
; /* return "success" */
3198 * See if adapter link is available, if not, free buffer
3200 * Note: If the link isn't available, free buffer and return 0
3201 * rather than tell the upper layer to requeue the packet.
3202 * The methodology here is that by the time the link
3203 * becomes available, the packet to be sent will be
3204 * fairly stale. By simply dropping the packet, the
3205 * higher layer protocols will eventually time out
3206 * waiting for response packets which it won't receive.
3209 if (bp
->link_available
== PI_K_FALSE
)
3211 if (dfx_hw_adap_state_rd(bp
) == PI_STATE_K_LINK_AVAIL
) /* is link really available? */
3212 bp
->link_available
= PI_K_TRUE
; /* if so, set flag and continue */
3215 bp
->xmt_discards
++; /* bump error counter */
3216 dev_kfree_skb(skb
); /* free sk_buff now */
3217 netif_wake_queue(dev
);
3218 return NETDEV_TX_OK
; /* return "success" */
3222 spin_lock_irqsave(&bp
->lock
, flags
);
3224 /* Get the current producer and the next free xmt data descriptor */
3226 prod
= bp
->rcv_xmt_reg
.index
.xmt_prod
;
3227 p_xmt_descr
= &(bp
->descr_block_virt
->xmt_data
[prod
]);
3230 * Get pointer to auxiliary queue entry to contain information
3233 * Note: The current xmt producer index will become the
3234 * current xmt completion index when we complete this
3235 * packet later on. So, we'll get the pointer to the
3236 * next auxiliary queue entry now before we bump the
3240 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[prod
++]); /* also bump producer index */
3242 /* Write the three PRH bytes immediately before the FC byte */
3245 skb
->data
[0] = DFX_PRH0_BYTE
; /* these byte values are defined */
3246 skb
->data
[1] = DFX_PRH1_BYTE
; /* in the Motorola FDDI MAC chip */
3247 skb
->data
[2] = DFX_PRH2_BYTE
; /* specification */
3250 * Write the descriptor with buffer info and bump producer
3252 * Note: Since we need to start DMA from the packet request
3253 * header, we'll add 3 bytes to the DMA buffer length,
3254 * and we'll determine the physical address of the
3255 * buffer from the PRH, not skb->data.
3258 * 1. Packet starts with the frame control (FC) byte
3260 * 2. The 4-byte CRC is not appended to the buffer or
3261 * included in the length.
3262 * 3. Packet length (skb->len) is from FC to end of
3264 * 4. The packet length does not exceed the maximum
3265 * FDDI LLC frame length of 4491 bytes.
3266 * 5. The entire packet is contained in a physically
3267 * contiguous, non-cached, locked memory space
3268 * comprised of a single buffer pointed to by
3270 * 6. The physical address of the start of packet
3271 * can be determined from the virtual address
3272 * by using pci_map_single() and is only 32-bits
3276 p_xmt_descr
->long_0
= (u32
) (PI_XMT_DESCR_M_SOP
| PI_XMT_DESCR_M_EOP
| ((skb
->len
) << PI_XMT_DESCR_V_SEG_LEN
));
3277 p_xmt_descr
->long_1
= (u32
)dma_map_single(bp
->bus_dev
, skb
->data
,
3278 skb
->len
, DMA_TO_DEVICE
);
3281 * Verify that descriptor is actually available
3283 * Note: If descriptor isn't available, return 1 which tells
3284 * the upper layer to requeue the packet for later
3287 * We need to ensure that the producer never reaches the
3288 * completion, except to indicate that the queue is empty.
3291 if (prod
== bp
->rcv_xmt_reg
.index
.xmt_comp
)
3294 spin_unlock_irqrestore(&bp
->lock
, flags
);
3295 return NETDEV_TX_BUSY
; /* requeue packet for later */
3299 * Save info for this packet for xmt done indication routine
3301 * Normally, we'd save the producer index in the p_xmt_drv_descr
3302 * structure so that we'd have it handy when we complete this
3303 * packet later (in dfx_xmt_done). However, since the current
3304 * transmit architecture guarantees a single fragment for the
3305 * entire packet, we can simply bump the completion index by
3306 * one (1) for each completed packet.
3308 * Note: If this assumption changes and we're presented with
3309 * an inconsistent number of transmit fragments for packet
3310 * data, we'll need to modify this code to save the current
3311 * transmit producer index.
3314 p_xmt_drv_descr
->p_skb
= skb
;
3316 /* Update Type 2 register */
3318 bp
->rcv_xmt_reg
.index
.xmt_prod
= prod
;
3319 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
3320 spin_unlock_irqrestore(&bp
->lock
, flags
);
3321 netif_wake_queue(dev
);
3322 return NETDEV_TX_OK
; /* packet queued to adapter */
3332 * Processes all frames that have been transmitted.
3338 * bp - pointer to board information
3340 * Functional Description:
3341 * For all consumed transmit descriptors that have not
3342 * yet been completed, we'll free the skb we were holding
3343 * onto using dev_kfree_skb and bump the appropriate
3350 * The Type 2 register is not updated in this routine. It is
3351 * assumed that it will be updated in the ISR when dfx_xmt_done
3358 static int dfx_xmt_done(DFX_board_t
*bp
)
3360 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3361 PI_TYPE_2_CONSUMER
*p_type_2_cons
; /* ptr to rcv/xmt consumer block register */
3362 u8 comp
; /* local transmit completion index */
3363 int freed
= 0; /* buffers freed */
3365 /* Service all consumed transmit frames */
3367 p_type_2_cons
= (PI_TYPE_2_CONSUMER
*)(&bp
->cons_block_virt
->xmt_rcv_data
);
3368 while (bp
->rcv_xmt_reg
.index
.xmt_comp
!= p_type_2_cons
->index
.xmt_cons
)
3370 /* Get pointer to the transmit driver descriptor block information */
3372 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[bp
->rcv_xmt_reg
.index
.xmt_comp
]);
3374 /* Increment transmit counters */
3376 bp
->xmt_total_frames
++;
3377 bp
->xmt_total_bytes
+= p_xmt_drv_descr
->p_skb
->len
;
3379 /* Return skb to operating system */
3380 comp
= bp
->rcv_xmt_reg
.index
.xmt_comp
;
3381 dma_unmap_single(bp
->bus_dev
,
3382 bp
->descr_block_virt
->xmt_data
[comp
].long_1
,
3383 p_xmt_drv_descr
->p_skb
->len
,
3385 dev_kfree_skb_irq(p_xmt_drv_descr
->p_skb
);
3388 * Move to start of next packet by updating completion index
3390 * Here we assume that a transmit packet request is always
3391 * serviced by posting one fragment. We can therefore
3392 * simplify the completion code by incrementing the
3393 * completion index by one. This code will need to be
3394 * modified if this assumption changes. See comments
3395 * in dfx_xmt_queue_pkt for more details.
3398 bp
->rcv_xmt_reg
.index
.xmt_comp
+= 1;
3411 * Remove all skb's in the receive ring.
3417 * bp - pointer to board information
3419 * Functional Description:
3420 * Free's all the dynamically allocated skb's that are
3421 * currently attached to the device receive ring. This
3422 * function is typically only used when the device is
3423 * initialized or reinitialized.
3431 #ifdef DYNAMIC_BUFFERS
3432 static void dfx_rcv_flush( DFX_board_t
*bp
)
3436 for (i
= 0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
3437 for (j
= 0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
3439 struct sk_buff
*skb
;
3440 skb
= (struct sk_buff
*)bp
->p_rcv_buff_va
[i
+j
];
3443 bp
->p_rcv_buff_va
[i
+j
] = NULL
;
3448 static inline void dfx_rcv_flush( DFX_board_t
*bp
)
3451 #endif /* DYNAMIC_BUFFERS */
3459 * Processes all frames whether they've been transmitted
3466 * bp - pointer to board information
3468 * Functional Description:
3469 * For all produced transmit descriptors that have not
3470 * yet been completed, we'll free the skb we were holding
3471 * onto using dev_kfree_skb and bump the appropriate
3472 * counters. Of course, it's possible that some of
3473 * these transmit requests actually did go out, but we
3474 * won't make that distinction here. Finally, we'll
3475 * update the consumer index to match the producer.
3481 * This routine does NOT update the Type 2 register. It
3482 * is assumed that this routine is being called during a
3483 * transmit flush interrupt, or a shutdown or close routine.
3489 static void dfx_xmt_flush( DFX_board_t
*bp
)
3491 u32 prod_cons
; /* rcv/xmt consumer block longword */
3492 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3493 u8 comp
; /* local transmit completion index */
3495 /* Flush all outstanding transmit frames */
3497 while (bp
->rcv_xmt_reg
.index
.xmt_comp
!= bp
->rcv_xmt_reg
.index
.xmt_prod
)
3499 /* Get pointer to the transmit driver descriptor block information */
3501 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[bp
->rcv_xmt_reg
.index
.xmt_comp
]);
3503 /* Return skb to operating system */
3504 comp
= bp
->rcv_xmt_reg
.index
.xmt_comp
;
3505 dma_unmap_single(bp
->bus_dev
,
3506 bp
->descr_block_virt
->xmt_data
[comp
].long_1
,
3507 p_xmt_drv_descr
->p_skb
->len
,
3509 dev_kfree_skb(p_xmt_drv_descr
->p_skb
);
3511 /* Increment transmit error counter */
3516 * Move to start of next packet by updating completion index
3518 * Here we assume that a transmit packet request is always
3519 * serviced by posting one fragment. We can therefore
3520 * simplify the completion code by incrementing the
3521 * completion index by one. This code will need to be
3522 * modified if this assumption changes. See comments
3523 * in dfx_xmt_queue_pkt for more details.
3526 bp
->rcv_xmt_reg
.index
.xmt_comp
+= 1;
3529 /* Update the transmit consumer index in the consumer block */
3531 prod_cons
= (u32
)(bp
->cons_block_virt
->xmt_rcv_data
& ~PI_CONS_M_XMT_INDEX
);
3532 prod_cons
|= (u32
)(bp
->rcv_xmt_reg
.index
.xmt_prod
<< PI_CONS_V_XMT_INDEX
);
3533 bp
->cons_block_virt
->xmt_rcv_data
= prod_cons
;
3537 * ==================
3538 * = dfx_unregister =
3539 * ==================
3542 * Shuts down an FDDI controller
3548 * bdev - pointer to device information
3550 * Functional Description:
3556 * It compiles so it should work :-( (PCI cards do :-)
3559 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3562 static void __devexit
dfx_unregister(struct device
*bdev
)
3564 struct net_device
*dev
= dev_get_drvdata(bdev
);
3565 DFX_board_t
*bp
= netdev_priv(dev
);
3566 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
3567 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
3568 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
3569 resource_size_t bar_start
= 0; /* pointer to port */
3570 resource_size_t bar_len
= 0; /* resource length */
3571 int alloc_size
; /* total buffer size used */
3573 unregister_netdev(dev
);
3575 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
3576 PI_CMD_REQ_K_SIZE_MAX
+ PI_CMD_RSP_K_SIZE_MAX
+
3577 #ifndef DYNAMIC_BUFFERS
3578 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
3580 sizeof(PI_CONSUMER_BLOCK
) +
3581 (PI_ALIGN_K_DESC_BLK
- 1);
3583 dma_free_coherent(bdev
, alloc_size
,
3584 bp
->kmalloced
, bp
->kmalloced_dma
);
3586 dfx_bus_uninit(dev
);
3588 dfx_get_bars(bdev
, &bar_start
, &bar_len
);
3590 iounmap(bp
->base
.mem
);
3591 release_mem_region(bar_start
, bar_len
);
3593 release_region(bar_start
, bar_len
);
3596 pci_disable_device(to_pci_dev(bdev
));
3602 static int __devinit __maybe_unused
dfx_dev_register(struct device
*);
3603 static int __devexit __maybe_unused
dfx_dev_unregister(struct device
*);
3606 static int __devinit
dfx_pci_register(struct pci_dev
*,
3607 const struct pci_device_id
*);
3608 static void __devexit
dfx_pci_unregister(struct pci_dev
*);
3610 static DEFINE_PCI_DEVICE_TABLE(dfx_pci_table
) = {
3611 { PCI_DEVICE(PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_DEC_FDDI
) },
3614 MODULE_DEVICE_TABLE(pci
, dfx_pci_table
);
3616 static struct pci_driver dfx_pci_driver
= {
3618 .id_table
= dfx_pci_table
,
3619 .probe
= dfx_pci_register
,
3620 .remove
= __devexit_p(dfx_pci_unregister
),
3623 static __devinit
int dfx_pci_register(struct pci_dev
*pdev
,
3624 const struct pci_device_id
*ent
)
3626 return dfx_register(&pdev
->dev
);
3629 static void __devexit
dfx_pci_unregister(struct pci_dev
*pdev
)
3631 dfx_unregister(&pdev
->dev
);
3633 #endif /* CONFIG_PCI */
3636 static struct eisa_device_id dfx_eisa_table
[] = {
3637 { "DEC3001", DEFEA_PROD_ID_1
},
3638 { "DEC3002", DEFEA_PROD_ID_2
},
3639 { "DEC3003", DEFEA_PROD_ID_3
},
3640 { "DEC3004", DEFEA_PROD_ID_4
},
3643 MODULE_DEVICE_TABLE(eisa
, dfx_eisa_table
);
3645 static struct eisa_driver dfx_eisa_driver
= {
3646 .id_table
= dfx_eisa_table
,
3649 .bus
= &eisa_bus_type
,
3650 .probe
= dfx_dev_register
,
3651 .remove
= __devexit_p(dfx_dev_unregister
),
3654 #endif /* CONFIG_EISA */
3657 static struct tc_device_id
const dfx_tc_table
[] = {
3658 { "DEC ", "PMAF-FA " },
3659 { "DEC ", "PMAF-FD " },
3660 { "DEC ", "PMAF-FS " },
3661 { "DEC ", "PMAF-FU " },
3664 MODULE_DEVICE_TABLE(tc
, dfx_tc_table
);
3666 static struct tc_driver dfx_tc_driver
= {
3667 .id_table
= dfx_tc_table
,
3670 .bus
= &tc_bus_type
,
3671 .probe
= dfx_dev_register
,
3672 .remove
= __devexit_p(dfx_dev_unregister
),
3675 #endif /* CONFIG_TC */
3677 static int __devinit __maybe_unused
dfx_dev_register(struct device
*dev
)
3681 status
= dfx_register(dev
);
3687 static int __devexit __maybe_unused
dfx_dev_unregister(struct device
*dev
)
3690 dfx_unregister(dev
);
3695 static int __devinit
dfx_init(void)
3699 status
= pci_register_driver(&dfx_pci_driver
);
3701 status
= eisa_driver_register(&dfx_eisa_driver
);
3703 status
= tc_register_driver(&dfx_tc_driver
);
3707 static void __devexit
dfx_cleanup(void)
3709 tc_unregister_driver(&dfx_tc_driver
);
3710 eisa_driver_unregister(&dfx_eisa_driver
);
3711 pci_unregister_driver(&dfx_pci_driver
);
3714 module_init(dfx_init
);
3715 module_exit(dfx_cleanup
);
3716 MODULE_AUTHOR("Lawrence V. Stefani");
3717 MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
3718 DRV_VERSION
" " DRV_RELDATE
);
3719 MODULE_LICENSE("GPL");