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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / media / video / cx88 / cx88-dvb.c
blob04c6d06d98047813427db5014c72d8c9c980b4e5
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-simple.h"
49 #include "tda9887.h"
50 #include "s5h1411.h"
51 #include "stv0299.h"
52 #include "z0194a.h"
53 #include "stv0288.h"
54 #include "stb6000.h"
55 #include "cx24116.h"
56 #include "stv0900.h"
57 #include "stb6100.h"
58 #include "stb6100_proc.h"
59
60 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
61 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
62 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
63 MODULE_LICENSE("GPL");
64
65 static unsigned int debug;
66 module_param(debug, int, 0644);
67 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
68
69 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
70
71 #define dprintk(level,fmt, arg...) if (debug >= level) \
72 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
73
74 /* ------------------------------------------------------------------ */
75
76 static int dvb_buf_setup(struct videobuf_queue *q,
77 unsigned int *count, unsigned int *size)
78 {
79 struct cx8802_dev *dev = q->priv_data;
80
81 dev->ts_packet_size = 188 * 4;
82 dev->ts_packet_count = 32;
83
84 *size = dev->ts_packet_size * dev->ts_packet_count;
85 *count = 32;
86 return 0;
87 }
88
89 static int dvb_buf_prepare(struct videobuf_queue *q,
90 struct videobuf_buffer *vb, enum v4l2_field field)
91 {
92 struct cx8802_dev *dev = q->priv_data;
93 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
94 }
95
96 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
97 {
98 struct cx8802_dev *dev = q->priv_data;
99 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
100 }
101
102 static void dvb_buf_release(struct videobuf_queue *q,
103 struct videobuf_buffer *vb)
104 {
105 cx88_free_buffer(q, (struct cx88_buffer*)vb);
106 }
107
108 static struct videobuf_queue_ops dvb_qops = {
109 .buf_setup = dvb_buf_setup,
110 .buf_prepare = dvb_buf_prepare,
111 .buf_queue = dvb_buf_queue,
112 .buf_release = dvb_buf_release,
113 };
114
115 /* ------------------------------------------------------------------ */
116
117 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
118 {
119 struct cx8802_dev *dev= fe->dvb->priv;
120 struct cx8802_driver *drv = NULL;
121 int ret = 0;
122 int fe_id;
123
124 fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
125 if (!fe_id) {
126 printk(KERN_ERR "%s() No frontend found\n", __func__);
127 return -EINVAL;
128 }
129
130 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
131 if (drv) {
132 if (acquire){
133 dev->frontends.active_fe_id = fe_id;
134 ret = drv->request_acquire(drv);
135 } else {
136 ret = drv->request_release(drv);
137 dev->frontends.active_fe_id = 0;
138 }
139 }
140
141 return ret;
142 }
143
144 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
145 {
146 struct videobuf_dvb_frontends *f;
147 struct videobuf_dvb_frontend *fe;
148
149 if (!core->dvbdev)
150 return;
151
152 f = &core->dvbdev->frontends;
153
154 if (!f)
155 return;
156
157 if (f->gate <= 1) /* undefined or fe0 */
158 fe = videobuf_dvb_get_frontend(f, 1);
159 else
160 fe = videobuf_dvb_get_frontend(f, f->gate);
161
162 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
163 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
164 }
165
166 /* ------------------------------------------------------------------ */
167
168 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
169 {
170 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
171 static u8 reset [] = { RESET, 0x80 };
172 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
173 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
174 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
175 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
176
177 mt352_write(fe, clock_config, sizeof(clock_config));
178 udelay(200);
179 mt352_write(fe, reset, sizeof(reset));
180 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
181
182 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
183 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
184 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
185 return 0;
186 }
187
188 static int dvico_dual_demod_init(struct dvb_frontend *fe)
189 {
190 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
191 static u8 reset [] = { RESET, 0x80 };
192 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
193 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
194 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
195 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
196
197 mt352_write(fe, clock_config, sizeof(clock_config));
198 udelay(200);
199 mt352_write(fe, reset, sizeof(reset));
200 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
201
202 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
203 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
204 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
205
206 return 0;
207 }
208
209 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
210 {
211 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
212 static u8 reset [] = { 0x50, 0x80 };
213 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
214 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
215 0x00, 0xFF, 0x00, 0x40, 0x40 };
216 static u8 dntv_extra[] = { 0xB5, 0x7A };
217 static u8 capt_range_cfg[] = { 0x75, 0x32 };
218
219 mt352_write(fe, clock_config, sizeof(clock_config));
220 udelay(2000);
221 mt352_write(fe, reset, sizeof(reset));
222 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
223
224 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
225 udelay(2000);
226 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
227 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
228
229 return 0;
230 }
231
232 static struct mt352_config dvico_fusionhdtv = {
233 .demod_address = 0x0f,
234 .demod_init = dvico_fusionhdtv_demod_init,
235 };
236
237 static struct mt352_config dntv_live_dvbt_config = {
238 .demod_address = 0x0f,
239 .demod_init = dntv_live_dvbt_demod_init,
240 };
241
242 static struct mt352_config dvico_fusionhdtv_dual = {
243 .demod_address = 0x0f,
244 .demod_init = dvico_dual_demod_init,
245 };
246
247 static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
248 .demod_address = (0x1e >> 1),
249 .no_tuner = 1,
250 .if2 = 45600,
251 };
252
253 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && \
254 defined(MODULE))
255 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
256 {
257 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
258 static u8 reset [] = { 0x50, 0x80 };
259 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
260 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
261 0x00, 0xFF, 0x00, 0x40, 0x40 };
262 static u8 dntv_extra[] = { 0xB5, 0x7A };
263 static u8 capt_range_cfg[] = { 0x75, 0x32 };
264
265 mt352_write(fe, clock_config, sizeof(clock_config));
266 udelay(2000);
267 mt352_write(fe, reset, sizeof(reset));
268 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
269
270 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
271 udelay(2000);
272 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
273 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
274
275 return 0;
276 }
277
278 static struct mt352_config dntv_live_dvbt_pro_config = {
279 .demod_address = 0x0f,
280 .no_tuner = 1,
281 .demod_init = dntv_live_dvbt_pro_demod_init,
282 };
283 #endif
284
285 static struct zl10353_config dvico_fusionhdtv_hybrid = {
286 .demod_address = 0x0f,
287 .no_tuner = 1,
288 };
289
290 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
291 .demod_address = 0x0f,
292 .if2 = 45600,
293 .no_tuner = 1,
294 };
295
296 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
297 .demod_address = 0x0f,
298 .if2 = 4560,
299 .no_tuner = 1,
300 .demod_init = dvico_fusionhdtv_demod_init,
301 };
302
303 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
304 .demod_address = 0x0f,
305 };
306
307 static struct cx22702_config connexant_refboard_config = {
308 .demod_address = 0x43,
309 .output_mode = CX22702_SERIAL_OUTPUT,
310 };
311
312 static struct cx22702_config hauppauge_hvr_config = {
313 .demod_address = 0x63,
314 .output_mode = CX22702_SERIAL_OUTPUT,
315 };
316
317 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
318 {
319 struct cx8802_dev *dev= fe->dvb->priv;
320 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
321 return 0;
322 }
323
324 static struct or51132_config pchdtv_hd3000 = {
325 .demod_address = 0x15,
326 .set_ts_params = or51132_set_ts_param,
327 };
328
329 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
330 {
331 struct cx8802_dev *dev= fe->dvb->priv;
332 struct cx88_core *core = dev->core;
333
334 dprintk(1, "%s: index = %d\n", __func__, index);
335 if (index == 0)
336 cx_clear(MO_GP0_IO, 8);
337 else
338 cx_set(MO_GP0_IO, 8);
339 return 0;
340 }
341
342 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
343 {
344 struct cx8802_dev *dev= fe->dvb->priv;
345 if (is_punctured)
346 dev->ts_gen_cntrl |= 0x04;
347 else
348 dev->ts_gen_cntrl &= ~0x04;
349 return 0;
350 }
351
352 static struct lgdt330x_config fusionhdtv_3_gold = {
353 .demod_address = 0x0e,
354 .demod_chip = LGDT3302,
355 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
356 .set_ts_params = lgdt330x_set_ts_param,
357 };
358
359 static struct lgdt330x_config fusionhdtv_5_gold = {
360 .demod_address = 0x0e,
361 .demod_chip = LGDT3303,
362 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
363 .set_ts_params = lgdt330x_set_ts_param,
364 };
365
366 static struct lgdt330x_config pchdtv_hd5500 = {
367 .demod_address = 0x59,
368 .demod_chip = LGDT3303,
369 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
370 .set_ts_params = lgdt330x_set_ts_param,
371 };
372
373 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
374 {
375 struct cx8802_dev *dev= fe->dvb->priv;
376 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
377 return 0;
378 }
379
380 static struct nxt200x_config ati_hdtvwonder = {
381 .demod_address = 0x0a,
382 .set_ts_params = nxt200x_set_ts_param,
383 };
384
385 static int cx24123_set_ts_param(struct dvb_frontend* fe,
386 int is_punctured)
387 {
388 struct cx8802_dev *dev= fe->dvb->priv;
389 dev->ts_gen_cntrl = 0x02;
390 return 0;
391 }
392
393 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
394 fe_sec_voltage_t voltage)
395 {
396 struct cx8802_dev *dev= fe->dvb->priv;
397 struct cx88_core *core = dev->core;
398
399 if (voltage == SEC_VOLTAGE_OFF)
400 cx_write(MO_GP0_IO, 0x000006fb);
401 else
402 cx_write(MO_GP0_IO, 0x000006f9);
403
404 if (core->prev_set_voltage)
405 return core->prev_set_voltage(fe, voltage);
406 return 0;
407 }
408
409 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
410 fe_sec_voltage_t voltage)
411 {
412 struct cx8802_dev *dev= fe->dvb->priv;
413 struct cx88_core *core = dev->core;
414
415 if (voltage == SEC_VOLTAGE_OFF) {
416 dprintk(1,"LNB Voltage OFF\n");
417 cx_write(MO_GP0_IO, 0x0000efff);
418 }
419
420 if (core->prev_set_voltage)
421 return core->prev_set_voltage(fe, voltage);
422 return 0;
423 }
424
425 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
426 fe_sec_voltage_t voltage)
427 {
428 struct cx8802_dev *dev= fe->dvb->priv;
429 struct cx88_core *core = dev->core;
430
431 cx_set(MO_GP0_IO, 0x6040);
432 switch (voltage) {
433 case SEC_VOLTAGE_13:
434 cx_clear(MO_GP0_IO, 0x20);
435 break;
436 case SEC_VOLTAGE_18:
437 cx_set(MO_GP0_IO, 0x20);
438 break;
439 case SEC_VOLTAGE_OFF:
440 cx_clear(MO_GP0_IO, 0x20);
441 break;
442 }
443
444 if (core->prev_set_voltage)
445 return core->prev_set_voltage(fe, voltage);
446 return 0;
447 }
448
449 static struct cx24123_config geniatech_dvbs_config = {
450 .demod_address = 0x55,
451 .set_ts_params = cx24123_set_ts_param,
452 };
453
454 static struct cx24123_config hauppauge_novas_config = {
455 .demod_address = 0x55,
456 .set_ts_params = cx24123_set_ts_param,
457 };
458
459 static struct cx24123_config kworld_dvbs_100_config = {
460 .demod_address = 0x15,
461 .set_ts_params = cx24123_set_ts_param,
462 .lnb_polarity = 1,
463 };
464
465 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
466 .demod_address = 0x32 >> 1,
467 .output_mode = S5H1409_PARALLEL_OUTPUT,
468 .gpio = S5H1409_GPIO_ON,
469 .qam_if = 44000,
470 .inversion = S5H1409_INVERSION_OFF,
471 .status_mode = S5H1409_DEMODLOCKING,
472 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
473 };
474
475 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
476 .demod_address = 0x32 >> 1,
477 .output_mode = S5H1409_SERIAL_OUTPUT,
478 .gpio = S5H1409_GPIO_OFF,
479 .inversion = S5H1409_INVERSION_OFF,
480 .status_mode = S5H1409_DEMODLOCKING,
481 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
482 };
483
484 static struct s5h1409_config kworld_atsc_120_config = {
485 .demod_address = 0x32 >> 1,
486 .output_mode = S5H1409_SERIAL_OUTPUT,
487 .gpio = S5H1409_GPIO_OFF,
488 .inversion = S5H1409_INVERSION_OFF,
489 .status_mode = S5H1409_DEMODLOCKING,
490 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
491 };
492
493 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
494 .i2c_address = 0x64,
495 .if_khz = 5380,
496 };
497
498 static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
499 .demod_address = (0x1e >> 1),
500 .no_tuner = 1,
501 .if2 = 45600,
502 };
503
504 static struct zl10353_config cx88_geniatech_x8000_mt = {
505 .demod_address = (0x1e >> 1),
506 .no_tuner = 1,
507 .disable_i2c_gate_ctrl = 1,
508 };
509
510 static struct s5h1411_config dvico_fusionhdtv7_config = {
511 .output_mode = S5H1411_SERIAL_OUTPUT,
512 .gpio = S5H1411_GPIO_ON,
513 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
514 .qam_if = S5H1411_IF_44000,
515 .vsb_if = S5H1411_IF_44000,
516 .inversion = S5H1411_INVERSION_OFF,
517 .status_mode = S5H1411_DEMODLOCKING
518 };
519
520 static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
521 .i2c_address = 0xc2 >> 1,
522 .if_khz = 5380,
523 };
524
525 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
526 {
527 struct dvb_frontend *fe;
528 struct videobuf_dvb_frontend *fe0 = NULL;
529 struct xc2028_ctrl ctl;
530 struct xc2028_config cfg = {
531 .i2c_adap = &dev->core->i2c_adap,
532 .i2c_addr = addr,
533 .ctrl = &ctl,
534 };
535
536 /* Get the first frontend */
537 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
538 if (!fe0)
539 return -EINVAL;
540
541 if (!fe0->dvb.frontend) {
542 printk(KERN_ERR "%s/2: dvb frontend not attached. "
543 "Can't attach xc3028\n",
544 dev->core->name);
545 return -EINVAL;
546 }
547
548 /*
549 * Some xc3028 devices may be hidden by an I2C gate. This is known
550 * to happen with some s5h1409-based devices.
551 * Now that I2C gate is open, sets up xc3028 configuration
552 */
553 cx88_setup_xc3028(dev->core, &ctl);
554
555 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
556 if (!fe) {
557 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
558 dev->core->name);
559 dvb_frontend_detach(fe0->dvb.frontend);
560 dvb_unregister_frontend(fe0->dvb.frontend);
561 fe0->dvb.frontend = NULL;
562 return -EINVAL;
563 }
564
565 printk(KERN_INFO "%s/2: xc3028 attached\n",
566 dev->core->name);
567
568 return 0;
569 }
570
571 static int cx24116_set_ts_param(struct dvb_frontend *fe,
572 int is_punctured)
573 {
574 struct cx8802_dev *dev = fe->dvb->priv;
575 dev->ts_gen_cntrl = 0x2;
576
577 return 0;
578 }
579
580 static int stv0900_set_ts_param(struct dvb_frontend *fe,
581 int is_punctured)
582 {
583 struct cx8802_dev *dev = fe->dvb->priv;
584 dev->ts_gen_cntrl = 0;
585
586 return 0;
587 }
588
589 static int cx24116_reset_device(struct dvb_frontend *fe)
590 {
591 struct cx8802_dev *dev = fe->dvb->priv;
592 struct cx88_core *core = dev->core;
593
594 /* Reset the part */
595 /* Put the cx24116 into reset */
596 cx_write(MO_SRST_IO, 0);
597 msleep(10);
598 /* Take the cx24116 out of reset */
599 cx_write(MO_SRST_IO, 1);
600 msleep(10);
601
602 return 0;
603 }
604
605 static struct cx24116_config hauppauge_hvr4000_config = {
606 .demod_address = 0x05,
607 .set_ts_params = cx24116_set_ts_param,
608 .reset_device = cx24116_reset_device,
609 };
610
611 static struct cx24116_config tevii_s460_config = {
612 .demod_address = 0x55,
613 .set_ts_params = cx24116_set_ts_param,
614 .reset_device = cx24116_reset_device,
615 };
616
617 static struct stv0900_config prof_7301_stv0900_config = {
618 .demod_address = 0x6a,
619 /* demod_mode = 0,*/
620 .xtal = 27000000,
621 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
622 .diseqc_mode = 2,/* 2/3 PWM */
623 .tun1_maddress = 0,/* 0x60 */
624 .tun1_adc = 0,/* 2 Vpp */
625 .path1_mode = 3,
626 .set_ts_params = stv0900_set_ts_param,
627 };
628
629 static struct stb6100_config prof_7301_stb6100_config = {
630 .tuner_address = 0x60,
631 .refclock = 27000000,
632 };
633
634 static struct stv0299_config tevii_tuner_sharp_config = {
635 .demod_address = 0x68,
636 .inittab = sharp_z0194a_inittab,
637 .mclk = 88000000UL,
638 .invert = 1,
639 .skip_reinit = 0,
640 .lock_output = 1,
641 .volt13_op0_op1 = STV0299_VOLT13_OP1,
642 .min_delay_ms = 100,
643 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
644 .set_ts_params = cx24116_set_ts_param,
645 };
646
647 static struct stv0288_config tevii_tuner_earda_config = {
648 .demod_address = 0x68,
649 .min_delay_ms = 100,
650 .set_ts_params = cx24116_set_ts_param,
651 };
652
653 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
654 {
655 struct cx88_core *core = dev->core;
656 struct videobuf_dvb_frontend *fe = NULL;
657 int i;
658
659 mutex_init(&dev->frontends.lock);
660 INIT_LIST_HEAD(&dev->frontends.felist);
661
662 if (!core->board.num_frontends)
663 return -ENODEV;
664
665 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
666 core->board.num_frontends);
667 for (i = 1; i <= core->board.num_frontends; i++) {
668 fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
669 if (!fe) {
670 printk(KERN_ERR "%s() failed to alloc\n", __func__);
671 videobuf_dvb_dealloc_frontends(&dev->frontends);
672 return -ENOMEM;
673 }
674 }
675 return 0;
676 }
677
678
679
680 static u8 samsung_smt_7020_inittab[] = {
681 0x01, 0x15,
682 0x02, 0x00,
683 0x03, 0x00,
684 0x04, 0x7D,
685 0x05, 0x0F,
686 0x06, 0x02,
687 0x07, 0x00,
688 0x08, 0x60,
689
690 0x0A, 0xC2,
691 0x0B, 0x00,
692 0x0C, 0x01,
693 0x0D, 0x81,
694 0x0E, 0x44,
695 0x0F, 0x09,
696 0x10, 0x3C,
697 0x11, 0x84,
698 0x12, 0xDA,
699 0x13, 0x99,
700 0x14, 0x8D,
701 0x15, 0xCE,
702 0x16, 0xE8,
703 0x17, 0x43,
704 0x18, 0x1C,
705 0x19, 0x1B,
706 0x1A, 0x1D,
707
708 0x1C, 0x12,
709 0x1D, 0x00,
710 0x1E, 0x00,
711 0x1F, 0x00,
712 0x20, 0x00,
713 0x21, 0x00,
714 0x22, 0x00,
715 0x23, 0x00,
716
717 0x28, 0x02,
718 0x29, 0x28,
719 0x2A, 0x14,
720 0x2B, 0x0F,
721 0x2C, 0x09,
722 0x2D, 0x05,
723
724 0x31, 0x1F,
725 0x32, 0x19,
726 0x33, 0xFC,
727 0x34, 0x13,
728 0xff, 0xff,
729 };
730
731
732 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
733 struct dvb_frontend_parameters *params)
734 {
735 struct cx8802_dev *dev = fe->dvb->priv;
736 u8 buf[4];
737 u32 div;
738 struct i2c_msg msg = {
739 .addr = 0x61,
740 .flags = 0,
741 .buf = buf,
742 .len = sizeof(buf) };
743
744 div = params->frequency / 125;
745
746 buf[0] = (div >> 8) & 0x7f;
747 buf[1] = div & 0xff;
748 buf[2] = 0x84; /* 0xC4 */
749 buf[3] = 0x00;
750
751 if (params->frequency < 1500000)
752 buf[3] |= 0x10;
753
754 if (fe->ops.i2c_gate_ctrl)
755 fe->ops.i2c_gate_ctrl(fe, 1);
756
757 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
758 return -EIO;
759
760 return 0;
761 }
762
763 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
764 fe_sec_tone_mode_t tone)
765 {
766 struct cx8802_dev *dev = fe->dvb->priv;
767 struct cx88_core *core = dev->core;
768
769 cx_set(MO_GP0_IO, 0x0800);
770
771 switch (tone) {
772 case SEC_TONE_ON:
773 cx_set(MO_GP0_IO, 0x08);
774 break;
775 case SEC_TONE_OFF:
776 cx_clear(MO_GP0_IO, 0x08);
777 break;
778 default:
779 return -EINVAL;
780 }
781
782 return 0;
783 }
784
785 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
786 fe_sec_voltage_t voltage)
787 {
788 struct cx8802_dev *dev = fe->dvb->priv;
789 struct cx88_core *core = dev->core;
790
791 u8 data;
792 struct i2c_msg msg = {
793 .addr = 8,
794 .flags = 0,
795 .buf = &data,
796 .len = sizeof(data) };
797
798 cx_set(MO_GP0_IO, 0x8000);
799
800 switch (voltage) {
801 case SEC_VOLTAGE_OFF:
802 break;
803 case SEC_VOLTAGE_13:
804 data = ISL6421_EN1 | ISL6421_LLC1;
805 cx_clear(MO_GP0_IO, 0x80);
806 break;
807 case SEC_VOLTAGE_18:
808 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
809 cx_clear(MO_GP0_IO, 0x80);
810 break;
811 default:
812 return -EINVAL;
813 };
814
815 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
816 }
817
818 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
819 u32 srate, u32 ratio)
820 {
821 u8 aclk = 0;
822 u8 bclk = 0;
823
824 if (srate < 1500000) {
825 aclk = 0xb7;
826 bclk = 0x47;
827 } else if (srate < 3000000) {
828 aclk = 0xb7;
829 bclk = 0x4b;
830 } else if (srate < 7000000) {
831 aclk = 0xb7;
832 bclk = 0x4f;
833 } else if (srate < 14000000) {
834 aclk = 0xb7;
835 bclk = 0x53;
836 } else if (srate < 30000000) {
837 aclk = 0xb6;
838 bclk = 0x53;
839 } else if (srate < 45000000) {
840 aclk = 0xb4;
841 bclk = 0x51;
842 }
843
844 stv0299_writereg(fe, 0x13, aclk);
845 stv0299_writereg(fe, 0x14, bclk);
846 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
847 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
848 stv0299_writereg(fe, 0x21, ratio & 0xf0);
849
850 return 0;
851 }
852
853
854 static struct stv0299_config samsung_stv0299_config = {
855 .demod_address = 0x68,
856 .inittab = samsung_smt_7020_inittab,
857 .mclk = 88000000UL,
858 .invert = 0,
859 .skip_reinit = 0,
860 .lock_output = STV0299_LOCKOUTPUT_LK,
861 .volt13_op0_op1 = STV0299_VOLT13_OP1,
862 .min_delay_ms = 100,
863 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
864 };
865
866 static int dvb_register(struct cx8802_dev *dev)
867 {
868 struct cx88_core *core = dev->core;
869 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
870 int mfe_shared = 0; /* bus not shared by default */
871
872 if (0 != core->i2c_rc) {
873 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
874 goto frontend_detach;
875 }
876
877 /* Get the first frontend */
878 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
879 if (!fe0)
880 goto frontend_detach;
881
882 /* multi-frontend gate control is undefined or defaults to fe0 */
883 dev->frontends.gate = 0;
884
885 /* Sets the gate control callback to be used by i2c command calls */
886 core->gate_ctrl = cx88_dvb_gate_ctrl;
887
888 /* init frontend(s) */
889 switch (core->boardnr) {
890 case CX88_BOARD_HAUPPAUGE_DVB_T1:
891 fe0->dvb.frontend = dvb_attach(cx22702_attach,
892 &connexant_refboard_config,
893 &core->i2c_adap);
894 if (fe0->dvb.frontend != NULL) {
895 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
896 0x61, &core->i2c_adap,
897 DVB_PLL_THOMSON_DTT759X))
898 goto frontend_detach;
899 }
900 break;
901 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
902 case CX88_BOARD_CONEXANT_DVB_T1:
903 case CX88_BOARD_KWORLD_DVB_T_CX22702:
904 case CX88_BOARD_WINFAST_DTV1000:
905 fe0->dvb.frontend = dvb_attach(cx22702_attach,
906 &connexant_refboard_config,
907 &core->i2c_adap);
908 if (fe0->dvb.frontend != NULL) {
909 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
910 0x60, &core->i2c_adap,
911 DVB_PLL_THOMSON_DTT7579))
912 goto frontend_detach;
913 }
914 break;
915 case CX88_BOARD_WINFAST_DTV2000H:
916 case CX88_BOARD_WINFAST_DTV2000H_J:
917 case CX88_BOARD_HAUPPAUGE_HVR1100:
918 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
919 case CX88_BOARD_HAUPPAUGE_HVR1300:
920 fe0->dvb.frontend = dvb_attach(cx22702_attach,
921 &hauppauge_hvr_config,
922 &core->i2c_adap);
923 if (fe0->dvb.frontend != NULL) {
924 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
925 &core->i2c_adap, 0x61,
926 TUNER_PHILIPS_FMD1216ME_MK3))
927 goto frontend_detach;
928 }
929 break;
930 case CX88_BOARD_HAUPPAUGE_HVR3000:
931 /* MFE frontend 1 */
932 mfe_shared = 1;
933 dev->frontends.gate = 2;
934 /* DVB-S init */
935 fe0->dvb.frontend = dvb_attach(cx24123_attach,
936 &hauppauge_novas_config,
937 &dev->core->i2c_adap);
938 if (fe0->dvb.frontend) {
939 if (!dvb_attach(isl6421_attach,
940 fe0->dvb.frontend,
941 &dev->core->i2c_adap,
942 0x08, ISL6421_DCL, 0x00))
943 goto frontend_detach;
944 }
945 /* MFE frontend 2 */
946 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
947 if (!fe1)
948 goto frontend_detach;
949 /* DVB-T init */
950 fe1->dvb.frontend = dvb_attach(cx22702_attach,
951 &hauppauge_hvr_config,
952 &dev->core->i2c_adap);
953 if (fe1->dvb.frontend) {
954 fe1->dvb.frontend->id = 1;
955 if (!dvb_attach(simple_tuner_attach,
956 fe1->dvb.frontend,
957 &dev->core->i2c_adap,
958 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
959 goto frontend_detach;
960 }
961 break;
962 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
963 fe0->dvb.frontend = dvb_attach(mt352_attach,
964 &dvico_fusionhdtv,
965 &core->i2c_adap);
966 if (fe0->dvb.frontend != NULL) {
967 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
968 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
969 goto frontend_detach;
970 break;
971 }
972 /* ZL10353 replaces MT352 on later cards */
973 fe0->dvb.frontend = dvb_attach(zl10353_attach,
974 &dvico_fusionhdtv_plus_v1_1,
975 &core->i2c_adap);
976 if (fe0->dvb.frontend != NULL) {
977 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
978 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
979 goto frontend_detach;
980 }
981 break;
982 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
983 /* The tin box says DEE1601, but it seems to be DTT7579
984 * compatible, with a slightly different MT352 AGC gain. */
985 fe0->dvb.frontend = dvb_attach(mt352_attach,
986 &dvico_fusionhdtv_dual,
987 &core->i2c_adap);
988 if (fe0->dvb.frontend != NULL) {
989 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
990 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
991 goto frontend_detach;
992 break;
993 }
994 /* ZL10353 replaces MT352 on later cards */
995 fe0->dvb.frontend = dvb_attach(zl10353_attach,
996 &dvico_fusionhdtv_plus_v1_1,
997 &core->i2c_adap);
998 if (fe0->dvb.frontend != NULL) {
999 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1000 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1001 goto frontend_detach;
1002 }
1003 break;
1004 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1005 fe0->dvb.frontend = dvb_attach(mt352_attach,
1006 &dvico_fusionhdtv,
1007 &core->i2c_adap);
1008 if (fe0->dvb.frontend != NULL) {
1009 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1010 0x61, NULL, DVB_PLL_LG_Z201))
1011 goto frontend_detach;
1012 }
1013 break;
1014 case CX88_BOARD_KWORLD_DVB_T:
1015 case CX88_BOARD_DNTV_LIVE_DVB_T:
1016 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1017 fe0->dvb.frontend = dvb_attach(mt352_attach,
1018 &dntv_live_dvbt_config,
1019 &core->i2c_adap);
1020 if (fe0->dvb.frontend != NULL) {
1021 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1022 0x61, NULL, DVB_PLL_UNKNOWN_1))
1023 goto frontend_detach;
1024 }
1025 break;
1026 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1027 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && \
1028 defined(MODULE))
1029 /* MT352 is on a secondary I2C bus made from some GPIO lines */
1030 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
1031 &dev->vp3054->adap);
1032 if (fe0->dvb.frontend != NULL) {
1033 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1034 &core->i2c_adap, 0x61,
1035 TUNER_PHILIPS_FMD1216ME_MK3))
1036 goto frontend_detach;
1037 }
1038 #else
1039 printk(KERN_ERR "%s/2: built without vp3054 support\n",
1040 core->name);
1041 #endif
1042 break;
1043 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1044 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1045 &dvico_fusionhdtv_hybrid,
1046 &core->i2c_adap);
1047 if (fe0->dvb.frontend != NULL) {
1048 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1049 &core->i2c_adap, 0x61,
1050 TUNER_THOMSON_FE6600))
1051 goto frontend_detach;
1052 }
1053 break;
1054 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1055 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1056 &dvico_fusionhdtv_xc3028,
1057 &core->i2c_adap);
1058 if (fe0->dvb.frontend == NULL)
1059 fe0->dvb.frontend = dvb_attach(mt352_attach,
1060 &dvico_fusionhdtv_mt352_xc3028,
1061 &core->i2c_adap);
1062 /*
1063 * On this board, the demod provides the I2C bus pullup.
1064 * We must not permit gate_ctrl to be performed, or
1065 * the xc3028 cannot communicate on the bus.
1066 */
1067 if (fe0->dvb.frontend)
1068 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1069 if (attach_xc3028(0x61, dev) < 0)
1070 goto frontend_detach;
1071 break;
1072 case CX88_BOARD_PCHDTV_HD3000:
1073 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1074 &core->i2c_adap);
1075 if (fe0->dvb.frontend != NULL) {
1076 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1077 &core->i2c_adap, 0x61,
1078 TUNER_THOMSON_DTT761X))
1079 goto frontend_detach;
1080 }
1081 break;
1082 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1083 dev->ts_gen_cntrl = 0x08;
1084
1085 /* Do a hardware reset of chip before using it. */
1086 cx_clear(MO_GP0_IO, 1);
1087 mdelay(100);
1088 cx_set(MO_GP0_IO, 1);
1089 mdelay(200);
1090
1091 /* Select RF connector callback */
1092 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1093 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1094 &fusionhdtv_3_gold,
1095 &core->i2c_adap);
1096 if (fe0->dvb.frontend != NULL) {
1097 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1098 &core->i2c_adap, 0x61,
1099 TUNER_MICROTUNE_4042FI5))
1100 goto frontend_detach;
1101 }
1102 break;
1103 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1104 dev->ts_gen_cntrl = 0x08;
1105
1106 /* Do a hardware reset of chip before using it. */
1107 cx_clear(MO_GP0_IO, 1);
1108 mdelay(100);
1109 cx_set(MO_GP0_IO, 9);
1110 mdelay(200);
1111 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1112 &fusionhdtv_3_gold,
1113 &core->i2c_adap);
1114 if (fe0->dvb.frontend != NULL) {
1115 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1116 &core->i2c_adap, 0x61,
1117 TUNER_THOMSON_DTT761X))
1118 goto frontend_detach;
1119 }
1120 break;
1121 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1122 dev->ts_gen_cntrl = 0x08;
1123
1124 /* Do a hardware reset of chip before using it. */
1125 cx_clear(MO_GP0_IO, 1);
1126 mdelay(100);
1127 cx_set(MO_GP0_IO, 1);
1128 mdelay(200);
1129 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1130 &fusionhdtv_5_gold,
1131 &core->i2c_adap);
1132 if (fe0->dvb.frontend != NULL) {
1133 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1134 &core->i2c_adap, 0x61,
1135 TUNER_LG_TDVS_H06XF))
1136 goto frontend_detach;
1137 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1138 &core->i2c_adap, 0x43))
1139 goto frontend_detach;
1140 }
1141 break;
1142 case CX88_BOARD_PCHDTV_HD5500:
1143 dev->ts_gen_cntrl = 0x08;
1144
1145 /* Do a hardware reset of chip before using it. */
1146 cx_clear(MO_GP0_IO, 1);
1147 mdelay(100);
1148 cx_set(MO_GP0_IO, 1);
1149 mdelay(200);
1150 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1151 &pchdtv_hd5500,
1152 &core->i2c_adap);
1153 if (fe0->dvb.frontend != NULL) {
1154 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1155 &core->i2c_adap, 0x61,
1156 TUNER_LG_TDVS_H06XF))
1157 goto frontend_detach;
1158 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1159 &core->i2c_adap, 0x43))
1160 goto frontend_detach;
1161 }
1162 break;
1163 case CX88_BOARD_ATI_HDTVWONDER:
1164 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1165 &ati_hdtvwonder,
1166 &core->i2c_adap);
1167 if (fe0->dvb.frontend != NULL) {
1168 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1169 &core->i2c_adap, 0x61,
1170 TUNER_PHILIPS_TUV1236D))
1171 goto frontend_detach;
1172 }
1173 break;
1174 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1175 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1176 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1177 &hauppauge_novas_config,
1178 &core->i2c_adap);
1179 if (fe0->dvb.frontend) {
1180 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1181 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
1182 goto frontend_detach;
1183 }
1184 break;
1185 case CX88_BOARD_KWORLD_DVBS_100:
1186 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1187 &kworld_dvbs_100_config,
1188 &core->i2c_adap);
1189 if (fe0->dvb.frontend) {
1190 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1191 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1192 }
1193 break;
1194 case CX88_BOARD_GENIATECH_DVBS:
1195 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1196 &geniatech_dvbs_config,
1197 &core->i2c_adap);
1198 if (fe0->dvb.frontend) {
1199 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1200 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1201 }
1202 break;
1203 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1204 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1205 &pinnacle_pctv_hd_800i_config,
1206 &core->i2c_adap);
1207 if (fe0->dvb.frontend != NULL) {
1208 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1209 &core->i2c_adap,
1210 &pinnacle_pctv_hd_800i_tuner_config))
1211 goto frontend_detach;
1212 }
1213 break;
1214 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1215 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1216 &dvico_hdtv5_pci_nano_config,
1217 &core->i2c_adap);
1218 if (fe0->dvb.frontend != NULL) {
1219 struct dvb_frontend *fe;
1220 struct xc2028_config cfg = {
1221 .i2c_adap = &core->i2c_adap,
1222 .i2c_addr = 0x61,
1223 };
1224 static struct xc2028_ctrl ctl = {
1225 .fname = XC2028_DEFAULT_FIRMWARE,
1226 .max_len = 64,
1227 .scode_table = XC3028_FE_OREN538,
1228 };
1229
1230 fe = dvb_attach(xc2028_attach,
1231 fe0->dvb.frontend, &cfg);
1232 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1233 fe->ops.tuner_ops.set_config(fe, &ctl);
1234 }
1235 break;
1236 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1237 case CX88_BOARD_WINFAST_DTV1800H:
1238 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1239 &cx88_pinnacle_hybrid_pctv,
1240 &core->i2c_adap);
1241 if (fe0->dvb.frontend) {
1242 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1243 if (attach_xc3028(0x61, dev) < 0)
1244 goto frontend_detach;
1245 }
1246 break;
1247 case CX88_BOARD_GENIATECH_X8000_MT:
1248 dev->ts_gen_cntrl = 0x00;
1249
1250 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1251 &cx88_geniatech_x8000_mt,
1252 &core->i2c_adap);
1253 if (attach_xc3028(0x61, dev) < 0)
1254 goto frontend_detach;
1255 break;
1256 case CX88_BOARD_KWORLD_ATSC_120:
1257 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1258 &kworld_atsc_120_config,
1259 &core->i2c_adap);
1260 if (attach_xc3028(0x61, dev) < 0)
1261 goto frontend_detach;
1262 break;
1263 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1264 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1265 &dvico_fusionhdtv7_config,
1266 &core->i2c_adap);
1267 if (fe0->dvb.frontend != NULL) {
1268 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1269 &core->i2c_adap,
1270 &dvico_fusionhdtv7_tuner_config))
1271 goto frontend_detach;
1272 }
1273 break;
1274 case CX88_BOARD_HAUPPAUGE_HVR4000:
1275 /* MFE frontend 1 */
1276 mfe_shared = 1;
1277 dev->frontends.gate = 2;
1278 /* DVB-S/S2 Init */
1279 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1280 &hauppauge_hvr4000_config,
1281 &dev->core->i2c_adap);
1282 if (fe0->dvb.frontend) {
1283 if (!dvb_attach(isl6421_attach,
1284 fe0->dvb.frontend,
1285 &dev->core->i2c_adap,
1286 0x08, ISL6421_DCL, 0x00))
1287 goto frontend_detach;
1288 }
1289 /* MFE frontend 2 */
1290 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
1291 if (!fe1)
1292 goto frontend_detach;
1293 /* DVB-T Init */
1294 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1295 &hauppauge_hvr_config,
1296 &dev->core->i2c_adap);
1297 if (fe1->dvb.frontend) {
1298 fe1->dvb.frontend->id = 1;
1299 if (!dvb_attach(simple_tuner_attach,
1300 fe1->dvb.frontend,
1301 &dev->core->i2c_adap,
1302 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1303 goto frontend_detach;
1304 }
1305 break;
1306 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1307 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1308 &hauppauge_hvr4000_config,
1309 &dev->core->i2c_adap);
1310 if (fe0->dvb.frontend) {
1311 if (!dvb_attach(isl6421_attach,
1312 fe0->dvb.frontend,
1313 &dev->core->i2c_adap,
1314 0x08, ISL6421_DCL, 0x00))
1315 goto frontend_detach;
1316 }
1317 break;
1318 case CX88_BOARD_PROF_6200:
1319 case CX88_BOARD_TBS_8910:
1320 case CX88_BOARD_TEVII_S420:
1321 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1322 &tevii_tuner_sharp_config,
1323 &core->i2c_adap);
1324 if (fe0->dvb.frontend != NULL) {
1325 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1326 &core->i2c_adap, DVB_PLL_OPERA1))
1327 goto frontend_detach;
1328 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1329 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1330
1331 } else {
1332 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1333 &tevii_tuner_earda_config,
1334 &core->i2c_adap);
1335 if (fe0->dvb.frontend != NULL) {
1336 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1337 &core->i2c_adap))
1338 goto frontend_detach;
1339 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1340 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1341 }
1342 }
1343 break;
1344 case CX88_BOARD_TEVII_S460:
1345 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1346 &tevii_s460_config,
1347 &core->i2c_adap);
1348 if (fe0->dvb.frontend != NULL)
1349 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1350 break;
1351 case CX88_BOARD_OMICOM_SS4_PCI:
1352 case CX88_BOARD_TBS_8920:
1353 case CX88_BOARD_PROF_7300:
1354 case CX88_BOARD_SATTRADE_ST4200:
1355 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1356 &hauppauge_hvr4000_config,
1357 &core->i2c_adap);
1358 if (fe0->dvb.frontend != NULL)
1359 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1360 break;
1361 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1362 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1363 &cx88_terratec_cinergy_ht_pci_mkii_config,
1364 &core->i2c_adap);
1365 if (fe0->dvb.frontend) {
1366 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1367 if (attach_xc3028(0x61, dev) < 0)
1368 goto frontend_detach;
1369 }
1370 break;
1371 case CX88_BOARD_PROF_7301:{
1372 struct dvb_tuner_ops *tuner_ops = NULL;
1373
1374 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1375 &prof_7301_stv0900_config,
1376 &core->i2c_adap, 0);
1377 if (fe0->dvb.frontend != NULL) {
1378 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1379 &prof_7301_stb6100_config,
1380 &core->i2c_adap))
1381 goto frontend_detach;
1382
1383 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1384 tuner_ops->set_frequency = stb6100_set_freq;
1385 tuner_ops->get_frequency = stb6100_get_freq;
1386 tuner_ops->set_bandwidth = stb6100_set_bandw;
1387 tuner_ops->get_bandwidth = stb6100_get_bandw;
1388
1389 core->prev_set_voltage =
1390 fe0->dvb.frontend->ops.set_voltage;
1391 fe0->dvb.frontend->ops.set_voltage =
1392 tevii_dvbs_set_voltage;
1393 }
1394 break;
1395 }
1396 case CX88_BOARD_SAMSUNG_SMT_7020:
1397 dev->ts_gen_cntrl = 0x08;
1398
1399 cx_set(MO_GP0_IO, 0x0101);
1400
1401 cx_clear(MO_GP0_IO, 0x01);
1402 mdelay(100);
1403 cx_set(MO_GP0_IO, 0x01);
1404 mdelay(200);
1405
1406 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1407 &samsung_stv0299_config,
1408 &dev->core->i2c_adap);
1409 if (fe0->dvb.frontend) {
1410 fe0->dvb.frontend->ops.tuner_ops.set_params =
1411 samsung_smt_7020_tuner_set_params;
1412 fe0->dvb.frontend->tuner_priv =
1413 &dev->core->i2c_adap;
1414 fe0->dvb.frontend->ops.set_voltage =
1415 samsung_smt_7020_set_voltage;
1416 fe0->dvb.frontend->ops.set_tone =
1417 samsung_smt_7020_set_tone;
1418 }
1419
1420 break;
1421
1422 default:
1423 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1424 core->name);
1425 break;
1426 }
1427
1428 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1429 printk(KERN_ERR
1430 "%s/2: frontend initialization failed\n",
1431 core->name);
1432 goto frontend_detach;
1433 }
1434 /* define general-purpose callback pointer */
1435 fe0->dvb.frontend->callback = cx88_tuner_callback;
1436
1437 /* Ensure all frontends negotiate bus access */
1438 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1439 if (fe1)
1440 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1441
1442 /* Put the analog decoder in standby to keep it quiet */
1443 call_all(core, core, s_power, 0);
1444
1445 /* register everything */
1446 return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1447 &dev->pci->dev, adapter_nr, mfe_shared, NULL);
1448
1449 frontend_detach:
1450 core->gate_ctrl = NULL;
1451 videobuf_dvb_dealloc_frontends(&dev->frontends);
1452 return -EINVAL;
1453 }
1454
1455 /* ----------------------------------------------------------- */
1456
1457 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1458 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1459 {
1460 struct cx88_core *core = drv->core;
1461 int err = 0;
1462 dprintk( 1, "%s\n", __func__);
1463
1464 switch (core->boardnr) {
1465 case CX88_BOARD_HAUPPAUGE_HVR1300:
1466 /* We arrive here with either the cx23416 or the cx22702
1467 * on the bus. Take the bus from the cx23416 and enable the
1468 * cx22702 demod
1469 */
1470 /* Toggle reset on cx22702 leaving i2c active */
1471 cx_set(MO_GP0_IO, 0x00000080);
1472 udelay(1000);
1473 cx_clear(MO_GP0_IO, 0x00000080);
1474 udelay(50);
1475 cx_set(MO_GP0_IO, 0x00000080);
1476 udelay(1000);
1477 /* enable the cx22702 pins */
1478 cx_clear(MO_GP0_IO, 0x00000004);
1479 udelay(1000);
1480 break;
1481
1482 case CX88_BOARD_HAUPPAUGE_HVR3000:
1483 case CX88_BOARD_HAUPPAUGE_HVR4000:
1484 /* Toggle reset on cx22702 leaving i2c active */
1485 cx_set(MO_GP0_IO, 0x00000080);
1486 udelay(1000);
1487 cx_clear(MO_GP0_IO, 0x00000080);
1488 udelay(50);
1489 cx_set(MO_GP0_IO, 0x00000080);
1490 udelay(1000);
1491 switch (core->dvbdev->frontends.active_fe_id) {
1492 case 1: /* DVB-S/S2 Enabled */
1493 /* tri-state the cx22702 pins */
1494 cx_set(MO_GP0_IO, 0x00000004);
1495 /* Take the cx24116/cx24123 out of reset */
1496 cx_write(MO_SRST_IO, 1);
1497 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1498 break;
1499 case 2: /* DVB-T Enabled */
1500 /* Put the cx24116/cx24123 into reset */
1501 cx_write(MO_SRST_IO, 0);
1502 /* enable the cx22702 pins */
1503 cx_clear(MO_GP0_IO, 0x00000004);
1504 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1505 break;
1506 }
1507 udelay(1000);
1508 break;
1509
1510 default:
1511 err = -ENODEV;
1512 }
1513 return err;
1514 }
1515
1516 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1517 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1518 {
1519 struct cx88_core *core = drv->core;
1520 int err = 0;
1521 dprintk( 1, "%s\n", __func__);
1522
1523 switch (core->boardnr) {
1524 case CX88_BOARD_HAUPPAUGE_HVR1300:
1525 /* Do Nothing, leave the cx22702 on the bus. */
1526 break;
1527 case CX88_BOARD_HAUPPAUGE_HVR3000:
1528 case CX88_BOARD_HAUPPAUGE_HVR4000:
1529 break;
1530 default:
1531 err = -ENODEV;
1532 }
1533 return err;
1534 }
1535
1536 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1537 {
1538 struct cx88_core *core = drv->core;
1539 struct cx8802_dev *dev = drv->core->dvbdev;
1540 int err;
1541 struct videobuf_dvb_frontend *fe;
1542 int i;
1543
1544 dprintk( 1, "%s\n", __func__);
1545 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1546 core->boardnr,
1547 core->name,
1548 core->pci_bus,
1549 core->pci_slot);
1550
1551 err = -ENODEV;
1552 if (!(core->board.mpeg & CX88_MPEG_DVB))
1553 goto fail_core;
1554
1555 /* If vp3054 isn't enabled, a stub will just return 0 */
1556 err = vp3054_i2c_probe(dev);
1557 if (0 != err)
1558 goto fail_core;
1559
1560 /* dvb stuff */
1561 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1562 dev->ts_gen_cntrl = 0x0c;
1563
1564 err = cx8802_alloc_frontends(dev);
1565 if (err)
1566 goto fail_core;
1567
1568 err = -ENODEV;
1569 for (i = 1; i <= core->board.num_frontends; i++) {
1570 fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
1571 if (fe == NULL) {
1572 printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1573 __func__, i);
1574 goto fail_probe;
1575 }
1576 videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
1577 &dev->pci->dev, &dev->slock,
1578 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1579 V4L2_FIELD_TOP,
1580 sizeof(struct cx88_buffer),
1581 dev);
1582 /* init struct videobuf_dvb */
1583 fe->dvb.name = dev->core->name;
1584 }
1585
1586 err = dvb_register(dev);
1587 if (err)
1588 /* frontends/adapter de-allocated in dvb_register */
1589 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1590 core->name, err);
1591 return err;
1592 fail_probe:
1593 videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
1594 fail_core:
1595 return err;
1596 }
1597
1598 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1599 {
1600 struct cx88_core *core = drv->core;
1601 struct cx8802_dev *dev = drv->core->dvbdev;
1602
1603 dprintk( 1, "%s\n", __func__);
1604
1605 videobuf_dvb_unregister_bus(&dev->frontends);
1606
1607 vp3054_i2c_remove(dev);
1608
1609 core->gate_ctrl = NULL;
1610
1611 return 0;
1612 }
1613
1614 static struct cx8802_driver cx8802_dvb_driver = {
1615 .type_id = CX88_MPEG_DVB,
1616 .hw_access = CX8802_DRVCTL_SHARED,
1617 .probe = cx8802_dvb_probe,
1618 .remove = cx8802_dvb_remove,
1619 .advise_acquire = cx8802_dvb_advise_acquire,
1620 .advise_release = cx8802_dvb_advise_release,
1621 };
1622
1623 static int __init dvb_init(void)
1624 {
1625 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
1626 (CX88_VERSION_CODE >> 16) & 0xff,
1627 (CX88_VERSION_CODE >> 8) & 0xff,
1628 CX88_VERSION_CODE & 0xff);
1629 #ifdef SNAPSHOT
1630 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
1631 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1632 #endif
1633 return cx8802_register_driver(&cx8802_dvb_driver);
1634 }
1635
1636 static void __exit dvb_fini(void)
1637 {
1638 cx8802_unregister_driver(&cx8802_dvb_driver);
1639 }
1640
1641 module_init(dvb_init);
1642 module_exit(dvb_fini);
1643
1644 /*
1645 * Local variables:
1646 * c-basic-offset: 8
1647 * compile-command: "make DVB=1"
1648 * End:
1649 */
Tomato firmware and modifications.