GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / media / dvb / pt1 / pt1.c
blob2202eaa82d600435c7f423e16e5da8ee994ee778
1 /*
2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
32 #include "dvbdev.h"
33 #include "dvb_demux.h"
34 #include "dmxdev.h"
35 #include "dvb_net.h"
36 #include "dvb_frontend.h"
38 #include "va1j5jf8007t.h"
39 #include "va1j5jf8007s.h"
41 #define DRIVER_NAME "earth-pt1"
43 #define PT1_PAGE_SHIFT 12
44 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
45 #define PT1_NR_UPACKETS 1024
46 #define PT1_NR_BUFS 511
48 struct pt1_buffer_page {
49 __le32 upackets[PT1_NR_UPACKETS];
52 struct pt1_table_page {
53 __le32 next_pfn;
54 __le32 buf_pfns[PT1_NR_BUFS];
57 struct pt1_buffer {
58 struct pt1_buffer_page *page;
59 dma_addr_t addr;
62 struct pt1_table {
63 struct pt1_table_page *page;
64 dma_addr_t addr;
65 struct pt1_buffer bufs[PT1_NR_BUFS];
68 #define PT1_NR_ADAPS 4
70 struct pt1_adapter;
72 struct pt1 {
73 struct pci_dev *pdev;
74 void __iomem *regs;
75 struct i2c_adapter i2c_adap;
76 int i2c_running;
77 struct pt1_adapter *adaps[PT1_NR_ADAPS];
78 struct pt1_table *tables;
79 struct task_struct *kthread;
81 struct mutex lock;
82 int power;
83 int reset;
86 struct pt1_adapter {
87 struct pt1 *pt1;
88 int index;
90 u8 *buf;
91 int upacket_count;
92 int packet_count;
94 struct dvb_adapter adap;
95 struct dvb_demux demux;
96 int users;
97 struct dmxdev dmxdev;
98 struct dvb_net net;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 fe_sec_voltage_t voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
105 fe_sec_voltage_t voltage;
106 int sleep;
109 #define pt1_printk(level, pt1, format, arg...) \
110 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
112 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
114 writel(data, pt1->regs + reg * 4);
117 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
119 return readl(pt1->regs + reg * 4);
122 static int pt1_nr_tables = 64;
123 module_param_named(nr_tables, pt1_nr_tables, int, 0);
125 static void pt1_increment_table_count(struct pt1 *pt1)
127 pt1_write_reg(pt1, 0, 0x00000020);
130 static void pt1_init_table_count(struct pt1 *pt1)
132 pt1_write_reg(pt1, 0, 0x00000010);
135 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
137 pt1_write_reg(pt1, 5, first_pfn);
138 pt1_write_reg(pt1, 0, 0x0c000040);
141 static void pt1_unregister_tables(struct pt1 *pt1)
143 pt1_write_reg(pt1, 0, 0x08080000);
146 static int pt1_sync(struct pt1 *pt1)
148 int i;
149 for (i = 0; i < 57; i++) {
150 if (pt1_read_reg(pt1, 0) & 0x20000000)
151 return 0;
152 pt1_write_reg(pt1, 0, 0x00000008);
154 pt1_printk(KERN_ERR, pt1, "could not sync\n");
155 return -EIO;
158 static u64 pt1_identify(struct pt1 *pt1)
160 int i;
161 u64 id;
162 id = 0;
163 for (i = 0; i < 57; i++) {
164 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
165 pt1_write_reg(pt1, 0, 0x00000008);
167 return id;
170 static int pt1_unlock(struct pt1 *pt1)
172 int i;
173 pt1_write_reg(pt1, 0, 0x00000008);
174 for (i = 0; i < 3; i++) {
175 if (pt1_read_reg(pt1, 0) & 0x80000000)
176 return 0;
177 schedule_timeout_uninterruptible((HZ + 999) / 1000);
179 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
180 return -EIO;
183 static int pt1_reset_pci(struct pt1 *pt1)
185 int i;
186 pt1_write_reg(pt1, 0, 0x01010000);
187 pt1_write_reg(pt1, 0, 0x01000000);
188 for (i = 0; i < 10; i++) {
189 if (pt1_read_reg(pt1, 0) & 0x00000001)
190 return 0;
191 schedule_timeout_uninterruptible((HZ + 999) / 1000);
193 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
194 return -EIO;
197 static int pt1_reset_ram(struct pt1 *pt1)
199 int i;
200 pt1_write_reg(pt1, 0, 0x02020000);
201 pt1_write_reg(pt1, 0, 0x02000000);
202 for (i = 0; i < 10; i++) {
203 if (pt1_read_reg(pt1, 0) & 0x00000002)
204 return 0;
205 schedule_timeout_uninterruptible((HZ + 999) / 1000);
207 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
208 return -EIO;
211 static int pt1_do_enable_ram(struct pt1 *pt1)
213 int i, j;
214 u32 status;
215 status = pt1_read_reg(pt1, 0) & 0x00000004;
216 pt1_write_reg(pt1, 0, 0x00000002);
217 for (i = 0; i < 10; i++) {
218 for (j = 0; j < 1024; j++) {
219 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
220 return 0;
222 schedule_timeout_uninterruptible((HZ + 999) / 1000);
224 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
225 return -EIO;
228 static int pt1_enable_ram(struct pt1 *pt1)
230 int i, ret;
231 int phase;
232 schedule_timeout_uninterruptible((HZ + 999) / 1000);
233 phase = pt1->pdev->device == 0x211a ? 128 : 166;
234 for (i = 0; i < phase; i++) {
235 ret = pt1_do_enable_ram(pt1);
236 if (ret < 0)
237 return ret;
239 return 0;
242 static void pt1_disable_ram(struct pt1 *pt1)
244 pt1_write_reg(pt1, 0, 0x0b0b0000);
247 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
249 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
252 static void pt1_init_streams(struct pt1 *pt1)
254 int i;
255 for (i = 0; i < PT1_NR_ADAPS; i++)
256 pt1_set_stream(pt1, i, 0);
259 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
261 u32 upacket;
262 int i;
263 int index;
264 struct pt1_adapter *adap;
265 int offset;
266 u8 *buf;
268 if (!page->upackets[PT1_NR_UPACKETS - 1])
269 return 0;
271 for (i = 0; i < PT1_NR_UPACKETS; i++) {
272 upacket = le32_to_cpu(page->upackets[i]);
273 index = (upacket >> 29) - 1;
274 if (index < 0 || index >= PT1_NR_ADAPS)
275 continue;
277 adap = pt1->adaps[index];
278 if (upacket >> 25 & 1)
279 adap->upacket_count = 0;
280 else if (!adap->upacket_count)
281 continue;
283 buf = adap->buf;
284 offset = adap->packet_count * 188 + adap->upacket_count * 3;
285 buf[offset] = upacket >> 16;
286 buf[offset + 1] = upacket >> 8;
287 if (adap->upacket_count != 62)
288 buf[offset + 2] = upacket;
290 if (++adap->upacket_count >= 63) {
291 adap->upacket_count = 0;
292 if (++adap->packet_count >= 21) {
293 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
294 adap->packet_count = 0;
299 page->upackets[PT1_NR_UPACKETS - 1] = 0;
300 return 1;
303 static int pt1_thread(void *data)
305 struct pt1 *pt1;
306 int table_index;
307 int buf_index;
308 struct pt1_buffer_page *page;
310 pt1 = data;
311 set_freezable();
313 table_index = 0;
314 buf_index = 0;
316 while (!kthread_should_stop()) {
317 try_to_freeze();
319 page = pt1->tables[table_index].bufs[buf_index].page;
320 if (!pt1_filter(pt1, page)) {
321 schedule_timeout_interruptible((HZ + 999) / 1000);
322 continue;
325 if (++buf_index >= PT1_NR_BUFS) {
326 pt1_increment_table_count(pt1);
327 buf_index = 0;
328 if (++table_index >= pt1_nr_tables)
329 table_index = 0;
333 return 0;
336 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
338 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
341 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
343 void *page;
344 dma_addr_t addr;
346 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
347 GFP_KERNEL);
348 if (page == NULL)
349 return NULL;
351 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
352 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
354 *addrp = addr;
355 *pfnp = addr >> PT1_PAGE_SHIFT;
356 return page;
359 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
361 pt1_free_page(pt1, buf->page, buf->addr);
364 static int
365 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
367 struct pt1_buffer_page *page;
368 dma_addr_t addr;
370 page = pt1_alloc_page(pt1, &addr, pfnp);
371 if (page == NULL)
372 return -ENOMEM;
374 page->upackets[PT1_NR_UPACKETS - 1] = 0;
376 buf->page = page;
377 buf->addr = addr;
378 return 0;
381 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
383 int i;
385 for (i = 0; i < PT1_NR_BUFS; i++)
386 pt1_cleanup_buffer(pt1, &table->bufs[i]);
388 pt1_free_page(pt1, table->page, table->addr);
391 static int
392 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
394 struct pt1_table_page *page;
395 dma_addr_t addr;
396 int i, ret;
397 u32 buf_pfn;
399 page = pt1_alloc_page(pt1, &addr, pfnp);
400 if (page == NULL)
401 return -ENOMEM;
403 for (i = 0; i < PT1_NR_BUFS; i++) {
404 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
405 if (ret < 0)
406 goto err;
408 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
411 pt1_increment_table_count(pt1);
412 table->page = page;
413 table->addr = addr;
414 return 0;
416 err:
417 while (i--)
418 pt1_cleanup_buffer(pt1, &table->bufs[i]);
420 pt1_free_page(pt1, page, addr);
421 return ret;
424 static void pt1_cleanup_tables(struct pt1 *pt1)
426 struct pt1_table *tables;
427 int i;
429 tables = pt1->tables;
430 pt1_unregister_tables(pt1);
432 for (i = 0; i < pt1_nr_tables; i++)
433 pt1_cleanup_table(pt1, &tables[i]);
435 vfree(tables);
438 static int pt1_init_tables(struct pt1 *pt1)
440 struct pt1_table *tables;
441 int i, ret;
442 u32 first_pfn, pfn;
444 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
445 if (tables == NULL)
446 return -ENOMEM;
448 pt1_init_table_count(pt1);
450 i = 0;
451 if (pt1_nr_tables) {
452 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
453 if (ret)
454 goto err;
455 i++;
458 while (i < pt1_nr_tables) {
459 ret = pt1_init_table(pt1, &tables[i], &pfn);
460 if (ret)
461 goto err;
462 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
463 i++;
466 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
468 pt1_register_tables(pt1, first_pfn);
469 pt1->tables = tables;
470 return 0;
472 err:
473 while (i--)
474 pt1_cleanup_table(pt1, &tables[i]);
476 vfree(tables);
477 return ret;
480 static int pt1_start_feed(struct dvb_demux_feed *feed)
482 struct pt1_adapter *adap;
483 adap = container_of(feed->demux, struct pt1_adapter, demux);
484 if (!adap->users++)
485 pt1_set_stream(adap->pt1, adap->index, 1);
486 return 0;
489 static int pt1_stop_feed(struct dvb_demux_feed *feed)
491 struct pt1_adapter *adap;
492 adap = container_of(feed->demux, struct pt1_adapter, demux);
493 if (!--adap->users)
494 pt1_set_stream(adap->pt1, adap->index, 0);
495 return 0;
498 static void
499 pt1_update_power(struct pt1 *pt1)
501 int bits;
502 int i;
503 struct pt1_adapter *adap;
504 static const int sleep_bits[] = {
505 1 << 4,
506 1 << 6 | 1 << 7,
507 1 << 5,
508 1 << 6 | 1 << 8,
511 bits = pt1->power | !pt1->reset << 3;
512 mutex_lock(&pt1->lock);
513 for (i = 0; i < PT1_NR_ADAPS; i++) {
514 adap = pt1->adaps[i];
515 switch (adap->voltage) {
516 case SEC_VOLTAGE_13: /* actually 11V */
517 bits |= 1 << 1;
518 break;
519 case SEC_VOLTAGE_18: /* actually 15V */
520 bits |= 1 << 1 | 1 << 2;
521 break;
522 default:
523 break;
526 bits |= sleep_bits[i];
528 pt1_write_reg(pt1, 1, bits);
529 mutex_unlock(&pt1->lock);
532 static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
534 struct pt1_adapter *adap;
536 adap = container_of(fe->dvb, struct pt1_adapter, adap);
537 adap->voltage = voltage;
538 pt1_update_power(adap->pt1);
540 if (adap->orig_set_voltage)
541 return adap->orig_set_voltage(fe, voltage);
542 else
543 return 0;
546 static int pt1_sleep(struct dvb_frontend *fe)
548 struct pt1_adapter *adap;
550 adap = container_of(fe->dvb, struct pt1_adapter, adap);
551 adap->sleep = 1;
552 pt1_update_power(adap->pt1);
554 if (adap->orig_sleep)
555 return adap->orig_sleep(fe);
556 else
557 return 0;
560 static int pt1_wakeup(struct dvb_frontend *fe)
562 struct pt1_adapter *adap;
564 adap = container_of(fe->dvb, struct pt1_adapter, adap);
565 adap->sleep = 0;
566 pt1_update_power(adap->pt1);
567 schedule_timeout_uninterruptible((HZ + 999) / 1000);
569 if (adap->orig_init)
570 return adap->orig_init(fe);
571 else
572 return 0;
575 static void pt1_free_adapter(struct pt1_adapter *adap)
577 dvb_net_release(&adap->net);
578 adap->demux.dmx.close(&adap->demux.dmx);
579 dvb_dmxdev_release(&adap->dmxdev);
580 dvb_dmx_release(&adap->demux);
581 dvb_unregister_adapter(&adap->adap);
582 free_page((unsigned long)adap->buf);
583 kfree(adap);
586 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
588 static struct pt1_adapter *
589 pt1_alloc_adapter(struct pt1 *pt1)
591 struct pt1_adapter *adap;
592 void *buf;
593 struct dvb_adapter *dvb_adap;
594 struct dvb_demux *demux;
595 struct dmxdev *dmxdev;
596 int ret;
598 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
599 if (!adap) {
600 ret = -ENOMEM;
601 goto err;
604 adap->pt1 = pt1;
606 adap->voltage = SEC_VOLTAGE_OFF;
607 adap->sleep = 1;
609 buf = (u8 *)__get_free_page(GFP_KERNEL);
610 if (!buf) {
611 ret = -ENOMEM;
612 goto err_kfree;
615 adap->buf = buf;
616 adap->upacket_count = 0;
617 adap->packet_count = 0;
619 dvb_adap = &adap->adap;
620 dvb_adap->priv = adap;
621 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
622 &pt1->pdev->dev, adapter_nr);
623 if (ret < 0)
624 goto err_free_page;
626 demux = &adap->demux;
627 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
628 demux->priv = adap;
629 demux->feednum = 256;
630 demux->filternum = 256;
631 demux->start_feed = pt1_start_feed;
632 demux->stop_feed = pt1_stop_feed;
633 demux->write_to_decoder = NULL;
634 ret = dvb_dmx_init(demux);
635 if (ret < 0)
636 goto err_unregister_adapter;
638 dmxdev = &adap->dmxdev;
639 dmxdev->filternum = 256;
640 dmxdev->demux = &demux->dmx;
641 dmxdev->capabilities = 0;
642 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
643 if (ret < 0)
644 goto err_dmx_release;
646 dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
648 return adap;
650 err_dmx_release:
651 dvb_dmx_release(demux);
652 err_unregister_adapter:
653 dvb_unregister_adapter(dvb_adap);
654 err_free_page:
655 free_page((unsigned long)buf);
656 err_kfree:
657 kfree(adap);
658 err:
659 return ERR_PTR(ret);
662 static void pt1_cleanup_adapters(struct pt1 *pt1)
664 int i;
665 for (i = 0; i < PT1_NR_ADAPS; i++)
666 pt1_free_adapter(pt1->adaps[i]);
669 static int pt1_init_adapters(struct pt1 *pt1)
671 int i;
672 struct pt1_adapter *adap;
673 int ret;
675 for (i = 0; i < PT1_NR_ADAPS; i++) {
676 adap = pt1_alloc_adapter(pt1);
677 if (IS_ERR(adap)) {
678 ret = PTR_ERR(adap);
679 goto err;
682 adap->index = i;
683 pt1->adaps[i] = adap;
685 return 0;
687 err:
688 while (i--)
689 pt1_free_adapter(pt1->adaps[i]);
691 return ret;
694 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
696 dvb_unregister_frontend(adap->fe);
699 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
701 int ret;
703 adap->orig_set_voltage = fe->ops.set_voltage;
704 adap->orig_sleep = fe->ops.sleep;
705 adap->orig_init = fe->ops.init;
706 fe->ops.set_voltage = pt1_set_voltage;
707 fe->ops.sleep = pt1_sleep;
708 fe->ops.init = pt1_wakeup;
710 ret = dvb_register_frontend(&adap->adap, fe);
711 if (ret < 0)
712 return ret;
714 adap->fe = fe;
715 return 0;
718 static void pt1_cleanup_frontends(struct pt1 *pt1)
720 int i;
721 for (i = 0; i < PT1_NR_ADAPS; i++)
722 pt1_cleanup_frontend(pt1->adaps[i]);
725 struct pt1_config {
726 struct va1j5jf8007s_config va1j5jf8007s_config;
727 struct va1j5jf8007t_config va1j5jf8007t_config;
730 static const struct pt1_config pt1_configs[2] = {
733 .demod_address = 0x1b,
734 .frequency = VA1J5JF8007S_20MHZ,
737 .demod_address = 0x1a,
738 .frequency = VA1J5JF8007T_20MHZ,
740 }, {
742 .demod_address = 0x19,
743 .frequency = VA1J5JF8007S_20MHZ,
746 .demod_address = 0x18,
747 .frequency = VA1J5JF8007T_20MHZ,
752 static const struct pt1_config pt2_configs[2] = {
755 .demod_address = 0x1b,
756 .frequency = VA1J5JF8007S_25MHZ,
759 .demod_address = 0x1a,
760 .frequency = VA1J5JF8007T_25MHZ,
762 }, {
764 .demod_address = 0x19,
765 .frequency = VA1J5JF8007S_25MHZ,
768 .demod_address = 0x18,
769 .frequency = VA1J5JF8007T_25MHZ,
774 static int pt1_init_frontends(struct pt1 *pt1)
776 int i, j;
777 struct i2c_adapter *i2c_adap;
778 const struct pt1_config *configs, *config;
779 struct dvb_frontend *fe[4];
780 int ret;
782 i = 0;
783 j = 0;
785 i2c_adap = &pt1->i2c_adap;
786 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
787 do {
788 config = &configs[i / 2];
790 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
791 i2c_adap);
792 if (!fe[i]) {
793 ret = -ENODEV; /* This does not sound nice... */
794 goto err;
796 i++;
798 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
799 i2c_adap);
800 if (!fe[i]) {
801 ret = -ENODEV;
802 goto err;
804 i++;
806 ret = va1j5jf8007s_prepare(fe[i - 2]);
807 if (ret < 0)
808 goto err;
810 ret = va1j5jf8007t_prepare(fe[i - 1]);
811 if (ret < 0)
812 goto err;
814 } while (i < 4);
816 do {
817 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
818 if (ret < 0)
819 goto err;
820 } while (++j < 4);
822 return 0;
824 err:
825 while (i-- > j)
826 fe[i]->ops.release(fe[i]);
828 while (j--)
829 dvb_unregister_frontend(fe[j]);
831 return ret;
834 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
835 int clock, int data, int next_addr)
837 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
838 !clock << 11 | !data << 10 | next_addr);
841 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
843 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
844 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
845 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
846 *addrp = addr + 3;
849 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
851 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
852 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
853 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
854 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
855 *addrp = addr + 4;
858 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
860 int i;
861 for (i = 0; i < 8; i++)
862 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
863 pt1_i2c_write_bit(pt1, addr, &addr, 1);
864 *addrp = addr;
867 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
869 int i;
870 for (i = 0; i < 8; i++)
871 pt1_i2c_read_bit(pt1, addr, &addr);
872 pt1_i2c_write_bit(pt1, addr, &addr, last);
873 *addrp = addr;
876 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
878 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
879 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
880 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
881 *addrp = addr + 3;
884 static void
885 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
887 int i;
888 pt1_i2c_prepare(pt1, addr, &addr);
889 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
890 for (i = 0; i < msg->len; i++)
891 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
892 *addrp = addr;
895 static void
896 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
898 int i;
899 pt1_i2c_prepare(pt1, addr, &addr);
900 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
901 for (i = 0; i < msg->len; i++)
902 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
903 *addrp = addr;
906 static int pt1_i2c_end(struct pt1 *pt1, int addr)
908 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
909 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
910 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
912 pt1_write_reg(pt1, 0, 0x00000004);
913 do {
914 if (signal_pending(current))
915 return -EINTR;
916 schedule_timeout_interruptible((HZ + 999) / 1000);
917 } while (pt1_read_reg(pt1, 0) & 0x00000080);
918 return 0;
921 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
923 int addr;
924 addr = 0;
926 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
927 addr = addr + 1;
929 if (!pt1->i2c_running) {
930 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
931 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
932 addr = addr + 2;
933 pt1->i2c_running = 1;
935 *addrp = addr;
938 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
940 struct pt1 *pt1;
941 int i;
942 struct i2c_msg *msg, *next_msg;
943 int addr, ret;
944 u16 len;
945 u32 word;
947 pt1 = i2c_get_adapdata(adap);
949 for (i = 0; i < num; i++) {
950 msg = &msgs[i];
951 if (msg->flags & I2C_M_RD)
952 return -ENOTSUPP;
954 if (i + 1 < num)
955 next_msg = &msgs[i + 1];
956 else
957 next_msg = NULL;
959 if (next_msg && next_msg->flags & I2C_M_RD) {
960 i++;
962 len = next_msg->len;
963 if (len > 4)
964 return -ENOTSUPP;
966 pt1_i2c_begin(pt1, &addr);
967 pt1_i2c_write_msg(pt1, addr, &addr, msg);
968 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
969 ret = pt1_i2c_end(pt1, addr);
970 if (ret < 0)
971 return ret;
973 word = pt1_read_reg(pt1, 2);
974 while (len--) {
975 next_msg->buf[len] = word;
976 word >>= 8;
978 } else {
979 pt1_i2c_begin(pt1, &addr);
980 pt1_i2c_write_msg(pt1, addr, &addr, msg);
981 ret = pt1_i2c_end(pt1, addr);
982 if (ret < 0)
983 return ret;
987 return num;
990 static u32 pt1_i2c_func(struct i2c_adapter *adap)
992 return I2C_FUNC_I2C;
995 static const struct i2c_algorithm pt1_i2c_algo = {
996 .master_xfer = pt1_i2c_xfer,
997 .functionality = pt1_i2c_func,
1000 static void pt1_i2c_wait(struct pt1 *pt1)
1002 int i;
1003 for (i = 0; i < 128; i++)
1004 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1007 static void pt1_i2c_init(struct pt1 *pt1)
1009 int i;
1010 for (i = 0; i < 1024; i++)
1011 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1014 static void __devexit pt1_remove(struct pci_dev *pdev)
1016 struct pt1 *pt1;
1017 void __iomem *regs;
1019 pt1 = pci_get_drvdata(pdev);
1020 regs = pt1->regs;
1022 kthread_stop(pt1->kthread);
1023 pt1_cleanup_tables(pt1);
1024 pt1_cleanup_frontends(pt1);
1025 pt1_disable_ram(pt1);
1026 pt1->power = 0;
1027 pt1->reset = 1;
1028 pt1_update_power(pt1);
1029 pt1_cleanup_adapters(pt1);
1030 i2c_del_adapter(&pt1->i2c_adap);
1031 pci_set_drvdata(pdev, NULL);
1032 kfree(pt1);
1033 pci_iounmap(pdev, regs);
1034 pci_release_regions(pdev);
1035 pci_disable_device(pdev);
1038 static int __devinit
1039 pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1041 int ret;
1042 void __iomem *regs;
1043 struct pt1 *pt1;
1044 struct i2c_adapter *i2c_adap;
1045 struct task_struct *kthread;
1047 ret = pci_enable_device(pdev);
1048 if (ret < 0)
1049 goto err;
1051 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1052 if (ret < 0)
1053 goto err_pci_disable_device;
1055 pci_set_master(pdev);
1057 ret = pci_request_regions(pdev, DRIVER_NAME);
1058 if (ret < 0)
1059 goto err_pci_disable_device;
1061 regs = pci_iomap(pdev, 0, 0);
1062 if (!regs) {
1063 ret = -EIO;
1064 goto err_pci_release_regions;
1067 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1068 if (!pt1) {
1069 ret = -ENOMEM;
1070 goto err_pci_iounmap;
1073 mutex_init(&pt1->lock);
1074 pt1->pdev = pdev;
1075 pt1->regs = regs;
1076 pci_set_drvdata(pdev, pt1);
1078 ret = pt1_init_adapters(pt1);
1079 if (ret < 0)
1080 goto err_kfree;
1082 mutex_init(&pt1->lock);
1084 pt1->power = 0;
1085 pt1->reset = 1;
1086 pt1_update_power(pt1);
1088 i2c_adap = &pt1->i2c_adap;
1089 i2c_adap->class = I2C_CLASS_TV_DIGITAL;
1090 i2c_adap->algo = &pt1_i2c_algo;
1091 i2c_adap->algo_data = NULL;
1092 i2c_adap->dev.parent = &pdev->dev;
1093 i2c_set_adapdata(i2c_adap, pt1);
1094 ret = i2c_add_adapter(i2c_adap);
1095 if (ret < 0)
1096 goto err_pt1_cleanup_adapters;
1098 pt1_i2c_init(pt1);
1099 pt1_i2c_wait(pt1);
1101 ret = pt1_sync(pt1);
1102 if (ret < 0)
1103 goto err_i2c_del_adapter;
1105 pt1_identify(pt1);
1107 ret = pt1_unlock(pt1);
1108 if (ret < 0)
1109 goto err_i2c_del_adapter;
1111 ret = pt1_reset_pci(pt1);
1112 if (ret < 0)
1113 goto err_i2c_del_adapter;
1115 ret = pt1_reset_ram(pt1);
1116 if (ret < 0)
1117 goto err_i2c_del_adapter;
1119 ret = pt1_enable_ram(pt1);
1120 if (ret < 0)
1121 goto err_i2c_del_adapter;
1123 pt1_init_streams(pt1);
1125 pt1->power = 1;
1126 pt1_update_power(pt1);
1127 schedule_timeout_uninterruptible((HZ + 49) / 50);
1129 pt1->reset = 0;
1130 pt1_update_power(pt1);
1131 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1133 ret = pt1_init_frontends(pt1);
1134 if (ret < 0)
1135 goto err_pt1_disable_ram;
1137 ret = pt1_init_tables(pt1);
1138 if (ret < 0)
1139 goto err_pt1_cleanup_frontends;
1141 kthread = kthread_run(pt1_thread, pt1, "pt1");
1142 if (IS_ERR(kthread)) {
1143 ret = PTR_ERR(kthread);
1144 goto err_pt1_cleanup_tables;
1147 pt1->kthread = kthread;
1148 return 0;
1150 err_pt1_cleanup_tables:
1151 pt1_cleanup_tables(pt1);
1152 err_pt1_cleanup_frontends:
1153 pt1_cleanup_frontends(pt1);
1154 err_pt1_disable_ram:
1155 pt1_disable_ram(pt1);
1156 pt1->power = 0;
1157 pt1->reset = 1;
1158 pt1_update_power(pt1);
1159 err_pt1_cleanup_adapters:
1160 pt1_cleanup_adapters(pt1);
1161 err_i2c_del_adapter:
1162 i2c_del_adapter(i2c_adap);
1163 err_kfree:
1164 pci_set_drvdata(pdev, NULL);
1165 kfree(pt1);
1166 err_pci_iounmap:
1167 pci_iounmap(pdev, regs);
1168 err_pci_release_regions:
1169 pci_release_regions(pdev);
1170 err_pci_disable_device:
1171 pci_disable_device(pdev);
1172 err:
1173 return ret;
1177 static struct pci_device_id pt1_id_table[] = {
1178 { PCI_DEVICE(0x10ee, 0x211a) },
1179 { PCI_DEVICE(0x10ee, 0x222a) },
1180 { },
1182 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1184 static struct pci_driver pt1_driver = {
1185 .name = DRIVER_NAME,
1186 .probe = pt1_probe,
1187 .remove = __devexit_p(pt1_remove),
1188 .id_table = pt1_id_table,
1192 static int __init pt1_init(void)
1194 return pci_register_driver(&pt1_driver);
1198 static void __exit pt1_cleanup(void)
1200 pci_unregister_driver(&pt1_driver);
1203 module_init(pt1_init);
1204 module_exit(pt1_cleanup);
1206 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1207 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1208 MODULE_LICENSE("GPL");