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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / media / dvb / frontends / cx24123.c
blob0d5b48d77cc9d828e690ed67f61e96db058ae300
1 /*
2 * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
3 *
4 * Copyright (C) 2005 Steven Toth <stoth@linuxtv.org>
5 *
6 * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
7 *
8 * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29
30 #include "dvb_frontend.h"
31 #include "cx24123.h"
32
33 #define XTAL 10111000
34
35 static int force_band;
36 module_param(force_band, int, 0644);
37 MODULE_PARM_DESC(force_band, "Force a specific band select "\
38 "(1-9, default:off).");
39
40 static int debug;
41 module_param(debug, int, 0644);
42 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
43
44 #define info(args...) do { printk(KERN_INFO "CX24123: " args); } while (0)
45 #define err(args...) do { printk(KERN_ERR "CX24123: " args); } while (0)
46
47 #define dprintk(args...) \
48 do { \
49 if (debug) { \
50 printk(KERN_DEBUG "CX24123: %s: ", __func__); \
51 printk(args); \
52 } \
53 } while (0)
54
55 struct cx24123_state {
56 struct i2c_adapter *i2c;
57 const struct cx24123_config *config;
58
59 struct dvb_frontend frontend;
60
61 /* Some PLL specifics for tuning */
62 u32 VCAarg;
63 u32 VGAarg;
64 u32 bandselectarg;
65 u32 pllarg;
66 u32 FILTune;
67
68 struct i2c_adapter tuner_i2c_adapter;
69
70 u8 demod_rev;
71
72 /* The Demod/Tuner can't easily provide these, we cache them */
73 u32 currentfreq;
74 u32 currentsymbolrate;
75 };
76
77 /* Various tuner defaults need to be established for a given symbol rate Sps */
78 static struct cx24123_AGC_val {
79 u32 symbolrate_low;
80 u32 symbolrate_high;
81 u32 VCAprogdata;
82 u32 VGAprogdata;
83 u32 FILTune;
84 } cx24123_AGC_vals[] =
85 {
86 {
87 .symbolrate_low = 1000000,
88 .symbolrate_high = 4999999,
89 /* the specs recommend other values for VGA offsets,
90 but tests show they are wrong */
91 .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
92 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07,
93 .FILTune = 0x27f /* 0.41 V */
94 },
95 {
96 .symbolrate_low = 5000000,
97 .symbolrate_high = 14999999,
98 .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
99 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f,
100 .FILTune = 0x317 /* 0.90 V */
101 },
102 {
103 .symbolrate_low = 15000000,
104 .symbolrate_high = 45000000,
105 .VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180,
106 .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f,
107 .FILTune = 0x145 /* 2.70 V */
108 },
109 };
110
111 static struct cx24123_bandselect_val {
112 u32 freq_low;
113 u32 freq_high;
114 u32 VCOdivider;
115 u32 progdata;
116 } cx24123_bandselect_vals[] =
117 {
118 /* band 1 */
119 {
120 .freq_low = 950000,
121 .freq_high = 1074999,
122 .VCOdivider = 4,
123 .progdata = (0 << 19) | (0 << 9) | 0x40,
124 },
125
126 /* band 2 */
127 {
128 .freq_low = 1075000,
129 .freq_high = 1177999,
130 .VCOdivider = 4,
131 .progdata = (0 << 19) | (0 << 9) | 0x80,
132 },
133
134 /* band 3 */
135 {
136 .freq_low = 1178000,
137 .freq_high = 1295999,
138 .VCOdivider = 2,
139 .progdata = (0 << 19) | (1 << 9) | 0x01,
140 },
141
142 /* band 4 */
143 {
144 .freq_low = 1296000,
145 .freq_high = 1431999,
146 .VCOdivider = 2,
147 .progdata = (0 << 19) | (1 << 9) | 0x02,
148 },
149
150 /* band 5 */
151 {
152 .freq_low = 1432000,
153 .freq_high = 1575999,
154 .VCOdivider = 2,
155 .progdata = (0 << 19) | (1 << 9) | 0x04,
156 },
157
158 /* band 6 */
159 {
160 .freq_low = 1576000,
161 .freq_high = 1717999,
162 .VCOdivider = 2,
163 .progdata = (0 << 19) | (1 << 9) | 0x08,
164 },
165
166 /* band 7 */
167 {
168 .freq_low = 1718000,
169 .freq_high = 1855999,
170 .VCOdivider = 2,
171 .progdata = (0 << 19) | (1 << 9) | 0x10,
172 },
173
174 /* band 8 */
175 {
176 .freq_low = 1856000,
177 .freq_high = 2035999,
178 .VCOdivider = 2,
179 .progdata = (0 << 19) | (1 << 9) | 0x20,
180 },
181
182 /* band 9 */
183 {
184 .freq_low = 2036000,
185 .freq_high = 2150000,
186 .VCOdivider = 2,
187 .progdata = (0 << 19) | (1 << 9) | 0x40,
188 },
189 };
190
191 static struct {
192 u8 reg;
193 u8 data;
194 } cx24123_regdata[] =
195 {
196 {0x00, 0x03}, /* Reset system */
197 {0x00, 0x00}, /* Clear reset */
198 {0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */
199 {0x04, 0x10}, /* MPEG */
200 {0x05, 0x04}, /* MPEG */
201 {0x06, 0x31}, /* MPEG (default) */
202 {0x0b, 0x00}, /* Freq search start point (default) */
203 {0x0c, 0x00}, /* Demodulator sample gain (default) */
204 {0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */
205 {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
206 {0x0f, 0xfe}, /* FEC search mask (all supported codes) */
207 {0x10, 0x01}, /* Default search inversion, no repeat (default) */
208 {0x16, 0x00}, /* Enable reading of frequency */
209 {0x17, 0x01}, /* Enable EsNO Ready Counter */
210 {0x1c, 0x80}, /* Enable error counter */
211 {0x20, 0x00}, /* Tuner burst clock rate = 500KHz */
212 {0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */
213 {0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */
214 {0x29, 0x00}, /* DiSEqC LNB_DC off */
215 {0x2a, 0xb0}, /* DiSEqC Parameters (default) */
216 {0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */
217 {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */
218 {0x2d, 0x00},
219 {0x2e, 0x00},
220 {0x2f, 0x00},
221 {0x30, 0x00},
222 {0x31, 0x00},
223 {0x32, 0x8c}, /* DiSEqC Parameters (default) */
224 {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */
225 {0x34, 0x00},
226 {0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */
227 {0x36, 0x02}, /* DiSEqC Parameters (default) */
228 {0x37, 0x3a}, /* DiSEqC Parameters (default) */
229 {0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */
230 {0x44, 0x00}, /* Constellation (default) */
231 {0x45, 0x00}, /* Symbol count (default) */
232 {0x46, 0x0d}, /* Symbol rate estimator on (default) */
233 {0x56, 0xc1}, /* Error Counter = Viterbi BER */
234 {0x57, 0xff}, /* Error Counter Window (default) */
235 {0x5c, 0x20}, /* Acquisition AFC Expiration window (default is 0x10) */
236 {0x67, 0x83}, /* Non-DCII symbol clock */
237 };
238
239 static int cx24123_i2c_writereg(struct cx24123_state *state,
240 u8 i2c_addr, int reg, int data)
241 {
242 u8 buf[] = { reg, data };
243 struct i2c_msg msg = {
244 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
245 };
246 int err;
247
248 /* printk(KERN_DEBUG "wr(%02x): %02x %02x\n", i2c_addr, reg, data); */
249
250 err = i2c_transfer(state->i2c, &msg, 1);
251 if (err != 1) {
252 printk("%s: writereg error(err == %i, reg == 0x%02x,"
253 " data == 0x%02x)\n", __func__, err, reg, data);
254 return err;
255 }
256
257 return 0;
258 }
259
260 static int cx24123_i2c_readreg(struct cx24123_state *state, u8 i2c_addr, u8 reg)
261 {
262 int ret;
263 u8 b = 0;
264 struct i2c_msg msg[] = {
265 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
266 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &b, .len = 1 }
267 };
268
269 ret = i2c_transfer(state->i2c, msg, 2);
270
271 if (ret != 2) {
272 err("%s: reg=0x%x (error=%d)\n", __func__, reg, ret);
273 return ret;
274 }
275
276 /* printk(KERN_DEBUG "rd(%02x): %02x %02x\n", i2c_addr, reg, b); */
277
278 return b;
279 }
280
281 #define cx24123_readreg(state, reg) \
282 cx24123_i2c_readreg(state, state->config->demod_address, reg)
283 #define cx24123_writereg(state, reg, val) \
284 cx24123_i2c_writereg(state, state->config->demod_address, reg, val)
285
286 static int cx24123_set_inversion(struct cx24123_state *state,
287 fe_spectral_inversion_t inversion)
288 {
289 u8 nom_reg = cx24123_readreg(state, 0x0e);
290 u8 auto_reg = cx24123_readreg(state, 0x10);
291
292 switch (inversion) {
293 case INVERSION_OFF:
294 dprintk("inversion off\n");
295 cx24123_writereg(state, 0x0e, nom_reg & ~0x80);
296 cx24123_writereg(state, 0x10, auto_reg | 0x80);
297 break;
298 case INVERSION_ON:
299 dprintk("inversion on\n");
300 cx24123_writereg(state, 0x0e, nom_reg | 0x80);
301 cx24123_writereg(state, 0x10, auto_reg | 0x80);
302 break;
303 case INVERSION_AUTO:
304 dprintk("inversion auto\n");
305 cx24123_writereg(state, 0x10, auto_reg & ~0x80);
306 break;
307 default:
308 return -EINVAL;
309 }
310
311 return 0;
312 }
313
314 static int cx24123_get_inversion(struct cx24123_state *state,
315 fe_spectral_inversion_t *inversion)
316 {
317 u8 val;
318
319 val = cx24123_readreg(state, 0x1b) >> 7;
320
321 if (val == 0) {
322 dprintk("read inversion off\n");
323 *inversion = INVERSION_OFF;
324 } else {
325 dprintk("read inversion on\n");
326 *inversion = INVERSION_ON;
327 }
328
329 return 0;
330 }
331
332 static int cx24123_set_fec(struct cx24123_state *state, fe_code_rate_t fec)
333 {
334 u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07;
335
336 if ((fec < FEC_NONE) || (fec > FEC_AUTO))
337 fec = FEC_AUTO;
338
339 /* Set the soft decision threshold */
340 if (fec == FEC_1_2)
341 cx24123_writereg(state, 0x43,
342 cx24123_readreg(state, 0x43) | 0x01);
343 else
344 cx24123_writereg(state, 0x43,
345 cx24123_readreg(state, 0x43) & ~0x01);
346
347 switch (fec) {
348 case FEC_1_2:
349 dprintk("set FEC to 1/2\n");
350 cx24123_writereg(state, 0x0e, nom_reg | 0x01);
351 cx24123_writereg(state, 0x0f, 0x02);
352 break;
353 case FEC_2_3:
354 dprintk("set FEC to 2/3\n");
355 cx24123_writereg(state, 0x0e, nom_reg | 0x02);
356 cx24123_writereg(state, 0x0f, 0x04);
357 break;
358 case FEC_3_4:
359 dprintk("set FEC to 3/4\n");
360 cx24123_writereg(state, 0x0e, nom_reg | 0x03);
361 cx24123_writereg(state, 0x0f, 0x08);
362 break;
363 case FEC_4_5:
364 dprintk("set FEC to 4/5\n");
365 cx24123_writereg(state, 0x0e, nom_reg | 0x04);
366 cx24123_writereg(state, 0x0f, 0x10);
367 break;
368 case FEC_5_6:
369 dprintk("set FEC to 5/6\n");
370 cx24123_writereg(state, 0x0e, nom_reg | 0x05);
371 cx24123_writereg(state, 0x0f, 0x20);
372 break;
373 case FEC_6_7:
374 dprintk("set FEC to 6/7\n");
375 cx24123_writereg(state, 0x0e, nom_reg | 0x06);
376 cx24123_writereg(state, 0x0f, 0x40);
377 break;
378 case FEC_7_8:
379 dprintk("set FEC to 7/8\n");
380 cx24123_writereg(state, 0x0e, nom_reg | 0x07);
381 cx24123_writereg(state, 0x0f, 0x80);
382 break;
383 case FEC_AUTO:
384 dprintk("set FEC to auto\n");
385 cx24123_writereg(state, 0x0f, 0xfe);
386 break;
387 default:
388 return -EOPNOTSUPP;
389 }
390
391 return 0;
392 }
393
394 static int cx24123_get_fec(struct cx24123_state *state, fe_code_rate_t *fec)
395 {
396 int ret;
397
398 ret = cx24123_readreg(state, 0x1b);
399 if (ret < 0)
400 return ret;
401 ret = ret & 0x07;
402
403 switch (ret) {
404 case 1:
405 *fec = FEC_1_2;
406 break;
407 case 2:
408 *fec = FEC_2_3;
409 break;
410 case 3:
411 *fec = FEC_3_4;
412 break;
413 case 4:
414 *fec = FEC_4_5;
415 break;
416 case 5:
417 *fec = FEC_5_6;
418 break;
419 case 6:
420 *fec = FEC_6_7;
421 break;
422 case 7:
423 *fec = FEC_7_8;
424 break;
425 default:
426 /* this can happen when there's no lock */
427 *fec = FEC_NONE;
428 }
429
430 return 0;
431 }
432
433 /* Approximation of closest integer of log2(a/b). It actually gives the
434 lowest integer i such that 2^i >= round(a/b) */
435 static u32 cx24123_int_log2(u32 a, u32 b)
436 {
437 u32 exp, nearest = 0;
438 u32 div = a / b;
439 if (a % b >= b / 2)
440 ++div;
441 if (div < (1 << 31)) {
442 for (exp = 1; div > exp; nearest++)
443 exp += exp;
444 }
445 return nearest;
446 }
447
448 static int cx24123_set_symbolrate(struct cx24123_state *state, u32 srate)
449 {
450 u32 tmp, sample_rate, ratio, sample_gain;
451 u8 pll_mult;
452
453 /* check if symbol rate is within limits */
454 if ((srate > state->frontend.ops.info.symbol_rate_max) ||
455 (srate < state->frontend.ops.info.symbol_rate_min))
456 return -EOPNOTSUPP;
457
458 /* choose the sampling rate high enough for the required operation,
459 while optimizing the power consumed by the demodulator */
460 if (srate < (XTAL*2)/2)
461 pll_mult = 2;
462 else if (srate < (XTAL*3)/2)
463 pll_mult = 3;
464 else if (srate < (XTAL*4)/2)
465 pll_mult = 4;
466 else if (srate < (XTAL*5)/2)
467 pll_mult = 5;
468 else if (srate < (XTAL*6)/2)
469 pll_mult = 6;
470 else if (srate < (XTAL*7)/2)
471 pll_mult = 7;
472 else if (srate < (XTAL*8)/2)
473 pll_mult = 8;
474 else
475 pll_mult = 9;
476
477
478 sample_rate = pll_mult * XTAL;
479
480 /*
481 SYSSymbolRate[21:0] = (srate << 23) / sample_rate
482
483 We have to use 32 bit unsigned arithmetic without precision loss.
484 The maximum srate is 45000000 or 0x02AEA540. This number has
485 only 6 clear bits on top, hence we can shift it left only 6 bits
486 at a time. Borrowed from cx24110.c
487 */
488
489 tmp = srate << 6;
490 ratio = tmp / sample_rate;
491
492 tmp = (tmp % sample_rate) << 6;
493 ratio = (ratio << 6) + (tmp / sample_rate);
494
495 tmp = (tmp % sample_rate) << 6;
496 ratio = (ratio << 6) + (tmp / sample_rate);
497
498 tmp = (tmp % sample_rate) << 5;
499 ratio = (ratio << 5) + (tmp / sample_rate);
500
501
502 cx24123_writereg(state, 0x01, pll_mult * 6);
503
504 cx24123_writereg(state, 0x08, (ratio >> 16) & 0x3f);
505 cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff);
506 cx24123_writereg(state, 0x0a, ratio & 0xff);
507
508 /* also set the demodulator sample gain */
509 sample_gain = cx24123_int_log2(sample_rate, srate);
510 tmp = cx24123_readreg(state, 0x0c) & ~0xe0;
511 cx24123_writereg(state, 0x0c, tmp | sample_gain << 5);
512
513 dprintk("srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n",
514 srate, ratio, sample_rate, sample_gain);
515
516 return 0;
517 }
518
519 /*
520 * Based on the required frequency and symbolrate, the tuner AGC has
521 * to be configured and the correct band selected.
522 * Calculate those values.
523 */
524 static int cx24123_pll_calculate(struct dvb_frontend *fe,
525 struct dvb_frontend_parameters *p)
526 {
527 struct cx24123_state *state = fe->demodulator_priv;
528 u32 ndiv = 0, adiv = 0, vco_div = 0;
529 int i = 0;
530 int pump = 2;
531 int band = 0;
532 int num_bands = ARRAY_SIZE(cx24123_bandselect_vals);
533 struct cx24123_bandselect_val *bsv = NULL;
534 struct cx24123_AGC_val *agcv = NULL;
535
536 /* Defaults for low freq, low rate */
537 state->VCAarg = cx24123_AGC_vals[0].VCAprogdata;
538 state->VGAarg = cx24123_AGC_vals[0].VGAprogdata;
539 state->bandselectarg = cx24123_bandselect_vals[0].progdata;
540 vco_div = cx24123_bandselect_vals[0].VCOdivider;
541
542 /* For the given symbol rate, determine the VCA, VGA and
543 * FILTUNE programming bits */
544 for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) {
545 agcv = &cx24123_AGC_vals[i];
546 if ((agcv->symbolrate_low <= p->u.qpsk.symbol_rate) &&
547 (agcv->symbolrate_high >= p->u.qpsk.symbol_rate)) {
548 state->VCAarg = agcv->VCAprogdata;
549 state->VGAarg = agcv->VGAprogdata;
550 state->FILTune = agcv->FILTune;
551 }
552 }
553
554 /* determine the band to use */
555 if (force_band < 1 || force_band > num_bands) {
556 for (i = 0; i < num_bands; i++) {
557 bsv = &cx24123_bandselect_vals[i];
558 if ((bsv->freq_low <= p->frequency) &&
559 (bsv->freq_high >= p->frequency))
560 band = i;
561 }
562 } else
563 band = force_band - 1;
564
565 state->bandselectarg = cx24123_bandselect_vals[band].progdata;
566 vco_div = cx24123_bandselect_vals[band].VCOdivider;
567
568 /* determine the charge pump current */
569 if (p->frequency < (cx24123_bandselect_vals[band].freq_low +
570 cx24123_bandselect_vals[band].freq_high) / 2)
571 pump = 0x01;
572 else
573 pump = 0x02;
574
575 /* Determine the N/A dividers for the requested lband freq (in kHz). */
576 /* Note: the reference divider R=10, frequency is in KHz,
577 * XTAL is in Hz */
578 ndiv = (((p->frequency * vco_div * 10) /
579 (2 * XTAL / 1000)) / 32) & 0x1ff;
580 adiv = (((p->frequency * vco_div * 10) /
581 (2 * XTAL / 1000)) % 32) & 0x1f;
582
583 if (adiv == 0 && ndiv > 0)
584 ndiv--;
585
586 /* control bits 11, refdiv 11, charge pump polarity 1,
587 * charge pump current, ndiv, adiv */
588 state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) |
589 (pump << 14) | (ndiv << 5) | adiv;
590
591 return 0;
592 }
593
594 /*
595 * Tuner data is 21 bits long, must be left-aligned in data.
596 * Tuner cx24109 is written through a dedicated 3wire interface
597 * on the demod chip.
598 */
599 static int cx24123_pll_writereg(struct dvb_frontend *fe,
600 struct dvb_frontend_parameters *p, u32 data)
601 {
602 struct cx24123_state *state = fe->demodulator_priv;
603 unsigned long timeout;
604
605 dprintk("pll writereg called, data=0x%08x\n", data);
606
607 /* align the 21 bytes into to bit23 boundary */
608 data = data << 3;
609
610 /* Reset the demod pll word length to 0x15 bits */
611 cx24123_writereg(state, 0x21, 0x15);
612
613 /* write the msb 8 bits, wait for the send to be completed */
614 timeout = jiffies + msecs_to_jiffies(40);
615 cx24123_writereg(state, 0x22, (data >> 16) & 0xff);
616 while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
617 if (time_after(jiffies, timeout)) {
618 err("%s: demodulator is not responding, "\
619 "possibly hung, aborting.\n", __func__);
620 return -EREMOTEIO;
621 }
622 msleep(10);
623 }
624
625 /* send another 8 bytes, wait for the send to be completed */
626 timeout = jiffies + msecs_to_jiffies(40);
627 cx24123_writereg(state, 0x22, (data >> 8) & 0xff);
628 while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
629 if (time_after(jiffies, timeout)) {
630 err("%s: demodulator is not responding, "\
631 "possibly hung, aborting.\n", __func__);
632 return -EREMOTEIO;
633 }
634 msleep(10);
635 }
636
637 /* send the lower 5 bits of this byte, padded with 3 LBB,
638 * wait for the send to be completed */
639 timeout = jiffies + msecs_to_jiffies(40);
640 cx24123_writereg(state, 0x22, (data) & 0xff);
641 while ((cx24123_readreg(state, 0x20) & 0x80)) {
642 if (time_after(jiffies, timeout)) {
643 err("%s: demodulator is not responding," \
644 "possibly hung, aborting.\n", __func__);
645 return -EREMOTEIO;
646 }
647 msleep(10);
648 }
649
650 /* Trigger the demod to configure the tuner */
651 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);
652 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);
653
654 return 0;
655 }
656
657 static int cx24123_pll_tune(struct dvb_frontend *fe,
658 struct dvb_frontend_parameters *p)
659 {
660 struct cx24123_state *state = fe->demodulator_priv;
661 u8 val;
662
663 dprintk("frequency=%i\n", p->frequency);
664
665 if (cx24123_pll_calculate(fe, p) != 0) {
666 err("%s: cx24123_pll_calcutate failed\n", __func__);
667 return -EINVAL;
668 }
669
670 /* Write the new VCO/VGA */
671 cx24123_pll_writereg(fe, p, state->VCAarg);
672 cx24123_pll_writereg(fe, p, state->VGAarg);
673
674 /* Write the new bandselect and pll args */
675 cx24123_pll_writereg(fe, p, state->bandselectarg);
676 cx24123_pll_writereg(fe, p, state->pllarg);
677
678 /* set the FILTUNE voltage */
679 val = cx24123_readreg(state, 0x28) & ~0x3;
680 cx24123_writereg(state, 0x27, state->FILTune >> 2);
681 cx24123_writereg(state, 0x28, val | (state->FILTune & 0x3));
682
683 dprintk("pll tune VCA=%d, band=%d, pll=%d\n", state->VCAarg,
684 state->bandselectarg, state->pllarg);
685
686 return 0;
687 }
688
689
690 /*
691 * 0x23:
692 * [7:7] = BTI enabled
693 * [6:6] = I2C repeater enabled
694 * [5:5] = I2C repeater start
695 * [0:0] = BTI start
696 */
697
698 /* mode == 1 -> i2c-repeater, 0 -> bti */
699 static int cx24123_repeater_mode(struct cx24123_state *state, u8 mode, u8 start)
700 {
701 u8 r = cx24123_readreg(state, 0x23) & 0x1e;
702 if (mode)
703 r |= (1 << 6) | (start << 5);
704 else
705 r |= (1 << 7) | (start);
706 return cx24123_writereg(state, 0x23, r);
707 }
708
709 static int cx24123_initfe(struct dvb_frontend *fe)
710 {
711 struct cx24123_state *state = fe->demodulator_priv;
712 int i;
713
714 dprintk("init frontend\n");
715
716 /* Configure the demod to a good set of defaults */
717 for (i = 0; i < ARRAY_SIZE(cx24123_regdata); i++)
718 cx24123_writereg(state, cx24123_regdata[i].reg,
719 cx24123_regdata[i].data);
720
721 /* Set the LNB polarity */
722 if (state->config->lnb_polarity)
723 cx24123_writereg(state, 0x32,
724 cx24123_readreg(state, 0x32) | 0x02);
725
726 if (state->config->dont_use_pll)
727 cx24123_repeater_mode(state, 1, 0);
728
729 return 0;
730 }
731
732 static int cx24123_set_voltage(struct dvb_frontend *fe,
733 fe_sec_voltage_t voltage)
734 {
735 struct cx24123_state *state = fe->demodulator_priv;
736 u8 val;
737
738 val = cx24123_readreg(state, 0x29) & ~0x40;
739
740 switch (voltage) {
741 case SEC_VOLTAGE_13:
742 dprintk("setting voltage 13V\n");
743 return cx24123_writereg(state, 0x29, val & 0x7f);
744 case SEC_VOLTAGE_18:
745 dprintk("setting voltage 18V\n");
746 return cx24123_writereg(state, 0x29, val | 0x80);
747 case SEC_VOLTAGE_OFF:
748 /* already handled in cx88-dvb */
749 return 0;
750 default:
751 return -EINVAL;
752 };
753
754 return 0;
755 }
756
757 /* wait for diseqc queue to become ready (or timeout) */
758 static void cx24123_wait_for_diseqc(struct cx24123_state *state)
759 {
760 unsigned long timeout = jiffies + msecs_to_jiffies(200);
761 while (!(cx24123_readreg(state, 0x29) & 0x40)) {
762 if (time_after(jiffies, timeout)) {
763 err("%s: diseqc queue not ready, " \
764 "command may be lost.\n", __func__);
765 break;
766 }
767 msleep(10);
768 }
769 }
770
771 static int cx24123_send_diseqc_msg(struct dvb_frontend *fe,
772 struct dvb_diseqc_master_cmd *cmd)
773 {
774 struct cx24123_state *state = fe->demodulator_priv;
775 int i, val, tone;
776
777 dprintk("\n");
778
779 /* stop continuous tone if enabled */
780 tone = cx24123_readreg(state, 0x29);
781 if (tone & 0x10)
782 cx24123_writereg(state, 0x29, tone & ~0x50);
783
784 /* wait for diseqc queue ready */
785 cx24123_wait_for_diseqc(state);
786
787 /* select tone mode */
788 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
789
790 for (i = 0; i < cmd->msg_len; i++)
791 cx24123_writereg(state, 0x2C + i, cmd->msg[i]);
792
793 val = cx24123_readreg(state, 0x29);
794 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40) |
795 ((cmd->msg_len-3) & 3));
796
797 /* wait for diseqc message to finish sending */
798 cx24123_wait_for_diseqc(state);
799
800 /* restart continuous tone if enabled */
801 if (tone & 0x10)
802 cx24123_writereg(state, 0x29, tone & ~0x40);
803
804 return 0;
805 }
806
807 static int cx24123_diseqc_send_burst(struct dvb_frontend *fe,
808 fe_sec_mini_cmd_t burst)
809 {
810 struct cx24123_state *state = fe->demodulator_priv;
811 int val, tone;
812
813 dprintk("\n");
814
815 /* stop continuous tone if enabled */
816 tone = cx24123_readreg(state, 0x29);
817 if (tone & 0x10)
818 cx24123_writereg(state, 0x29, tone & ~0x50);
819
820 /* wait for diseqc queue ready */
821 cx24123_wait_for_diseqc(state);
822
823 /* select tone mode */
824 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4);
825 msleep(30);
826 val = cx24123_readreg(state, 0x29);
827 if (burst == SEC_MINI_A)
828 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x00));
829 else if (burst == SEC_MINI_B)
830 cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x08));
831 else
832 return -EINVAL;
833
834 cx24123_wait_for_diseqc(state);
835 cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
836
837 /* restart continuous tone if enabled */
838 if (tone & 0x10)
839 cx24123_writereg(state, 0x29, tone & ~0x40);
840
841 return 0;
842 }
843
844 static int cx24123_read_status(struct dvb_frontend *fe, fe_status_t *status)
845 {
846 struct cx24123_state *state = fe->demodulator_priv;
847 int sync = cx24123_readreg(state, 0x14);
848
849 *status = 0;
850 if (state->config->dont_use_pll) {
851 u32 tun_status = 0;
852 if (fe->ops.tuner_ops.get_status)
853 fe->ops.tuner_ops.get_status(fe, &tun_status);
854 if (tun_status & TUNER_STATUS_LOCKED)
855 *status |= FE_HAS_SIGNAL;
856 } else {
857 int lock = cx24123_readreg(state, 0x20);
858 if (lock & 0x01)
859 *status |= FE_HAS_SIGNAL;
860 }
861
862 if (sync & 0x02)
863 *status |= FE_HAS_CARRIER; /* Phase locked */
864 if (sync & 0x04)
865 *status |= FE_HAS_VITERBI;
866
867 /* Reed-Solomon Status */
868 if (sync & 0x08)
869 *status |= FE_HAS_SYNC;
870 if (sync & 0x80)
871 *status |= FE_HAS_LOCK; /*Full Sync */
872
873 return 0;
874 }
875
876 /*
877 * Configured to return the measurement of errors in blocks,
878 * because no UCBLOCKS value is available, so this value doubles up
879 * to satisfy both measurements.
880 */
881 static int cx24123_read_ber(struct dvb_frontend *fe, u32 *ber)
882 {
883 struct cx24123_state *state = fe->demodulator_priv;
884
885 /* The true bit error rate is this value divided by
886 the window size (set as 256 * 255) */
887 *ber = ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |
888 (cx24123_readreg(state, 0x1d) << 8 |
889 cx24123_readreg(state, 0x1e));
890
891 dprintk("BER = %d\n", *ber);
892
893 return 0;
894 }
895
896 static int cx24123_read_signal_strength(struct dvb_frontend *fe,
897 u16 *signal_strength)
898 {
899 struct cx24123_state *state = fe->demodulator_priv;
900
901 /* larger = better */
902 *signal_strength = cx24123_readreg(state, 0x3b) << 8;
903
904 dprintk("Signal strength = %d\n", *signal_strength);
905
906 return 0;
907 }
908
909 static int cx24123_read_snr(struct dvb_frontend *fe, u16 *snr)
910 {
911 struct cx24123_state *state = fe->demodulator_priv;
912
913 /* Inverted raw Es/N0 count, totally bogus but better than the
914 BER threshold. */
915 *snr = 65535 - (((u16)cx24123_readreg(state, 0x18) << 8) |
916 (u16)cx24123_readreg(state, 0x19));
917
918 dprintk("read S/N index = %d\n", *snr);
919
920 return 0;
921 }
922
923 static int cx24123_set_frontend(struct dvb_frontend *fe,
924 struct dvb_frontend_parameters *p)
925 {
926 struct cx24123_state *state = fe->demodulator_priv;
927
928 dprintk("\n");
929
930 if (state->config->set_ts_params)
931 state->config->set_ts_params(fe, 0);
932
933 state->currentfreq = p->frequency;
934 state->currentsymbolrate = p->u.qpsk.symbol_rate;
935
936 cx24123_set_inversion(state, p->inversion);
937 cx24123_set_fec(state, p->u.qpsk.fec_inner);
938 cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate);
939
940 if (!state->config->dont_use_pll)
941 cx24123_pll_tune(fe, p);
942 else if (fe->ops.tuner_ops.set_params)
943 fe->ops.tuner_ops.set_params(fe, p);
944 else
945 err("it seems I don't have a tuner...");
946
947 /* Enable automatic aquisition and reset cycle */
948 cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));
949 cx24123_writereg(state, 0x00, 0x10);
950 cx24123_writereg(state, 0x00, 0);
951
952 if (state->config->agc_callback)
953 state->config->agc_callback(fe);
954
955 return 0;
956 }
957
958 static int cx24123_get_frontend(struct dvb_frontend *fe,
959 struct dvb_frontend_parameters *p)
960 {
961 struct cx24123_state *state = fe->demodulator_priv;
962
963 dprintk("\n");
964
965 if (cx24123_get_inversion(state, &p->inversion) != 0) {
966 err("%s: Failed to get inversion status\n", __func__);
967 return -EREMOTEIO;
968 }
969 if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) {
970 err("%s: Failed to get fec status\n", __func__);
971 return -EREMOTEIO;
972 }
973 p->frequency = state->currentfreq;
974 p->u.qpsk.symbol_rate = state->currentsymbolrate;
975
976 return 0;
977 }
978
979 static int cx24123_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
980 {
981 struct cx24123_state *state = fe->demodulator_priv;
982 u8 val;
983
984 /* wait for diseqc queue ready */
985 cx24123_wait_for_diseqc(state);
986
987 val = cx24123_readreg(state, 0x29) & ~0x40;
988
989 switch (tone) {
990 case SEC_TONE_ON:
991 dprintk("setting tone on\n");
992 return cx24123_writereg(state, 0x29, val | 0x10);
993 case SEC_TONE_OFF:
994 dprintk("setting tone off\n");
995 return cx24123_writereg(state, 0x29, val & 0xef);
996 default:
997 err("CASE reached default with tone=%d\n", tone);
998 return -EINVAL;
999 }
1000
1001 return 0;
1002 }
1003
1004 static int cx24123_tune(struct dvb_frontend *fe,
1005 struct dvb_frontend_parameters *params,
1006 unsigned int mode_flags,
1007 unsigned int *delay,
1008 fe_status_t *status)
1009 {
1010 int retval = 0;
1011
1012 if (params != NULL)
1013 retval = cx24123_set_frontend(fe, params);
1014
1015 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1016 cx24123_read_status(fe, status);
1017 *delay = HZ/10;
1018
1019 return retval;
1020 }
1021
1022 static int cx24123_get_algo(struct dvb_frontend *fe)
1023 {
1024 return 1; /* FE_ALGO_HW */
1025 }
1026
1027 static void cx24123_release(struct dvb_frontend *fe)
1028 {
1029 struct cx24123_state *state = fe->demodulator_priv;
1030 dprintk("\n");
1031 i2c_del_adapter(&state->tuner_i2c_adapter);
1032 kfree(state);
1033 }
1034
1035 static int cx24123_tuner_i2c_tuner_xfer(struct i2c_adapter *i2c_adap,
1036 struct i2c_msg msg[], int num)
1037 {
1038 struct cx24123_state *state = i2c_get_adapdata(i2c_adap);
1039 /* this repeater closes after the first stop */
1040 cx24123_repeater_mode(state, 1, 1);
1041 return i2c_transfer(state->i2c, msg, num);
1042 }
1043
1044 static u32 cx24123_tuner_i2c_func(struct i2c_adapter *adapter)
1045 {
1046 return I2C_FUNC_I2C;
1047 }
1048
1049 static struct i2c_algorithm cx24123_tuner_i2c_algo = {
1050 .master_xfer = cx24123_tuner_i2c_tuner_xfer,
1051 .functionality = cx24123_tuner_i2c_func,
1052 };
1053
1054 struct i2c_adapter *
1055 cx24123_get_tuner_i2c_adapter(struct dvb_frontend *fe)
1056 {
1057 struct cx24123_state *state = fe->demodulator_priv;
1058 return &state->tuner_i2c_adapter;
1059 }
1060 EXPORT_SYMBOL(cx24123_get_tuner_i2c_adapter);
1061
1062 static struct dvb_frontend_ops cx24123_ops;
1063
1064 struct dvb_frontend *cx24123_attach(const struct cx24123_config *config,
1065 struct i2c_adapter *i2c)
1066 {
1067 /* allocate memory for the internal state */
1068 struct cx24123_state *state =
1069 kzalloc(sizeof(struct cx24123_state), GFP_KERNEL);
1070
1071 dprintk("\n");
1072 if (state == NULL) {
1073 err("Unable to kzalloc\n");
1074 goto error;
1075 }
1076
1077 /* setup the state */
1078 state->config = config;
1079 state->i2c = i2c;
1080
1081 /* check if the demod is there */
1082 state->demod_rev = cx24123_readreg(state, 0x00);
1083 switch (state->demod_rev) {
1084 case 0xe1:
1085 info("detected CX24123C\n");
1086 break;
1087 case 0xd1:
1088 info("detected CX24123\n");
1089 break;
1090 default:
1091 err("wrong demod revision: %x\n", state->demod_rev);
1092 goto error;
1093 }
1094
1095 /* create dvb_frontend */
1096 memcpy(&state->frontend.ops, &cx24123_ops,
1097 sizeof(struct dvb_frontend_ops));
1098 state->frontend.demodulator_priv = state;
1099
1100 /* create tuner i2c adapter */
1101 if (config->dont_use_pll)
1102 cx24123_repeater_mode(state, 1, 0);
1103
1104 strlcpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus",
1105 sizeof(state->tuner_i2c_adapter.name));
1106 state->tuner_i2c_adapter.class = I2C_CLASS_TV_DIGITAL,
1107 state->tuner_i2c_adapter.algo = &cx24123_tuner_i2c_algo;
1108 state->tuner_i2c_adapter.algo_data = NULL;
1109 i2c_set_adapdata(&state->tuner_i2c_adapter, state);
1110 if (i2c_add_adapter(&state->tuner_i2c_adapter) < 0) {
1111 err("tuner i2c bus could not be initialized\n");
1112 goto error;
1113 }
1114
1115 return &state->frontend;
1116
1117 error:
1118 kfree(state);
1119
1120 return NULL;
1121 }
1122 EXPORT_SYMBOL(cx24123_attach);
1123
1124 static struct dvb_frontend_ops cx24123_ops = {
1125
1126 .info = {
1127 .name = "Conexant CX24123/CX24109",
1128 .type = FE_QPSK,
1129 .frequency_min = 950000,
1130 .frequency_max = 2150000,
1131 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1132 .frequency_tolerance = 5000,
1133 .symbol_rate_min = 1000000,
1134 .symbol_rate_max = 45000000,
1135 .caps = FE_CAN_INVERSION_AUTO |
1136 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1137 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1138 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1139 FE_CAN_QPSK | FE_CAN_RECOVER
1140 },
1141
1142 .release = cx24123_release,
1143
1144 .init = cx24123_initfe,
1145 .set_frontend = cx24123_set_frontend,
1146 .get_frontend = cx24123_get_frontend,
1147 .read_status = cx24123_read_status,
1148 .read_ber = cx24123_read_ber,
1149 .read_signal_strength = cx24123_read_signal_strength,
1150 .read_snr = cx24123_read_snr,
1151 .diseqc_send_master_cmd = cx24123_send_diseqc_msg,
1152 .diseqc_send_burst = cx24123_diseqc_send_burst,
1153 .set_tone = cx24123_set_tone,
1154 .set_voltage = cx24123_set_voltage,
1155 .tune = cx24123_tune,
1156 .get_frontend_algo = cx24123_get_algo,
1157 };
1158
1159 MODULE_DESCRIPTION("DVB Frontend module for Conexant " \
1160 "CX24123/CX24109/CX24113 hardware");
1161 MODULE_AUTHOR("Steven Toth");
1162 MODULE_LICENSE("GPL");
Tomato firmware and modifications.