release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/isdn/hardware/mISDN/netjet.h

   1 /*
   2  * NETjet common header file
   3  *
   4  * Author       Karsten Keil
   5  *              based on work of Matt Henderson and Daniel Potts,
   6  *              Traverse Technologies P/L www.traverse.com.au
   7  *
   8  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #define NJ_CTRL                 0x00
  26 #define NJ_DMACTRL              0x01
  27 #define NJ_AUXCTRL              0x02
  28 #define NJ_AUXDATA              0x03
  29 #define NJ_IRQMASK0             0x04
  30 #define NJ_IRQMASK1             0x05
  31 #define NJ_IRQSTAT0             0x06
  32 #define NJ_IRQSTAT1             0x07
  33 #define NJ_DMA_READ_START       0x08
  34 #define NJ_DMA_READ_IRQ         0x0c
  35 #define NJ_DMA_READ_END         0x10
  36 #define NJ_DMA_READ_ADR         0x14
  37 #define NJ_DMA_WRITE_START      0x18
  38 #define NJ_DMA_WRITE_IRQ        0x1c
  39 #define NJ_DMA_WRITE_END        0x20
  40 #define NJ_DMA_WRITE_ADR        0x24
  41 #define NJ_PULSE_CNT            0x28
  42
  43 #define NJ_ISAC_OFF             0xc0
  44 #define NJ_ISACIRQ              0x10
  45
  46 #define NJ_IRQM0_RD_MASK        0x03
  47 #define NJ_IRQM0_RD_IRQ         0x01
  48 #define NJ_IRQM0_RD_END         0x02
  49 #define NJ_IRQM0_WR_MASK        0x0c
  50 #define NJ_IRQM0_WR_IRQ         0x04
  51 #define NJ_IRQM0_WR_END         0x08
  52
  53 /* one page here is no need to be smaller */
  54 #define NJ_DMA_SIZE             4096
  55 /* 2 * 64 byte is a compromise between IRQ count and latency */
  56 #define NJ_DMA_RXSIZE           128  /* 2 * 64 */
  57 #define NJ_DMA_TXSIZE           128  /* 2 * 64 */