1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "vmwgfx_drv.h"
30 #include "ttm/ttm_placement.h"
31 #include "ttm/ttm_bo_driver.h"
32 #include "ttm/ttm_object.h"
33 #include "ttm/ttm_module.h"
35 #define VMWGFX_DRIVER_NAME "vmwgfx"
36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37 #define VMWGFX_CHIP_SVGAII 0
38 #define VMW_FB_RESERVATION 0
41 * Fully encoded drm commands. Might move to vmw_drm.h
44 #define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47 #define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50 #define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53 #define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
57 #define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60 #define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63 #define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
67 #define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70 #define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73 #define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76 #define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79 #define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82 #define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85 #define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88 #define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
91 #define DRM_IOCTL_VMW_UPDATE_LAYOUT \
92 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_UPDATE_LAYOUT, \
93 struct drm_vmw_update_layout_arg)
97 * The core DRM version of this macro doesn't account for
101 #define VMW_IOCTL_DEF(ioctl, func, flags) \
102 [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl}
108 static struct drm_ioctl_desc vmw_ioctls
[] = {
109 VMW_IOCTL_DEF(VMW_GET_PARAM
, vmw_getparam_ioctl
,
110 DRM_AUTH
| DRM_UNLOCKED
),
111 VMW_IOCTL_DEF(VMW_ALLOC_DMABUF
, vmw_dmabuf_alloc_ioctl
,
112 DRM_AUTH
| DRM_UNLOCKED
),
113 VMW_IOCTL_DEF(VMW_UNREF_DMABUF
, vmw_dmabuf_unref_ioctl
,
114 DRM_AUTH
| DRM_UNLOCKED
),
115 VMW_IOCTL_DEF(VMW_CURSOR_BYPASS
,
116 vmw_kms_cursor_bypass_ioctl
,
117 DRM_MASTER
| DRM_CONTROL_ALLOW
| DRM_UNLOCKED
),
119 VMW_IOCTL_DEF(VMW_CONTROL_STREAM
, vmw_overlay_ioctl
,
120 DRM_MASTER
| DRM_CONTROL_ALLOW
| DRM_UNLOCKED
),
121 VMW_IOCTL_DEF(VMW_CLAIM_STREAM
, vmw_stream_claim_ioctl
,
122 DRM_MASTER
| DRM_CONTROL_ALLOW
| DRM_UNLOCKED
),
123 VMW_IOCTL_DEF(VMW_UNREF_STREAM
, vmw_stream_unref_ioctl
,
124 DRM_MASTER
| DRM_CONTROL_ALLOW
| DRM_UNLOCKED
),
126 VMW_IOCTL_DEF(VMW_CREATE_CONTEXT
, vmw_context_define_ioctl
,
127 DRM_AUTH
| DRM_UNLOCKED
),
128 VMW_IOCTL_DEF(VMW_UNREF_CONTEXT
, vmw_context_destroy_ioctl
,
129 DRM_AUTH
| DRM_UNLOCKED
),
130 VMW_IOCTL_DEF(VMW_CREATE_SURFACE
, vmw_surface_define_ioctl
,
131 DRM_AUTH
| DRM_UNLOCKED
),
132 VMW_IOCTL_DEF(VMW_UNREF_SURFACE
, vmw_surface_destroy_ioctl
,
133 DRM_AUTH
| DRM_UNLOCKED
),
134 VMW_IOCTL_DEF(VMW_REF_SURFACE
, vmw_surface_reference_ioctl
,
135 DRM_AUTH
| DRM_UNLOCKED
),
136 VMW_IOCTL_DEF(VMW_EXECBUF
, vmw_execbuf_ioctl
,
137 DRM_AUTH
| DRM_UNLOCKED
),
138 VMW_IOCTL_DEF(VMW_FIFO_DEBUG
, vmw_fifo_debug_ioctl
,
139 DRM_AUTH
| DRM_ROOT_ONLY
| DRM_MASTER
| DRM_UNLOCKED
),
140 VMW_IOCTL_DEF(VMW_FENCE_WAIT
, vmw_fence_wait_ioctl
,
141 DRM_AUTH
| DRM_UNLOCKED
),
142 VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT
, vmw_kms_update_layout_ioctl
,
143 DRM_MASTER
| DRM_CONTROL_ALLOW
| DRM_UNLOCKED
)
146 static struct pci_device_id vmw_pci_id_list
[] = {
147 {0x15ad, 0x0405, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, VMWGFX_CHIP_SVGAII
},
151 static int enable_fbdev
;
153 static int vmw_probe(struct pci_dev
*, const struct pci_device_id
*);
154 static void vmw_master_init(struct vmw_master
*);
155 static int vmwgfx_pm_notifier(struct notifier_block
*nb
, unsigned long val
,
158 MODULE_PARM_DESC(enable_fbdev
, "Enable vmwgfx fbdev");
159 module_param_named(enable_fbdev
, enable_fbdev
, int, 0600);
161 static void vmw_print_capabilities(uint32_t capabilities
)
163 DRM_INFO("Capabilities:\n");
164 if (capabilities
& SVGA_CAP_RECT_COPY
)
165 DRM_INFO(" Rect copy.\n");
166 if (capabilities
& SVGA_CAP_CURSOR
)
167 DRM_INFO(" Cursor.\n");
168 if (capabilities
& SVGA_CAP_CURSOR_BYPASS
)
169 DRM_INFO(" Cursor bypass.\n");
170 if (capabilities
& SVGA_CAP_CURSOR_BYPASS_2
)
171 DRM_INFO(" Cursor bypass 2.\n");
172 if (capabilities
& SVGA_CAP_8BIT_EMULATION
)
173 DRM_INFO(" 8bit emulation.\n");
174 if (capabilities
& SVGA_CAP_ALPHA_CURSOR
)
175 DRM_INFO(" Alpha cursor.\n");
176 if (capabilities
& SVGA_CAP_3D
)
178 if (capabilities
& SVGA_CAP_EXTENDED_FIFO
)
179 DRM_INFO(" Extended Fifo.\n");
180 if (capabilities
& SVGA_CAP_MULTIMON
)
181 DRM_INFO(" Multimon.\n");
182 if (capabilities
& SVGA_CAP_PITCHLOCK
)
183 DRM_INFO(" Pitchlock.\n");
184 if (capabilities
& SVGA_CAP_IRQMASK
)
185 DRM_INFO(" Irq mask.\n");
186 if (capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
)
187 DRM_INFO(" Display Topology.\n");
188 if (capabilities
& SVGA_CAP_GMR
)
190 if (capabilities
& SVGA_CAP_TRACES
)
191 DRM_INFO(" Traces.\n");
194 static int vmw_request_device(struct vmw_private
*dev_priv
)
198 ret
= vmw_fifo_init(dev_priv
, &dev_priv
->fifo
);
199 if (unlikely(ret
!= 0)) {
200 DRM_ERROR("Unable to initialize FIFO.\n");
207 static void vmw_release_device(struct vmw_private
*dev_priv
)
209 vmw_fifo_release(dev_priv
, &dev_priv
->fifo
);
212 int vmw_3d_resource_inc(struct vmw_private
*dev_priv
)
216 mutex_lock(&dev_priv
->release_mutex
);
217 if (unlikely(dev_priv
->num_3d_resources
++ == 0)) {
218 ret
= vmw_request_device(dev_priv
);
219 if (unlikely(ret
!= 0))
220 --dev_priv
->num_3d_resources
;
222 mutex_unlock(&dev_priv
->release_mutex
);
227 void vmw_3d_resource_dec(struct vmw_private
*dev_priv
)
231 mutex_lock(&dev_priv
->release_mutex
);
232 if (unlikely(--dev_priv
->num_3d_resources
== 0))
233 vmw_release_device(dev_priv
);
234 n3d
= (int32_t) dev_priv
->num_3d_resources
;
235 mutex_unlock(&dev_priv
->release_mutex
);
240 static int vmw_driver_load(struct drm_device
*dev
, unsigned long chipset
)
242 struct vmw_private
*dev_priv
;
246 dev_priv
= kzalloc(sizeof(*dev_priv
), GFP_KERNEL
);
247 if (unlikely(dev_priv
== NULL
)) {
248 DRM_ERROR("Failed allocating a device private struct.\n");
251 memset(dev_priv
, 0, sizeof(*dev_priv
));
254 dev_priv
->vmw_chipset
= chipset
;
255 dev_priv
->last_read_sequence
= (uint32_t) -100;
256 mutex_init(&dev_priv
->hw_mutex
);
257 mutex_init(&dev_priv
->cmdbuf_mutex
);
258 mutex_init(&dev_priv
->release_mutex
);
259 rwlock_init(&dev_priv
->resource_lock
);
260 idr_init(&dev_priv
->context_idr
);
261 idr_init(&dev_priv
->surface_idr
);
262 idr_init(&dev_priv
->stream_idr
);
263 ida_init(&dev_priv
->gmr_ida
);
264 mutex_init(&dev_priv
->init_mutex
);
265 init_waitqueue_head(&dev_priv
->fence_queue
);
266 init_waitqueue_head(&dev_priv
->fifo_queue
);
267 atomic_set(&dev_priv
->fence_queue_waiters
, 0);
268 atomic_set(&dev_priv
->fifo_queue_waiters
, 0);
269 INIT_LIST_HEAD(&dev_priv
->gmr_lru
);
271 dev_priv
->io_start
= pci_resource_start(dev
->pdev
, 0);
272 dev_priv
->vram_start
= pci_resource_start(dev
->pdev
, 1);
273 dev_priv
->mmio_start
= pci_resource_start(dev
->pdev
, 2);
275 dev_priv
->enable_fb
= enable_fbdev
;
277 mutex_lock(&dev_priv
->hw_mutex
);
279 vmw_write(dev_priv
, SVGA_REG_ID
, SVGA_ID_2
);
280 svga_id
= vmw_read(dev_priv
, SVGA_REG_ID
);
281 if (svga_id
!= SVGA_ID_2
) {
283 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id
);
284 mutex_unlock(&dev_priv
->hw_mutex
);
288 dev_priv
->capabilities
= vmw_read(dev_priv
, SVGA_REG_CAPABILITIES
);
290 if (dev_priv
->capabilities
& SVGA_CAP_GMR
) {
291 dev_priv
->max_gmr_descriptors
=
293 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH
);
294 dev_priv
->max_gmr_ids
=
295 vmw_read(dev_priv
, SVGA_REG_GMR_MAX_IDS
);
298 dev_priv
->vram_size
= vmw_read(dev_priv
, SVGA_REG_VRAM_SIZE
);
299 dev_priv
->mmio_size
= vmw_read(dev_priv
, SVGA_REG_MEM_SIZE
);
300 dev_priv
->fb_max_width
= vmw_read(dev_priv
, SVGA_REG_MAX_WIDTH
);
301 dev_priv
->fb_max_height
= vmw_read(dev_priv
, SVGA_REG_MAX_HEIGHT
);
303 mutex_unlock(&dev_priv
->hw_mutex
);
305 vmw_print_capabilities(dev_priv
->capabilities
);
307 if (dev_priv
->capabilities
& SVGA_CAP_GMR
) {
308 DRM_INFO("Max GMR ids is %u\n",
309 (unsigned)dev_priv
->max_gmr_ids
);
310 DRM_INFO("Max GMR descriptors is %u\n",
311 (unsigned)dev_priv
->max_gmr_descriptors
);
313 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
314 dev_priv
->vram_start
, dev_priv
->vram_size
/ 1024);
315 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
316 dev_priv
->mmio_start
, dev_priv
->mmio_size
/ 1024);
318 ret
= vmw_ttm_global_init(dev_priv
);
319 if (unlikely(ret
!= 0))
323 vmw_master_init(&dev_priv
->fbdev_master
);
324 ttm_lock_set_kill(&dev_priv
->fbdev_master
.lock
, false, SIGTERM
);
325 dev_priv
->active_master
= &dev_priv
->fbdev_master
;
328 ret
= ttm_bo_device_init(&dev_priv
->bdev
,
329 dev_priv
->bo_global_ref
.ref
.object
,
330 &vmw_bo_driver
, VMWGFX_FILE_PAGE_OFFSET
,
332 if (unlikely(ret
!= 0)) {
333 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
337 ret
= ttm_bo_init_mm(&dev_priv
->bdev
, TTM_PL_VRAM
,
338 (dev_priv
->vram_size
>> PAGE_SHIFT
));
339 if (unlikely(ret
!= 0)) {
340 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
344 dev_priv
->mmio_mtrr
= drm_mtrr_add(dev_priv
->mmio_start
,
345 dev_priv
->mmio_size
, DRM_MTRR_WC
);
347 dev_priv
->mmio_virt
= ioremap_wc(dev_priv
->mmio_start
,
348 dev_priv
->mmio_size
);
350 if (unlikely(dev_priv
->mmio_virt
== NULL
)) {
352 DRM_ERROR("Failed mapping MMIO.\n");
356 /* Need mmio memory to check for fifo pitchlock cap. */
357 if (!(dev_priv
->capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
) &&
358 !(dev_priv
->capabilities
& SVGA_CAP_PITCHLOCK
) &&
359 !vmw_fifo_have_pitchlock(dev_priv
)) {
361 DRM_ERROR("Hardware has no pitchlock\n");
365 dev_priv
->tdev
= ttm_object_device_init
366 (dev_priv
->mem_global_ref
.object
, 12);
368 if (unlikely(dev_priv
->tdev
== NULL
)) {
369 DRM_ERROR("Unable to initialize TTM object management.\n");
374 dev
->dev_private
= dev_priv
;
376 ret
= pci_request_regions(dev
->pdev
, "vmwgfx probe");
377 dev_priv
->stealth
= (ret
!= 0);
378 if (dev_priv
->stealth
) {
380 * Request at least the mmio PCI resource.
383 DRM_INFO("It appears like vesafb is loaded. "
384 "Ignore above error if any.\n");
385 ret
= pci_request_region(dev
->pdev
, 2, "vmwgfx stealth probe");
386 if (unlikely(ret
!= 0)) {
387 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
391 ret
= vmw_kms_init(dev_priv
);
392 if (unlikely(ret
!= 0))
394 vmw_overlay_init(dev_priv
);
395 if (dev_priv
->enable_fb
) {
396 ret
= vmw_3d_resource_inc(dev_priv
);
397 if (unlikely(ret
!= 0))
399 vmw_kms_save_vga(dev_priv
);
400 vmw_fb_init(dev_priv
);
401 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv
) ?
402 "Detected device 3D availability.\n" :
403 "Detected no device 3D availability.\n");
405 DRM_INFO("Delayed 3D detection since we're not "
406 "running the device in SVGA mode yet.\n");
409 if (dev_priv
->capabilities
& SVGA_CAP_IRQMASK
) {
410 ret
= drm_irq_install(dev
);
411 if (unlikely(ret
!= 0)) {
412 DRM_ERROR("Failed installing irq: %d\n", ret
);
417 dev_priv
->pm_nb
.notifier_call
= vmwgfx_pm_notifier
;
418 register_pm_notifier(&dev_priv
->pm_nb
);
423 if (dev_priv
->enable_fb
) {
424 vmw_fb_close(dev_priv
);
425 vmw_kms_restore_vga(dev_priv
);
426 vmw_3d_resource_dec(dev_priv
);
429 vmw_overlay_close(dev_priv
);
430 vmw_kms_close(dev_priv
);
432 if (dev_priv
->stealth
)
433 pci_release_region(dev
->pdev
, 2);
435 pci_release_regions(dev
->pdev
);
437 ttm_object_device_release(&dev_priv
->tdev
);
439 iounmap(dev_priv
->mmio_virt
);
441 drm_mtrr_del(dev_priv
->mmio_mtrr
, dev_priv
->mmio_start
,
442 dev_priv
->mmio_size
, DRM_MTRR_WC
);
443 (void)ttm_bo_clean_mm(&dev_priv
->bdev
, TTM_PL_VRAM
);
445 (void)ttm_bo_device_release(&dev_priv
->bdev
);
447 vmw_ttm_global_release(dev_priv
);
449 ida_destroy(&dev_priv
->gmr_ida
);
450 idr_destroy(&dev_priv
->surface_idr
);
451 idr_destroy(&dev_priv
->context_idr
);
452 idr_destroy(&dev_priv
->stream_idr
);
457 static int vmw_driver_unload(struct drm_device
*dev
)
459 struct vmw_private
*dev_priv
= vmw_priv(dev
);
461 unregister_pm_notifier(&dev_priv
->pm_nb
);
463 if (dev_priv
->capabilities
& SVGA_CAP_IRQMASK
)
464 drm_irq_uninstall(dev_priv
->dev
);
465 if (dev_priv
->enable_fb
) {
466 vmw_fb_close(dev_priv
);
467 vmw_kms_restore_vga(dev_priv
);
468 vmw_3d_resource_dec(dev_priv
);
470 vmw_kms_close(dev_priv
);
471 vmw_overlay_close(dev_priv
);
472 if (dev_priv
->stealth
)
473 pci_release_region(dev
->pdev
, 2);
475 pci_release_regions(dev
->pdev
);
477 ttm_object_device_release(&dev_priv
->tdev
);
478 iounmap(dev_priv
->mmio_virt
);
479 drm_mtrr_del(dev_priv
->mmio_mtrr
, dev_priv
->mmio_start
,
480 dev_priv
->mmio_size
, DRM_MTRR_WC
);
481 (void)ttm_bo_clean_mm(&dev_priv
->bdev
, TTM_PL_VRAM
);
482 (void)ttm_bo_device_release(&dev_priv
->bdev
);
483 vmw_ttm_global_release(dev_priv
);
484 ida_destroy(&dev_priv
->gmr_ida
);
485 idr_destroy(&dev_priv
->surface_idr
);
486 idr_destroy(&dev_priv
->context_idr
);
487 idr_destroy(&dev_priv
->stream_idr
);
494 static void vmw_postclose(struct drm_device
*dev
,
495 struct drm_file
*file_priv
)
497 struct vmw_fpriv
*vmw_fp
;
499 vmw_fp
= vmw_fpriv(file_priv
);
500 ttm_object_file_release(&vmw_fp
->tfile
);
501 if (vmw_fp
->locked_master
)
502 drm_master_put(&vmw_fp
->locked_master
);
506 static int vmw_driver_open(struct drm_device
*dev
, struct drm_file
*file_priv
)
508 struct vmw_private
*dev_priv
= vmw_priv(dev
);
509 struct vmw_fpriv
*vmw_fp
;
512 vmw_fp
= kzalloc(sizeof(*vmw_fp
), GFP_KERNEL
);
513 if (unlikely(vmw_fp
== NULL
))
516 vmw_fp
->tfile
= ttm_object_file_init(dev_priv
->tdev
, 10);
517 if (unlikely(vmw_fp
->tfile
== NULL
))
520 file_priv
->driver_priv
= vmw_fp
;
522 if (unlikely(dev_priv
->bdev
.dev_mapping
== NULL
))
523 dev_priv
->bdev
.dev_mapping
=
524 file_priv
->filp
->f_path
.dentry
->d_inode
->i_mapping
;
533 static long vmw_unlocked_ioctl(struct file
*filp
, unsigned int cmd
,
536 struct drm_file
*file_priv
= filp
->private_data
;
537 struct drm_device
*dev
= file_priv
->minor
->dev
;
538 unsigned int nr
= DRM_IOCTL_NR(cmd
);
541 * Do extra checking on driver private ioctls.
544 if ((nr
>= DRM_COMMAND_BASE
) && (nr
< DRM_COMMAND_END
)
545 && (nr
< DRM_COMMAND_BASE
+ dev
->driver
->num_ioctls
)) {
546 struct drm_ioctl_desc
*ioctl
=
547 &vmw_ioctls
[nr
- DRM_COMMAND_BASE
];
549 if (unlikely(ioctl
->cmd_drv
!= cmd
)) {
550 DRM_ERROR("Invalid command format, ioctl %d\n",
551 nr
- DRM_COMMAND_BASE
);
556 return drm_ioctl(filp
, cmd
, arg
);
559 static int vmw_firstopen(struct drm_device
*dev
)
561 struct vmw_private
*dev_priv
= vmw_priv(dev
);
562 dev_priv
->is_opened
= true;
567 static void vmw_lastclose(struct drm_device
*dev
)
569 struct vmw_private
*dev_priv
= vmw_priv(dev
);
570 struct drm_crtc
*crtc
;
571 struct drm_mode_set set
;
575 * Do nothing on the lastclose call from drm_unload.
578 if (!dev_priv
->is_opened
)
581 dev_priv
->is_opened
= false;
586 set
.connectors
= NULL
;
587 set
.num_connectors
= 0;
589 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
591 ret
= crtc
->funcs
->set_config(&set
);
597 static void vmw_master_init(struct vmw_master
*vmaster
)
599 ttm_lock_init(&vmaster
->lock
);
602 static int vmw_master_create(struct drm_device
*dev
,
603 struct drm_master
*master
)
605 struct vmw_master
*vmaster
;
607 vmaster
= kzalloc(sizeof(*vmaster
), GFP_KERNEL
);
608 if (unlikely(vmaster
== NULL
))
611 ttm_lock_init(&vmaster
->lock
);
612 ttm_lock_set_kill(&vmaster
->lock
, true, SIGTERM
);
613 master
->driver_priv
= vmaster
;
618 static void vmw_master_destroy(struct drm_device
*dev
,
619 struct drm_master
*master
)
621 struct vmw_master
*vmaster
= vmw_master(master
);
623 master
->driver_priv
= NULL
;
628 static int vmw_master_set(struct drm_device
*dev
,
629 struct drm_file
*file_priv
,
632 struct vmw_private
*dev_priv
= vmw_priv(dev
);
633 struct vmw_fpriv
*vmw_fp
= vmw_fpriv(file_priv
);
634 struct vmw_master
*active
= dev_priv
->active_master
;
635 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
638 if (!dev_priv
->enable_fb
) {
639 ret
= vmw_3d_resource_inc(dev_priv
);
640 if (unlikely(ret
!= 0))
642 vmw_kms_save_vga(dev_priv
);
643 mutex_lock(&dev_priv
->hw_mutex
);
644 vmw_write(dev_priv
, SVGA_REG_TRACES
, 0);
645 mutex_unlock(&dev_priv
->hw_mutex
);
649 BUG_ON(active
!= &dev_priv
->fbdev_master
);
650 ret
= ttm_vt_lock(&active
->lock
, false, vmw_fp
->tfile
);
651 if (unlikely(ret
!= 0))
652 goto out_no_active_lock
;
654 ttm_lock_set_kill(&active
->lock
, true, SIGTERM
);
655 ret
= ttm_bo_evict_mm(&dev_priv
->bdev
, TTM_PL_VRAM
);
656 if (unlikely(ret
!= 0)) {
657 DRM_ERROR("Unable to clean VRAM on "
661 dev_priv
->active_master
= NULL
;
664 ttm_lock_set_kill(&vmaster
->lock
, false, SIGTERM
);
666 ttm_vt_unlock(&vmaster
->lock
);
667 BUG_ON(vmw_fp
->locked_master
!= file_priv
->master
);
668 drm_master_put(&vmw_fp
->locked_master
);
671 dev_priv
->active_master
= vmaster
;
676 if (!dev_priv
->enable_fb
) {
677 mutex_lock(&dev_priv
->hw_mutex
);
678 vmw_write(dev_priv
, SVGA_REG_TRACES
, 1);
679 mutex_unlock(&dev_priv
->hw_mutex
);
680 vmw_kms_restore_vga(dev_priv
);
681 vmw_3d_resource_dec(dev_priv
);
686 static void vmw_master_drop(struct drm_device
*dev
,
687 struct drm_file
*file_priv
,
690 struct vmw_private
*dev_priv
= vmw_priv(dev
);
691 struct vmw_fpriv
*vmw_fp
= vmw_fpriv(file_priv
);
692 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
696 * Make sure the master doesn't disappear while we have
700 vmw_fp
->locked_master
= drm_master_get(file_priv
->master
);
701 ret
= ttm_vt_lock(&vmaster
->lock
, false, vmw_fp
->tfile
);
703 if (unlikely((ret
!= 0))) {
704 DRM_ERROR("Unable to lock TTM at VT switch.\n");
705 drm_master_put(&vmw_fp
->locked_master
);
708 ttm_lock_set_kill(&vmaster
->lock
, true, SIGTERM
);
710 if (!dev_priv
->enable_fb
) {
711 ret
= ttm_bo_evict_mm(&dev_priv
->bdev
, TTM_PL_VRAM
);
712 if (unlikely(ret
!= 0))
713 DRM_ERROR("Unable to clean VRAM on master drop.\n");
714 mutex_lock(&dev_priv
->hw_mutex
);
715 vmw_write(dev_priv
, SVGA_REG_TRACES
, 1);
716 mutex_unlock(&dev_priv
->hw_mutex
);
717 vmw_kms_restore_vga(dev_priv
);
718 vmw_3d_resource_dec(dev_priv
);
721 dev_priv
->active_master
= &dev_priv
->fbdev_master
;
722 ttm_lock_set_kill(&dev_priv
->fbdev_master
.lock
, false, SIGTERM
);
723 ttm_vt_unlock(&dev_priv
->fbdev_master
.lock
);
725 if (dev_priv
->enable_fb
)
730 static void vmw_remove(struct pci_dev
*pdev
)
732 struct drm_device
*dev
= pci_get_drvdata(pdev
);
737 static int vmwgfx_pm_notifier(struct notifier_block
*nb
, unsigned long val
,
740 struct vmw_private
*dev_priv
=
741 container_of(nb
, struct vmw_private
, pm_nb
);
742 struct vmw_master
*vmaster
= dev_priv
->active_master
;
745 case PM_HIBERNATION_PREPARE
:
746 case PM_SUSPEND_PREPARE
:
747 ttm_suspend_lock(&vmaster
->lock
);
750 * This empties VRAM and unbinds all GMR bindings.
751 * Buffer contents is moved to swappable memory.
753 ttm_bo_swapout_all(&dev_priv
->bdev
);
755 case PM_POST_HIBERNATION
:
756 case PM_POST_SUSPEND
:
757 ttm_suspend_unlock(&vmaster
->lock
);
759 case PM_RESTORE_PREPARE
:
761 case PM_POST_RESTORE
:
770 * These might not be needed with the virtual SVGA device.
773 int vmw_pci_suspend(struct pci_dev
*pdev
, pm_message_t state
)
775 pci_save_state(pdev
);
776 pci_disable_device(pdev
);
777 pci_set_power_state(pdev
, PCI_D3hot
);
781 int vmw_pci_resume(struct pci_dev
*pdev
)
783 pci_set_power_state(pdev
, PCI_D0
);
784 pci_restore_state(pdev
);
785 return pci_enable_device(pdev
);
788 static struct drm_driver driver
= {
789 .driver_features
= DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
|
791 .load
= vmw_driver_load
,
792 .unload
= vmw_driver_unload
,
793 .firstopen
= vmw_firstopen
,
794 .lastclose
= vmw_lastclose
,
795 .irq_preinstall
= vmw_irq_preinstall
,
796 .irq_postinstall
= vmw_irq_postinstall
,
797 .irq_uninstall
= vmw_irq_uninstall
,
798 .irq_handler
= vmw_irq_handler
,
799 .get_vblank_counter
= vmw_get_vblank_counter
,
800 .reclaim_buffers_locked
= NULL
,
801 .get_map_ofs
= drm_core_get_map_ofs
,
802 .get_reg_ofs
= drm_core_get_reg_ofs
,
803 .ioctls
= vmw_ioctls
,
804 .num_ioctls
= DRM_ARRAY_SIZE(vmw_ioctls
),
805 .dma_quiescent
= NULL
, /*vmw_dma_quiescent, */
806 .master_create
= vmw_master_create
,
807 .master_destroy
= vmw_master_destroy
,
808 .master_set
= vmw_master_set
,
809 .master_drop
= vmw_master_drop
,
810 .open
= vmw_driver_open
,
811 .postclose
= vmw_postclose
,
813 .owner
= THIS_MODULE
,
815 .release
= drm_release
,
816 .unlocked_ioctl
= vmw_unlocked_ioctl
,
819 .fasync
= drm_fasync
,
820 #if defined(CONFIG_COMPAT)
821 .compat_ioctl
= drm_compat_ioctl
,
825 .name
= VMWGFX_DRIVER_NAME
,
826 .id_table
= vmw_pci_id_list
,
828 .remove
= vmw_remove
,
829 .suspend
= vmw_pci_suspend
,
830 .resume
= vmw_pci_resume
832 .name
= VMWGFX_DRIVER_NAME
,
833 .desc
= VMWGFX_DRIVER_DESC
,
834 .date
= VMWGFX_DRIVER_DATE
,
835 .major
= VMWGFX_DRIVER_MAJOR
,
836 .minor
= VMWGFX_DRIVER_MINOR
,
837 .patchlevel
= VMWGFX_DRIVER_PATCHLEVEL
840 static int vmw_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
842 return drm_get_pci_dev(pdev
, ent
, &driver
);
845 static int __init
vmwgfx_init(void)
848 ret
= drm_init(&driver
);
850 DRM_ERROR("Failed initializing DRM.\n");
854 static void __exit
vmwgfx_exit(void)
859 module_init(vmwgfx_init
);
860 module_exit(vmwgfx_exit
);
862 MODULE_AUTHOR("VMware Inc. and others");
863 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
864 MODULE_LICENSE("GPL and additional rights");